lustre/kernel_patches/patches/linux-2.6.9-network_driver-for-sk98.patch

   1 diff -ruN linux-2.6.9.old/Documentation/networking/sk98lin.txt linux-2.6.9.new/Documentation/networking/sk98lin.txt
   2 --- linux-2.6.9.old/Documentation/networking/sk98lin.txt        2004-10-19 05:54:38.000000000 +0800
   3 +++ linux-2.6.9.new/Documentation/networking/sk98lin.txt        2006-12-07 14:35:03.000000000 +0800
   4 @@ -1,38 +1,56 @@
   5 -(C)Copyright 1999-2004 Marvell(R).
   6 -All rights reserved
   7 -===========================================================================
   8 +(C)Copyright 1999-2005 Marvell(R).
   9 +All rights reserved.
  10 +================================================================================
  11
  12 -sk98lin.txt created 13-Feb-2004
  13 +sk98lin.txt created 20-Jun-2005
  14
  15 -Readme File for sk98lin v6.23
  16 -Marvell Yukon/SysKonnect SK-98xx Gigabit Ethernet Adapter family driver for LINUX
  17 +Readme File for sk98lin v8.23.1.3
  18 +Marvell Yukon/SysKonnect SK-98xx Gigabit Ethernet Adapter driver for LINUX
  19
  20  This file contains
  21   1  Overview
  22 - 2  Required Files
  23 - 3  Installation
  24 -    3.1  Driver Installation
  25 -    3.2  Inclusion of adapter at system start
  26 - 4  Driver Parameters
  27 -    4.1  Per-Port Parameters
  28 -    4.2  Adapter Parameters
  29 - 5  Large Frame Support
  30 - 6  VLAN and Link Aggregation Support (IEEE 802.1, 802.1q, 802.3ad)
  31 - 7  Troubleshooting
  32 + 2  Supported Functions
  33 + 3  Required Files
  34 + 4  Installation
  35 +    4.1  Driver Installation
  36 +    4.2  Inclusion of adapter at system start
  37 + 5  Driver Parameters
  38 +    5.1  Per-Port Parameters
  39 +    5.2  Adapter Parameters
  40 + 6  Ethtool Support
  41 + 7  Large Frame Support
  42 + 8  VLAN and Link Aggregation Support (IEEE 802.1, 802.1q, 802.3ad)
  43 + 9  Wake on Lan support
  44 +10  Troubleshooting
  45
  46 -===========================================================================
  47 +================================================================================
  48
  49
  50  1  Overview
  51  ===========
  52
  53 -The sk98lin driver supports the Marvell Yukon and SysKonnect
  54 -SK-98xx/SK-95xx compliant Gigabit Ethernet Adapter on Linux. It has
  55 -been tested with Linux on Intel/x86 machines.
  56 +The sk98lin driver supports the Marvell Yukon, Yukon EC/FE, Yukon 2
  57 +and SysKonnect SK-98xx/SK-95xx compliant Gigabit Ethernet Adapter on Linux.
  58 +It has been tested with Linux on Intel/x86, x86_64 and IA64 machines.
  59  ***
  60
  61 +2  Supported Functions
  62 +======================
  63 +
  64 +The following functions are supported by the driver:
  65
  66 -2  Required Files
  67 +   NOTE 1: The hardware support depends on the used card
  68 +
  69 +   - RX/TX HW Checksum
  70 +   - Hardware interrupt moderation (static/dynamic)
  71 +   - Transmit poll
  72 +   - Zerocopy/Scatter-Gather
  73 +   - Ethtool support
  74 +   - Wake on Lan (Magic Packet only) (From suspend and APM only)
  75 +   - DualNet
  76 +
  77 +
  78 +3  Required Files
  79  =================
  80
  81  The linux kernel source.
  82 @@ -40,16 +58,14 @@
  83  ***
  84
  85
  86 -3  Installation
  87 +4  Installation
  88  ===============
  89
  90  It is recommended to download the latest version of the driver from the
  91 -SysKonnect web site www.syskonnect.com. If you have downloaded the latest
  92 -driver, the Linux kernel has to be patched before the driver can be
  93 -installed. For details on how to patch a Linux kernel, refer to the
  94 -patch.txt file.
  95 +SysKonnect web site www.syskonnect.com. For details on Installation
  96 +Instructions for sk98lin Driver, please refer to the README.txt file.
  97
  98 -3.1  Driver Installation
  99 +4.1  Driver Installation
 100  ------------------------
 101
 102  The following steps describe the actions that are required to install
 103 @@ -110,13 +126,13 @@
 104
 105     NOTE 1: If you have more than one Marvell Yukon or SysKonnect SK-98xx
 106             adapter installed, the adapters will be listed as 'eth0',
 107 -                   'eth1', 'eth2', etc.
 108 -                   For each adapter, repeat steps 3 and 4 below.
 109 +           'eth1', 'eth2', etc.
 110 +           For each adapter, repeat steps 3 and 4 below.
 111
 112     NOTE 2: If you have other Ethernet adapters installed, your Marvell
 113             Yukon or SysKonnect SK-98xx adapter will be mapped to the
 114 -                   next available number, e.g. 'eth1'. The mapping is executed
 115 -                   automatically.
 116 +           next available number, e.g. 'eth1'. The mapping is executed
 117 +           automatically.
 118             The module installation message (displayed either in a system
 119             log file or on the console) prints a line for each adapter
 120             found containing the corresponding 'ethX'.
 121 @@ -153,7 +169,7 @@
 122  1. Execute the command "ifconfig eth0 down".
 123  2. Execute the command "rmmod sk98lin".
 124
 125 -3.2  Inclusion of adapter at system start
 126 +4.2  Inclusion of adapter at system start
 127  -----------------------------------------
 128
 129  Since a large number of different Linux distributions are
 130 @@ -165,7 +181,8 @@
 131
 132  ***
 133
 134 -4  Driver Parameters
 135 +
 136 +5  Driver Parameters
 137  ====================
 138
 139  Parameters can be set at the command line after the module has been
 140 @@ -174,7 +191,7 @@
 141  to the driver module.
 142
 143  If you use the kernel module loader, you can set driver parameters
 144 -in the file /etc/modprobe.conf (or /etc/modules.conf in 2.4 or earlier).
 145 +in the file /etc/modules.conf (or old name: /etc/conf.modules).
 146  To set the driver parameters in this file, proceed as follows:
 147
 148  1. Insert a line of the form :
 149 @@ -208,7 +225,7 @@
 150        more adapters, adjust this and recompile.
 151
 152
 153 -4.1  Per-Port Parameters
 154 +5.1  Per-Port Parameters
 155  ------------------------
 156
 157  These settings are available for each port on the adapter.
 158 @@ -282,7 +299,7 @@
 159  with this parameter.
 160
 161
 162 -4.2  Adapter Parameters
 163 +5.2  Adapter Parameters
 164  -----------------------
 165
 166  Connection Type (SK-98xx V2.0 copper adapters only)
 167 @@ -379,7 +396,6 @@
 168  is tremendous. On the other hand, selecting a very short moderation time might
 169  compensate the use of any moderation being applied.
 170
 171 -
 172  Preferred Port
 173  --------------
 174  Parameter:    PrefPort
 175 @@ -394,7 +410,7 @@
 176  ------------------------------------------------
 177  Parameter:    RlmtMode
 178  Values:       CheckLinkState,CheckLocalPort, CheckSeg, DualNet
 179 -Default:      CheckLinkState
 180 +Default:      CheckLinkState (DualNet on dual port adapters)
 181
 182  RLMT monitors the status of the port. If the link of the active port
 183  fails, RLMT switches immediately to the standby link. The virtual link is
 184 @@ -429,10 +445,94 @@
 185        where a network path between the ports on one adapter exists.
 186        Moreover, they are not designed to work where adapters are connected
 187        back-to-back.
 188 +
 189 +LowLatency
 190 +----------
 191 +Parameter:    LowLatency
 192 +Values:       On, Off
 193 +Default:      Off
 194 +
 195 +This is used to reduce the packet latency time of the adapter. Setting the
 196 +LowLatency parameter to 'On' forces the adapter to pass any received packet
 197 +immediately to upper network layers and to send out any transmit packet as
 198 +fast as possible.
 199 +
 200 +NOTE 1: The system load increases if LowLatency is set to 'On' and a lot
 201 +        of data packets are transmitted and received.
 202 +
 203 +NOTE 2: This parameter is only used on adapters which are based on
 204 +        PCI Express compatible chipsets.
 205  ***
 206
 207
 208 -5  Large Frame Support
 209 +6  Ethtool Support
 210 +==================
 211 +
 212 +The sk98lin driver provides built-in ethtool support. The ethtool
 213 +can be used to display or modify interface specific configurations.
 214 +
 215 +Ethtool commands are invoked using a single parameter which reflects
 216 +the requested ethtool command plus an optional number of parameters
 217 +which belong to the desired command.
 218 +
 219 +It is not the intention of this section to explain the ethtool command
 220 +line tool and all its options. For further information refer to the
 221 +manpage of the ethtool.  This sections describes only the sk98lin
 222 +driver supported ethtool commands.
 223 +
 224 +Pause Parameters
 225 +----------------
 226 +Query command:  -a
 227 +Set command:    -A [autoneg on|off] [rx on|off] [tx on|off]
 228 +Sample:         ethtool -A eth0 rx off tx off
 229 +
 230 +Coalescing Parameters
 231 +---------------------
 232 +Query command:  -c
 233 +Set command:    -C [sample-interval I]
 234 +                   [rx-usecs N] [tx-usecs N]
 235 +                   [rx-usecs-low N] [tx-usecs-low N]
 236 +                   [rx-usecs-high N] [tx-usecs-high N]
 237 +Parameter:      I = Length of sample interval, in seconds
 238 +                    (supported values range from 1...10)
 239 +                N = Length of coalescing interval, in microseconds
 240 +                    (supported values range from 25...33,333)
 241 +Sample:         ethtool -C eth2 rx-usecs 500 tx-usecs 500
 242 +
 243 +NOTE: The sk98lin driver does not support different settings
 244 +      for the rx and tx interrupt coalescing parameters.
 245 +
 246 +Driver Information
 247 +------------------
 248 +Query command:  -i
 249 +Sample:         ethtool -i eth1
 250 +
 251 +Checksumming Parameters
 252 +-----------------------
 253 +Query command:  -k
 254 +Set command:    -K [rx on|off] [tx on|off] [sg on|off]
 255 +Sample:         ethtool -K eth0 sg off
 256 +
 257 +Locate NIC Command
 258 +------------------
 259 +Query command:  -p [N]
 260 +Parameter:      N = Amount of time to perform locate NIC command, in seconds
 261 +Sample:         ethtool -p 10 eth1
 262 +
 263 +Driver-specific Statistics
 264 +--------------------------
 265 +Query command:  -S
 266 +Sample:         ethtool -S eth0
 267 +
 268 +Setting Parameters
 269 +------------------
 270 +Set command:    -s [speed 10|100|1000] [duplex half|full]
 271 +                   [autoneg on|off] [wol gd]
 272 +Sample:         ethtool -s eth2 wol d
 273 +***
 274 +
 275 +
 276 +7  Large Frame Support
 277  ======================
 278
 279  The driver supports large frames (also called jumbo frames). Using large
 280 @@ -444,10 +544,10 @@
 281        ifconfig eth0 mtu 9000
 282  This will only work if you have two adapters connected back-to-back
 283  or if you use a switch that supports large frames. When using a switch,
 284 -it should be configured to allow large frames and auto-negotiation should
 285 -be set to OFF. The setting must be configured on all adapters that can be
 286 -reached by the large frames. If one adapter is not set to receive large
 287 -frames, it will simply drop them.
 288 +it should be configured to allow large frames. The setting must be
 289 +configured on all adapters that can be reached by the large frames.
 290 +If one adapter is not set to receive large frames, it will simply drop
 291 +them.
 292
 293  You can switch back to the standard ethernet frame size by executing the
 294  following command:
 295 @@ -459,7 +559,7 @@
 296  ***
 297
 298
 299 -6  VLAN and Link Aggregation Support (IEEE 802.1, 802.1q, 802.3ad)
 300 +8  VLAN and Link Aggregation Support (IEEE 802.1, 802.1q, 802.3ad)
 301  ==================================================================
 302
 303  The Marvell Yukon/SysKonnect Linux drivers are able to support VLAN and
 304 @@ -477,8 +577,21 @@
 305        cause problems when unloading the driver.
 306
 307
 308 -7  Troubleshooting
 309 -==================
 310 +9  Wake on Lan support
 311 +======================
 312 +
 313 +The sk98lin driver supports wake up from suspend mode with MagicPacket
 314 +on APM systems. Wake on Lan support is enabled by default. To disable it
 315 +please use the ethtool.
 316 +
 317 +NOTE 1: APM support has to be enabled in BIOS and in the kernel.
 318 +
 319 +NOTE 2: Refer to the kernel documentation for additional requirements
 320 +        regarding APM support.
 321 +
 322 +
 323 +10  Troubleshooting
 324 +===================
 325
 326  If any problems occur during the installation process, check the
 327  following list:
 328 diff -ruN linux-2.6.9.old/drivers/net/Kconfig linux-2.6.9.new/drivers/net/Kconfig
 329 --- linux-2.6.9.old/drivers/net/Kconfig 2006-12-07 14:37:37.000000000 +0800
 330 +++ linux-2.6.9.new/drivers/net/Kconfig 2006-12-07 14:45:12.000000000 +0800
 331 @@ -2071,6 +2071,7 @@
 332           To compile this driver as a module, choose M here: the module
 333           will be called sky2.  This is recommended.
 334
 335 +
 336  config SK98LIN
 337         tristate "Marvell Yukon Chipset / SysKonnect SK-98xx Support"
 338         depends on PCI
 339 @@ -2080,6 +2081,22 @@
 340           by this driver:
 341             - 3Com 3C940 Gigabit LOM Ethernet Adapter
 342             - 3Com 3C941 Gigabit LOM Ethernet Adapter
 343 +           - 88E8021 Marvell 1000 Mbit PCI-X, single Port Copper
 344 +           - 88E8021 Marvell 1000 Mbit PCI-X, single Port Fiber LX
 345 +           - 88E8021 Marvell 1000 Mbit PCI-X, single Port Fiber SX
 346 +           - 88E8022 Marvell 1000 Mbit PCI-X, dual Port Copper
 347 +           - 88E8022 Marvell 1000 Mbit PCI-X, dual Port Copper (Gateway)
 348 +           - 88E8022 Marvell 1000 Mbit PCI-X, dual Port Fiber LX
 349 +           - 88E8022 Marvell 1000 Mbit PCI-X, dual Port Fiber SX
 350 +           - 88E8061 Marvell 1000 Mbit PCI-E, single Port Copper
 351 +           - 88E8061 Marvell 1000 Mbit PCI-E, single Port Fiber LX
 352 +           - 88E8061 Marvell 1000 Mbit PCI-E, single Port Fiber SX
 353 +           - 88E8062 Marvell 1000 Mbit PCI-E, dual Port Copper
 354 +           - 88E8062 Marvell 1000 Mbit PCI-E, dual Port Copper (Gateway)
 355 +           - 88E8062 Marvell 1000 Mbit PCI-E, dual Port Fiber LX
 356 +           - 88E8062 Marvell 1000 Mbit PCI-E, dual Port Fiber SX
 357 +           - Abocom EFE3K - 10/100 Ethernet Expresscard
 358 +           - Abocom EGE5K - Giga Ethernet Expresscard
 359             - Allied Telesyn AT-2970LX Gigabit Ethernet Adapter
 360             - Allied Telesyn AT-2970LX/2SC Gigabit Ethernet Adapter
 361             - Allied Telesyn AT-2970SX Gigabit Ethernet Adapter
 362 @@ -2090,31 +2107,79 @@
 363             - Allied Telesyn AT-2971T Gigabit Ethernet Adapter
 364             - Belkin Gigabit Desktop Card 10/100/1000Base-T Adapter, Copper RJ-45
 365             - DGE-530T Gigabit Ethernet Adapter
 366 +           - DGE-560T Gigabit Ethernet Adapter
 367             - EG1032 v2 Instant Gigabit Network Adapter
 368             - EG1064 v2 Instant Gigabit Network Adapter
 369 -           - Marvell 88E8001 Gigabit LOM Ethernet Adapter (Abit)
 370 -           - Marvell 88E8001 Gigabit LOM Ethernet Adapter (Albatron)
 371 -           - Marvell 88E8001 Gigabit LOM Ethernet Adapter (Asus)
 372 -           - Marvell 88E8001 Gigabit LOM Ethernet Adapter (ECS)
 373 -           - Marvell 88E8001 Gigabit LOM Ethernet Adapter (Epox)
 374 -           - Marvell 88E8001 Gigabit LOM Ethernet Adapter (Foxconn)
 375 -           - Marvell 88E8001 Gigabit LOM Ethernet Adapter (Gigabyte)
 376 -           - Marvell 88E8001 Gigabit LOM Ethernet Adapter (Iwill)
 377 -           - Marvell 88E8050 Gigabit LOM Ethernet Adapter (Intel)
 378 +           - Marvell 88E8001 Gigabit Ethernet Controller (Abit)
 379 +           - Marvell 88E8001 Gigabit Ethernet Controller (Albatron)
 380 +           - Marvell 88E8001 Gigabit Ethernet Controller (Asus)
 381 +           - Marvell 88E8001 Gigabit Ethernet Controller (Chaintech)
 382 +           - Marvell 88E8001 Gigabit Ethernet Controller (ECS)
 383 +           - Marvell 88E8001 Gigabit Ethernet Controller (Epox)
 384 +           - Marvell 88E8001 Gigabit Ethernet Controller (Foxconn)
 385 +           - Marvell 88E8001 Gigabit Ethernet Controller (Gigabyte)
 386 +           - Marvell 88E8001 Gigabit Ethernet Controller (Iwill)
 387 +           - Marvell 88E8035 Fast Ethernet Controller (LGE)
 388 +           - Marvell 88E8035 Fast Ethernet Controller (Toshiba)
 389 +           - Marvell 88E8036 Fast Ethernet Controller (Arima)
 390 +           - Marvell 88E8036 Fast Ethernet Controller (Compal)
 391 +           - Marvell 88E8036 Fast Ethernet Controller (Inventec)
 392 +           - Marvell 88E8036 Fast Ethernet Controller (LGE)
 393 +           - Marvell 88E8036 Fast Ethernet Controller (Mitac)
 394 +           - Marvell 88E8036 Fast Ethernet Controller (Panasonic)
 395 +           - Marvell 88E8036 Fast Ethernet Controller (Quanta)
 396 +           - Marvell 88E8036 Fast Ethernet Controller (Toshiba)
 397 +           - Marvell 88E8036 Fast Ethernet Controller (Wistron)
 398 +           - Marvell 88E8050 Gigabit Ethernet Controller (Gateway)
 399 +           - Marvell 88E8050 Gigabit Ethernet Controller (Intel)
 400 +           - Marvell 88E8052 Gigabit Ethernet Controller (ASRock)
 401 +           - Marvell 88E8052 Gigabit Ethernet Controller (Aopen)
 402 +           - Marvell 88E8052 Gigabit Ethernet Controller (Asus)
 403 +           - Marvell 88E8052 Gigabit Ethernet Controller (Gateway)
 404 +           - Marvell 88E8052 Gigabit Ethernet Controller (Gigabyte)
 405 +           - Marvell 88E8052 Gigabit Ethernet Controller (MSI)
 406 +           - Marvell 88E8052 Gigabit Ethernet Controller (Wistron)
 407 +           - Marvell 88E8053 Gigabit Ethernet Controller (ASRock)
 408 +           - Marvell 88E8053 Gigabit Ethernet Controller (Albatron)
 409 +           - Marvell 88E8053 Gigabit Ethernet Controller (Aopen)
 410 +           - Marvell 88E8053 Gigabit Ethernet Controller (Arima)
 411 +           - Marvell 88E8053 Gigabit Ethernet Controller (Asus)
 412 +           - Marvell 88E8053 Gigabit Ethernet Controller (Chaintech)
 413 +           - Marvell 88E8053 Gigabit Ethernet Controller (Clevo)
 414 +           - Marvell 88E8053 Gigabit Ethernet Controller (Compal)
 415 +           - Marvell 88E8053 Gigabit Ethernet Controller (DFI)
 416 +           - Marvell 88E8053 Gigabit Ethernet Controller (ECS)
 417 +           - Marvell 88E8053 Gigabit Ethernet Controller (Epox)
 418 +           - Marvell 88E8053 Gigabit Ethernet Controller (Gigabyte)
 419 +           - Marvell 88E8053 Gigabit Ethernet Controller (Inventec)
 420 +           - Marvell 88E8053 Gigabit Ethernet Controller (LGE)
 421 +           - Marvell 88E8053 Gigabit Ethernet Controller (MSI)
 422 +           - Marvell 88E8053 Gigabit Ethernet Controller (Mitac)
 423 +           - Marvell 88E8053 Gigabit Ethernet Controller (Panasonic)
 424 +           - Marvell 88E8053 Gigabit Ethernet Controller (Quanta)
 425 +           - Marvell 88E8053 Gigabit Ethernet Controller (SOYO)
 426 +           - Marvell 88E8053 Gigabit Ethernet Controller (Shuttle)
 427 +           - Marvell 88E8053 Gigabit Ethernet Controller (Toshiba)
 428 +           - Marvell 88E8053 Gigabit Ethernet Controller (Trigem)
 429 +           - Marvell RDK-8001
 430             - Marvell RDK-8001 Adapter
 431             - Marvell RDK-8002 Adapter
 432 +           - Marvell RDK-8003
 433             - Marvell RDK-8003 Adapter
 434             - Marvell RDK-8004 Adapter
 435             - Marvell RDK-8006 Adapter
 436             - Marvell RDK-8007 Adapter
 437             - Marvell RDK-8008 Adapter
 438             - Marvell RDK-8009 Adapter
 439 -           - Marvell RDK-8010 Adapter
 440 +           - Marvell RDK-8010
 441             - Marvell RDK-8011 Adapter
 442             - Marvell RDK-8012 Adapter
 443 -           - Marvell RDK-8052 Adapter
 444 -           - Marvell Yukon Gigabit Ethernet 10/100/1000Base-T Adapter (32 bit)
 445 -           - Marvell Yukon Gigabit Ethernet 10/100/1000Base-T Adapter (64 bit)
 446 +           - Marvell RDK-8035
 447 +           - Marvell RDK-8036
 448 +           - Marvell RDK-8052
 449 +           - Marvell RDK-8053
 450 +           - Marvell Yukon Gigabit Ethernet 10/100/1000Base-T Controller (32 bit)
 451 +           - Marvell Yukon Gigabit Ethernet 10/100/1000Base-T Controller (64 bit)
 452             - N-Way PCI-Bus Giga-Card 1000/100/10Mbps(L)
 453             - SK-9521 10/100/1000Base-T Adapter
 454             - SK-9521 V2.0 10/100/1000Base-T Adapter
 455 @@ -2134,6 +2199,14 @@
 456             - SK-9871 Gigabit Ethernet Server Adapter (SK-NET GE-ZX)
 457             - SK-9871 V2.0 Gigabit Ethernet 1000Base-ZX Adapter
 458             - SK-9872 Gigabit Ethernet Server Adapter (SK-NET GE-ZX dual link)
 459 +           - SK-9S21 Server Adapter
 460 +           - SK-9S22 Server Adapter
 461 +           - SK-9S24 Server Adapter
 462 +           - SK-9S34 Server Adapter
 463 +           - SK-9S81 Server Adapter
 464 +           - SK-9S82 Server Adapter
 465 +           - SK-9S91 Server Adapter
 466 +           - SK-9S92 Server Adapter
 467             - SMC EZ Card 1000 (SMC9452TXV.2)
 468
 469           The adapters support Jumbo Frames.
 470 @@ -2147,8 +2220,9 @@
 471
 472           If you want to compile this driver as a module ( = code which can be
 473           inserted in and removed from the running kernel whenever you want),
 474 -         say M here and read Documentation/kbuild/modules.txt. The module will
 475 -         be called sk98lin. This is recommended.
 476 +         say M here and read Documentation/modules.txt. This is recommended.
 477 +         The module will be called sk98lin. This is recommended.
 478 +
 479
 480  config VIA_VELOCITY
 481         tristate "VIA Velocity support"
 482 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/lm80.h linux-2.6.9.new/drivers/net/sk98lin/h/lm80.h
 483 --- linux-2.6.9.old/drivers/net/sk98lin/h/lm80.h        2004-10-19 05:55:06.000000000 +0800
 484 +++ linux-2.6.9.new/drivers/net/sk98lin/h/lm80.h        2006-12-07 14:35:03.000000000 +0800
 485 @@ -2,8 +2,8 @@
 486   *
 487   * Name:       lm80.h
 488   * Project:    Gigabit Ethernet Adapters, Common Modules
 489 - * Version:    $Revision: 1.6 $
 490 - * Date:       $Date: 2003/05/13 17:26:52 $
 491 + * Version:    $Revision: 2.1 $
 492 + * Date:       $Date: 2003/10/27 14:16:08 $
 493   * Purpose:    Contains all defines for the LM80 Chip
 494   *             (National Semiconductor).
 495   *
 496 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/skaddr.h linux-2.6.9.new/drivers/net/sk98lin/h/skaddr.h
 497 --- linux-2.6.9.old/drivers/net/sk98lin/h/skaddr.h      2004-10-19 05:54:30.000000000 +0800
 498 +++ linux-2.6.9.new/drivers/net/sk98lin/h/skaddr.h      2006-12-07 14:35:03.000000000 +0800
 499 @@ -2,8 +2,8 @@
 500   *
 501   * Name:       skaddr.h
 502   * Project:    Gigabit Ethernet Adapters, ADDR-Modul
 503 - * Version:    $Revision: 1.29 $
 504 - * Date:       $Date: 2003/05/13 16:57:24 $
 505 + * Version:    $Revision: 2.1 $
 506 + * Date:       $Date: 2003/10/27 14:16:07 $
 507   * Purpose:    Header file for Address Management (MC, UC, Prom).
 508   *
 509   ******************************************************************************/
 510 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/skcsum.h linux-2.6.9.new/drivers/net/sk98lin/h/skcsum.h
 511 --- linux-2.6.9.old/drivers/net/sk98lin/h/skcsum.h      2004-10-19 05:53:10.000000000 +0800
 512 +++ linux-2.6.9.new/drivers/net/sk98lin/h/skcsum.h      2006-12-07 14:35:03.000000000 +0800
 513 @@ -2,8 +2,8 @@
 514   *
 515   * Name:       skcsum.h
 516   * Project:    GEnesis - SysKonnect SK-NET Gigabit Ethernet (SK-98xx)
 517 - * Version:    $Revision: 1.10 $
 518 - * Date:       $Date: 2003/08/20 13:59:57 $
 519 + * Version:    $Revision: 2.2 $
 520 + * Date:       $Date: 2003/12/29 15:37:26 $
 521   * Purpose:    Store/verify Internet checksum in send/receive packets.
 522   *
 523   ******************************************************************************/
 524 @@ -157,9 +157,7 @@
 525  typedef struct s_Csum {
 526         /* Enabled receive SK_PROTO_XXX bit flags. */
 527         unsigned ReceiveFlags[SK_MAX_NETS];
 528 -#ifdef TX_CSUM
 529         unsigned TransmitFlags[SK_MAX_NETS];
 530 -#endif /* TX_CSUM */
 531
 532         /* The protocol statistics structure; one per supported protocol. */
 533         SKCS_PROTO_STATS ProtoStats[SK_MAX_NETS][SKCS_NUM_PROTOCOLS];
 534 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/skdebug.h linux-2.6.9.new/drivers/net/sk98lin/h/skdebug.h
 535 --- linux-2.6.9.old/drivers/net/sk98lin/h/skdebug.h     2004-10-19 05:54:26.000000000 +0800
 536 +++ linux-2.6.9.new/drivers/net/sk98lin/h/skdebug.h     2006-12-07 14:35:03.000000000 +0800
 537 @@ -2,8 +2,8 @@
 538   *
 539   * Name:       skdebug.h
 540   * Project:    Gigabit Ethernet Adapters, Common Modules
 541 - * Version:    $Revision: 1.14 $
 542 - * Date:       $Date: 2003/05/13 17:26:00 $
 543 + * Version:    $Revision: 2.3 $
 544 + * Date:       $Date: 2005/01/25 16:44:28 $
 545   * Purpose:    SK specific DEBUG support
 546   *
 547   ******************************************************************************/
 548 @@ -11,13 +11,12 @@
 549  /******************************************************************************
 550   *
 551   *     (C)Copyright 1998-2002 SysKonnect.
 552 - *     (C)Copyright 2002-2003 Marvell.
 553 + *     (C)Copyright 2002-2005 Marvell.
 554   *
 555   *     This program is free software; you can redistribute it and/or modify
 556   *     it under the terms of the GNU General Public License as published by
 557   *     the Free Software Foundation; either version 2 of the License, or
 558   *     (at your option) any later version.
 559 - *
 560   *     The information in this file is provided "AS IS" without warranty.
 561   *
 562   ******************************************************************************/
 563 @@ -28,9 +27,9 @@
 564  #ifdef DEBUG
 565  #ifndef SK_DBG_MSG
 566  #define SK_DBG_MSG(pAC,comp,cat,arg) \
 567 -               if ( ((comp) & SK_DBG_CHKMOD(pAC)) &&   \
 568 -                     ((cat) & SK_DBG_CHKCAT(pAC)) ) {  \
 569 -                       SK_DBG_PRINTF arg ;             \
 570 +               if ( ((comp) & SK_DBG_CHKMOD(pAC)) &&   \
 571 +                     ((cat) & SK_DBG_CHKCAT(pAC)) ) {  \
 572 +                       SK_DBG_PRINTF arg;              \
 573                 }
 574  #endif
 575  #else
 576 @@ -58,6 +57,13 @@
 577  #define SK_DBGMOD_ADDR 0x00000080L     /* ADDR module */
 578  #define SK_DBGMOD_PECP 0x00000100L     /* PECP module */
 579  #define SK_DBGMOD_POWM 0x00000200L     /* Power Management module */
 580 +#ifdef SK_ASF
 581 +#define SK_DBGMOD_ASF  0x00000400L     /* ASF module */
 582 +#endif
 583 +#ifdef SK_LBFO
 584 +#define SK_DBGMOD_LACP 0x00000800L     /* link aggregation control protocol */
 585 +#define SK_DBGMOD_FD   0x00001000L     /* frame distributor (link aggregation) */
 586 +#endif /* SK_LBFO */
 587
 588  /* Debug events */
 589
 590 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/skdrv1st.h linux-2.6.9.new/drivers/net/sk98lin/h/skdrv1st.h
 591 --- linux-2.6.9.old/drivers/net/sk98lin/h/skdrv1st.h    2004-10-19 05:53:06.000000000 +0800
 592 +++ linux-2.6.9.new/drivers/net/sk98lin/h/skdrv1st.h    2006-12-07 14:35:03.000000000 +0800
 593 @@ -2,8 +2,8 @@
 594   *
 595   * Name:       skdrv1st.h
 596   * Project:    GEnesis, PCI Gigabit Ethernet Adapter
 597 - * Version:    $Revision: 1.4 $
 598 - * Date:       $Date: 2003/11/12 14:28:14 $
 599 + * Version:    $Revision: 1.5.2.5 $
 600 + * Date:       $Date: 2005/04/11 09:00:53 $
 601   * Purpose:    First header file for driver and all other modules
 602   *
 603   ******************************************************************************/
 604 @@ -11,7 +11,7 @@
 605  /******************************************************************************
 606   *
 607   *     (C)Copyright 1998-2002 SysKonnect GmbH.
 608 - *     (C)Copyright 2002-2003 Marvell.
 609 + *     (C)Copyright 2002-2005 Marvell.
 610   *
 611   *     This program is free software; you can redistribute it and/or modify
 612   *     it under the terms of the GNU General Public License as published by
 613 @@ -22,20 +22,6 @@
 614   *
 615   ******************************************************************************/
 616
 617 -/******************************************************************************
 618 - *
 619 - * Description:
 620 - *
 621 - * This is the first include file of the driver, which includes all
 622 - * neccessary system header files and some of the GEnesis header files.
 623 - * It also defines some basic items.
 624 - *
 625 - * Include File Hierarchy:
 626 - *
 627 - *     see skge.c
 628 - *
 629 - ******************************************************************************/
 630 -
 631  #ifndef __INC_SKDRV1ST_H
 632  #define __INC_SKDRV1ST_H
 633
 634 @@ -58,6 +44,9 @@
 635
 636  #define SK_ADDR_EQUAL(a1,a2)           (!memcmp(a1,a2,6))
 637
 638 +#define SK_STRNCMP(s1,s2,len)          strncmp(s1,s2,len)
 639 +#define SK_STRCPY(dest,src)            strcpy(dest,src)
 640 +
 641  #include <linux/types.h>
 642  #include <linux/kernel.h>
 643  #include <linux/string.h>
 644 @@ -78,11 +67,7 @@
 645  #include <net/checksum.h>
 646
 647  #define SK_CS_CALCULATE_CHECKSUM
 648 -#ifndef CONFIG_X86_64
 649 -#define SkCsCalculateChecksum(p,l)     ((~ip_compute_csum(p, l)) & 0xffff)
 650 -#else
 651 -#define SkCsCalculateChecksum(p,l)     ((~ip_fast_csum(p, l)) & 0xffff)
 652 -#endif
 653 +#define SkCsCalculateChecksum(p,l)     (~csum_fold(csum_partial(p, l, 0)))
 654
 655  #include       "h/sktypes.h"
 656  #include       "h/skerror.h"
 657 @@ -90,6 +75,10 @@
 658  #include       "h/lm80.h"
 659  #include       "h/xmac_ii.h"
 660
 661 +#ifndef SK_BMU_RX_WM_PEX
 662 +#define SK_BMU_RX_WM_PEX 0x80
 663 +#endif
 664 +
 665  #ifdef __LITTLE_ENDIAN
 666  #define SK_LITTLE_ENDIAN
 667  #else
 668 @@ -188,3 +177,8 @@
 669
 670  #endif
 671
 672 +/*******************************************************************************
 673 + *
 674 + * End of file
 675 + *
 676 + ******************************************************************************/
 677 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/skdrv2nd.h linux-2.6.9.new/drivers/net/sk98lin/h/skdrv2nd.h
 678 --- linux-2.6.9.old/drivers/net/sk98lin/h/skdrv2nd.h    2004-10-19 05:55:29.000000000 +0800
 679 +++ linux-2.6.9.new/drivers/net/sk98lin/h/skdrv2nd.h    2006-12-07 14:35:03.000000000 +0800
 680 @@ -1,17 +1,17 @@
 681  /******************************************************************************
 682   *
 683 - * Name:       skdrv2nd.h
 684 - * Project:    GEnesis, PCI Gigabit Ethernet Adapter
 685 - * Version:    $Revision: 1.10 $
 686 - * Date:       $Date: 2003/12/11 16:04:45 $
 687 - * Purpose:    Second header file for driver and all other modules
 688 + * Name:        skdrv2nd.h
 689 + * Project:     GEnesis, PCI Gigabit Ethernet Adapter
 690 + * Version:     $Revision: 1.29.2.20 $
 691 + * Date:        $Date: 2005/06/17 14:09:50 $
 692 + * Purpose:     Second header file for driver and all other modules
 693   *
 694   ******************************************************************************/
 695
 696  /******************************************************************************
 697   *
 698   *     (C)Copyright 1998-2002 SysKonnect GmbH.
 699 - *     (C)Copyright 2002-2003 Marvell.
 700 + *     (C)Copyright 2002-2005 Marvell.
 701   *
 702   *     This program is free software; you can redistribute it and/or modify
 703   *     it under the terms of the GNU General Public License as published by
 704 @@ -42,10 +42,11 @@
 705  #include "h/skqueue.h"
 706  #include "h/skgehwt.h"
 707  #include "h/sktimer.h"
 708 -#include "h/ski2c.h"
 709 +#include "h/sktwsi.h"
 710  #include "h/skgepnmi.h"
 711  #include "h/skvpd.h"
 712  #include "h/skgehw.h"
 713 +#include "h/sky2le.h"
 714  #include "h/skgeinit.h"
 715  #include "h/skaddr.h"
 716  #include "h/skgesirq.h"
 717 @@ -53,104 +54,178 @@
 718  #include "h/skrlmt.h"
 719  #include "h/skgedrv.h"
 720
 721 +/* Defines for the poll cotroller */
 722 +#ifdef HAVE_POLL_CONTROLLER
 723 +#define SK_POLL_CONTROLLER
 724 +#define CONFIG_SK98LIN_NAPI
 725 +#elif CONFIG_NET_POLL_CONTROLLER
 726 +#define SK_POLL_CONTROLLER
 727 +#define CONFIG_SK98LIN_NAPI
 728 +#endif
 729 +
 730
 731 -extern SK_MBUF         *SkDrvAllocRlmtMbuf(SK_AC*, SK_IOC, unsigned);
 732 -extern void            SkDrvFreeRlmtMbuf(SK_AC*, SK_IOC, SK_MBUF*);
 733 -extern SK_U64          SkOsGetTime(SK_AC*);
 734 -extern int             SkPciReadCfgDWord(SK_AC*, int, SK_U32*);
 735 -extern int             SkPciReadCfgWord(SK_AC*, int, SK_U16*);
 736 -extern int             SkPciReadCfgByte(SK_AC*, int, SK_U8*);
 737 -extern int             SkPciWriteCfgDWord(SK_AC*, int, SK_U32);
 738 -extern int             SkPciWriteCfgWord(SK_AC*, int, SK_U16);
 739 -extern int             SkPciWriteCfgByte(SK_AC*, int, SK_U8);
 740 -extern int             SkDrvEvent(SK_AC*, SK_IOC IoC, SK_U32, SK_EVPARA);
 741 -
 742 -#ifdef SK_DIAG_SUPPORT
 743 -extern int             SkDrvEnterDiagMode(SK_AC *pAc);
 744 -extern int             SkDrvLeaveDiagMode(SK_AC *pAc);
 745 +/******************************************************************************
 746 + *
 747 + * Generic driver defines
 748 + *
 749 + ******************************************************************************/
 750 +
 751 +#define USE_TIST_FOR_RESET     /* Use timestamp for reset */
 752 +#define Y2_RECOVERY            /* use specific recovery yukon2 functions */
 753 +#define Y2_LE_CHECK            /* activate check for LE order */
 754 +#define Y2_SYNC_CHECK          /* activate check for receiver in sync */
 755 +#define SK_YUKON2              /* Enable Yukon2 dual net support */
 756 +#define USE_SK_TX_CHECKSUM     /* use the tx hw checksum driver functionality */
 757 +#define USE_SK_RX_CHECKSUM     /* use the rx hw checksum driver functionality */
 758 +#define USE_SK_TSO_FEATURE     /* use TCP segmentation offload if possible */
 759 +#define SK_COPY_THRESHOLD 50   /* threshold for copying small RX frames;
 760 +                                * 0 avoids copying, 9001 copies all */
 761 +#define SK_MAX_CARD_PARAM 16   /* number of adapters that can be configured via
 762 +                                * command line params */
 763 +//#define USE_TX_COMPLETE      /* use of a transmit complete interrupt */
 764 +#ifndef CONFIG_SK98LIN_NAPI
 765 +#define Y2_RX_CHECK            /* RX Check timestamp */
 766 +#endif
 767 +
 768 +/*
 769 + * use those defines for a compile-in version of the driver instead
 770 + * of command line parameters
 771 + */
 772 +// #define LINK_SPEED_A        {"Auto",}
 773 +// #define LINK_SPEED_B        {"Auto",}
 774 +// #define AUTO_NEG_A  {"Sense",}
 775 +// #define AUTO_NEG_B  {"Sense"}
 776 +// #define DUP_CAP_A   {"Both",}
 777 +// #define DUP_CAP_B   {"Both",}
 778 +// #define FLOW_CTRL_A {"SymOrRem",}
 779 +// #define FLOW_CTRL_B {"SymOrRem",}
 780 +// #define ROLE_A      {"Auto",}
 781 +// #define ROLE_B      {"Auto",}
 782 +// #define PREF_PORT   {"A",}
 783 +// #define CON_TYPE    {"Auto",}
 784 +// #define RLMT_MODE   {"CheckLinkState",}
 785 +
 786 +#ifdef Y2_RECOVERY
 787 +#define CHECK_TRANSMIT_TIMEOUT
 788 +#define Y2_RESYNC_WATERMARK     1000000L
 789  #endif
 790
 791 +
 792 +/******************************************************************************
 793 + *
 794 + * Generic ISR defines
 795 + *
 796 + ******************************************************************************/
 797 +
 798 +#define SkIsrRetVar     irqreturn_t
 799 +#define SkIsrRetNone    IRQ_NONE
 800 +#define SkIsrRetHandled IRQ_HANDLED
 801 +
 802 +#define DEV_KFREE_SKB(skb) dev_kfree_skb(skb)
 803 +#define DEV_KFREE_SKB_IRQ(skb) dev_kfree_skb_irq(skb)
 804 +#define DEV_KFREE_SKB_ANY(skb) dev_kfree_skb_any(skb)
 805 +
 806 +/******************************************************************************
 807 + *
 808 + * Global function prototypes
 809 + *
 810 + ******************************************************************************/
 811 +
 812 +extern SK_MBUF *SkDrvAllocRlmtMbuf(SK_AC*, SK_IOC, unsigned);
 813 +extern void SkDrvFreeRlmtMbuf(SK_AC*, SK_IOC, SK_MBUF*);
 814 +extern SK_U64 SkOsGetTime(SK_AC*);
 815 +extern int SkPciReadCfgDWord(SK_AC*, int, SK_U32*);
 816 +extern int SkPciReadCfgWord(SK_AC*, int, SK_U16*);
 817 +extern int SkPciReadCfgByte(SK_AC*, int, SK_U8*);
 818 +extern int SkPciWriteCfgDWord(SK_AC*, int, SK_U32);
 819 +extern int SkPciWriteCfgWord(SK_AC*, int, SK_U16);
 820 +extern int SkPciWriteCfgByte(SK_AC*, int, SK_U8);
 821 +extern int SkDrvEvent(SK_AC*, SK_IOC IoC, SK_U32, SK_EVPARA);
 822 +extern int SkDrvEnterDiagMode(SK_AC *pAc);
 823 +extern int SkDrvLeaveDiagMode(SK_AC *pAc);
 824 +
 825 +/******************************************************************************
 826 + *
 827 + * Linux specific RLMT buffer structure (SK_MBUF typedef in skdrv1st)!
 828 + *
 829 + ******************************************************************************/
 830 +
 831  struct s_DrvRlmtMbuf {
 832 -       SK_MBUF         *pNext;         /* Pointer to next RLMT Mbuf. */
 833 -       SK_U8           *pData;         /* Data buffer (virtually contig.). */
 834 -       unsigned        Size;           /* Data buffer size. */
 835 -       unsigned        Length;         /* Length of packet (<= Size). */
 836 -       SK_U32          PortIdx;        /* Receiving/transmitting port. */
 837 +       SK_MBUF         *pNext;    /* Pointer to next RLMT Mbuf.       */
 838 +       SK_U8           *pData;    /* Data buffer (virtually contig.). */
 839 +       unsigned         Size;     /* Data buffer size.                */
 840 +       unsigned         Length;   /* Length of packet (<= Size).      */
 841 +       SK_U32           PortIdx;  /* Receiving/transmitting port.     */
 842  #ifdef SK_RLMT_MBUF_PRIVATE
 843 -       SK_RLMT_MBUF    Rlmt;           /* Private part for RLMT. */
 844 -#endif  /* SK_RLMT_MBUF_PRIVATE */
 845 -       struct sk_buff  *pOs;           /* Pointer to message block */
 846 +       SK_RLMT_MBUF     Rlmt;     /* Private part for RLMT.           */
 847 +#endif
 848 +       struct sk_buff  *pOs;      /* Pointer to message block         */
 849  };
 850
 851 +/******************************************************************************
 852 + *
 853 + * Linux specific TIME defines
 854 + *
 855 + ******************************************************************************/
 856
 857 -/*
 858 - * Time macros
 859 - */
 860  #if SK_TICKS_PER_SEC == 100
 861  #define SK_PNMI_HUNDREDS_SEC(t)        (t)
 862  #else
 863 -#define SK_PNMI_HUNDREDS_SEC(t)        ((((unsigned long)t) * 100) / \
 864 -                                                                               (SK_TICKS_PER_SEC))
 865 +#define SK_PNMI_HUNDREDS_SEC(t) ((((unsigned long)t)*100)/(SK_TICKS_PER_SEC))
 866  #endif
 867
 868 -/*
 869 - * New SkOsGetTime
 870 - */
 871  #define SkOsGetTimeCurrent(pAC, pUsec) {\
 872         struct timeval t;\
 873         do_gettimeofday(&t);\
 874         *pUsec = ((((t.tv_sec) * 1000000L)+t.tv_usec)/10000);\
 875  }
 876
 877 +/******************************************************************************
 878 + *
 879 + * Linux specific IOCTL defines and typedefs
 880 + *
 881 + ******************************************************************************/
 882
 883 -/*
 884 - * ioctl definitions
 885 - */
 886 -#define                SK_IOCTL_BASE           (SIOCDEVPRIVATE)
 887 -#define                SK_IOCTL_GETMIB         (SK_IOCTL_BASE + 0)
 888 -#define                SK_IOCTL_SETMIB         (SK_IOCTL_BASE + 1)
 889 -#define                SK_IOCTL_PRESETMIB      (SK_IOCTL_BASE + 2)
 890 -#define                SK_IOCTL_GEN            (SK_IOCTL_BASE + 3)
 891 -#define                SK_IOCTL_DIAG           (SK_IOCTL_BASE + 4)
 892 -
 893 -typedef struct s_IOCTL SK_GE_IOCTL;
 894 +#define        SK_IOCTL_BASE       (SIOCDEVPRIVATE)
 895 +#define        SK_IOCTL_GETMIB     (SK_IOCTL_BASE + 0)
 896 +#define        SK_IOCTL_SETMIB     (SK_IOCTL_BASE + 1)
 897 +#define        SK_IOCTL_PRESETMIB  (SK_IOCTL_BASE + 2)
 898 +#define        SK_IOCTL_GEN        (SK_IOCTL_BASE + 3)
 899 +#define        SK_IOCTL_DIAG       (SK_IOCTL_BASE + 4)
 900
 901 +typedef struct s_IOCTL SK_GE_IOCTL;
 902  struct s_IOCTL {
 903         char __user *   pData;
 904         unsigned int    Len;
 905  };
 906
 907 +/******************************************************************************
 908 + *
 909 + * Generic sizes and length definitions
 910 + *
 911 + ******************************************************************************/
 912
 913 -/*
 914 - * define sizes of descriptor rings in bytes
 915 - */
 916 -
 917 -#define                TX_RING_SIZE    (8*1024)
 918 -#define                RX_RING_SIZE    (24*1024)
 919 -
 920 -/*
 921 - * Buffer size for ethernet packets
 922 - */
 923 -#define        ETH_BUF_SIZE    1540
 924 -#define        ETH_MAX_MTU     1514
 925 -#define ETH_MIN_MTU    60
 926 -#define ETH_MULTICAST_BIT      0x01
 927 -#define SK_JUMBO_MTU   9000
 928 -
 929 -/*
 930 - * transmit priority selects the queue: LOW=asynchron, HIGH=synchron
 931 - */
 932 -#define TX_PRIO_LOW    0
 933 -#define TX_PRIO_HIGH   1
 934 +#define TX_RING_SIZE  (24*1024)  /* GEnesis/Yukon */
 935 +#define RX_RING_SIZE  (24*1024)  /* GEnesis/Yukon */
 936 +#define RX_MAX_NBR_BUFFERS   128  /* Yukon-EC/-II */
 937 +#define TX_MAX_NBR_BUFFERS   128  /* Yukon-EC/-II */
 938 +
 939 +#define        ETH_BUF_SIZE        1560  /* multiples of 8 bytes */
 940 +#define        ETH_MAX_MTU         1514
 941 +#define ETH_MIN_MTU         60
 942 +#define ETH_MULTICAST_BIT   0x01
 943 +#define SK_JUMBO_MTU        9000
 944 +
 945 +#define TX_PRIO_LOW    0 /* asynchronous queue */
 946 +#define TX_PRIO_HIGH   1 /* synchronous queue */
 947 +#define DESCR_ALIGN   64 /* alignment of Rx/Tx descriptors */
 948
 949 -/*
 950 - * alignment of rx/tx descriptors
 951 - */
 952 -#define DESCR_ALIGN    64
 953 +/******************************************************************************
 954 + *
 955 + * PNMI related definitions
 956 + *
 957 + ******************************************************************************/
 958
 959 -/*
 960 - * definitions for pnmi. TODO
 961 - */
 962  #define SK_DRIVER_RESET(pAC, IoC)      0
 963  #define SK_DRIVER_SENDEVENT(pAC, IoC)  0
 964  #define SK_DRIVER_SELFTEST(pAC, IoC)   0
 965 @@ -159,20 +234,16 @@
 966  #define SK_DRIVER_SET_MTU(pAc,IoC,i,v) 0
 967  #define SK_DRIVER_PRESET_MTU(pAc,IoC,i,v)      0
 968
 969 -/*
 970 -** Interim definition of SK_DRV_TIMER placed in this file until
 971 -** common modules have boon finallized
 972 -*/
 973 -#define SK_DRV_TIMER                   11
 974 -#define        SK_DRV_MODERATION_TIMER         1
 975 -#define SK_DRV_MODERATION_TIMER_LENGTH  1000000  /* 1 second */
 976 -#define SK_DRV_RX_CLEANUP_TIMER                2
 977 -#define SK_DRV_RX_CLEANUP_TIMER_LENGTH 1000000  /* 100 millisecs */
 978
 979 -/*
 980 -** Definitions regarding transmitting frames
 981 -** any calculating any checksum.
 982 -*/
 983 +/******************************************************************************
 984 + *
 985 + * Various offsets and sizes
 986 + *
 987 + ******************************************************************************/
 988 +
 989 +#define        SK_DRV_MODERATION_TIMER         1   /* id */
 990 +#define SK_DRV_MODERATION_TIMER_LENGTH  1   /* 1 second */
 991 +
 992  #define C_LEN_ETHERMAC_HEADER_DEST_ADDR 6
 993  #define C_LEN_ETHERMAC_HEADER_SRC_ADDR  6
 994  #define C_LEN_ETHERMAC_HEADER_LENTYPE   2
 995 @@ -198,114 +269,430 @@
 996  #define C_PROTO_ID_UDP                  17       /* refer to RFC 790 or Stevens'   */
 997  #define C_PROTO_ID_TCP                  6        /* TCP/IP illustrated for details */
 998
 999 -/* TX and RX descriptors *****************************************************/
1000 +/******************************************************************************
1001 + *
1002 + * Tx and Rx descriptor definitions
1003 + *
1004 + ******************************************************************************/
1005
1006  typedef struct s_RxD RXD; /* the receive descriptor */
1007 -
1008  struct s_RxD {
1009 -       volatile SK_U32 RBControl;      /* Receive Buffer Control */
1010 -       SK_U32          VNextRxd;       /* Next receive descriptor,low dword */
1011 -       SK_U32          VDataLow;       /* Receive buffer Addr, low dword */
1012 -       SK_U32          VDataHigh;      /* Receive buffer Addr, high dword */
1013 -       SK_U32          FrameStat;      /* Receive Frame Status word */
1014 -       SK_U32          TimeStamp;      /* Time stamp from XMAC */
1015 -       SK_U32          TcpSums;        /* TCP Sum 2 / TCP Sum 1 */
1016 -       SK_U32          TcpSumStarts;   /* TCP Sum Start 2 / TCP Sum Start 1 */
1017 -       RXD             *pNextRxd;      /* Pointer to next Rxd */
1018 -       struct sk_buff  *pMBuf;         /* Pointer to Linux' socket buffer */
1019 +       volatile SK_U32  RBControl;     /* Receive Buffer Control            */
1020 +       SK_U32           VNextRxd;      /* Next receive descriptor,low dword */
1021 +       SK_U32           VDataLow;      /* Receive buffer Addr, low dword    */
1022 +       SK_U32           VDataHigh;     /* Receive buffer Addr, high dword   */
1023 +       SK_U32           FrameStat;     /* Receive Frame Status word         */
1024 +       SK_U32           TimeStamp;     /* Time stamp from XMAC              */
1025 +       SK_U32           TcpSums;       /* TCP Sum 2 / TCP Sum 1             */
1026 +       SK_U32           TcpSumStarts;  /* TCP Sum Start 2 / TCP Sum Start 1 */
1027 +       RXD             *pNextRxd;      /* Pointer to next Rxd               */
1028 +       struct sk_buff  *pMBuf;         /* Pointer to Linux' socket buffer   */
1029  };
1030
1031  typedef struct s_TxD TXD; /* the transmit descriptor */
1032 -
1033  struct s_TxD {
1034 -       volatile SK_U32 TBControl;      /* Transmit Buffer Control */
1035 -       SK_U32          VNextTxd;       /* Next transmit descriptor,low dword */
1036 -       SK_U32          VDataLow;       /* Transmit Buffer Addr, low dword */
1037 -       SK_U32          VDataHigh;      /* Transmit Buffer Addr, high dword */
1038 -       SK_U32          FrameStat;      /* Transmit Frame Status Word */
1039 -       SK_U32          TcpSumOfs;      /* Reserved / TCP Sum Offset */
1040 -       SK_U16          TcpSumSt;       /* TCP Sum Start */
1041 -       SK_U16          TcpSumWr;       /* TCP Sum Write */
1042 -       SK_U32          TcpReserved;    /* not used */
1043 -       TXD             *pNextTxd;      /* Pointer to next Txd */
1044 -       struct sk_buff  *pMBuf;         /* Pointer to Linux' socket buffer */
1045 +       volatile SK_U32  TBControl;     /* Transmit Buffer Control            */
1046 +       SK_U32           VNextTxd;      /* Next transmit descriptor,low dword */
1047 +       SK_U32           VDataLow;      /* Transmit Buffer Addr, low dword    */
1048 +       SK_U32           VDataHigh;     /* Transmit Buffer Addr, high dword   */
1049 +       SK_U32           FrameStat;     /* Transmit Frame Status Word         */
1050 +       SK_U32           TcpSumOfs;     /* Reserved / TCP Sum Offset          */
1051 +       SK_U16           TcpSumSt;      /* TCP Sum Start                      */
1052 +       SK_U16           TcpSumWr;      /* TCP Sum Write                      */
1053 +       SK_U32           TcpReserved;   /* not used                           */
1054 +       TXD             *pNextTxd;      /* Pointer to next Txd                */
1055 +       struct sk_buff  *pMBuf;         /* Pointer to Linux' socket buffer    */
1056  };
1057
1058 -/* Used interrupt bits in the interrupts source register *********************/
1059 +/******************************************************************************
1060 + *
1061 + * Generic Yukon-II defines
1062 + *
1063 + ******************************************************************************/
1064
1065 -#define DRIVER_IRQS    ((IS_IRQ_SW)   | \
1066 -                       (IS_R1_F)      |(IS_R2_F)  | \
1067 -                       (IS_XS1_F)     |(IS_XA1_F) | \
1068 -                       (IS_XS2_F)     |(IS_XA2_F))
1069 -
1070 -#define SPECIAL_IRQS   ((IS_HW_ERR)   |(IS_I2C_READY)  | \
1071 -                       (IS_EXT_REG)   |(IS_TIMINT)     | \
1072 -                       (IS_PA_TO_RX1) |(IS_PA_TO_RX2)  | \
1073 -                       (IS_PA_TO_TX1) |(IS_PA_TO_TX2)  | \
1074 -                       (IS_MAC1)      |(IS_LNK_SYNC_M1)| \
1075 -                       (IS_MAC2)      |(IS_LNK_SYNC_M2)| \
1076 -                       (IS_R1_C)      |(IS_R2_C)       | \
1077 -                       (IS_XS1_C)     |(IS_XA1_C)      | \
1078 -                       (IS_XS2_C)     |(IS_XA2_C))
1079 -
1080 -#define IRQ_MASK       ((IS_IRQ_SW)   | \
1081 -                       (IS_R1_B)      |(IS_R1_F)     |(IS_R2_B) |(IS_R2_F) | \
1082 -                       (IS_XS1_B)     |(IS_XS1_F)    |(IS_XA1_B)|(IS_XA1_F)| \
1083 -                       (IS_XS2_B)     |(IS_XS2_F)    |(IS_XA2_B)|(IS_XA2_F)| \
1084 -                       (IS_HW_ERR)    |(IS_I2C_READY)| \
1085 -                       (IS_EXT_REG)   |(IS_TIMINT)   | \
1086 -                       (IS_PA_TO_RX1) |(IS_PA_TO_RX2)| \
1087 -                       (IS_PA_TO_TX1) |(IS_PA_TO_TX2)| \
1088 -                       (IS_MAC1)      |(IS_MAC2)     | \
1089 -                       (IS_R1_C)      |(IS_R2_C)     | \
1090 -                       (IS_XS1_C)     |(IS_XA1_C)    | \
1091 -                       (IS_XS2_C)     |(IS_XA2_C))
1092 +#define LE_SIZE   sizeof(SK_HWLE)
1093 +#define MAX_NUM_FRAGS   (MAX_SKB_FRAGS + 1)
1094 +#define MIN_LEN_OF_LE_TAB   128
1095 +#define MAX_LEN_OF_LE_TAB   4096
1096 +#define MAX_UNUSED_RX_LE_WORKING   8
1097 +#ifdef MAX_FRAG_OVERHEAD
1098 +#undef MAX_FRAG_OVERHEAD
1099 +#define MAX_FRAG_OVERHEAD   4
1100 +#endif
1101 +// as we have a maximum of 16 physical fragments,
1102 +// maximum 1 ADDR64 per physical fragment
1103 +// maximum 4 LEs for VLAN, Csum, LargeSend, Packet
1104 +#define MIN_LE_FREE_REQUIRED   ((16*2) + 4)
1105 +#define IS_GMAC(pAc)   (!pAc->GIni.GIGenesis)
1106 +#ifdef USE_SYNC_TX_QUEUE
1107 +#define TXS_MAX_LE   256
1108 +#else /* !USE_SYNC_TX_QUEUE */
1109 +#define TXS_MAX_LE   0
1110 +#endif
1111 +
1112 +#define ETHER_MAC_HDR_LEN   (6+6+2) // MAC SRC ADDR, MAC DST ADDR, TYPE
1113 +#define IP_HDR_LEN   20
1114 +#define TCP_CSUM_OFFS   0x10
1115 +#define UDP_CSUM_OFFS   0x06
1116 +#define TXA_MAX_LE   256
1117 +#define RX_MAX_LE   256
1118 +#define ST_MAX_LE   (SK_MAX_MACS)*((3*RX_MAX_LE)+(TXA_MAX_LE)+(TXS_MAX_LE))
1119 +
1120 +#if (defined (Y2_RECOVERY) || defined (Y2_LE_CHECK))
1121 +/* event for recovery from tx hang or rx out of sync */
1122 +#define SK_DRV_RECOVER                  17
1123 +#endif
1124 +/******************************************************************************
1125 + *
1126 + * Structures specific for Yukon-II
1127 + *
1128 + ******************************************************************************/
1129 +
1130 +typedef        struct s_frag SK_FRAG;
1131 +struct s_frag {
1132 +       SK_FRAG       *pNext;
1133 +       char          *pVirt;
1134 +       SK_U64         pPhys;
1135 +       unsigned int   FragLen;
1136 +};
1137 +
1138 +typedef        struct s_packet SK_PACKET;
1139 +struct s_packet {
1140 +       /* Common infos: */
1141 +       SK_PACKET       *pNext;         /* pointer for packet queues          */
1142 +       unsigned int     PacketLen;     /* length of packet                   */
1143 +       unsigned int     NumFrags;      /* nbr of fragments (for Rx always 1) */
1144 +       SK_FRAG         *pFrag;         /* fragment list                      */
1145 +       SK_FRAG          FragArray[MAX_NUM_FRAGS]; /* TX fragment array       */
1146 +       unsigned int     NextLE;        /* next LE to use for the next packet */
1147 +
1148 +       /* Private infos: */
1149 +       struct sk_buff  *pMBuf;         /* Pointer to Linux' socket buffer    */
1150 +};
1151 +
1152 +typedef        struct s_queue SK_PKT_QUEUE;
1153 +struct s_queue {
1154 +       SK_PACKET       *pHead;
1155 +       SK_PACKET       *pTail;
1156 +       spinlock_t       QueueLock;     /* serialize packet accesses          */
1157 +};
1158 +
1159 +/*******************************************************************************
1160 + *
1161 + * Macros specific for Yukon-II queues
1162 + *
1163 + ******************************************************************************/
1164 +
1165 +#define IS_Q_EMPTY(pQueue)  ((pQueue)->pHead != NULL) ? SK_FALSE : SK_TRUE
1166 +#define IS_Q_LOCKED(pQueue) spin_is_locked(&((pQueue)->QueueLock))
1167 +
1168 +#define PLAIN_POP_FIRST_PKT_FROM_QUEUE(pQueue, pPacket)        {       \
1169 +        if ((pQueue)->pHead != NULL) {                         \
1170 +               (pPacket)       = (pQueue)->pHead;              \
1171 +               (pQueue)->pHead = (pPacket)->pNext;             \
1172 +               if ((pQueue)->pHead == NULL) {                  \
1173 +                       (pQueue)->pTail = NULL;                 \
1174 +               }                                               \
1175 +               (pPacket)->pNext = NULL;                        \
1176 +       } else {                                                \
1177 +               (pPacket) = NULL;                               \
1178 +       }                                                       \
1179 +}
1180 +
1181 +#define PLAIN_PUSH_PKT_AS_FIRST_IN_QUEUE(pQueue, pPacket) {    \
1182 +       if ((pQueue)->pHead != NULL) {                          \
1183 +               (pPacket)->pNext = (pQueue)->pHead;             \
1184 +       } else {                                                \
1185 +               (pPacket)->pNext = NULL;                        \
1186 +               (pQueue)->pTail  = (pPacket);                   \
1187 +       }                                                       \
1188 +       (pQueue)->pHead  = (pPacket);                           \
1189 +}
1190 +
1191 +#define PLAIN_PUSH_PKT_AS_LAST_IN_QUEUE(pQueue, pPacket) {     \
1192 +       (pPacket)->pNext = NULL;                                \
1193 +       if ((pQueue)->pTail != NULL) {                          \
1194 +               (pQueue)->pTail->pNext = (pPacket);             \
1195 +       } else {                                                \
1196 +               (pQueue)->pHead        = (pPacket);             \
1197 +       }                                                       \
1198 +       (pQueue)->pTail = (pPacket);                            \
1199 +}
1200 +
1201 +#define PLAIN_PUSH_MULTIPLE_PKT_AS_LAST_IN_QUEUE(pQueue,pPktGrpStart,pPktGrpEnd) { \
1202 +       if ((pPktGrpStart) != NULL) {                                   \
1203 +               if ((pQueue)->pTail != NULL) {                          \
1204 +                       (pQueue)->pTail->pNext = (pPktGrpStart);        \
1205 +               } else {                                                \
1206 +                       (pQueue)->pHead = (pPktGrpStart);               \
1207 +               }                                                       \
1208 +               (pQueue)->pTail = (pPktGrpEnd);                         \
1209 +       }                                                               \
1210 +}
1211 +
1212 +/* Required: 'Flags' */
1213 +#define POP_FIRST_PKT_FROM_QUEUE(pQueue, pPacket)      {       \
1214 +       spin_lock_irqsave(&((pQueue)->QueueLock), Flags);       \
1215 +       if ((pQueue)->pHead != NULL) {                          \
1216 +               (pPacket)       = (pQueue)->pHead;              \
1217 +               (pQueue)->pHead = (pPacket)->pNext;             \
1218 +               if ((pQueue)->pHead == NULL) {                  \
1219 +                       (pQueue)->pTail = NULL;                 \
1220 +               }                                               \
1221 +               (pPacket)->pNext = NULL;                        \
1222 +       } else {                                                \
1223 +               (pPacket) = NULL;                               \
1224 +       }                                                       \
1225 +       spin_unlock_irqrestore(&((pQueue)->QueueLock), Flags);  \
1226 +}
1227 +
1228 +/* Required: 'Flags' */
1229 +#define PUSH_PKT_AS_FIRST_IN_QUEUE(pQueue, pPacket)    {       \
1230 +       spin_lock_irqsave(&(pQueue)->QueueLock, Flags);         \
1231 +       if ((pQueue)->pHead != NULL) {                          \
1232 +               (pPacket)->pNext = (pQueue)->pHead;             \
1233 +       } else {                                                \
1234 +               (pPacket)->pNext = NULL;                        \
1235 +               (pQueue)->pTail  = (pPacket);                   \
1236 +       }                                                       \
1237 +       (pQueue)->pHead = (pPacket);                            \
1238 +       spin_unlock_irqrestore(&(pQueue)->QueueLock, Flags);    \
1239 +}
1240
1241 -#define IRQ_HWE_MASK   (IS_ERR_MSK) /* enable all HW irqs */
1242 +/* Required: 'Flags' */
1243 +#define PUSH_PKT_AS_LAST_IN_QUEUE(pQueue, pPacket)     {       \
1244 +       (pPacket)->pNext = NULL;                                \
1245 +       spin_lock_irqsave(&(pQueue)->QueueLock, Flags);         \
1246 +       if ((pQueue)->pTail != NULL) {                          \
1247 +               (pQueue)->pTail->pNext = (pPacket);             \
1248 +       } else {                                                \
1249 +               (pQueue)->pHead = (pPacket);                    \
1250 +       }                                                       \
1251 +       (pQueue)->pTail = (pPacket);                            \
1252 +       spin_unlock_irqrestore(&(pQueue)->QueueLock, Flags);    \
1253 +}
1254 +
1255 +/* Required: 'Flags' */
1256 +#define PUSH_MULTIPLE_PKT_AS_LAST_IN_QUEUE(pQueue,pPktGrpStart,pPktGrpEnd) {   \
1257 +       if ((pPktGrpStart) != NULL) {                                   \
1258 +               spin_lock_irqsave(&(pQueue)->QueueLock, Flags);         \
1259 +               if ((pQueue)->pTail != NULL) {                          \
1260 +                       (pQueue)->pTail->pNext = (pPktGrpStart);        \
1261 +               } else {                                                \
1262 +                       (pQueue)->pHead = (pPktGrpStart);               \
1263 +               }                                                       \
1264 +               (pQueue)->pTail = (pPktGrpEnd);                         \
1265 +               spin_unlock_irqrestore(&(pQueue)->QueueLock, Flags);    \
1266 +       }                                                               \
1267 +}
1268 +
1269 +/*******************************************************************************
1270 + *
1271 + * Macros specific for Yukon-II queues (tist)
1272 + *
1273 + ******************************************************************************/
1274 +
1275 +#ifdef USE_TIST_FOR_RESET
1276 +/* port is fully operational */
1277 +#define SK_PSTATE_NOT_WAITING_FOR_TIST                  0
1278 +/* port in reset until any tist LE */
1279 +#define SK_PSTATE_WAITING_FOR_ANY_TIST          BIT_0
1280 +/* port in reset until timer reaches pAC->MinTistLo */
1281 +#define SK_PSTATE_WAITING_FOR_SPECIFIC_TIST     BIT_1
1282 +#define SK_PSTATE_PORT_SHIFT    4
1283 +#define SK_PSTATE_PORT_MASK             ((1 << SK_PSTATE_PORT_SHIFT) - 1)
1284 +
1285 +/* use this + Port to build OP_MOD_TXINDEX_NO_PORT_A|B */
1286 +#define OP_MOD_TXINDEX 0x71
1287 +/* opcode for a TX_INDEX LE in which Port A has to be ignored */
1288 +#define OP_MOD_TXINDEX_NO_PORT_A 0x71
1289 +/* opcode for a TX_INDEX LE in which Port B has to be ignored */
1290 +#define OP_MOD_TXINDEX_NO_PORT_B 0x72
1291 +/* opcode for LE to be ignored because port is still in reset */
1292 +#define OP_MOD_LE 0x7F
1293 +
1294 +/* set tist wait mode Bit for port */
1295 +#define SK_SET_WAIT_BIT_FOR_PORT(pAC, Bit, Port)        \
1296 +       { \
1297 +               (pAC)->AdapterResetState |= ((Bit) << (SK_PSTATE_PORT_SHIFT * Port)); \
1298 +       }
1299 +
1300 +/* reset tist waiting for specified port */
1301 +#define SK_CLR_STATE_FOR_PORT(pAC, Port)        \
1302 +       { \
1303 +               (pAC)->AdapterResetState &= \
1304 +                       ~(SK_PSTATE_PORT_MASK << (SK_PSTATE_PORT_SHIFT * Port)); \
1305 +       }
1306 +
1307 +/* return SK_TRUE when port is in reset waiting for tist */
1308 +#define SK_PORT_WAITING_FOR_TIST(pAC, Port) \
1309 +       ((((pAC)->AdapterResetState >> (SK_PSTATE_PORT_SHIFT * Port)) & \
1310 +               SK_PSTATE_PORT_MASK) != SK_PSTATE_NOT_WAITING_FOR_TIST)
1311 +
1312 +/* return SK_TRUE when port is in reset waiting for any tist */
1313 +#define SK_PORT_WAITING_FOR_ANY_TIST(pAC, Port) \
1314 +       ((((pAC)->AdapterResetState >> (SK_PSTATE_PORT_SHIFT * Port)) & \
1315 +               SK_PSTATE_WAITING_FOR_ANY_TIST) == SK_PSTATE_WAITING_FOR_ANY_TIST)
1316 +
1317 +/* return SK_TRUE when port is in reset waiting for a specific tist */
1318 +#define SK_PORT_WAITING_FOR_SPECIFIC_TIST(pAC, Port) \
1319 +       ((((pAC)->AdapterResetState >> (SK_PSTATE_PORT_SHIFT * Port)) & \
1320 +               SK_PSTATE_WAITING_FOR_SPECIFIC_TIST) == \
1321 +               SK_PSTATE_WAITING_FOR_SPECIFIC_TIST)
1322 +
1323 +/* return whether adapter is expecting a tist LE */
1324 +#define SK_ADAPTER_WAITING_FOR_TIST(pAC)        ((pAC)->AdapterResetState != 0)
1325 +
1326 +/* enable timestamp timer and force creation of tist LEs */
1327 +#define Y2_ENABLE_TIST(IoC) \
1328 +       SK_OUT8(IoC, GMAC_TI_ST_CTRL, (SK_U8) GMT_ST_START)
1329 +
1330 +/* disable timestamp timer and stop creation of tist LEs */
1331 +#define Y2_DISABLE_TIST(IoC) \
1332 +       SK_OUT8(IoC, GMAC_TI_ST_CTRL, (SK_U8) GMT_ST_STOP)
1333 +
1334 +/* get current value of timestamp timer */
1335 +#define Y2_GET_TIST_LOW_VAL(IoC, pVal) \
1336 +       SK_IN32(IoC, GMAC_TI_ST_VAL, pVal)
1337 +
1338 +#endif
1339 +
1340 +
1341 +/*******************************************************************************
1342 + *
1343 + * Used interrupt bits in the interrupts source register
1344 + *
1345 + ******************************************************************************/
1346 +
1347 +#define DRIVER_IRQS    ((IS_IRQ_SW) | \
1348 +                        (IS_R1_F)   | (IS_R2_F)  | \
1349 +                        (IS_XS1_F)  | (IS_XA1_F) | \
1350 +                        (IS_XS2_F)  | (IS_XA2_F))
1351 +
1352 +#define TX_COMPL_IRQS  ((IS_XS1_B)  | (IS_XS1_F) | \
1353 +                        (IS_XA1_B)  | (IS_XA1_F) | \
1354 +                        (IS_XS2_B)  | (IS_XS2_F) | \
1355 +                        (IS_XA2_B)  | (IS_XA2_F))
1356 +
1357 +#define NAPI_DRV_IRQS  ((IS_R1_F)   | (IS_R2_F) | \
1358 +                        (IS_XS1_F)  | (IS_XA1_F)| \
1359 +                        (IS_XS2_F)  | (IS_XA2_F))
1360 +
1361 +#define Y2_DRIVER_IRQS ((Y2_IS_STAT_BMU) | (Y2_IS_IRQ_SW) | (Y2_IS_POLL_CHK))
1362 +
1363 +#define SPECIAL_IRQS   ((IS_HW_ERR)    |(IS_I2C_READY)  | \
1364 +                        (IS_EXT_REG)   |(IS_TIMINT)     | \
1365 +                        (IS_PA_TO_RX1) |(IS_PA_TO_RX2)  | \
1366 +                        (IS_PA_TO_TX1) |(IS_PA_TO_TX2)  | \
1367 +                        (IS_MAC1)      |(IS_LNK_SYNC_M1)| \
1368 +                        (IS_MAC2)      |(IS_LNK_SYNC_M2)| \
1369 +                        (IS_R1_C)      |(IS_R2_C)       | \
1370 +                        (IS_XS1_C)     |(IS_XA1_C)      | \
1371 +                        (IS_XS2_C)     |(IS_XA2_C))
1372 +
1373 +#define Y2_SPECIAL_IRQS        ((Y2_IS_HW_ERR)   |(Y2_IS_ASF)      | \
1374 +                        (Y2_IS_TWSI_RDY) |(Y2_IS_TIMINT)   | \
1375 +                        (Y2_IS_IRQ_PHY2) |(Y2_IS_IRQ_MAC2) | \
1376 +                        (Y2_IS_CHK_RX2)  |(Y2_IS_CHK_TXS2) | \
1377 +                        (Y2_IS_CHK_TXA2) |(Y2_IS_IRQ_PHY1) | \
1378 +                        (Y2_IS_IRQ_MAC1) |(Y2_IS_CHK_RX1)  | \
1379 +                        (Y2_IS_CHK_TXS1) |(Y2_IS_CHK_TXA1))
1380 +
1381 +#define IRQ_MASK       ((IS_IRQ_SW)    | \
1382 +                        (IS_R1_F)      |(IS_R2_F)     | \
1383 +                        (IS_XS1_F)     |(IS_XA1_F)    | \
1384 +                        (IS_XS2_F)     |(IS_XA2_F)    | \
1385 +                        (IS_HW_ERR)    |(IS_I2C_READY)| \
1386 +                        (IS_EXT_REG)   |(IS_TIMINT)   | \
1387 +                        (IS_PA_TO_RX1) |(IS_PA_TO_RX2)| \
1388 +                        (IS_PA_TO_TX1) |(IS_PA_TO_TX2)| \
1389 +                        (IS_MAC1)      |(IS_MAC2)     | \
1390 +                        (IS_R1_C)      |(IS_R2_C)     | \
1391 +                        (IS_XS1_C)     |(IS_XA1_C)    | \
1392 +                        (IS_XS2_C)     |(IS_XA2_C))
1393 +
1394 +#define Y2_IRQ_MASK    ((Y2_DRIVER_IRQS) | (Y2_SPECIAL_IRQS))
1395 +
1396 +#define IRQ_HWE_MASK   (IS_ERR_MSK)            /* enable all HW irqs */
1397 +#define Y2_IRQ_HWE_MASK        (Y2_HWE_ALL_MSK)        /* enable all HW irqs */
1398
1399  typedef struct s_DevNet DEV_NET;
1400
1401  struct s_DevNet {
1402 -       struct                  proc_dir_entry *proc;
1403 -       int             PortNr;
1404 -       int             NetNr;
1405 -       int             Mtu;
1406 -       int             Up;
1407 -       SK_AC   *pAC;
1408 +       struct          proc_dir_entry *proc;
1409 +       int             PortNr;
1410 +       int             NetNr;
1411 +       char            InitialDevName[20];
1412 +       SK_BOOL         NetConsoleMode;
1413 +#ifdef Y2_RECOVERY
1414 +       struct          timer_list KernelTimer; /* Kernel timer struct  */
1415 +       int             TransmitTimeoutTimer;   /* Transmit timer       */
1416 +       SK_BOOL         TimerExpired;           /* Transmit timer       */
1417 +       SK_BOOL         InRecover;              /* Recover flag         */
1418 +#ifdef Y2_RX_CHECK
1419 +       SK_U8           FifoReadPointer;        /* Backup of the FRP */
1420 +       SK_U8           FifoReadLevel;          /* Backup of the FRL */
1421 +       SK_U32          BmuStateMachine;        /* Backup of the MBU SM */
1422 +       SK_U32          LastJiffies;            /* Backup of the jiffies */
1423 +#endif
1424 +#endif
1425 +       SK_AC           *pAC;
1426  };
1427
1428 -typedef struct s_TxPort                TX_PORT;
1429 +/*******************************************************************************
1430 + *
1431 + * Rx/Tx Port structures
1432 + *
1433 + ******************************************************************************/
1434
1435 -struct s_TxPort {
1436 -       /* the transmit descriptor rings */
1437 -       caddr_t         pTxDescrRing;   /* descriptor area memory */
1438 -       SK_U64          VTxDescrRing;   /* descr. area bus virt. addr. */
1439 -       TXD             *pTxdRingHead;  /* Head of Tx rings */
1440 -       TXD             *pTxdRingTail;  /* Tail of Tx rings */
1441 -       TXD             *pTxdRingPrev;  /* descriptor sent previously */
1442 -       int             TxdRingFree;    /* # of free entrys */
1443 -       spinlock_t      TxDesRingLock;  /* serialize descriptor accesses */
1444 -       caddr_t         HwAddr;         /* bmu registers address */
1445 -       int             PortIndex;      /* index number of port (0 or 1) */
1446 +typedef struct s_TxPort        TX_PORT;
1447 +struct s_TxPort {                       /* the transmit descriptor rings */
1448 +       caddr_t         pTxDescrRing;   /* descriptor area memory        */
1449 +       SK_U64          VTxDescrRing;   /* descr. area bus virt. addr.   */
1450 +       TXD            *pTxdRingHead;   /* Head of Tx rings              */
1451 +       TXD            *pTxdRingTail;   /* Tail of Tx rings              */
1452 +       TXD            *pTxdRingPrev;   /* descriptor sent previously    */
1453 +       int             TxdRingPrevFree;/* previously # of free entrys   */
1454 +       int             TxdRingFree;    /* # of free entrys              */
1455 +       spinlock_t      TxDesRingLock;  /* serialize descriptor accesses */
1456 +       caddr_t         HwAddr;         /* bmu registers address         */
1457 +       int             PortIndex;      /* index number of port (0 or 1) */
1458 +       SK_PACKET      *TransmitPacketTable;
1459 +       SK_LE_TABLE     TxALET;         /* tx (async) list element table */
1460 +       SK_LE_TABLE     TxSLET;         /* tx (sync) list element table  */
1461 +       SK_PKT_QUEUE    TxQ_free;
1462 +       SK_PKT_QUEUE    TxAQ_waiting;
1463 +       SK_PKT_QUEUE    TxSQ_waiting;
1464 +       SK_PKT_QUEUE    TxAQ_working;
1465 +       SK_PKT_QUEUE    TxSQ_working;
1466 +       unsigned        LastDone;
1467  };
1468
1469 -typedef struct s_RxPort                RX_PORT;
1470 -
1471 -struct s_RxPort {
1472 -       /* the receive descriptor rings */
1473 -       caddr_t         pRxDescrRing;   /* descriptor area memory */
1474 -       SK_U64          VRxDescrRing;   /* descr. area bus virt. addr. */
1475 -       RXD             *pRxdRingHead;  /* Head of Rx rings */
1476 -       RXD             *pRxdRingTail;  /* Tail of Rx rings */
1477 -       RXD             *pRxdRingPrev;  /* descriptor given to BMU previously */
1478 -       int             RxdRingFree;    /* # of free entrys */
1479 -       spinlock_t      RxDesRingLock;  /* serialize descriptor accesses */
1480 -       int             RxFillLimit;    /* limit for buffers in ring */
1481 -       caddr_t         HwAddr;         /* bmu registers address */
1482 -       int             PortIndex;      /* index number of port (0 or 1) */
1483 +typedef struct s_RxPort        RX_PORT;
1484 +struct s_RxPort {                       /* the receive descriptor rings  */
1485 +       caddr_t         pRxDescrRing;   /* descriptor area memory        */
1486 +       SK_U64          VRxDescrRing;   /* descr. area bus virt. addr.   */
1487 +       RXD            *pRxdRingHead;   /* Head of Rx rings              */
1488 +       RXD            *pRxdRingTail;   /* Tail of Rx rings              */
1489 +       RXD            *pRxdRingPrev;   /* descr given to BMU previously */
1490 +       int             RxdRingFree;    /* # of free entrys              */
1491 +       spinlock_t      RxDesRingLock;  /* serialize descriptor accesses */
1492 +       int             RxFillLimit;    /* limit for buffers in ring     */
1493 +       caddr_t         HwAddr;         /* bmu registers address         */
1494 +       int             PortIndex;      /* index number of port (0 or 1) */
1495 +       SK_BOOL         UseRxCsum;      /* use Rx checksumming (yes/no)  */
1496 +       SK_PACKET      *ReceivePacketTable;
1497 +       SK_LE_TABLE     RxLET;          /* rx list element table         */
1498 +       SK_PKT_QUEUE    RxQ_working;
1499 +       SK_PKT_QUEUE    RxQ_waiting;
1500 +       int             RxBufSize;
1501  };
1502
1503 -/* Definitions needed for interrupt moderation *******************************/
1504 +/*******************************************************************************
1505 + *
1506 + * Interrupt masks used in combination with interrupt moderation
1507 + *
1508 + ******************************************************************************/
1509
1510  #define IRQ_EOF_AS_TX     ((IS_XA1_F)     | (IS_XA2_F))
1511  #define IRQ_EOF_SY_TX     ((IS_XS1_F)     | (IS_XS2_F))
1512 @@ -317,139 +704,150 @@
1513  #define IRQ_MASK_SP_TX    ((SPECIAL_IRQS)    | (IRQ_MASK_TX_ONLY))
1514  #define IRQ_MASK_RX_TX_SP ((SPECIAL_IRQS)    | (IRQ_MASK_TX_RX))
1515
1516 -#define C_INT_MOD_NONE                 1
1517 -#define C_INT_MOD_STATIC               2
1518 -#define C_INT_MOD_DYNAMIC              4
1519 -
1520 -#define C_CLK_FREQ_GENESIS      53215000 /* shorter: 53.125 MHz  */
1521 -#define C_CLK_FREQ_YUKON        78215000 /* shorter: 78.125 MHz  */
1522 -
1523 -#define C_INTS_PER_SEC_DEFAULT      2000
1524 -#define C_INT_MOD_ENABLE_PERCENTAGE   50 /* if higher 50% enable */
1525 -#define C_INT_MOD_DISABLE_PERCENTAGE  50 /* if lower 50% disable */
1526 -#define C_INT_MOD_IPS_LOWER_RANGE     30
1527 -#define C_INT_MOD_IPS_UPPER_RANGE     40000
1528 -
1529 -
1530 -typedef struct s_DynIrqModInfo  DIM_INFO;
1531 -struct s_DynIrqModInfo {
1532 -       unsigned long   PrevTimeVal;
1533 -       unsigned int    PrevSysLoad;
1534 -       unsigned int    PrevUsedTime;
1535 -       unsigned int    PrevTotalTime;
1536 -       int             PrevUsedDescrRatio;
1537 -       int             NbrProcessedDescr;
1538 -        SK_U64          PrevPort0RxIntrCts;
1539 -        SK_U64          PrevPort1RxIntrCts;
1540 -        SK_U64          PrevPort0TxIntrCts;
1541 -        SK_U64          PrevPort1TxIntrCts;
1542 -       SK_BOOL         ModJustEnabled;     /* Moderation just enabled yes/no */
1543 -
1544 -       int             MaxModIntsPerSec;            /* Moderation Threshold */
1545 -       int             MaxModIntsPerSecUpperLimit;  /* Upper limit for DIM  */
1546 -       int             MaxModIntsPerSecLowerLimit;  /* Lower limit for DIM  */
1547 -
1548 -       long            MaskIrqModeration;   /* ModIrqType (eg. 'TxRx')      */
1549 -       SK_BOOL         DisplayStats;        /* Stats yes/no                 */
1550 -       SK_BOOL         AutoSizing;          /* Resize DIM-timer on/off      */
1551 -       int             IntModTypeSelect;    /* EnableIntMod (eg. 'dynamic') */
1552 +#define IRQ_MASK_Y2_TX_ONLY  (Y2_IS_STAT_BMU)
1553 +#define IRQ_MASK_Y2_RX_ONLY  (Y2_IS_STAT_BMU)
1554 +#define IRQ_MASK_Y2_SP_ONLY  (SPECIAL_IRQS)
1555 +#define IRQ_MASK_Y2_TX_RX    ((IRQ_MASK_TX_ONLY)| (IRQ_MASK_RX_ONLY))
1556 +#define IRQ_MASK_Y2_SP_RX    ((SPECIAL_IRQS)    | (IRQ_MASK_RX_ONLY))
1557 +#define IRQ_MASK_Y2_SP_TX    ((SPECIAL_IRQS)    | (IRQ_MASK_TX_ONLY))
1558 +#define IRQ_MASK_Y2_RX_TX_SP ((SPECIAL_IRQS)    | (IRQ_MASK_TX_RX))
1559
1560 -       SK_TIMER        ModTimer; /* just some timer */
1561 -};
1562 +/*******************************************************************************
1563 + *
1564 + * Defines and typedefs regarding interrupt moderation
1565 + *
1566 + ******************************************************************************/
1567
1568 -typedef struct s_PerStrm       PER_STRM;
1569 +#define C_INT_MOD_NONE                 1
1570 +#define C_INT_MOD_STATIC               2
1571 +#define C_INT_MOD_DYNAMIC              4
1572 +
1573 +#define C_CLK_FREQ_GENESIS              53215000 /* or:  53.125 MHz */
1574 +#define C_CLK_FREQ_YUKON                78215000 /* or:  78.125 MHz */
1575 +#define C_CLK_FREQ_YUKON_EC            125000000 /* or: 125.000 MHz */
1576 +
1577 +#define C_Y2_INTS_PER_SEC_DEFAULT      5000
1578 +#define C_INTS_PER_SEC_DEFAULT         2000
1579 +#define C_INT_MOD_IPS_LOWER_RANGE      30        /* in IRQs/second */
1580 +#define C_INT_MOD_IPS_UPPER_RANGE      40000     /* in IRQs/second */
1581 +
1582 +typedef struct s_DynIrqModInfo {
1583 +       SK_U64     PrevPort0RxIntrCts;
1584 +       SK_U64     PrevPort1RxIntrCts;
1585 +       SK_U64     PrevPort0TxIntrCts;
1586 +       SK_U64     PrevPort1TxIntrCts;
1587 +       SK_U64     PrevPort0StatusLeIntrCts;
1588 +       SK_U64     PrevPort1StatusLeIntrCts;
1589 +       int        MaxModIntsPerSec;            /* Moderation Threshold   */
1590 +       int        MaxModIntsPerSecUpperLimit;  /* Upper limit for DIM    */
1591 +       int        MaxModIntsPerSecLowerLimit;  /* Lower limit for DIM    */
1592 +       long       MaskIrqModeration;           /* IRQ Mask (eg. 'TxRx')  */
1593 +       int        IntModTypeSelect;            /* Type  (eg. 'dynamic')  */
1594 +       int        DynIrqModSampleInterval;     /* expressed in seconds!  */
1595 +       SK_TIMER   ModTimer;                    /* Timer for dynamic mod. */
1596 +} DIM_INFO;
1597
1598 -#define SK_ALLOC_IRQ   0x00000001
1599 +/*******************************************************************************
1600 + *
1601 + * Defines and typedefs regarding wake-on-lan
1602 + *
1603 + ******************************************************************************/
1604 +
1605 +typedef struct s_WakeOnLanInfo {
1606 +       SK_U32     SupportedWolOptions;         /* e.g. WAKE_PHY...         */
1607 +       SK_U32     ConfiguredWolOptions;        /* e.g. WAKE_PHY...         */
1608 +} WOL_INFO;
1609
1610 -#ifdef SK_DIAG_SUPPORT
1611 +#define SK_ALLOC_IRQ   0x00000001
1612  #define        DIAG_ACTIVE             1
1613  #define        DIAG_NOTACTIVE          0
1614 -#endif
1615
1616  /****************************************************************************
1617 + *
1618   * Per board structure / Adapter Context structure:
1619 - *     Allocated within attach(9e) and freed within detach(9e).
1620 - *     Contains all 'per device' necessary handles, flags, locks etc.:
1621 - */
1622 + * Contains all 'per device' necessary handles, flags, locks etc.:
1623 + *
1624 + ******************************************************************************/
1625 +
1626  struct s_AC  {
1627 -       SK_GEINIT       GIni;           /* GE init struct */
1628 -       SK_PNMI         Pnmi;           /* PNMI data struct */
1629 -       SK_VPD          vpd;            /* vpd data struct */
1630 -       SK_QUEUE        Event;          /* Event queue */
1631 -       SK_HWT          Hwt;            /* Hardware Timer control struct */
1632 -       SK_TIMCTRL      Tim;            /* Software Timer control struct */
1633 -       SK_I2C          I2c;            /* I2C relevant data structure */
1634 -       SK_ADDR         Addr;           /* for Address module */
1635 -       SK_CSUM         Csum;           /* for checksum module */
1636 -       SK_RLMT         Rlmt;           /* for rlmt module */
1637 -       spinlock_t      SlowPathLock;   /* Normal IRQ lock */
1638 -       SK_PNMI_STRUCT_DATA PnmiStruct; /* structure to get all Pnmi-Data */
1639 -       int                     RlmtMode;       /* link check mode to set */
1640 -       int                     RlmtNets;       /* Number of nets */
1641 -
1642 -       SK_IOC          IoBase;         /* register set of adapter */
1643 -       int             BoardLevel;     /* level of active hw init (0-2) */
1644 -       char            DeviceStr[80];  /* adapter string from vpd */
1645 -       SK_U32          AllocFlag;      /* flag allocation of resources */
1646 -       struct pci_dev  *PciDev;        /* for access to pci config space */
1647 -       SK_U32          PciDevId;       /* pci device id */
1648 -       struct SK_NET_DEVICE    *dev[2];        /* pointer to device struct */
1649 -       char            Name[30];       /* driver name */
1650 -       struct SK_NET_DEVICE    *Next;          /* link all devices (for clearing) */
1651 -       int             RxBufSize;      /* length of receive buffers */
1652 -        struct net_device_stats stats; /* linux 'netstat -i' statistics */
1653 -       int             Index;          /* internal board index number */
1654 -
1655 -       /* adapter RAM sizes for queues of active port */
1656 -       int             RxQueueSize;    /* memory used for receive queue */
1657 -       int             TxSQueueSize;   /* memory used for sync. tx queue */
1658 -       int             TxAQueueSize;   /* memory used for async. tx queue */
1659 -
1660 -       int             PromiscCount;   /* promiscuous mode counter  */
1661 -       int             AllMultiCount;  /* allmulticast mode counter */
1662 -       int             MulticCount;    /* number of different MC    */
1663 -                                       /*  addresses for this board */
1664 -                                       /*  (may be more than HW can)*/
1665 -
1666 -       int             HWRevision;     /* Hardware revision */
1667 -       int             ActivePort;     /* the active XMAC port */
1668 -       int             MaxPorts;               /* number of activated ports */
1669 -       int             TxDescrPerRing; /* # of descriptors per tx ring */
1670 -       int             RxDescrPerRing; /* # of descriptors per rx ring */
1671 -
1672 -       caddr_t         pDescrMem;      /* Pointer to the descriptor area */
1673 -       dma_addr_t      pDescrMemDMA;   /* PCI DMA address of area */
1674 -
1675 -       /* the port structures with descriptor rings */
1676 -       TX_PORT         TxPort[SK_MAX_MACS][2];
1677 -       RX_PORT         RxPort[SK_MAX_MACS];
1678 -
1679 -       unsigned int    CsOfs1;         /* for checksum calculation */
1680 -       unsigned int    CsOfs2;         /* for checksum calculation */
1681 -       SK_U32          CsOfs;          /* for checksum calculation */
1682 -
1683 -       SK_BOOL         CheckQueue;     /* check event queue soon */
1684 -       SK_TIMER        DrvCleanupTimer;/* to check for pending descriptors */
1685 -       DIM_INFO        DynIrqModInfo;  /* all data related to DIM */
1686 -
1687 -       /* Only for tests */
1688 -       int             PortUp;
1689 -       int             PortDown;
1690 -       int             ChipsetType;    /*  Chipset family type
1691 -                                        *  0 == Genesis family support
1692 -                                        *  1 == Yukon family support
1693 -                                        */
1694 -#ifdef SK_DIAG_SUPPORT
1695 -       SK_U32          DiagModeActive;         /* is diag active?      */
1696 -       SK_BOOL         DiagFlowCtrl;           /* for control purposes */
1697 -       SK_PNMI_STRUCT_DATA PnmiBackup;         /* backup structure for all Pnmi-Data */
1698 -       SK_BOOL         WasIfUp[SK_MAX_MACS];   /* for OpenClose while
1699 -                                                * DIAG is busy with NIC
1700 -                                                */
1701 +       SK_GEINIT                GIni;          /* GE init struct             */
1702 +       SK_PNMI                  Pnmi;          /* PNMI data struct           */
1703 +       SK_VPD                   vpd;           /* vpd data struct            */
1704 +       SK_QUEUE                 Event;         /* Event queue                */
1705 +       SK_HWT                   Hwt;           /* Hardware Timer ctrl struct */
1706 +       SK_TIMCTRL               Tim;           /* Software Timer ctrl struct */
1707 +       SK_I2C                   I2c;           /* I2C relevant data structure*/
1708 +       SK_ADDR                  Addr;          /* for Address module         */
1709 +       SK_CSUM                  Csum;          /* for checksum module        */
1710 +       SK_RLMT                  Rlmt;          /* for rlmt module            */
1711 +       spinlock_t               SlowPathLock;  /* Normal IRQ lock            */
1712 +       spinlock_t               TxQueueLock;   /* TX Queue lock              */
1713 +       SK_PNMI_STRUCT_DATA      PnmiStruct;    /* struct for all Pnmi-Data   */
1714 +       int                      RlmtMode;      /* link check mode to set     */
1715 +       int                      RlmtNets;      /* Number of nets             */
1716 +       SK_IOC                   IoBase;        /* register set of adapter    */
1717 +       int                      BoardLevel;    /* level of hw init (0-2)     */
1718 +       char                     DeviceStr[80]; /* adapter string from vpd    */
1719 +       SK_U32                   AllocFlag;     /* alloc flag of resources    */
1720 +       struct pci_dev          *PciDev;        /* for access to pci cfg space*/
1721 +       SK_U32                   PciDevId;      /* pci device id              */
1722 +       struct SK_NET_DEVICE    *dev[2];        /* pointer to device struct   */
1723 +       char                     Name[30];      /* driver name                */
1724 +       struct SK_NET_DEVICE    *Next;          /* link all devs for cleanup  */
1725 +       struct net_device_stats  stats;         /* linux 'netstat -i' stats   */
1726 +       int                      Index;         /* internal board idx number  */
1727 +       int                      RxQueueSize;   /* memory used for RX queue   */
1728 +       int                      TxSQueueSize;  /* memory used for TXS queue  */
1729 +       int                      TxAQueueSize;  /* memory used for TXA queue  */
1730 +       int                      PromiscCount;  /* promiscuous mode counter   */
1731 +       int                      AllMultiCount; /* allmulticast mode counter  */
1732 +       int                      MulticCount;   /* number of MC addresses used*/
1733 +       int                      HWRevision;    /* Hardware revision          */
1734 +       int                      ActivePort;    /* the active XMAC port       */
1735 +       int                      MaxPorts;      /* number of activated ports  */
1736 +       int                      TxDescrPerRing;/* # of descriptors TX ring   */
1737 +       int                      RxDescrPerRing;/* # of descriptors RX ring   */
1738 +       caddr_t                  pDescrMem;     /* Ptr to the descriptor area */
1739 +       dma_addr_t               pDescrMemDMA;  /* PCI DMA address of area    */
1740 +       SK_U32                   PciState[16];  /* PCI state */
1741 +       TX_PORT                  TxPort[SK_MAX_MACS][2];
1742 +       RX_PORT                  RxPort[SK_MAX_MACS];
1743 +       SK_LE_TABLE              StatusLETable;
1744 +       unsigned                 SizeOfAlignedLETables;
1745 +       spinlock_t               SetPutIndexLock;
1746 +       int                      MaxUnusedRxLeWorking;
1747 +       unsigned int             CsOfs1;        /* for checksum calculation   */
1748 +       unsigned int             CsOfs2;        /* for checksum calculation   */
1749 +       SK_U32                   CsOfs;         /* for checksum calculation   */
1750 +       SK_BOOL                  CheckQueue;    /* check event queue soon     */
1751 +       DIM_INFO                 DynIrqModInfo; /* all data related to IntMod */
1752 +       WOL_INFO                 WolInfo;       /* all info regarding WOL     */
1753 +       int                      ChipsetType;   /* 0=GENESIS; 1=Yukon         */
1754 +       SK_BOOL                  LowLatency;    /* LowLatency optimization on?*/
1755 +       SK_U32                   DiagModeActive;/* is diag active?            */
1756 +       SK_BOOL                  DiagFlowCtrl;  /* for control purposes       */
1757 +       SK_PNMI_STRUCT_DATA      PnmiBackup;    /* backup structure for PNMI  */
1758 +       SK_BOOL                  WasIfUp[SK_MAX_MACS];
1759 +#ifdef USE_TIST_FOR_RESET
1760 +       int                      AdapterResetState;
1761 +       SK_U32                   MinTistLo;
1762 +       SK_U32                   MinTistHi;
1763 +#endif
1764 +#ifdef Y2_RECOVERY
1765 +       int                      LastPort;       /* port for curr. handled rx */
1766 +        int                      LastOpc;        /* last rx LEs opcode       */
1767 +#endif
1768 +#ifdef Y2_SYNC_CHECK
1769 +       unsigned long            FramesWithoutSyncCheck; /* since last check  */
1770  #endif
1771 -
1772  };
1773
1774
1775 -#endif /* __INC_SKDRV2ND_H */
1776
1777 +#endif
1778 +
1779 +/*******************************************************************************
1780 + *
1781 + * End of file
1782 + *
1783 + ******************************************************************************/
1784 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/skerror.h linux-2.6.9.new/drivers/net/sk98lin/h/skerror.h
1785 --- linux-2.6.9.old/drivers/net/sk98lin/h/skerror.h     2004-10-19 05:54:08.000000000 +0800
1786 +++ linux-2.6.9.new/drivers/net/sk98lin/h/skerror.h     2006-12-07 14:35:03.000000000 +0800
1787 @@ -2,8 +2,8 @@
1788   *
1789   * Name:       skerror.h
1790   * Project:    Gigabit Ethernet Adapters, Common Modules
1791 - * Version:    $Revision: 1.7 $
1792 - * Date:       $Date: 2003/05/13 17:25:13 $
1793 + * Version:    $Revision: 2.2 $
1794 + * Date:       $Date: 2004/05/24 15:27:19 $
1795   * Purpose:    SK specific Error log support
1796   *
1797   ******************************************************************************/
1798 @@ -11,13 +11,12 @@
1799  /******************************************************************************
1800   *
1801   *     (C)Copyright 1998-2002 SysKonnect.
1802 - *     (C)Copyright 2002-2003 Marvell.
1803 + *     (C)Copyright 2002-2004 Marvell.
1804   *
1805   *     This program is free software; you can redistribute it and/or modify
1806   *     it under the terms of the GNU General Public License as published by
1807   *     the Free Software Foundation; either version 2 of the License, or
1808   *     (at your option) any later version.
1809 - *
1810   *     The information in this file is provided "AS IS" without warranty.
1811   *
1812   ******************************************************************************/
1813 @@ -36,7 +35,6 @@
1814  #define        SK_ERRCL_HW                     (1L<<4) /* Hardware Failure */
1815  #define        SK_ERRCL_COMM           (1L<<5) /* Communication error */
1816
1817 -
1818  /*
1819   * Define Error Code Bases
1820   */
1821 @@ -49,7 +47,9 @@
1822  #define        SK_ERRBASE_I2C           700    /* Base Error number for I2C module */
1823  #define        SK_ERRBASE_QUEUE         800    /* Base Error number for Scheduler */
1824  #define        SK_ERRBASE_ADDR          900    /* Base Error number for Address module */
1825 -#define SK_ERRBASE_PECP                1000    /* Base Error number for PECP */
1826 +#define SK_ERRBASE_PECP                1000    /* Base Error number for PECP */
1827  #define        SK_ERRBASE_DRV          1100    /* Base Error number for Driver */
1828 +#define SK_ERRBASE_ASF         1200    /* Base Error number for ASF */
1829
1830  #endif /* _INC_SKERROR_H_ */
1831 +
1832 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/skgedrv.h linux-2.6.9.new/drivers/net/sk98lin/h/skgedrv.h
1833 --- linux-2.6.9.old/drivers/net/sk98lin/h/skgedrv.h     2004-10-19 05:54:37.000000000 +0800
1834 +++ linux-2.6.9.new/drivers/net/sk98lin/h/skgedrv.h     2006-12-07 14:35:03.000000000 +0800
1835 @@ -2,8 +2,8 @@
1836   *
1837   * Name:       skgedrv.h
1838   * Project:    Gigabit Ethernet Adapters, Common Modules
1839 - * Version:    $Revision: 1.10 $
1840 - * Date:       $Date: 2003/07/04 12:25:01 $
1841 + * Version:    $Revision: 2.1 $
1842 + * Date:       $Date: 2003/10/27 14:16:08 $
1843   * Purpose:    Interface with the driver
1844   *
1845   ******************************************************************************/
1846 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/skgehw.h linux-2.6.9.new/drivers/net/sk98lin/h/skgehw.h
1847 --- linux-2.6.9.old/drivers/net/sk98lin/h/skgehw.h      2004-10-19 05:55:28.000000000 +0800
1848 +++ linux-2.6.9.new/drivers/net/sk98lin/h/skgehw.h      2006-12-07 14:35:03.000000000 +0800
1849 @@ -2,8 +2,8 @@
1850   *
1851   * Name:       skgehw.h
1852   * Project:    Gigabit Ethernet Adapters, Common Modules
1853 - * Version:    $Revision: 1.56 $
1854 - * Date:       $Date: 2003/09/23 09:01:00 $
1855 + * Version:    $Revision: 2.49 $
1856 + * Date:       $Date: 2005/01/20 13:01:35 $
1857   * Purpose:    Defines and Macros for the Gigabit Ethernet Adapter Product Family
1858   *
1859   ******************************************************************************/
1860 @@ -11,13 +11,12 @@
1861  /******************************************************************************
1862   *
1863   *     (C)Copyright 1998-2002 SysKonnect.
1864 - *     (C)Copyright 2002-2003 Marvell.
1865 + *     (C)Copyright 2002-2004 Marvell.
1866   *
1867   *     This program is free software; you can redistribute it and/or modify
1868   *     it under the terms of the GNU General Public License as published by
1869   *     the Free Software Foundation; either version 2 of the License, or
1870   *     (at your option) any later version.
1871 - *
1872   *     The information in this file is provided "AS IS" without warranty.
1873   *
1874   ******************************************************************************/
1875 @@ -114,6 +113,16 @@
1876  #define SHIFT1(x)      ((x) << 1)
1877  #define SHIFT0(x)      ((x) << 0)
1878
1879 +/* Macro for arbitrary alignment of a given pointer */
1880 +#define ALIGN_ADDR( ADDRESS, GRANULARITY ) { \
1881 +       SK_UPTR addr = (SK_UPTR)(ADDRESS); \
1882 +       if (addr & ((GRANULARITY)-1)) { \
1883 +               addr += (GRANULARITY); \
1884 +               addr &= ~(SK_UPTR)((GRANULARITY)-1); \
1885 +               ADDRESS = (void *)addr; \
1886 +       }\
1887 +}
1888 +
1889  /*
1890   * Configuration Space header
1891   * Since this module is used for different OS', those may be
1892 @@ -132,34 +141,74 @@
1893  #define PCI_BIST               0x0f    /*  8 bit       Built-in selftest */
1894  #define PCI_BASE_1ST   0x10    /* 32 bit       1st Base address */
1895  #define PCI_BASE_2ND   0x14    /* 32 bit       2nd Base address */
1896 -       /* Byte 0x18..0x2b:     reserved */
1897 +       /* Bytes 0x18..0x2b:    reserved */
1898  #define PCI_SUB_VID            0x2c    /* 16 bit       Subsystem Vendor ID */
1899  #define PCI_SUB_ID             0x2e    /* 16 bit       Subsystem ID */
1900  #define PCI_BASE_ROM   0x30    /* 32 bit       Expansion ROM Base Address */
1901 -#define PCI_CAP_PTR            0x34    /*  8 bit       Capabilities Ptr */
1902 -       /* Byte 0x35..0x3b:     reserved */
1903 +#define PCI_CAP_PTR            0x34    /*  8 bit       Capabilities Pointer */
1904 +       /* Bytes 0x35..0x3b:    reserved */
1905  #define PCI_IRQ_LINE   0x3c    /*  8 bit       Interrupt Line */
1906  #define PCI_IRQ_PIN            0x3d    /*  8 bit       Interrupt Pin */
1907  #define PCI_MIN_GNT            0x3e    /*  8 bit       Min_Gnt */
1908  #define PCI_MAX_LAT            0x3f    /*  8 bit       Max_Lat */
1909         /* Device Dependent Region */
1910 -#define PCI_OUR_REG_1  0x40    /* 32 bit       Our Register 1 */
1911 -#define PCI_OUR_REG_2  0x44    /* 32 bit       Our Register 2 */
1912 +#define PCI_OUR_REG_1  0x40    /* 32 bit       Our Register 1 */
1913 +#define PCI_OUR_REG_2  0x44    /* 32 bit       Our Register 2 */
1914         /* Power Management Region */
1915 -#define PCI_PM_CAP_ID  0x48    /*  8 bit       Power Management Cap. ID */
1916 -#define PCI_PM_NITEM   0x49    /*  8 bit       Next Item Ptr */
1917 -#define PCI_PM_CAP_REG 0x4a    /* 16 bit       Power Management Capabilities */
1918 -#define PCI_PM_CTL_STS 0x4c    /* 16 bit       Power Manag. Control/Status */
1919 +#define PCI_PM_CAP_ID  0x48    /*  8 bit       Power Management Cap. ID */
1920 +#define PCI_PM_NITEM   0x49    /*  8 bit       PM Next Item Pointer */
1921 +#define PCI_PM_CAP_REG 0x4a    /* 16 bit       Power Management Capabilities */
1922 +#define PCI_PM_CTL_STS 0x4c    /* 16 bit       Power Manag. Control/Status */
1923         /* Byte 0x4e:   reserved */
1924 -#define PCI_PM_DAT_REG 0x4f    /*  8 bit       Power Manag. Data Register */
1925 +#define PCI_PM_DAT_REG 0x4f    /*  8 bit       Power Manag. Data Register */
1926         /* VPD Region */
1927 -#define PCI_VPD_CAP_ID 0x50    /*  8 bit       VPD Cap. ID */
1928 -#define PCI_VPD_NITEM  0x51    /*  8 bit       Next Item Ptr */
1929 -#define PCI_VPD_ADR_REG        0x52    /* 16 bit       VPD Address Register */
1930 -#define PCI_VPD_DAT_REG        0x54    /* 32 bit       VPD Data Register */
1931 -       /* Byte 0x58..0x59:     reserved */
1932 -#define PCI_SER_LD_CTRL        0x5a    /* 16 bit       SEEPROM Loader Ctrl (YUKON only) */
1933 -       /* Byte 0x5c..0xff:     reserved */
1934 +#define PCI_VPD_CAP_ID 0x50    /*  8 bit       VPD Cap. ID */
1935 +#define PCI_VPD_NITEM  0x51    /*  8 bit       VPD Next Item Pointer */
1936 +#define PCI_VPD_ADR_REG        0x52    /* 16 bit       VPD Address Register */
1937 +#define PCI_VPD_DAT_REG        0x54    /* 32 bit       VPD Data Register */
1938 +       /* Bytes 0x58..0x59:    reserved */
1939 +#define PCI_SER_LD_CTRL        0x5a    /* 16 bit       SEEPROM Loader Ctrl (YUKON only) */
1940 +       /* Bytes 0x5c..0xfc:    used by Yukon-2 */
1941 +#define PCI_MSI_CAP_ID 0x5c    /*  8 bit       MSI Capability ID Register */
1942 +#define PCI_MSI_NITEM  0x5d    /*  8 bit       MSI Next Item Pointer */
1943 +#define PCI_MSI_CTRL   0x5e    /* 16 bit       MSI Message Control */
1944 +#define PCI_MSI_ADR_LO 0x60    /* 32 bit       MSI Message Address (Lower) */
1945 +#define PCI_MSI_ADR_HI 0x64    /* 32 bit       MSI Message Address (Upper) */
1946 +#define PCI_MSI_DATA   0x68    /* 16 bit       MSI Message Data */
1947 +       /* Bytes 0x6a..0x6b:    reserved */
1948 +#define PCI_X_CAP_ID   0x6c    /*  8 bit       PCI-X Capability ID Register */
1949 +#define PCI_X_NITEM            0x6d    /*  8 bit       PCI-X Next Item Pointer */
1950 +#define PCI_X_COMMAND  0x6e    /* 16 bit       PCI-X Command */
1951 +#define PCI_X_PE_STAT  0x70    /* 32 bit       PCI-X / PE Status */
1952 +#define PCI_CAL_CTRL   0x74    /* 16 bit       PCI Calibration Control Register */
1953 +#define PCI_CAL_STAT   0x76    /* 16 bit       PCI Calibration Status Register */
1954 +#define PCI_DISC_CNT   0x78    /* 16 bit       PCI Discard Counter */
1955 +#define PCI_RETRY_CNT  0x7a    /*  8 bit       PCI Retry Counter */
1956 +       /* Byte 0x7b:   reserved */
1957 +#define PCI_OUR_STATUS 0x7c    /* 32 bit       Adapter Status Register */
1958 +       /* Bytes 0x80..0xdf:    reserved */
1959 +
1960 +/* PCI Express Capability */
1961 +#define PEX_CAP_ID             0xe0    /*  8 bit       PEX Capability ID */
1962 +#define PEX_NITEM              0xe1    /*  8 bit       PEX Next Item Pointer */
1963 +#define PEX_CAP_REG            0xe2    /* 16 bit       PEX Capability Register */
1964 +#define PEX_DEV_CAP            0xe4    /* 32 bit       PEX Device Capabilities */
1965 +#define PEX_DEV_CTRL   0xe8    /* 16 bit       PEX Device Control */
1966 +#define PEX_DEV_STAT   0xea    /* 16 bit       PEX Device Status */
1967 +#define PEX_LNK_CAP            0xec    /* 32 bit       PEX Link Capabilities */
1968 +#define PEX_LNK_CTRL   0xf0    /* 16 bit       PEX Link Control */
1969 +#define PEX_LNK_STAT   0xf2    /* 16 bit       PEX Link Status */
1970 +       /* Bytes 0xf4..0xff:    reserved */
1971 +
1972 +/* PCI Express Extended Capabilities */
1973 +#define PEX_ADV_ERR_REP                0x100   /* 32 bit       PEX Advanced Error Reporting */
1974 +#define PEX_UNC_ERR_STAT       0x104   /* 32 bit       PEX Uncorr. Errors Status */
1975 +#define PEX_UNC_ERR_MASK       0x108   /* 32 bit       PEX Uncorr. Errors Mask */
1976 +#define PEX_UNC_ERR_SEV                0x10c   /* 32 bit       PEX Uncorr. Errors Severity */
1977 +#define PEX_COR_ERR_STAT       0x110   /* 32 bit       PEX Correc. Errors Status */
1978 +#define PEX_COR_ERR_MASK       0x114   /* 32 bit       PEX Correc. Errors Mask */
1979 +#define PEX_ADV_ERR_CAP_C      0x118   /* 32 bit       PEX Advanced Error Cap./Ctrl */
1980 +#define PEX_HEADER_LOG         0x11c   /* 4x32 bit     PEX Header Log Register */
1981
1982  /*
1983   * I2C Address (PCI Config)
1984 @@ -180,13 +229,13 @@
1985  #define PCI_ADSTEP             BIT_7S          /* Address Stepping */
1986  #define PCI_PERREN             BIT_6S          /* Parity Report Response enable */
1987  #define PCI_VGA_SNOOP  BIT_5S          /* VGA palette snoop */
1988 -#define PCI_MWIEN              BIT_4S          /* Memory write an inv cycl ena */
1989 +#define PCI_MWIEN              BIT_4S          /* Memory write an inv cycl enable */
1990  #define PCI_SCYCEN             BIT_3S          /* Special Cycle enable */
1991  #define PCI_BMEN               BIT_2S          /* Bus Master enable */
1992  #define PCI_MEMEN              BIT_1S          /* Memory Space Access enable */
1993  #define PCI_IOEN               BIT_0S          /* I/O Space Access enable */
1994
1995 -#define PCI_COMMAND_VAL        (PCI_FBTEN | PCI_SERREN | PCI_PERREN | PCI_MWIEN |\
1996 +#define PCI_COMMAND_VAL        (PCI_INT_DIS | PCI_SERREN | PCI_PERREN | \
1997                                                  PCI_BMEN | PCI_MEMEN | PCI_IOEN)
1998
1999  /*     PCI_STATUS      16 bit  Status */
2000 @@ -220,7 +269,7 @@
2001
2002  /*     PCI_HEADER_T    8 bit   Header Type */
2003  #define PCI_HD_MF_DEV  BIT_7S  /* 0= single, 1= multi-func dev */
2004 -#define PCI_HD_TYPE            0x7f    /* Bit 6..0:    Header Layout 0= normal */
2005 +#define PCI_HD_TYPE            0x7f    /* Bit 6..0:    Header Layout (0=normal) */
2006
2007  /*     PCI_BIST        8 bit   Built-in selftest */
2008  /*     Built-in Self test not supported (optional) */
2009 @@ -229,33 +278,42 @@
2010  #define PCI_MEMSIZE            0x4000L         /* use 16 kB Memory Base */
2011  #define PCI_MEMBASE_MSK 0xffffc000L    /* Bit 31..14:  Memory Base Address */
2012  #define PCI_MEMSIZE_MSK 0x00003ff0L    /* Bit 13.. 4:  Memory Size Req. */
2013 -#define PCI_PREFEN             BIT_3           /* Prefetchable */
2014 -#define PCI_MEM_TYP            (3L<<2)         /* Bit  2.. 1:  Memory Type */
2015 +#define PCI_PREFEN             BIT_3           /* Prefetch enable */
2016 +#define PCI_MEM_TYP_MSK        (3L<<1)         /* Bit  2.. 1:  Memory Type Mask */
2017 +#define PCI_MEMSPACE   BIT_0           /* Memory Space Indicator */
2018 +
2019  #define PCI_MEM32BIT   (0L<<1)         /* Base addr anywhere in 32 Bit range */
2020  #define PCI_MEM1M              (1L<<1)         /* Base addr below 1 MegaByte */
2021  #define PCI_MEM64BIT   (2L<<1)         /* Base addr anywhere in 64 Bit range */
2022 -#define PCI_MEMSPACE   BIT_0           /* Memory Space Indicator */
2023
2024  /*     PCI_BASE_2ND    32 bit  2nd Base address */
2025  #define PCI_IOBASE             0xffffff00L     /* Bit 31.. 8:  I/O Base address */
2026  #define PCI_IOSIZE             0x000000fcL     /* Bit  7.. 2:  I/O Size Requirements */
2027 -                                                                       /* Bit  1:      reserved */
2028 +                                                               /* Bit  1:      reserved */
2029  #define PCI_IOSPACE            BIT_0           /* I/O Space Indicator */
2030
2031  /*     PCI_BASE_ROM    32 bit  Expansion ROM Base Address */
2032  #define PCI_ROMBASE_MSK        0xfffe0000L     /* Bit 31..17:  ROM Base address */
2033  #define PCI_ROMBASE_SIZ        (0x1cL<<14)     /* Bit 16..14:  Treat as Base or Size */
2034  #define PCI_ROMSIZE            (0x38L<<11)     /* Bit 13..11:  ROM Size Requirements */
2035 -                                                                       /* Bit 10.. 1:  reserved */
2036 +                                                               /* Bit 10.. 1:  reserved */
2037  #define PCI_ROMEN              BIT_0           /* Address Decode enable */
2038
2039  /* Device Dependent Region */
2040  /*     PCI_OUR_REG_1           32 bit  Our Register 1 */
2041 -                                                                       /* Bit 31..29:  reserved */
2042 +                                                               /* Bit 31..29:  reserved */
2043  #define PCI_PHY_COMA   BIT_28          /* Set PHY to Coma Mode (YUKON only) */
2044  #define PCI_TEST_CAL   BIT_27          /* Test PCI buffer calib. (YUKON only) */
2045  #define PCI_EN_CAL             BIT_26          /* Enable PCI buffer calib. (YUKON only) */
2046  #define PCI_VIO                        BIT_25          /* PCI I/O Voltage, 0 = 3.3V, 1 = 5V */
2047 +/* Yukon-2 */
2048 +#define PCI_Y2_PIG_ENA         BIT_31  /* Enable Plug-in-Go (YUKON-2) */
2049 +#define PCI_Y2_DLL_DIS         BIT_30  /* Disable PCI DLL (YUKON-2) */
2050 +#define PCI_Y2_PHY2_COMA       BIT_29  /* Set PHY 2 to Coma Mode (YUKON-2) */
2051 +#define PCI_Y2_PHY1_COMA       BIT_28  /* Set PHY 1 to Coma Mode (YUKON-2) */
2052 +#define PCI_Y2_PHY2_POWD       BIT_27  /* Set PHY 2 to Power Down (YUKON-2) */
2053 +#define PCI_Y2_PHY1_POWD       BIT_26  /* Set PHY 1 to Power Down (YUKON-2) */
2054 +                                                               /* Bit 25:      reserved */
2055  #define PCI_DIS_BOOT   BIT_24          /* Disable BOOT via ROM */
2056  #define PCI_EN_IO              BIT_23          /* Mapping to I/O space */
2057  #define PCI_EN_FPROM   BIT_22          /* Enable FLASH mapping to memory */
2058 @@ -266,9 +324,10 @@
2059  #define PCI_PAGE_32K   (1L<<20)        /*              32 k pages      */
2060  #define PCI_PAGE_64K   (2L<<20)        /*              64 k pages      */
2061  #define PCI_PAGE_128K  (3L<<20)        /*              128 k pages     */
2062 -                                                                       /* Bit 19:      reserved        */
2063 +                                                               /* Bit 19:      reserved        */
2064  #define PCI_PAGEREG            (7L<<16)        /* Bit 18..16:  Page Register   */
2065  #define PCI_NOTAR              BIT_15          /* No turnaround cycle */
2066 +#define PCI_PEX_LEGNAT BIT_15          /* PEX PM legacy/native mode (YUKON-2) */
2067  #define PCI_FORCE_BE   BIT_14          /* Assert all BEs on MR */
2068  #define PCI_DIS_MRL            BIT_13          /* Disable Mem Read Line */
2069  #define PCI_DIS_MRM            BIT_12          /* Disable Mem Read Multiple */
2070 @@ -278,13 +337,13 @@
2071  #define PCI_DIS_PCI_CLK        BIT_8           /* Disable PCI clock driving */
2072  #define PCI_SKEW_DAS   (0xfL<<4)       /* Bit  7.. 4:  Skew Ctrl, DAS Ext */
2073  #define PCI_SKEW_BASE  0xfL            /* Bit  3.. 0:  Skew Ctrl, Base */
2074 -
2075 +#define PCI_CLS_OPT            BIT_3           /* Cache Line Size opt. PCI-X (YUKON-2) */
2076
2077  /*     PCI_OUR_REG_2           32 bit  Our Register 2 */
2078  #define PCI_VPD_WR_THR (0xffL<<24)     /* Bit 31..24:  VPD Write Threshold */
2079  #define PCI_DEV_SEL            (0x7fL<<17)     /* Bit 23..17:  EEPROM Device Select */
2080  #define PCI_VPD_ROM_SZ (7L<<14)        /* Bit 16..14:  VPD ROM Size    */
2081 -                                                                       /* Bit 13..12:  reserved        */
2082 +                                                               /* Bit 13..12:  reserved        */
2083  #define PCI_PATCH_DIR  (0xfL<<8)       /* Bit 11.. 8:  Ext Patches dir 3..0 */
2084  #define PCI_PATCH_DIR_3        BIT_11
2085  #define PCI_PATCH_DIR_2        BIT_10
2086 @@ -297,21 +356,20 @@
2087  #define PCI_EXT_PATCH_0        BIT_4
2088  #define PCI_EN_DUMMY_RD        BIT_3           /* Enable Dummy Read */
2089  #define PCI_REV_DESC   BIT_2           /* Reverse Desc. Bytes */
2090 -                                                                       /* Bit  1:      reserved */
2091 +                                                               /* Bit  1:      reserved */
2092  #define PCI_USEDATA64  BIT_0           /* Use 64Bit Data bus ext */
2093
2094 -
2095  /* Power Management Region */
2096  /*     PCI_PM_CAP_REG          16 bit  Power Management Capabilities */
2097  #define PCI_PME_SUP_MSK        (0x1f<<11)      /* Bit 15..11:  PM Event Support Mask */
2098 -#define PCI_PME_D3C_SUP        BIT_15S         /* PME from D3cold Support (if Vaux) */
2099 +#define PCI_PME_D3C_SUP        BIT_15S         /* PME from D3cold Support (if VAUX) */
2100  #define PCI_PME_D3H_SUP        BIT_14S         /* PME from D3hot Support */
2101  #define PCI_PME_D2_SUP BIT_13S         /* PME from D2 Support */
2102  #define PCI_PME_D1_SUP BIT_12S         /* PME from D1 Support */
2103  #define PCI_PME_D0_SUP BIT_11S         /* PME from D0 Support */
2104  #define PCI_PM_D2_SUP  BIT_10S         /* D2 Support in 33 MHz mode */
2105  #define PCI_PM_D1_SUP  BIT_9S          /* D1 Support */
2106 -                                                                       /* Bit  8.. 6:  reserved */
2107 +                                                               /* Bit  8.. 6:  reserved */
2108  #define PCI_PM_DSI             BIT_5S          /* Device Specific Initialization */
2109  #define PCI_PM_APS             BIT_4S          /* Auxialiary Power Source */
2110  #define PCI_PME_CLOCK  BIT_3S          /* PM Event Clock */
2111 @@ -322,7 +380,7 @@
2112  #define PCI_PM_DAT_SCL (3<<13)         /* Bit 14..13:  Data Reg. scaling factor */
2113  #define PCI_PM_DAT_SEL (0xf<<9)        /* Bit 12.. 9:  PM data selector field */
2114  #define PCI_PME_EN             BIT_8S          /* Enable PME# generation (YUKON only) */
2115 -                                                                       /* Bit  7.. 2:  reserved */
2116 +                                                               /* Bit  7.. 2:  reserved */
2117  #define PCI_PM_STATE_MSK       3               /* Bit  1.. 0:  Power Management State */
2118
2119  #define PCI_PM_STATE_D0                0               /* D0:  Operational (default) */
2120 @@ -333,7 +391,67 @@
2121  /* VPD Region */
2122  /*     PCI_VPD_ADR_REG         16 bit  VPD Address Register */
2123  #define PCI_VPD_FLAG   BIT_15S         /* starts VPD rd/wr cycle */
2124 -#define PCI_VPD_ADR_MSK        0x7fffL         /* Bit 14.. 0:  VPD address mask */
2125 +#define PCI_VPD_ADR_MSK        0x7fffL         /* Bit 14.. 0:  VPD Address Mask */
2126 +
2127 +/* PCI_OUR_STATUS              32 bit  Adapter Status Register (Yukon-2) */
2128 +#define PCI_OS_PCI64B  BIT_31          /* Conventional PCI 64 bits Bus */
2129 +#define PCI_OS_PCIX            BIT_30          /* PCI-X Bus */
2130 +#define PCI_OS_MODE_MSK        (3L<<28)        /* Bit 29..28:  PCI-X Bus Mode Mask */
2131 +#define PCI_OS_PCI66M  BIT_27          /* PCI 66 MHz Bus */
2132 +#define PCI_OS_PCI_X   BIT_26          /* PCI/PCI-X Bus (0 = PEX) */
2133 +#define PCI_OS_DLLE_MSK        (3L<<24)        /* Bit 25..24:  DLL Status Indication */
2134 +#define PCI_OS_DLLR_MSK        (0xfL<<20)      /* Bit 23..20:  DLL Row Counters Values */
2135 +#define PCI_OS_DLLC_MSK        (0xfL<<16)      /* Bit 19..16:  DLL Col. Counters Values */
2136 +                                                               /* Bit 15.. 8:  reserved */
2137 +
2138 +#define PCI_OS_SPEED(val)      ((val & PCI_OS_MODE_MSK) >> 28) /* PCI-X Speed */
2139 +/* possible values for the speed field of the register */
2140 +#define PCI_OS_SPD_PCI         0               /* PCI Conventional Bus */
2141 +#define PCI_OS_SPD_X66         1               /* PCI-X 66MHz Bus */
2142 +#define PCI_OS_SPD_X100                2               /* PCI-X 100MHz Bus */
2143 +#define PCI_OS_SPD_X133                3               /* PCI-X 133MHz Bus */
2144 +
2145 +/* PEX_DEV_CTRL                        16 bit  PEX Device Control (Yukon-2) */
2146 +                                                               /* Bit 15       reserved */
2147 +#define PEX_DC_MAX_RRS_MSK     (7<<12) /* Bit 14..12:  Max. Read Request Size */
2148 +#define PEX_DC_EN_NO_SNOOP     BIT_11S /* Enable No Snoop */
2149 +#define PEX_DC_EN_AUX_POW      BIT_10S /* Enable AUX Power */
2150 +#define PEX_DC_EN_PHANTOM      BIT_9S  /* Enable Phantom Functions */
2151 +#define PEX_DC_EN_EXT_TAG      BIT_8S  /* Enable Extended Tag Field */
2152 +#define PEX_DC_MAX_PLS_MSK     (7<<5)  /* Bit  7.. 5:  Max. Payload Size Mask */
2153 +#define PEX_DC_EN_REL_ORD      BIT_4S  /* Enable Relaxed Ordering */
2154 +#define PEX_DC_EN_UNS_RQ_RP    BIT_3S  /* Enable Unsupported Request Reporting */
2155 +#define PEX_DC_EN_FAT_ER_RP    BIT_2S  /* Enable Fatal Error Reporting */
2156 +#define PEX_DC_EN_NFA_ER_RP    BIT_1S  /* Enable Non-Fatal Error Reporting */
2157 +#define PEX_DC_EN_COR_ER_RP    BIT_0S  /* Enable Correctable Error Reporting */
2158 +
2159 +#define PEX_DC_MAX_RD_RQ_SIZE(x)       (SHIFT12(x) & PEX_DC_MAX_RRS_MSK)
2160 +
2161 +/* PEX_LNK_STAT                        16 bit  PEX Link Status (Yukon-2) */
2162 +                                                               /* Bit 15..13   reserved */
2163 +#define PEX_LS_SLOT_CLK_CFG    BIT_12S /* Slot Clock Config */
2164 +#define PEX_LS_LINK_TRAIN      BIT_11S /* Link Training */
2165 +#define PEX_LS_TRAIN_ERROR     BIT_10S /* Training Error */
2166 +#define PEX_LS_LINK_WI_MSK     (0x3f<<4)       /* Bit  9.. 4:  Neg. Link Width Mask */
2167 +#define PEX_LS_LINK_SP_MSK     0x0f    /* Bit  3.. 0:  Link Speed Mask */
2168 +
2169 +/* PEX_UNC_ERR_STAT     PEX Uncorrectable Errors Status Register (Yukon-2) */
2170 +                                                               /* Bit 31..21   reserved */
2171 +#define PEX_UNSUP_REQ  BIT_20          /* Unsupported Request Error */
2172 +                                                                       /* ECRC Error (not supported) */
2173 +#define PEX_MALFOR_TLP BIT_18          /* Malformed TLP */
2174 +                                                                       /* Receiver Overflow (not supported) */
2175 +#define PEX_UNEXP_COMP BIT_16          /* Unexpected Completion */
2176 +                                                                       /* Completer Abort (not supported) */
2177 +#define PEX_COMP_TO            BIT_14          /* Completion Timeout */
2178 +#define PEX_FLOW_CTRL_P        BIT_13          /* Flow Control Protocol Error */
2179 +#define PEX_POIS_TLP   BIT_12          /* Poisoned TLP */
2180 +                                                               /* Bit 11.. 5:  reserved */
2181 +#define PEX_DATA_LINK_P BIT_4          /* Data Link Protocol Error */
2182 +                                                               /* Bit  3.. 1:  reserved */
2183 +                                                                       /* Training Error (not supported) */
2184 +
2185 +#define PEX_FATAL_ERRORS       (PEX_MALFOR_TLP | PEX_FLOW_CTRL_P | PEX_DATA_LINK_P)
2186
2187  /*     Control Register File (Address Map) */
2188
2189 @@ -349,8 +467,14 @@
2190  #define B0_IMSK                        0x000c  /* 32 bit       Interrupt Mask Register */
2191  #define B0_HWE_ISRC            0x0010  /* 32 bit       HW Error Interrupt Src Reg */
2192  #define B0_HWE_IMSK            0x0014  /* 32 bit       HW Error Interrupt Mask Reg */
2193 -#define B0_SP_ISRC             0x0018  /* 32 bit       Special Interrupt Source Reg */
2194 -       /* 0x001c:              reserved */
2195 +#define B0_SP_ISRC             0x0018  /* 32 bit       Special Interrupt Source Reg 1 */
2196 +
2197 +/* Special ISR registers (Yukon-2 only) */
2198 +#define B0_Y2_SP_ISRC2 0x001c  /* 32 bit       Special Interrupt Source Reg 2 */
2199 +#define B0_Y2_SP_ISRC3 0x0020  /* 32 bit       Special Interrupt Source Reg 3 */
2200 +#define B0_Y2_SP_EISR  0x0024  /* 32 bit       Enter ISR Reg */
2201 +#define B0_Y2_SP_LISR  0x0028  /* 32 bit       Leave ISR Reg */
2202 +#define B0_Y2_SP_ICR   0x002c  /* 32 bit       Interrupt Control Reg */
2203
2204  /* B0 XMAC 1 registers (GENESIS only) */
2205  #define B0_XM1_IMSK            0x0020  /* 16 bit r/w   XMAC 1 Interrupt Mask Register*/
2206 @@ -400,14 +524,23 @@
2207  #define B2_CONN_TYP            0x0118  /*  8 bit       Connector type */
2208  #define B2_PMD_TYP             0x0119  /*  8 bit       PMD type */
2209  #define B2_MAC_CFG             0x011a  /*  8 bit       MAC Configuration / Chip Revision */
2210 -#define B2_CHIP_ID             0x011b  /*  8 bit       Chip Identification Number */
2211 -       /* Eprom registers are currently of no use */
2212 +#define B2_CHIP_ID             0x011b  /*  8 bit       Chip Identification Number */
2213 +       /* Eprom registers */
2214  #define B2_E_0                 0x011c  /*  8 bit       EPROM Byte 0 (ext. SRAM size */
2215 +/* Yukon and Genesis */
2216  #define B2_E_1                 0x011d  /*  8 bit       EPROM Byte 1 (PHY type) */
2217  #define B2_E_2                 0x011e  /*  8 bit       EPROM Byte 2 */
2218 +/* Yukon-2 */
2219 +#define B2_Y2_CLK_GATE 0x011d  /*  8 bit       Clock Gating (Yukon-2) */
2220 +#define B2_Y2_HW_RES   0x011e  /*  8 bit       HW Resources (Yukon-2) */
2221 +
2222  #define B2_E_3                 0x011f  /*  8 bit       EPROM Byte 3 */
2223 +
2224 +/* Yukon and Genesis */
2225  #define B2_FAR                 0x0120  /* 32 bit       Flash-Prom Addr Reg/Cnt */
2226  #define B2_FDP                 0x0124  /*  8 bit       Flash-Prom Data Port */
2227 +/* Yukon-2 */
2228 +#define B2_Y2_CLK_CTRL 0x0120  /* 32 bit       Core Clock Frequency Control */
2229         /* 0x0125 - 0x0127:     reserved */
2230  #define B2_LD_CTRL             0x0128  /*  8 bit       EPROM loader control register */
2231  #define B2_LD_TEST             0x0129  /*  8 bit       EPROM loader test register */
2232 @@ -439,6 +572,10 @@
2233  #define B2_BSC_CTRL            0x0178  /*  8 bit       Blink Source Counter Control */
2234  #define B2_BSC_STAT            0x0179  /*  8 bit       Blink Source Counter Status */
2235  #define B2_BSC_TST             0x017a  /* 16 bit       Blink Source Counter Test Reg */
2236 +
2237 +/* Yukon-2 */
2238 +#define Y2_PEX_PHY_DATA        0x0170  /* 16 bit       PEX PHY Data Register */
2239 +#define Y2_PEX_PHY_ADDR        0x0172  /* 16 bit       PEX PHY Address Register */
2240         /* 0x017c - 0x017f:     reserved */
2241
2242  /*
2243 @@ -448,9 +585,13 @@
2244  #define B3_RAM_ADDR            0x0180  /* 32 bit       RAM Address, to read or write */
2245  #define B3_RAM_DATA_LO 0x0184  /* 32 bit       RAM Data Word (low dWord) */
2246  #define B3_RAM_DATA_HI 0x0188  /* 32 bit       RAM Data Word (high dWord) */
2247 +
2248 +#define SELECT_RAM_BUFFER(rb, addr) (addr | (rb << 6)) /* Yukon-2 only */
2249 +
2250         /* 0x018c - 0x018f:     reserved */
2251
2252  /* RAM Interface Registers */
2253 +/* Yukon-2: use SELECT_RAM_BUFFER() to access the RAM buffer */
2254  /*
2255   * The HW-Spec. calls this registers Timeout Value 0..11. But this names are
2256   * not usable in SW. Please notice these are NOT real timeouts, these are
2257 @@ -517,8 +658,8 @@
2258         /* 0x01ea - 0x01eb:     reserved */
2259  #define B3_PA_TOVAL_TX2        0x01ec  /* 16 bit       Timeout Val Tx Path MAC 2 */
2260         /* 0x01ee - 0x01ef:     reserved */
2261 -#define B3_PA_CTRL     0x01f0  /* 16 bit       Packet Arbiter Ctrl Register */
2262 -#define B3_PA_TEST     0x01f2  /* 16 bit       Packet Arbiter Test Register */
2263 +#define B3_PA_CTRL             0x01f0  /* 16 bit       Packet Arbiter Ctrl Register */
2264 +#define B3_PA_TEST             0x01f2  /* 16 bit       Packet Arbiter Test Register */
2265         /* 0x01f4 - 0x01ff:     reserved */
2266
2267  /*
2268 @@ -532,7 +673,16 @@
2269  #define TXA_CTRL               0x0210  /*  8 bit       Tx Arbiter Control Register */
2270  #define TXA_TEST               0x0211  /*  8 bit       Tx Arbiter Test Register */
2271  #define TXA_STAT               0x0212  /*  8 bit       Tx Arbiter Status Register */
2272 -       /* 0x0213 - 0x027f:     reserved */
2273 +       /* 0x0213 - 0x021f:     reserved */
2274 +
2275 +       /* RSS key registers for Yukon-2 Family */
2276 +#define B4_RSS_KEY             0x0220  /* 4x32 bit RSS Key register (Yukon-2) */
2277 +       /* RSS key register offsets */
2278 +#define KEY_IDX_0               0              /* offset for location of KEY 0 */
2279 +#define KEY_IDX_1               4              /* offset for location of KEY 1 */
2280 +#define KEY_IDX_2               8              /* offset for location of KEY 2 */
2281 +#define KEY_IDX_3              12              /* offset for location of KEY 3 */
2282 +
2283         /* 0x0280 - 0x0292:     MAC 2 */
2284         /* 0x0213 - 0x027f:     reserved */
2285
2286 @@ -570,8 +720,37 @@
2287  #define Q_T1_SV        0x3f    /*  8 bit       Test Register 1 Supervisor SM */
2288  #define Q_T2   0x40    /* 32 bit       Test Register 2 */
2289  #define Q_T3   0x44    /* 32 bit       Test Register 3 */
2290 +
2291 +/* Yukon-2 */
2292 +#define Q_DONE 0x24    /* 16 bit       Done Index              (Yukon-2 only) */
2293 +#define Q_WM   0x40    /* 16 bit       FIFO Watermark */
2294 +#define Q_AL   0x42    /*  8 bit       FIFO Alignment */
2295 +#define Q_RSP  0x44    /* 16 bit       FIFO Read Shadow Pointer */
2296 +#define Q_RSL  0x46    /*  8 bit       FIFO Read Shadow Level */
2297 +#define Q_RP   0x48    /*  8 bit       FIFO Read Pointer */
2298 +#define Q_RL   0x4a    /*  8 bit       FIFO Read Level */
2299 +#define Q_WP   0x4c    /*  8 bit       FIFO Write Pointer */
2300 +#define Q_WSP  0x4d    /*  8 bit       FIFO Write Shadow Pointer */
2301 +#define Q_WL   0x4e    /*  8 bit       FIFO Write Level */
2302 +#define Q_WSL  0x4f    /*  8 bit       FIFO Write Shadow Level */
2303         /* 0x48 - 0x7f: reserved */
2304
2305 +/* Queue Prefetch Unit Offsets, use Y2_PREF_Q_ADDR() to address (Yukon-2 only)*/
2306 +#define Y2_B8_PREF_REGS                        0x0450
2307 +
2308 +#define PREF_UNIT_CTRL_REG             0x00    /* 32 bit       Prefetch Control register */
2309 +#define PREF_UNIT_LAST_IDX_REG 0x04    /* 16 bit       Last Index */
2310 +#define PREF_UNIT_ADDR_LOW_REG 0x08    /* 32 bit       List start addr, low part */
2311 +#define PREF_UNIT_ADDR_HI_REG  0x0c    /* 32 bit       List start addr, high part*/
2312 +#define PREF_UNIT_GET_IDX_REG  0x10    /* 16 bit       Get Index */
2313 +#define PREF_UNIT_PUT_IDX_REG  0x14    /* 16 bit       Put Index */
2314 +#define PREF_UNIT_FIFO_WP_REG  0x20    /*  8 bit       FIFO write pointer */
2315 +#define PREF_UNIT_FIFO_RP_REG  0x24    /*  8 bit       FIFO read pointer */
2316 +#define PREF_UNIT_FIFO_WM_REG  0x28    /*  8 bit       FIFO watermark */
2317 +#define PREF_UNIT_FIFO_LEV_REG 0x2c    /*  8 bit       FIFO level */
2318 +
2319 +#define PREF_UNIT_MASK_IDX             0x0fff
2320 +
2321  /*
2322   *     Bank 16 - 23
2323   */
2324 @@ -583,17 +762,17 @@
2325  #define RB_END                 0x04    /* 32 bit       RAM Buffer End Address */
2326  #define RB_WP                  0x08    /* 32 bit       RAM Buffer Write Pointer */
2327  #define RB_RP                  0x0c    /* 32 bit       RAM Buffer Read Pointer */
2328 -#define RB_RX_UTPP             0x10    /* 32 bit       Rx Upper Threshold, Pause Pack */
2329 -#define RB_RX_LTPP             0x14    /* 32 bit       Rx Lower Threshold, Pause Pack */
2330 +#define RB_RX_UTPP             0x10    /* 32 bit       Rx Upper Threshold, Pause Packet */
2331 +#define RB_RX_LTPP             0x14    /* 32 bit       Rx Lower Threshold, Pause Packet */
2332  #define RB_RX_UTHP             0x18    /* 32 bit       Rx Upper Threshold, High Prio */
2333  #define RB_RX_LTHP             0x1c    /* 32 bit       Rx Lower Threshold, High Prio */
2334         /* 0x10 - 0x1f: reserved at Tx RAM Buffer Registers */
2335  #define RB_PC                  0x20    /* 32 bit       RAM Buffer Packet Counter */
2336  #define RB_LEV                 0x24    /* 32 bit       RAM Buffer Level Register */
2337 -#define RB_CTRL                        0x28    /*  8 bit       RAM Buffer Control Register */
2338 +#define RB_CTRL                        0x28    /* 32 bit       RAM Buffer Control Register */
2339  #define RB_TST1                        0x29    /*  8 bit       RAM Buffer Test Register 1 */
2340 -#define RB_TST2                        0x2A    /*  8 bit       RAM Buffer Test Register 2 */
2341 -       /* 0x2c - 0x7f: reserved */
2342 +#define RB_TST2                        0x2a    /*  8 bit       RAM Buffer Test Register 2 */
2343 +       /* 0x2b - 0x7f: reserved */
2344
2345  /*
2346   *     Bank 24
2347 @@ -603,7 +782,7 @@
2348   * use MR_ADDR() to access
2349   */
2350  #define RX_MFF_EA              0x0c00  /* 32 bit       Receive MAC FIFO End Address */
2351 -#define RX_MFF_WP              0x0c04  /* 32 bit       Receive MAC FIFO Write Pointer */
2352 +#define RX_MFF_WP              0x0c04  /* 32 bit       Receive MAC FIFO Write Pointer */
2353         /* 0x0c08 - 0x0c0b:     reserved */
2354  #define RX_MFF_RP              0x0c0c  /* 32 bit       Receive MAC FIFO Read Pointer */
2355  #define RX_MFF_PC              0x0c10  /* 32 bit       Receive MAC FIFO Packet Cnt */
2356 @@ -628,20 +807,22 @@
2357  #define LNK_LED_REG            0x0c3c  /*  8 bit       Link LED Register */
2358         /* 0x0c3d - 0x0c3f:     reserved */
2359
2360 -/* Receive GMAC FIFO (YUKON only), use MR_ADDR() to access */
2361 +/* Receive GMAC FIFO (YUKON and Yukon-2), use MR_ADDR() to access */
2362  #define RX_GMF_EA              0x0c40  /* 32 bit       Rx GMAC FIFO End Address */
2363  #define RX_GMF_AF_THR  0x0c44  /* 32 bit       Rx GMAC FIFO Almost Full Thresh. */
2364  #define RX_GMF_CTRL_T  0x0c48  /* 32 bit       Rx GMAC FIFO Control/Test */
2365  #define RX_GMF_FL_MSK  0x0c4c  /* 32 bit       Rx GMAC FIFO Flush Mask */
2366  #define RX_GMF_FL_THR  0x0c50  /* 32 bit       Rx GMAC FIFO Flush Threshold */
2367 -       /* 0x0c54 - 0x0c5f:     reserved */
2368 -#define RX_GMF_WP              0x0c60  /* 32 bit       Rx GMAC FIFO Write Pointer */
2369 +#define RX_GMF_TR_THR  0x0c54  /* 32 bit       Rx Truncation Threshold (Yukon-2) */
2370 +       /* 0x0c58 - 0x0c5b:     reserved */
2371 +#define RX_GMF_VLAN            0x0c5c  /* 32 bit       Rx VLAN Type Register (Yukon-2) */
2372 +#define RX_GMF_WP              0x0c60  /* 32 bit       Rx GMAC FIFO Write Pointer */
2373         /* 0x0c64 - 0x0c67:     reserved */
2374 -#define RX_GMF_WLEV            0x0c68  /* 32 bit       Rx GMAC FIFO Write Level */
2375 +#define RX_GMF_WLEV            0x0c68  /* 32 bit       Rx GMAC FIFO Write Level */
2376         /* 0x0c6c - 0x0c6f:     reserved */
2377 -#define RX_GMF_RP              0x0c70  /* 32 bit       Rx GMAC FIFO Read Pointer */
2378 +#define RX_GMF_RP              0x0c70  /* 32 bit       Rx GMAC FIFO Read Pointer */
2379         /* 0x0c74 - 0x0c77:     reserved */
2380 -#define RX_GMF_RLEV            0x0c78  /* 32 bit       Rx GMAC FIFO Read Level */
2381 +#define RX_GMF_RLEV            0x0c78  /* 32 bit       Rx GMAC FIFO Read Level */
2382         /* 0x0c7c - 0x0c7f:     reserved */
2383
2384  /*
2385 @@ -658,7 +839,7 @@
2386   * use MR_ADDR() to access
2387   */
2388  #define TX_MFF_EA              0x0d00  /* 32 bit       Transmit MAC FIFO End Address */
2389 -#define TX_MFF_WP              0x0d04  /* 32 bit       Transmit MAC FIFO WR Pointer */
2390 +#define TX_MFF_WP              0x0d04  /* 32 bit       Transmit MAC FIFO WR Pointer */
2391  #define TX_MFF_WSP             0x0d08  /* 32 bit       Transmit MAC FIFO WR Shadow Ptr */
2392  #define TX_MFF_RP              0x0d0c  /* 32 bit       Transmit MAC FIFO RD Pointer */
2393  #define TX_MFF_PC              0x0d10  /* 32 bit       Transmit MAC FIFO Packet Cnt */
2394 @@ -676,18 +857,19 @@
2395  #define TX_LED_TST             0x0d29  /*  8 bit       Transmit LED Cnt Test Reg */
2396         /* 0x0d2a - 0x0d3f:     reserved */
2397
2398 -/* Transmit GMAC FIFO (YUKON only), use MR_ADDR() to access */
2399 +/* Transmit GMAC FIFO (YUKON and Yukon-2), use MR_ADDR() to access */
2400  #define TX_GMF_EA              0x0d40  /* 32 bit       Tx GMAC FIFO End Address */
2401  #define TX_GMF_AE_THR  0x0d44  /* 32 bit       Tx GMAC FIFO Almost Empty Thresh.*/
2402  #define TX_GMF_CTRL_T  0x0d48  /* 32 bit       Tx GMAC FIFO Control/Test */
2403 -       /* 0x0d4c - 0x0d5f:     reserved */
2404 -#define TX_GMF_WP              0x0d60  /* 32 bit       Tx GMAC FIFO Write Pointer */
2405 -#define TX_GMF_WSP             0x0d64  /* 32 bit       Tx GMAC FIFO Write Shadow Ptr. */
2406 -#define TX_GMF_WLEV            0x0d68  /* 32 bit       Tx GMAC FIFO Write Level */
2407 +       /* 0x0d4c - 0x0d5b:     reserved */
2408 +#define TX_GMF_VLAN            0x0d5c  /* 32 bit       Tx VLAN Type Register (Yukon-2) */
2409 +#define TX_GMF_WP              0x0d60  /* 32 bit       Tx GMAC FIFO Write Pointer */
2410 +#define TX_GMF_WSP             0x0d64  /* 32 bit       Tx GMAC FIFO Write Shadow Pointer */
2411 +#define TX_GMF_WLEV            0x0d68  /* 32 bit       Tx GMAC FIFO Write Level */
2412         /* 0x0d6c - 0x0d6f:     reserved */
2413 -#define TX_GMF_RP              0x0d70  /* 32 bit       Tx GMAC FIFO Read Pointer */
2414 -#define TX_GMF_RSTP            0x0d74  /* 32 bit       Tx GMAC FIFO Restart Pointer */
2415 -#define TX_GMF_RLEV            0x0d78  /* 32 bit       Tx GMAC FIFO Read Level */
2416 +#define TX_GMF_RP              0x0d70  /* 32 bit       Tx GMAC FIFO Read Pointer */
2417 +#define TX_GMF_RSTP            0x0d74  /* 32 bit       Tx GMAC FIFO Restart Pointer */
2418 +#define TX_GMF_RLEV            0x0d78  /* 32 bit       Tx GMAC FIFO Read Level */
2419         /* 0x0d7c - 0x0d7f:     reserved */
2420
2421  /*
2422 @@ -713,12 +895,84 @@
2423  #define GMAC_TI_ST_CTRL        0x0e18  /*  8 bit       Time Stamp Timer Ctrl Reg */
2424         /* 0x0e19:      reserved */
2425  #define GMAC_TI_ST_TST 0x0e1a  /*  8 bit       Time Stamp Timer Test Reg */
2426 -       /* 0x0e1b - 0x0e7f:     reserved */
2427 +       /* 0x0e1b - 0x0e1f:     reserved */
2428 +
2429 +/* Polling Unit Registers (Yukon-2 only) */
2430 +#define POLL_CTRL                      0x0e20  /* 32 bit       Polling Unit Control Reg */
2431 +#define POLL_LAST_IDX          0x0e24  /* 16 bit       Polling Unit List Last Index */
2432 +       /* 0x0e26 - 0x0e27:     reserved */
2433 +#define POLL_LIST_ADDR_LO      0x0e28  /* 32 bit       Poll. List Start Addr (low) */
2434 +#define POLL_LIST_ADDR_HI      0x0e2c  /* 32 bit       Poll. List Start Addr (high) */
2435 +       /* 0x0e30 - 0x0e3f:     reserved */
2436 +
2437 +/* ASF Subsystem Registers (Yukon-2 only) */
2438 +#define B28_Y2_SMB_CONFIG      0x0e40  /* 32 bit       ASF SMBus Config Register */
2439 +#define B28_Y2_SMB_CSD_REG     0x0e44  /* 32 bit       ASF SMB Control/Status/Data */
2440 +       /* 0x0e48 - 0x0e5f: reserved */
2441 +#define B28_Y2_ASF_IRQ_V_BASE  0x0e60  /* 32 bit       ASF IRQ Vector Base */
2442 +       /* 0x0e64 - 0x0e67: reserved */
2443 +#define B28_Y2_ASF_STAT_CMD    0x0e68  /* 32 bit       ASF Status and Command Reg */
2444 +#define B28_Y2_ASF_HOST_COM    0x0e6c  /* 32 bit       ASF Host Communication Reg */
2445 +#define B28_Y2_DATA_REG_1      0x0e70  /* 32 bit       ASF/Host Data Register 1 */
2446 +#define B28_Y2_DATA_REG_2      0x0e74  /* 32 bit       ASF/Host Data Register 2 */
2447 +#define B28_Y2_DATA_REG_3      0x0e78  /* 32 bit       ASF/Host Data Register 3 */
2448 +#define B28_Y2_DATA_REG_4      0x0e7c  /* 32 bit       ASF/Host Data Register 4 */
2449
2450  /*
2451   *     Bank 29
2452   */
2453 -       /* 0x0e80 - 0x0efc:     reserved */
2454 +
2455 +/* Status BMU Registers (Yukon-2 only)*/
2456 +#define STAT_CTRL                      0x0e80  /* 32 bit       Status BMU Control Reg */
2457 +#define STAT_LAST_IDX          0x0e84  /* 16 bit       Status BMU Last Index */
2458 +       /* 0x0e85 - 0x0e86:     reserved */
2459 +#define STAT_LIST_ADDR_LO      0x0e88  /* 32 bit       Status List Start Addr (low) */
2460 +#define STAT_LIST_ADDR_HI      0x0e8c  /* 32 bit       Status List Start Addr (high) */
2461 +#define STAT_TXA1_RIDX         0x0e90  /* 16 bit       Status TxA1 Report Index Reg */
2462 +#define STAT_TXS1_RIDX         0x0e92  /* 16 bit       Status TxS1 Report Index Reg */
2463 +#define STAT_TXA2_RIDX         0x0e94  /* 16 bit       Status TxA2 Report Index Reg */
2464 +#define STAT_TXS2_RIDX         0x0e96  /* 16 bit       Status TxS2 Report Index Reg */
2465 +#define STAT_TX_IDX_TH         0x0e98  /* 16 bit       Status Tx Index Threshold Reg */
2466 +       /* 0x0e9a - 0x0e9b:     reserved */
2467 +#define STAT_PUT_IDX           0x0e9c  /* 16 bit       Status Put Index Reg */
2468 +       /* 0x0e9e - 0x0e9f:     reserved */
2469 +
2470 +/* FIFO Control/Status Registers (Yukon-2 only)*/
2471 +#define STAT_FIFO_WP           0x0ea0  /*  8 bit       Status FIFO Write Pointer Reg */
2472 +       /* 0x0ea1 - 0x0ea3:     reserved */
2473 +#define STAT_FIFO_RP           0x0ea4  /*  8 bit       Status FIFO Read Pointer Reg */
2474 +       /* 0x0ea5:      reserved */
2475 +#define STAT_FIFO_RSP          0x0ea6  /*  8 bit       Status FIFO Read Shadow Ptr */
2476 +       /* 0x0ea7:      reserved */
2477 +#define STAT_FIFO_LEVEL                0x0ea8  /*  8 bit       Status FIFO Level Reg */
2478 +       /* 0x0ea9:      reserved */
2479 +#define STAT_FIFO_SHLVL                0x0eaa  /*  8 bit       Status FIFO Shadow Level Reg */
2480 +       /* 0x0eab:      reserved */
2481 +#define STAT_FIFO_WM           0x0eac  /*  8 bit       Status FIFO Watermark Reg */
2482 +#define STAT_FIFO_ISR_WM       0x0ead  /*  8 bit       Status FIFO ISR Watermark Reg */
2483 +       /* 0x0eae - 0x0eaf:     reserved */
2484 +
2485 +/* Level and ISR Timer Registers (Yukon-2 only)*/
2486 +#define STAT_LEV_TIMER_INI     0x0eb0  /* 32 bit       Level Timer Init. Value Reg */
2487 +#define STAT_LEV_TIMER_CNT     0x0eb4  /* 32 bit       Level Timer Counter Reg */
2488 +#define STAT_LEV_TIMER_CTRL    0x0eb8  /*  8 bit       Level Timer Control Reg */
2489 +#define STAT_LEV_TIMER_TEST    0x0eb9  /*  8 bit       Level Timer Test Reg */
2490 +       /* 0x0eba - 0x0ebf:     reserved */
2491 +#define STAT_TX_TIMER_INI      0x0ec0  /* 32 bit       Tx Timer Init. Value Reg */
2492 +#define STAT_TX_TIMER_CNT      0x0ec4  /* 32 bit       Tx Timer Counter Reg */
2493 +#define STAT_TX_TIMER_CTRL     0x0ec8  /*  8 bit       Tx Timer Control Reg */
2494 +#define STAT_TX_TIMER_TEST     0x0ec9  /*  8 bit       Tx Timer Test Reg */
2495 +       /* 0x0eca - 0x0ecf:     reserved */
2496 +#define STAT_ISR_TIMER_INI     0x0ed0  /* 32 bit       ISR Timer Init. Value Reg */
2497 +#define STAT_ISR_TIMER_CNT     0x0ed4  /* 32 bit       ISR Timer Counter Reg */
2498 +#define STAT_ISR_TIMER_CTRL    0x0ed8  /*  8 bit       ISR Timer Control Reg */
2499 +#define STAT_ISR_TIMER_TEST    0x0ed9  /*  8 bit       ISR Timer Test Reg */
2500 +       /* 0x0eda - 0x0eff:     reserved */
2501 +
2502 +#define ST_LAST_IDX_MASK       0x007f  /* Last Index Mask */
2503 +#define ST_TXRP_IDX_MASK       0x0fff  /* Tx Report Index Mask */
2504 +#define ST_TXTH_IDX_MASK       0x0fff  /* Tx Threshold Index Mask */
2505 +#define ST_WM_IDX_MASK         0x3f    /* FIFO Watermark Index Mask */
2506
2507  /*
2508   *     Bank 30
2509 @@ -742,11 +996,9 @@
2510  #define WOL_MATCH_RES  0x0f23  /*  8 bit       WOL Match Result Reg */
2511  #define WOL_MAC_ADDR_LO        0x0f24  /* 32 bit       WOL MAC Address Low */
2512  #define WOL_MAC_ADDR_HI        0x0f28  /* 16 bit       WOL MAC Address High */
2513 -#define WOL_PATT_RPTR  0x0f2c  /*  8 bit       WOL Pattern Read Ptr */
2514 -
2515 -/* use this macro to access above registers */
2516 -#define WOL_REG(Reg)   ((Reg) + (pAC->GIni.GIWolOffs))
2517 -
2518 +#define WOL_PATT_PME   0x0f2a  /*  8 bit       WOL PME Match Enable (Yukon-2) */
2519 +#define WOL_PATT_ASFM  0x0f2b  /*  8 bit       WOL ASF Match Enable (Yukon-2) */
2520 +#define WOL_PATT_RPTR  0x0f2c  /*  8 bit       WOL Pattern Read Pointer */
2521
2522  /* WOL Pattern Length Registers (YUKON only) */
2523
2524 @@ -764,11 +1016,22 @@
2525   */
2526  /* 0x0f80 - 0x0fff:    reserved */
2527
2528 +/* WOL registers link 2 */
2529 +
2530 +/* use this macro to access WOL registers */
2531 +#define WOL_REG(Port, Reg)     ((Reg) + ((Port)*0x80) + (pAC->GIni.GIWolOffs))
2532 +
2533  /*
2534   *     Bank 32 - 33
2535   */
2536  #define WOL_PATT_RAM_1 0x1000  /*  WOL Pattern RAM Link 1 */
2537 +#define WOL_PATT_RAM_2 0x1400  /*  WOL Pattern RAM Link 2 */
2538
2539 +/* use this macro to retrieve the pattern ram base address */
2540 +#define WOL_PATT_RAM_BASE(Port) (WOL_PATT_RAM_1 + (Port)*0x400)
2541 +
2542 +/* offset to configuration space on Yukon-2 */
2543 +#define Y2_CFG_SPC             0x1c00
2544  /*
2545   *     Bank 0x22 - 0x3f
2546   */
2547 @@ -800,13 +1063,26 @@
2548   */
2549  /*     B0_RAP          8 bit   Register Address Port */
2550                                                                 /* Bit 7:       reserved */
2551 -#define RAP_RAP                        0x3f    /* Bit 6..0:    0 = block 0,..,6f = block 6f */
2552 +#define RAP_MSK                        0x7f    /* Bit 6..0:    0 = block 0,..,6f = block 6f */
2553 +
2554 +/*     B0_CTST                 24 bit  Control/Status register */
2555 +                                                               /* Bit 23..18:  reserved */
2556 +#define Y2_VMAIN_AVAIL BIT_17          /* VMAIN available (YUKON-2 only) */
2557 +#define Y2_VAUX_AVAIL  BIT_16          /* VAUX available (YUKON-2 only) */
2558 +                                                               /* Bit 15..14:  reserved */
2559 +#define Y2_ASF_ENABLE  BIT_13S         /* ASF Unit Enable (YUKON-2 only) */
2560 +#define Y2_ASF_DISABLE BIT_12S         /* ASF Unit Disable (YUKON-2 only) */
2561 +#define Y2_CLK_RUN_ENA BIT_11S         /* CLK_RUN Enable  (YUKON-2 only) */
2562 +#define Y2_CLK_RUN_DIS BIT_10S         /* CLK_RUN Disable (YUKON-2 only) */
2563 +#define Y2_LED_STAT_ON BIT_9S          /* Status LED On  (YUKON-2 only) */
2564 +#define Y2_LED_STAT_OFF        BIT_8S          /* Status LED Off (YUKON-2 only) */
2565 +                                                               /* Bit  7.. 0:  same as below */
2566
2567  /*     B0_CTST                 16 bit  Control/Status register */
2568                                                                 /* Bit 15..14:  reserved */
2569 -#define CS_CLK_RUN_HOT BIT_13S         /* CLK_RUN hot m. (YUKON-Lite only) */
2570 -#define CS_CLK_RUN_RST BIT_12S         /* CLK_RUN reset  (YUKON-Lite only) */
2571 -#define CS_CLK_RUN_ENA BIT_11S         /* CLK_RUN enable (YUKON-Lite only) */
2572 +#define CS_CLK_RUN_HOT BIT_13S         /* CLK_RUN Hot m. (YUKON-Lite only) */
2573 +#define CS_CLK_RUN_RST BIT_12S         /* CLK_RUN Reset  (YUKON-Lite only) */
2574 +#define CS_CLK_RUN_ENA BIT_11S         /* CLK_RUN Enable (YUKON-Lite only) */
2575  #define CS_VAUX_AVAIL  BIT_10S         /* VAUX available (YUKON only) */
2576  #define CS_BUS_CLOCK   BIT_9S          /* Bus Clock 0/1 = 33/66 MHz */
2577  #define CS_BUS_SLOT_SZ BIT_8S          /* Slot Size 0/1 = 32/64 bit slot */
2578 @@ -814,26 +1090,27 @@
2579  #define CS_CL_SW_IRQ   BIT_6S          /* Clear IRQ SW Request */
2580  #define CS_STOP_DONE   BIT_5S          /* Stop Master is finished */
2581  #define CS_STOP_MAST   BIT_4S          /* Command Bit to stop the master */
2582 -#define CS_MRST_CLR            BIT_3S          /* Clear Master reset   */
2583 -#define CS_MRST_SET            BIT_2S          /* Set Master reset     */
2584 -#define CS_RST_CLR             BIT_1S          /* Clear Software reset */
2585 -#define CS_RST_SET             BIT_0S          /* Set   Software reset */
2586 +#define CS_MRST_CLR            BIT_3S          /* Clear Master Reset */
2587 +#define CS_MRST_SET            BIT_2S          /* Set   Master Reset */
2588 +#define CS_RST_CLR             BIT_1S          /* Clear Software Reset */
2589 +#define CS_RST_SET             BIT_0S          /* Set   Software Reset */
2590
2591 -/*     B0_LED                   8 Bit  LED register */
2592 +/*     B0_LED                   8 Bit  LED register (GENESIS only)*/
2593                                                                 /* Bit  7.. 2:  reserved */
2594 -#define LED_STAT_ON            BIT_1S          /* Status LED on        */
2595 -#define LED_STAT_OFF   BIT_0S          /* Status LED off       */
2596 +#define LED_STAT_ON            BIT_1S          /* Status LED On        */
2597 +#define LED_STAT_OFF   BIT_0S          /* Status LED Off       */
2598
2599  /*     B0_POWER_CTRL    8 Bit  Power Control reg (YUKON only) */
2600  #define PC_VAUX_ENA            BIT_7           /* Switch VAUX Enable  */
2601 -#define PC_VAUX_DIS            BIT_6       /* Switch VAUX Disable */
2602 -#define PC_VCC_ENA             BIT_5       /* Switch VCC Enable  */
2603 -#define PC_VCC_DIS             BIT_4       /* Switch VCC Disable */
2604 -#define PC_VAUX_ON             BIT_3       /* Switch VAUX On  */
2605 -#define PC_VAUX_OFF            BIT_2       /* Switch VAUX Off */
2606 -#define PC_VCC_ON              BIT_1       /* Switch VCC On  */
2607 -#define PC_VCC_OFF             BIT_0       /* Switch VCC Off */
2608 +#define PC_VAUX_DIS            BIT_6           /* Switch VAUX Disable */
2609 +#define PC_VCC_ENA             BIT_5           /* Switch VCC Enable  */
2610 +#define PC_VCC_DIS             BIT_4           /* Switch VCC Disable */
2611 +#define PC_VAUX_ON             BIT_3           /* Switch VAUX On  */
2612 +#define PC_VAUX_OFF            BIT_2           /* Switch VAUX Off */
2613 +#define PC_VCC_ON              BIT_1           /* Switch VCC On  */
2614 +#define PC_VCC_OFF             BIT_0           /* Switch VCC Off */
2615
2616 +/* Yukon and Genesis */
2617  /*     B0_ISRC                 32 bit  Interrupt Source Register */
2618  /*     B0_IMSK                 32 bit  Interrupt Mask Register */
2619  /*     B0_SP_ISRC              32 bit  Special Interrupt Source Reg */
2620 @@ -879,12 +1156,51 @@
2621  #define IS_XA2_F               BIT_1           /* Q_XA2 End of Frame */
2622  #define IS_XA2_C               BIT_0           /* Q_XA2 Encoding Error */
2623
2624 +/*                                             (Yukon-2)                       */
2625 +/*     B0_ISRC                 32 bit  Interrupt Source Register */
2626 +/*     B0_IMSK                 32 bit  Interrupt Mask Register */
2627 +/*     B0_SP_ISRC              32 bit  Special Interrupt Source Reg */
2628 +/*     B2_IRQM_MSK             32 bit  IRQ Moderation Mask */
2629 +/*     B0_Y2_SP_ISRC2  32 bit  Special Interrupt Source Reg 2 */
2630 +/*     B0_Y2_SP_ISRC3  32 bit  Special Interrupt Source Reg 3 */
2631 +/*     B0_Y2_SP_EISR   32 bit  Enter ISR Reg */
2632 +/*     B0_Y2_SP_LISR   32 bit  Leave ISR Reg */
2633 +#define Y2_IS_PORT_MASK(Port, Mask)    ((Mask) << (Port*8))
2634 +#define Y2_IS_HW_ERR   BIT_31          /* Interrupt HW Error */
2635 +#define Y2_IS_STAT_BMU BIT_30          /* Status BMU Interrupt */
2636 +#define Y2_IS_ASF              BIT_29          /* ASF subsystem Interrupt */
2637 +                                                       /* Bit 28: reserved */
2638 +#define Y2_IS_POLL_CHK BIT_27          /* Check IRQ from polling unit */
2639 +#define Y2_IS_TWSI_RDY BIT_26          /* IRQ on end of TWSI Tx */
2640 +#define Y2_IS_IRQ_SW   BIT_25          /* SW forced IRQ        */
2641 +#define Y2_IS_TIMINT   BIT_24          /* IRQ from Timer       */
2642 +                                                       /* Bit 23..16 reserved */
2643 +                                               /* Link 2 Interrupts */
2644 +#define Y2_IS_IRQ_PHY2 BIT_12          /* Interrupt from PHY 2 */
2645 +#define Y2_IS_IRQ_MAC2 BIT_11          /* Interrupt from MAC 2 */
2646 +#define Y2_IS_CHK_RX2  BIT_10          /* Descriptor error Rx 2 */
2647 +#define Y2_IS_CHK_TXS2 BIT_9           /* Descriptor error TXS 2 */
2648 +#define Y2_IS_CHK_TXA2 BIT_8           /* Descriptor error TXA 2 */
2649 +                                                       /* Bit  7.. 5 reserved */
2650 +                                               /* Link 1 interrupts */
2651 +#define Y2_IS_IRQ_PHY1 BIT_4           /* Interrupt from PHY 1 */
2652 +#define Y2_IS_IRQ_MAC1 BIT_3           /* Interrupt from MAC 1 */
2653 +#define Y2_IS_CHK_RX1  BIT_2           /* Descriptor error Rx 1 */
2654 +#define Y2_IS_CHK_TXS1 BIT_1           /* Descriptor error TXS 1 */
2655 +#define Y2_IS_CHK_TXA1 BIT_0           /* Descriptor error TXA 1 */
2656 +
2657 +#define Y2_IS_L1_MASK  0x0000001fUL    /* IRQ Mask for port 1 */
2658
2659 +#define Y2_IS_L2_MASK  0x00001f00UL    /* IRQ Mask for port 2 */
2660 +
2661 +#define Y2_IS_ALL_MSK  0xef001f1fUL    /* All Interrupt bits */
2662 +
2663 +/* Yukon and Genesis */
2664  /*     B0_HWE_ISRC             32 bit  HW Error Interrupt Src Reg */
2665  /*     B0_HWE_IMSK             32 bit  HW Error Interrupt Mask Reg */
2666  /*     B2_IRQM_HWE_MSK 32 bit  IRQ Moderation HW Error Mask */
2667  #define IS_ERR_MSK             0x00000fffL     /*              All Error bits */
2668 -                                                               /* Bit 31..14:  reserved */
2669 +                                                       /* Bit 31..14:  reserved */
2670  #define IS_IRQ_TIST_OV BIT_13  /* Time Stamp Timer Overflow (YUKON only) */
2671  #define IS_IRQ_SENSOR  BIT_12  /* IRQ from Sensor (YUKON only) */
2672  #define IS_IRQ_MST_ERR BIT_11  /* IRQ master error detected */
2673 @@ -900,6 +1216,43 @@
2674  #define IS_R1_PAR_ERR  BIT_1   /* Queue R1 Parity Error */
2675  #define IS_R2_PAR_ERR  BIT_0   /* Queue R2 Parity Error */
2676
2677 +                                               /* Yukon-2 */
2678 +/*     B0_HWE_ISRC             32 bit  HW Error Interrupt Src Reg */
2679 +/*     B0_HWE_IMSK             32 bit  HW Error Interrupt Mask Reg */
2680 +/*     B2_IRQM_HWE_MSK 32 bit  IRQ Moderation HW Error Mask */
2681 +                                               /* Bit: 31..30 reserved */
2682 +#define Y2_IS_TIST_OV  BIT_29  /* Time Stamp Timer overflow interrupt */
2683 +#define Y2_IS_SENSOR   BIT_28  /* Sensor interrupt */
2684 +#define Y2_IS_MST_ERR  BIT_27  /* Master error interrupt */
2685 +#define Y2_IS_IRQ_STAT BIT_26  /* Status exception interrupt */
2686 +#define Y2_IS_PCI_EXP  BIT_25  /* PCI-Express interrupt */
2687 +#define Y2_IS_PCI_NEXP BIT_24  /* PCI-Express error similar to PCI error */
2688 +                                               /* Bit: 23..14 reserved */
2689 +                                               /* Link 2 */
2690 +#define Y2_IS_PAR_RD2  BIT_13  /* Read RAM parity error interrupt */
2691 +#define Y2_IS_PAR_WR2  BIT_12  /* Write RAM parity error interrupt */
2692 +#define Y2_IS_PAR_MAC2 BIT_11  /* MAC hardware fault interrupt */
2693 +#define Y2_IS_PAR_RX2  BIT_10  /* Parity Error Rx Queue 2 */
2694 +#define Y2_IS_TCP_TXS2 BIT_9   /* TCP length mismatch sync Tx queue IRQ */
2695 +#define Y2_IS_TCP_TXA2 BIT_8   /* TCP length mismatch async Tx queue IRQ */
2696 +                                               /* Bit:  9.. 6 reserved */
2697 +                                               /* Link 1 */
2698 +#define Y2_IS_PAR_RD1  BIT_5   /* Read RAM parity error interrupt */
2699 +#define Y2_IS_PAR_WR1  BIT_4   /* Write RAM parity error interrupt */
2700 +#define Y2_IS_PAR_MAC1 BIT_3   /* MAC hardware fault interrupt */
2701 +#define Y2_IS_PAR_RX1  BIT_2   /* Parity Error Rx Queue 1 */
2702 +#define Y2_IS_TCP_TXS1 BIT_1   /* TCP length mismatch sync Tx queue IRQ */
2703 +#define Y2_IS_TCP_TXA1 BIT_0   /* TCP length mismatch async Tx queue IRQ */
2704 +
2705 +#define Y2_HWE_L1_MASK (Y2_IS_PAR_RD1 | Y2_IS_PAR_WR1 | Y2_IS_PAR_MAC1 |\
2706 +                                                Y2_IS_PAR_RX1 | Y2_IS_TCP_TXS1| Y2_IS_TCP_TXA1)
2707 +#define Y2_HWE_L2_MASK (Y2_IS_PAR_RD2 | Y2_IS_PAR_WR2 | Y2_IS_PAR_MAC2 |\
2708 +                                                Y2_IS_PAR_RX2 | Y2_IS_TCP_TXS2| Y2_IS_TCP_TXA2)
2709 +
2710 +#define Y2_HWE_ALL_MSK (Y2_IS_TIST_OV | /* Y2_IS_SENSOR | */ Y2_IS_MST_ERR |\
2711 +                                                Y2_IS_IRQ_STAT | Y2_IS_PCI_EXP | Y2_IS_PCI_NEXP |\
2712 +                                                Y2_HWE_L1_MASK | Y2_HWE_L2_MASK)
2713 +
2714  /*     B2_CONN_TYP              8 bit  Connector type */
2715  /*     B2_PMD_TYP               8 bit  PMD type */
2716  /*     Values of connector and PMD type comply to SysKonnect internal std */
2717 @@ -908,19 +1261,65 @@
2718  #define CFG_CHIP_R_MSK (0xf<<4)        /* Bit 7.. 4: Chip Revision */
2719                                                                         /* Bit 3.. 2:   reserved */
2720  #define CFG_DIS_M2_CLK BIT_1S          /* Disable Clock for 2nd MAC */
2721 -#define CFG_SNG_MAC            BIT_0S          /* MAC Config: 0=2 MACs / 1=1 MAC*/
2722 +#define CFG_SNG_MAC            BIT_0S          /* MAC Config: 0 = 2 MACs; 1 = 1 MAC */
2723
2724 -/*     B2_CHIP_ID               8 bit  Chip Identification Number */
2725 +/*     B2_CHIP_ID               8 bit  Chip Identification Number */
2726  #define CHIP_ID_GENESIS                0x0a    /* Chip ID for GENESIS */
2727  #define CHIP_ID_YUKON          0xb0    /* Chip ID for YUKON */
2728  #define CHIP_ID_YUKON_LITE     0xb1    /* Chip ID for YUKON-Lite (Rev. A1-A3) */
2729  #define CHIP_ID_YUKON_LP       0xb2    /* Chip ID for YUKON-LP */
2730 +#define CHIP_ID_YUKON_XL       0xb3    /* Chip ID for YUKON-2 XL */
2731 +#define CHIP_ID_YUKON_EC       0xb6    /* Chip ID for YUKON-2 EC */
2732 +#define CHIP_ID_YUKON_FE       0xb7    /* Chip ID for YUKON-2 FE */
2733
2734  #define CHIP_REV_YU_LITE_A1    3               /* Chip Rev. for YUKON-Lite A1,A2 */
2735  #define CHIP_REV_YU_LITE_A3    7               /* Chip Rev. for YUKON-Lite A3 */
2736
2737 +#define CHIP_REV_YU_EC_A1      0               /* Chip Rev. for Yukon-EC A1/A0 */
2738 +#define CHIP_REV_YU_EC_A2      1               /* Chip Rev. for Yukon-EC A2 */
2739 +#define CHIP_REV_YU_EC_A3      2               /* Chip Rev. for Yukon-EC A3 */
2740 +
2741 +/*     B2_Y2_CLK_GATE   8 bit  Clock Gating (Yukon-2 only) */
2742 +#define Y2_STATUS_LNK2_INAC    BIT_7S  /* Status Link 2 inactiv (0 = activ) */
2743 +#define Y2_CLK_GAT_LNK2_DIS    BIT_6S  /* Disable clock gating Link 2 */
2744 +#define Y2_COR_CLK_LNK2_DIS    BIT_5S  /* Disable Core clock Link 2 */
2745 +#define Y2_PCI_CLK_LNK2_DIS    BIT_4S  /* Disable PCI clock Link 2 */
2746 +#define Y2_STATUS_LNK1_INAC    BIT_3S  /* Status Link 1 inactiv (0 = activ) */
2747 +#define Y2_CLK_GAT_LNK1_DIS    BIT_2S  /* Disable clock gating Link 1 */
2748 +#define Y2_COR_CLK_LNK1_DIS    BIT_1S  /* Disable Core clock Link 1 */
2749 +#define Y2_PCI_CLK_LNK1_DIS    BIT_0S  /* Disable PCI clock Link 1 */
2750 +
2751 +/*     B2_Y2_HW_RES    8 bit   HW Resources (Yukon-2 only) */
2752 +                                                               /* Bit 7.. 5:   reserved */
2753 +#define CFG_LED_MODE_MSK       (7<<2)  /* Bit  4.. 2:  LED Mode Mask */
2754 +#define CFG_LINK_2_AVAIL       BIT_1S  /* Link 2 available */
2755 +#define CFG_LINK_1_AVAIL       BIT_0S  /* Link 1 available */
2756 +
2757 +#define CFG_LED_MODE(x)                (((x) & CFG_LED_MODE_MSK) >> 2)
2758 +#define CFG_DUAL_MAC_MSK       (CFG_LINK_2_AVAIL | CFG_LINK_1_AVAIL)
2759 +
2760 +#define CFG_LED_SING_ACT_LNK   0       /* Single LED ACT/LNK mode */
2761 +#define CFG_LED_DUAL_ACT_LNK   1       /* Dual   LED ACT/LNK mode */
2762 +
2763 +/*     B2_E_3                   8 bit  lower 4 bits used for HW self test result */
2764 +#define B2_E3_RES_MASK 0x0f
2765 +
2766  /*     B2_FAR                  32 bit  Flash-Prom Addr Reg/Cnt */
2767 -#define FAR_ADDR               0x1ffffL        /* Bit 16.. 0:  FPROM Address mask */
2768 +#define FAR_ADDR               0x1ffffL        /* Bit 16.. 0:  FPROM Address Mask */
2769 +
2770 +/*     B2_Y2_CLK_CTRL  32 bit  Core Clock Frequency Control Register (Yukon-2/EC) */
2771 +                                                               /* Bit 31..24:  reserved */
2772 +/* Yukon-EC/FE */
2773 +#define Y2_CLK_DIV_VAL_MSK     (0xffL<<16)     /* Bit 23..16:  Clock Divisor Value */
2774 +#define Y2_CLK_DIV_VAL(x)      (SHIFT16(x) & Y2_CLK_DIV_VAL_MSK)
2775 +/* Yukon-2 */
2776 +#define Y2_CLK_DIV_VAL2_MSK    (7L<<21)        /* Bit 23..21:  Clock Divisor Value */
2777 +#define Y2_CLK_SELECT2_MSK     (0x1fL<<16)     /* Bit 20..16:  Clock Select */
2778 +#define Y2_CLK_DIV_VAL_2(x)    (SHIFT21(x) & Y2_CLK_DIV_VAL2_MSK)
2779 +#define Y2_CLK_SEL_VAL_2(x)    (SHIFT16(x) & Y2_CLK_SELECT2_MSK)
2780 +                                                               /* Bit 15.. 2:  reserved */
2781 +#define Y2_CLK_DIV_ENA         BIT_1S  /* Enable  Core Clock Division */
2782 +#define Y2_CLK_DIV_DIS         BIT_0S  /* Disable Core Clock Division */
2783
2784  /*     B2_LD_CTRL               8 bit  EPROM loader control register */
2785  /*     Bits are currently reserved */
2786 @@ -960,9 +1359,6 @@
2787  #define DPT_START              BIT_1S  /* Start Descriptor Poll Timer */
2788  #define DPT_STOP               BIT_0S  /* Stop  Descriptor Poll Timer */
2789
2790 -/*     B2_E_3                   8 bit  lower 4 bits used for HW self test result */
2791 -#define B2_E3_RES_MASK 0x0f
2792 -
2793  /*     B2_TST_CTRL1     8 bit  Test Control Register 1 */
2794  #define TST_FRC_DPERR_MR       BIT_7S  /* force DATAPERR on MST RD */
2795  #define TST_FRC_DPERR_MW       BIT_6S  /* force DATAPERR on MST WR */
2796 @@ -982,7 +1378,7 @@
2797  #define TST_FRC_APERR_2M64     BIT_0S  /* AddrPERR on 2. phase */
2798
2799  /*     B2_GP_IO                32 bit  General Purpose I/O Register */
2800 -                                                       /* Bit 31..26:  reserved */
2801 +                                               /* Bit 31..26:  reserved */
2802  #define GP_DIR_9       BIT_25  /* IO_9 direct, 0=In/1=Out */
2803  #define GP_DIR_8       BIT_24  /* IO_8 direct, 0=In/1=Out */
2804  #define GP_DIR_7       BIT_23  /* IO_7 direct, 0=In/1=Out */
2805 @@ -1032,10 +1428,8 @@
2806  #define I2C_DATA               BIT_1S          /* I2C Data Port        */
2807  #define I2C_CLK                        BIT_0S          /* I2C Clock Port       */
2808
2809 -/*
2810 - * I2C Address
2811 - */
2812 -#define I2C_SENS_ADDR  LM80_ADDR       /* I2C Sensor Address, (Volt and Temp)*/
2813 +/* I2C Address */
2814 +#define I2C_SENS_ADDR  LM80_ADDR       /* I2C Sensor Address (Volt and Temp) */
2815
2816
2817  /*     B2_BSC_CTRL              8 bit  Blink Source Counter Control */
2818 @@ -1052,16 +1446,20 @@
2819  #define BSC_T_OFF      BIT_1S          /* Test mode off */
2820  #define BSC_T_STEP     BIT_0S          /* Test step */
2821
2822 +/*     Y2_PEX_PHY_ADDR/DATA            PEX PHY address and data reg  (Yukon-2 only) */
2823 +#define PEX_RD_ACCESS  BIT_31  /* Access Mode Read = 1, Write = 0 */
2824 +#define PEX_DB_ACCESS  BIT_30  /* Access to debug register */
2825 +
2826
2827  /*     B3_RAM_ADDR             32 bit  RAM Address, to read or write */
2828                                         /* Bit 31..19:  reserved */
2829  #define RAM_ADR_RAN    0x0007ffffL     /* Bit 18.. 0:  RAM Address Range */
2830
2831  /* RAM Interface Registers */
2832 -/*     B3_RI_CTRL              16 bit  RAM Iface Control Register */
2833 +/*     B3_RI_CTRL              16 bit  RAM Interface Control Register */
2834                                                                 /* Bit 15..10:  reserved */
2835 -#define RI_CLR_RD_PERR BIT_9S  /* Clear IRQ RAM Read Parity Err */
2836 -#define RI_CLR_WR_PERR BIT_8S  /* Clear IRQ RAM Write Parity Err*/
2837 +#define RI_CLR_RD_PERR BIT_9S  /* Clear IRQ RAM Read  Parity Err */
2838 +#define RI_CLR_WR_PERR BIT_8S  /* Clear IRQ RAM Write Parity Err */
2839                                                                 /* Bit  7.. 2:  reserved */
2840  #define RI_RST_CLR             BIT_1S  /* Clear RAM Interface Reset */
2841  #define RI_RST_SET             BIT_0S  /* Set   RAM Interface Reset */
2842 @@ -1171,7 +1569,7 @@
2843                                                                 /* Bit 31..16:  reserved */
2844  #define BC_MAX                 0xffff  /* Bit 15.. 0:  Byte counter */
2845
2846 -/* BMU Control Status Registers */
2847 +/* BMU Control / Status Registers      (Yukon and Genesis) */
2848  /*     B0_R1_CSR               32 bit  BMU Ctrl/Stat Rx Queue 1 */
2849  /*     B0_R2_CSR               32 bit  BMU Ctrl/Stat Rx Queue 2 */
2850  /*     B0_XA1_CSR              32 bit  BMU Ctrl/Stat Sync Tx Queue 1 */
2851 @@ -1212,6 +1610,41 @@
2852                                                 CSR_SV_RUN | CSR_DREAD_RUN | CSR_DWRITE_RUN |\
2853                                                 CSR_TRANS_RUN)
2854
2855 +/* Rx BMU Control / Status Registers (Yukon-2) */
2856 +#define BMU_IDLE                       BIT_31  /* BMU Idle State */
2857 +#define BMU_RX_TCP_PKT         BIT_30  /* Rx TCP Packet (when RSS Hash enabled) */
2858 +#define BMU_RX_IP_PKT          BIT_29  /* Rx IP  Packet (when RSS Hash enabled) */
2859 +                                                               /* Bit 28..16:  reserved */
2860 +#define BMU_ENA_RX_RSS_HASH    BIT_15  /* Enable  Rx RSS Hash */
2861 +#define BMU_DIS_RX_RSS_HASH    BIT_14  /* Disable Rx RSS Hash */
2862 +#define BMU_ENA_RX_CHKSUM      BIT_13  /* Enable  Rx TCP/IP Checksum Check */
2863 +#define BMU_DIS_RX_CHKSUM      BIT_12  /* Disable Rx TCP/IP Checksum Check */
2864 +#define BMU_CLR_IRQ_PAR                BIT_11  /* Clear IRQ on Parity errors (Rx) */
2865 +#define BMU_CLR_IRQ_TCP                BIT_11  /* Clear IRQ on TCP segmen. error (Tx) */
2866 +#define BMU_CLR_IRQ_CHK                BIT_10  /* Clear IRQ Check */
2867 +#define BMU_STOP                       BIT_9   /* Stop  Rx/Tx Queue */
2868 +#define BMU_START                      BIT_8   /* Start Rx/Tx Queue */
2869 +#define BMU_FIFO_OP_ON         BIT_7   /* FIFO Operational On */
2870 +#define BMU_FIFO_OP_OFF        BIT_6   /* FIFO Operational Off */
2871 +#define BMU_FIFO_ENA           BIT_5   /* Enable FIFO */
2872 +#define BMU_FIFO_RST           BIT_4   /* Reset  FIFO */
2873 +#define BMU_OP_ON                      BIT_3   /* BMU Operational On */
2874 +#define BMU_OP_OFF                     BIT_2   /* BMU Operational Off */
2875 +#define BMU_RST_CLR                    BIT_1   /* Clear BMU Reset (Enable) */
2876 +#define BMU_RST_SET                    BIT_0   /* Set   BMU Reset */
2877 +
2878 +#define BMU_CLR_RESET          (BMU_FIFO_RST | BMU_OP_OFF | BMU_RST_CLR)
2879 +#define BMU_OPER_INIT          (BMU_CLR_IRQ_PAR | BMU_CLR_IRQ_CHK | BMU_START | \
2880 +                                                       BMU_FIFO_ENA | BMU_OP_ON)
2881 +
2882 +/* Tx BMU Control / Status Registers (Yukon-2) */
2883 +                                                               /* Bit 31: same as for Rx */
2884 +                                                               /* Bit 30..14:  reserved */
2885 +#define BMU_TX_IPIDINCR_ON     BIT_13  /* Enable  IP ID Increment */
2886 +#define BMU_TX_IPIDINCR_OFF    BIT_12  /* Disable IP ID Increment */
2887 +#define BMU_TX_CLR_IRQ_TCP     BIT_11  /* Clear IRQ on TCP segm. length mism. */
2888 +                                                               /* Bit 10..0: same as for Rx */
2889 +
2890  /*     Q_F                             32 bit  Flag Register */
2891                                                                         /* Bit 31..28:  reserved */
2892  #define F_ALM_FULL             BIT_27          /* Rx FIFO: almost full */
2893 @@ -1260,6 +1693,13 @@
2894                                                                 /* Bit  3:      reserved */
2895  #define T3_VRAM_MSK            7               /* Bit  2.. 0:  Virtual RAM Buffer Address */
2896
2897 +/* Queue Prefetch Unit Offsets, use Y2_PREF_Q_ADDR() to address (Yukon-2 only)*/
2898 +/* PREF_UNIT_CTRL_REG  32 bit  Prefetch Control register */
2899 +#define PREF_UNIT_OP_ON                BIT_3   /* prefetch unit operational */
2900 +#define PREF_UNIT_OP_OFF       BIT_2   /* prefetch unit not operational */
2901 +#define PREF_UNIT_RST_CLR      BIT_1   /* Clear Prefetch Unit Reset */
2902 +#define PREF_UNIT_RST_SET      BIT_0   /* Set   Prefetch Unit Reset */
2903 +
2904  /* RAM Buffer Register Offsets, use RB_ADDR(Queue, Offs) to access */
2905  /*     RB_START                32 bit  RAM Buffer Start Address */
2906  /*     RB_END                  32 bit  RAM Buffer End Address */
2907 @@ -1275,24 +1715,24 @@
2908  #define RB_MSK 0x0007ffff      /* Bit 18.. 0:  RAM Buffer Pointer Bits */
2909
2910  /*     RB_TST2                  8 bit  RAM Buffer Test Register 2 */
2911 -                                                               /* Bit 7.. 4:   reserved */
2912 -#define RB_PC_DEC              BIT_3S  /* Packet Counter Decrem */
2913 +                                                       /* Bit 7.. 4:   reserved */
2914 +#define RB_PC_DEC              BIT_3S  /* Packet Counter Decrement */
2915  #define RB_PC_T_ON             BIT_2S  /* Packet Counter Test On */
2916 -#define RB_PC_T_OFF            BIT_1S  /* Packet Counter Tst Off */
2917 -#define RB_PC_INC              BIT_0S  /* Packet Counter Increm */
2918 +#define RB_PC_T_OFF            BIT_1S  /* Packet Counter Test Off */
2919 +#define RB_PC_INC              BIT_0S  /* Packet Counter Increment */
2920
2921  /*     RB_TST1                  8 bit  RAM Buffer Test Register 1 */
2922                                                         /* Bit 7:       reserved */
2923  #define RB_WP_T_ON             BIT_6S  /* Write Pointer Test On */
2924  #define RB_WP_T_OFF            BIT_5S  /* Write Pointer Test Off */
2925 -#define RB_WP_INC              BIT_4S  /* Write Pointer Increm */
2926 +#define RB_WP_INC              BIT_4S  /* Write Pointer Increment */
2927                                                                 /* Bit 3:       reserved */
2928  #define RB_RP_T_ON             BIT_2S  /* Read Pointer Test On */
2929  #define RB_RP_T_OFF            BIT_1S  /* Read Pointer Test Off */
2930 -#define RB_RP_DEC              BIT_0S  /* Read Pointer Decrement */
2931 +#define RB_RP_INC              BIT_0S  /* Read Pointer Increment */
2932
2933  /*     RB_CTRL                  8 bit  RAM Buffer Control Register */
2934 -                                                               /* Bit 7.. 6:   reserved */
2935 +                                                       /* Bit 7.. 6:   reserved */
2936  #define RB_ENA_STFWD   BIT_5S  /* Enable  Store & Forward */
2937  #define RB_DIS_STFWD   BIT_4S  /* Disable Store & Forward */
2938  #define RB_ENA_OP_MD   BIT_3S  /* Enable  Operation Mode */
2939 @@ -1300,16 +1740,31 @@
2940  #define RB_RST_CLR             BIT_1S  /* Clear RAM Buf STM Reset */
2941  #define RB_RST_SET             BIT_0S  /* Set   RAM Buf STM Reset */
2942
2943 +/* Yukon-2 */
2944 +                                                       /* Bit 31..20:  reserved */
2945 +#define RB_CNT_DOWN            BIT_19  /* Packet Counter Decrement */
2946 +#define RB_CNT_TST_ON  BIT_18  /* Packet Counter Test On */
2947 +#define RB_CNT_TST_OFF BIT_17  /* Packet Counter Test Off */
2948 +#define RB_CNT_UP              BIT_16  /* Packet Counter Increment */
2949 +                                                       /* Bit 15:      reserved */
2950 +#define RB_WP_TST_ON   BIT_14  /* Write Pointer Test On */
2951 +#define RB_WP_TST_OFF  BIT_13  /* Write Pointer Test Off */
2952 +#define RB_WP_UP               BIT_12  /* Write Pointer Increment  */
2953 +                                                       /* Bit 11:      reserved */
2954 +#define RB_RP_TST_ON   BIT_10  /* Read Pointer Test On */
2955 +#define RB_RP_TST_OFF  BIT_9   /* Read Pointer Test Off */
2956 +#define RB_RP_UP               BIT_8   /* Read Pointer Increment */
2957 +
2958
2959  /* Receive and Transmit MAC FIFO Registers (GENESIS only) */
2960
2961  /*     RX_MFF_EA               32 bit  Receive MAC FIFO End Address */
2962 -/*     RX_MFF_WP               32 bit  Receive MAC FIFO Write Pointer */
2963 +/*     RX_MFF_WP               32 bit  Receive MAC FIFO Write Pointer */
2964  /*     RX_MFF_RP               32 bit  Receive MAC FIFO Read Pointer */
2965  /*     RX_MFF_PC               32 bit  Receive MAC FIFO Packet Counter */
2966  /*     RX_MFF_LEV              32 bit  Receive MAC FIFO Level */
2967  /*     TX_MFF_EA               32 bit  Transmit MAC FIFO End Address */
2968 -/*     TX_MFF_WP               32 bit  Transmit MAC FIFO Write Pointer */
2969 +/*     TX_MFF_WP               32 bit  Transmit MAC FIFO Write Pointer */
2970  /*     TX_MFF_WSP              32 bit  Transmit MAC FIFO WR Shadow Pointer */
2971  /*     TX_MFF_RP               32 bit  Transmit MAC FIFO Read Pointer */
2972  /*     TX_MFF_PC               32 bit  Transmit MAC FIFO Packet Cnt */
2973 @@ -1359,9 +1814,9 @@
2974  /*     RX_MFF_TST2              8 bit  Receive MAC FIFO Test Register 2 */
2975  /*     TX_MFF_TST2              8 bit  Transmit MAC FIFO Test Register 2 */
2976                                                                 /* Bit 7:       reserved */
2977 -#define MFF_WSP_T_ON   BIT_6S  /* Tx: Write Shadow Ptr TestOn */
2978 -#define MFF_WSP_T_OFF  BIT_5S  /* Tx: Write Shadow Ptr TstOff */
2979 -#define MFF_WSP_INC            BIT_4S  /* Tx: Write Shadow Ptr Increment */
2980 +#define MFF_WSP_T_ON   BIT_6S  /* Tx: Write Shadow Pointer Test On */
2981 +#define MFF_WSP_T_OFF  BIT_5S  /* Tx: Write Shadow Pointer Test Off */
2982 +#define MFF_WSP_INC            BIT_4S  /* Tx: Write Shadow Pointer Increment */
2983  #define MFF_PC_DEC             BIT_3S  /* Packet Counter Decrement */
2984  #define MFF_PC_T_ON            BIT_2S  /* Packet Counter Test On */
2985  #define MFF_PC_T_OFF   BIT_1S  /* Packet Counter Test Off */
2986 @@ -1372,7 +1827,7 @@
2987                                         /* Bit 7:       reserved */
2988  #define MFF_WP_T_ON            BIT_6S  /* Write Pointer Test On */
2989  #define MFF_WP_T_OFF   BIT_5S  /* Write Pointer Test Off */
2990 -#define MFF_WP_INC             BIT_4S  /* Write Pointer Increm */
2991 +#define MFF_WP_INC             BIT_4S  /* Write Pointer Increment */
2992                                                         /* Bit 3:       reserved */
2993  #define MFF_RP_T_ON            BIT_2S  /* Read Pointer Test On */
2994  #define MFF_RP_T_OFF   BIT_1S  /* Read Pointer Test Off */
2995 @@ -1391,12 +1846,16 @@
2996
2997  /*     RX_LED_CTRL              8 bit  Receive LED Cnt Control Reg */
2998  /*     TX_LED_CTRL              8 bit  Transmit LED Cnt Control Reg */
2999 +                                                       /* Bit 7.. 3:   reserved */
3000 +#define LED_START              BIT_2S  /* Start Counter */
3001 +#define LED_STOP               BIT_1S  /* Stop Counter */
3002 +#define LED_STATE              BIT_0S  /* Rx/Tx: LED State, 1=LED On */
3003 +
3004  /*     LNK_SYNC_CTRL    8 bit  Link Sync Cnt Control Register */
3005                                                         /* Bit 7.. 3:   reserved */
3006 -#define LED_START              BIT_2S  /* Start Timer */
3007 -#define LED_STOP               BIT_1S  /* Stop Timer */
3008 -#define LED_STATE              BIT_0S  /* Rx/Tx: LED State, 1=LED on */
3009 -#define LED_CLR_IRQ            BIT_0S  /* Lnk:         Clear Link IRQ */
3010 +#define LNK_START              BIT_2S  /* Start Counter */
3011 +#define LNK_STOP               BIT_1S  /* Stop Counter */
3012 +#define LNK_CLR_IRQ            BIT_0S  /* Clear Link IRQ */
3013
3014  /*     RX_LED_TST               8 bit  Receive LED Cnt Test Register */
3015  /*     TX_LED_TST               8 bit  Transmit LED Cnt Test Register */
3016 @@ -1407,86 +1866,138 @@
3017  #define LED_T_STEP             BIT_0S  /* LED Counter Step */
3018
3019  /*     LNK_LED_REG              8 bit  Link LED Register */
3020 -                                                               /* Bit 7.. 6:   reserved */
3021 +                                                       /* Bit 7.. 6:   reserved */
3022  #define LED_BLK_ON             BIT_5S  /* Link LED Blinking On */
3023  #define LED_BLK_OFF            BIT_4S  /* Link LED Blinking Off */
3024  #define LED_SYNC_ON            BIT_3S  /* Use Sync Wire to switch LED */
3025  #define LED_SYNC_OFF   BIT_2S  /* Disable Sync Wire Input */
3026 -#define LED_ON                 BIT_1S  /* switch LED on */
3027 -#define LED_OFF                        BIT_0S  /* switch LED off */
3028 +#define LED_ON                 BIT_1S  /* Switch LED On */
3029 +#define LED_OFF                        BIT_0S  /* Switch LED Off */
3030
3031  /*     Receive and Transmit GMAC FIFO Registers (YUKON only) */
3032
3033  /*     RX_GMF_EA               32 bit  Rx GMAC FIFO End Address */
3034  /*     RX_GMF_AF_THR   32 bit  Rx GMAC FIFO Almost Full Thresh. */
3035 -/*     RX_GMF_WP               32 bit  Rx GMAC FIFO Write Pointer */
3036 -/*     RX_GMF_WLEV             32 bit  Rx GMAC FIFO Write Level */
3037 -/*     RX_GMF_RP               32 bit  Rx GMAC FIFO Read Pointer */
3038 -/*     RX_GMF_RLEV             32 bit  Rx GMAC FIFO Read Level */
3039 +/*     RX_GMF_WP               32 bit  Rx GMAC FIFO Write Pointer */
3040 +/*     RX_GMF_WLEV             32 bit  Rx GMAC FIFO Write Level */
3041 +/*     RX_GMF_RP               32 bit  Rx GMAC FIFO Read Pointer */
3042 +/*     RX_GMF_RLEV             32 bit  Rx GMAC FIFO Read Level */
3043  /*     TX_GMF_EA               32 bit  Tx GMAC FIFO End Address */
3044  /*     TX_GMF_AE_THR   32 bit  Tx GMAC FIFO Almost Empty Thresh.*/
3045 -/*     TX_GMF_WP               32 bit  Tx GMAC FIFO Write Pointer */
3046 -/*     TX_GMF_WSP              32 bit  Tx GMAC FIFO Write Shadow Ptr. */
3047 -/*     TX_GMF_WLEV             32 bit  Tx GMAC FIFO Write Level */
3048 -/*     TX_GMF_RP               32 bit  Tx GMAC FIFO Read Pointer */
3049 -/*     TX_GMF_RSTP             32 bit  Tx GMAC FIFO Restart Pointer */
3050 -/*     TX_GMF_RLEV             32 bit  Tx GMAC FIFO Read Level */
3051 +/*     TX_GMF_WP               32 bit  Tx GMAC FIFO Write Pointer */
3052 +/*     TX_GMF_WSP              32 bit  Tx GMAC FIFO Write Shadow Pointer */
3053 +/*     TX_GMF_WLEV             32 bit  Tx GMAC FIFO Write Level */
3054 +/*     TX_GMF_RP               32 bit  Tx GMAC FIFO Read Pointer */
3055 +/*     TX_GMF_RSTP             32 bit  Tx GMAC FIFO Restart Pointer */
3056 +/*     TX_GMF_RLEV             32 bit  Tx GMAC FIFO Read Level */
3057
3058  /*     RX_GMF_CTRL_T   32 bit  Rx GMAC FIFO Control/Test */
3059 -                                               /* Bits 31..15: reserved */
3060 -#define GMF_WP_TST_ON  BIT_14          /* Write Pointer Test On */
3061 -#define GMF_WP_TST_OFF BIT_13          /* Write Pointer Test Off */
3062 -#define GMF_WP_STEP            BIT_12          /* Write Pointer Step/Increment */
3063 +                                               /* Bit 31..28 reserved */
3064 +#define RX_TRUNC_ON            BIT_27  /* enable  packet truncation */
3065 +#define RX_TRUNC_OFF   BIT_26  /* disable packet truncation */
3066 +#define RX_VLAN_STRIP_ON       BIT_25  /* enable  VLAN stripping */
3067 +#define RX_VLAN_STRIP_OFF      BIT_24  /* disable VLAN stripping */
3068 +                                               /* Bit 23..15 reserved */
3069 +#define GMF_WP_TST_ON  BIT_14  /* Write Pointer Test On */
3070 +#define GMF_WP_TST_OFF BIT_13  /* Write Pointer Test Off */
3071 +#define GMF_WP_STEP            BIT_12  /* Write Pointer Step/Increment */
3072                                                 /* Bit 11:      reserved */
3073 -#define GMF_RP_TST_ON  BIT_10          /* Read Pointer Test On */
3074 -#define GMF_RP_TST_OFF BIT_9           /* Read Pointer Test Off */
3075 -#define GMF_RP_STEP            BIT_8           /* Read Pointer Step/Increment */
3076 -#define GMF_RX_F_FL_ON BIT_7           /* Rx FIFO Flush Mode On */
3077 -#define GMF_RX_F_FL_OFF        BIT_6           /* Rx FIFO Flush Mode Off */
3078 -#define GMF_CLI_RX_FO  BIT_5           /* Clear IRQ Rx FIFO Overrun */
3079 -#define GMF_CLI_RX_FC  BIT_4           /* Clear IRQ Rx Frame Complete */
3080 -#define GMF_OPER_ON            BIT_3           /* Operational Mode On */
3081 -#define GMF_OPER_OFF   BIT_2           /* Operational Mode Off */
3082 -#define GMF_RST_CLR            BIT_1           /* Clear GMAC FIFO Reset */
3083 -#define GMF_RST_SET            BIT_0           /* Set   GMAC FIFO Reset */
3084 -
3085 -/*     TX_GMF_CTRL_T   32 bit  Tx GMAC FIFO Control/Test */
3086 -                                               /* Bits 31..19: reserved */
3087 -#define GMF_WSP_TST_ON BIT_18          /* Write Shadow Pointer Test On */
3088 -#define GMF_WSP_TST_OFF        BIT_17          /* Write Shadow Pointer Test Off */
3089 -#define GMF_WSP_STEP   BIT_16          /* Write Shadow Pointer Step/Increment */
3090 -                                               /* Bits 15..7: same as for RX_GMF_CTRL_T */
3091 -#define GMF_CLI_TX_FU  BIT_6           /* Clear IRQ Tx FIFO Underrun */
3092 -#define GMF_CLI_TX_FC  BIT_5           /* Clear IRQ Tx Frame Complete */
3093 -#define GMF_CLI_TX_PE  BIT_4           /* Clear IRQ Tx Parity Error */
3094 +#define GMF_RP_TST_ON  BIT_10  /* Read Pointer Test On */
3095 +#define GMF_RP_TST_OFF BIT_9   /* Read Pointer Test Off */
3096 +#define GMF_RP_STEP            BIT_8   /* Read Pointer Step/Increment */
3097 +#define GMF_RX_F_FL_ON BIT_7   /* Rx FIFO Flush Mode On */
3098 +#define GMF_RX_F_FL_OFF        BIT_6   /* Rx FIFO Flush Mode Off */
3099 +#define GMF_CLI_RX_FO  BIT_5   /* Clear IRQ Rx FIFO Overrun */
3100 +#define GMF_CLI_RX_FC  BIT_4   /* Clear IRQ Rx Frame Complete */
3101 +#define GMF_OPER_ON            BIT_3   /* Operational Mode On */
3102 +#define GMF_OPER_OFF   BIT_2   /* Operational Mode Off */
3103 +#define GMF_RST_CLR            BIT_1   /* Clear GMAC FIFO Reset */
3104 +#define GMF_RST_SET            BIT_0   /* Set   GMAC FIFO Reset */
3105 +
3106 +/*     TX_GMF_CTRL_T   32 bit  Tx GMAC FIFO Control/Test (YUKON and Yukon-2) */
3107 +                                               /* Bits 31..26: reserved */
3108 +#define TX_VLAN_TAG_ON BIT_25  /* enable  VLAN tagging */
3109 +#define TX_VLAN_TAG_OFF        BIT_24  /* disable VLAN tagging */
3110 +                                               /* Bits 23..19: reserved */
3111 +#define GMF_WSP_TST_ON BIT_18  /* Write Shadow Pointer Test On */
3112 +#define GMF_WSP_TST_OFF        BIT_17  /* Write Shadow Pointer Test Off */
3113 +#define GMF_WSP_STEP   BIT_16  /* Write Shadow Pointer Step/Increment */
3114 +                                               /* Bits 15..8: same as for RX_GMF_CTRL_T */
3115 +                                               /* Bit 7:       reserved */
3116 +#define GMF_CLI_TX_FU  BIT_6   /* Clear IRQ Tx FIFO Underrun */
3117 +#define GMF_CLI_TX_FC  BIT_5   /* Clear IRQ Tx Frame Complete */
3118 +#define GMF_CLI_TX_PE  BIT_4   /* Clear IRQ Tx Parity Error */
3119                                                 /* Bits 3..0: same as for RX_GMF_CTRL_T */
3120
3121  #define GMF_RX_CTRL_DEF                (GMF_OPER_ON | GMF_RX_F_FL_ON)
3122  #define GMF_TX_CTRL_DEF                GMF_OPER_ON
3123
3124 +#define RX_GMF_AF_THR_MIN      0x0c    /* Rx GMAC FIFO Almost Full Thresh. min. */
3125  #define RX_GMF_FL_THR_DEF      0x0a    /* Rx GMAC FIFO Flush Threshold default */
3126
3127  /*     GMAC_TI_ST_CTRL  8 bit  Time Stamp Timer Ctrl Reg (YUKON only) */
3128 -                                                               /* Bit 7.. 3:   reserved */
3129 -#define GMT_ST_START   BIT_2S          /* Start Time Stamp Timer */
3130 -#define GMT_ST_STOP            BIT_1S          /* Stop  Time Stamp Timer */
3131 -#define GMT_ST_CLR_IRQ BIT_0S          /* Clear Time Stamp Timer IRQ */
3132 -
3133 +                                                       /* Bit 7.. 3:   reserved */
3134 +#define GMT_ST_START   BIT_2S  /* Start Time Stamp Timer */
3135 +#define GMT_ST_STOP            BIT_1S  /* Stop  Time Stamp Timer */
3136 +#define GMT_ST_CLR_IRQ BIT_0S  /* Clear Time Stamp Timer IRQ */
3137 +
3138 +/*     POLL_CTRL               32 bit  Polling Unit control register (Yukon-2 only) */
3139 +                                                       /* Bit 31.. 6:  reserved */
3140 +#define PC_CLR_IRQ_CHK BIT_5   /* Clear IRQ Check */
3141 +#define PC_POLL_RQ             BIT_4   /* Poll Request Start */
3142 +#define PC_POLL_OP_ON  BIT_3   /* Operational Mode On */
3143 +#define PC_POLL_OP_OFF BIT_2   /* Operational Mode Off */
3144 +#define PC_POLL_RST_CLR        BIT_1   /* Clear Polling Unit Reset (Enable) */
3145 +#define PC_POLL_RST_SET        BIT_0   /* Set   Polling Unit Reset */
3146 +
3147 +
3148 +/* The bit definition of the following registers is still missing! */
3149 +/* B28_Y2_SMB_CONFIG           32 bit  ASF SMBus Config Register */
3150 +/* B28_Y2_SMB_CSD_REG          32 bit  ASF SMB Control/Status/Data */
3151 +/* B28_Y2_ASF_IRQ_V_BASE       32 bit  ASF IRQ Vector Base */
3152 +
3153 +/* B28_Y2_ASF_STAT_CMD         32 bit  ASF Status and Command Reg */
3154 +/* This register is used by the host driver software */
3155 +                                               /* Bit 31:5     reserved */
3156 +#define Y2_ASF_OS_PRES BIT_4S  /* ASF operation system present */
3157 +#define Y2_ASF_RESET   BIT_3S  /* ASF system in reset state */
3158 +#define Y2_ASF_RUNNING BIT_2S  /* ASF system operational */
3159 +#define Y2_ASF_CLR_HSTI        BIT_1S  /* Clear ASF IRQ */
3160 +#define Y2_ASF_IRQ             BIT_0S  /* Issue an IRQ to ASF system */
3161 +
3162 +#define Y2_ASF_UC_STATE        (3<<2)  /* ASF uC State */
3163 +#define Y2_ASF_CLK_HALT        0               /* ASF system clock stopped */
3164 +
3165 +/* B28_Y2_ASF_HOST_COM 32 bit  ASF Host Communication Reg */
3166 +/* This register is used by the ASF firmware */
3167 +                                               /* Bit 31:2     reserved */
3168 +#define Y2_ASF_CLR_ASFI        BIT_1   /* Clear host IRQ */
3169 +#define Y2_ASF_HOST_IRQ        BIT_0   /* Issue an IRQ to HOST system */
3170 +
3171 +
3172 +/*     STAT_CTRL               32 bit  Status BMU control register (Yukon-2 only) */
3173 +                                                       /* Bit  7.. 5:  reserved */
3174 +#define SC_STAT_CLR_IRQ        BIT_4   /* Status Burst IRQ clear */
3175 +#define SC_STAT_OP_ON  BIT_3   /* Operational Mode On */
3176 +#define SC_STAT_OP_OFF BIT_2   /* Operational Mode Off */
3177 +#define SC_STAT_RST_CLR        BIT_1   /* Clear Status Unit Reset (Enable) */
3178 +#define SC_STAT_RST_SET        BIT_0   /* Set   Status Unit Reset */
3179 +
3180  /*     GMAC_CTRL               32 bit  GMAC Control Reg (YUKON only) */
3181                                                 /* Bits 31.. 8: reserved */
3182 -#define GMC_H_BURST_ON BIT_7           /* Half Duplex Burst Mode On */
3183 -#define GMC_H_BURST_OFF        BIT_6           /* Half Duplex Burst Mode Off */
3184 -#define GMC_F_LOOPB_ON BIT_5           /* FIFO Loopback On */
3185 -#define GMC_F_LOOPB_OFF        BIT_4           /* FIFO Loopback Off */
3186 -#define GMC_PAUSE_ON   BIT_3           /* Pause On */
3187 -#define GMC_PAUSE_OFF  BIT_2           /* Pause Off */
3188 -#define GMC_RST_CLR            BIT_1           /* Clear GMAC Reset */
3189 -#define GMC_RST_SET            BIT_0           /* Set   GMAC Reset */
3190 +#define GMC_H_BURST_ON BIT_7   /* Half Duplex Burst Mode On */
3191 +#define GMC_H_BURST_OFF        BIT_6   /* Half Duplex Burst Mode Off */
3192 +#define GMC_F_LOOPB_ON BIT_5   /* FIFO Loopback On */
3193 +#define GMC_F_LOOPB_OFF        BIT_4   /* FIFO Loopback Off */
3194 +#define GMC_PAUSE_ON   BIT_3   /* Pause On */
3195 +#define GMC_PAUSE_OFF  BIT_2   /* Pause Off */
3196 +#define GMC_RST_CLR            BIT_1   /* Clear GMAC Reset */
3197 +#define GMC_RST_SET            BIT_0   /* Set   GMAC Reset */
3198
3199  /*     GPHY_CTRL               32 bit  GPHY Control Reg (YUKON only) */
3200                                                 /* Bits 31..29: reserved */
3201  #define GPC_SEL_BDT            BIT_28  /* Select Bi-Dir. Transfer for MDC/MDIO */
3202 -#define GPC_INT_POL_HI BIT_27  /* IRQ Polarity is Active HIGH */
3203 +#define GPC_INT_POL            BIT_27  /* IRQ Polarity is Active Low */
3204  #define GPC_75_OHM             BIT_26  /* Use 75 Ohm Termination instead of 50 */
3205  #define GPC_DIS_FC             BIT_25  /* Disable Automatic Fiber/Copper Detection */
3206  #define GPC_DIS_SLEEP  BIT_24  /* Disable Energy Detect */
3207 @@ -1540,14 +2051,14 @@
3208
3209  /*     GMAC_IRQ_SRC     8 bit  GMAC Interrupt Source Reg (YUKON only) */
3210  /*     GMAC_IRQ_MSK     8 bit  GMAC Interrupt Mask   Reg (YUKON only) */
3211 -#define GM_IS_TX_CO_OV BIT_5           /* Transmit Counter Overflow IRQ */
3212 -#define GM_IS_RX_CO_OV BIT_4           /* Receive Counter Overflow IRQ */
3213 -#define GM_IS_TX_FF_UR BIT_3           /* Transmit FIFO Underrun */
3214 -#define GM_IS_TX_COMPL BIT_2           /* Frame Transmission Complete */
3215 -#define GM_IS_RX_FF_OR BIT_1           /* Receive FIFO Overrun */
3216 -#define GM_IS_RX_COMPL BIT_0           /* Frame Reception Complete */
3217 +#define GM_IS_RX_CO_OV BIT_5S          /* Receive Counter Overflow IRQ */
3218 +#define GM_IS_TX_CO_OV BIT_4S          /* Transmit Counter Overflow IRQ */
3219 +#define GM_IS_TX_FF_UR BIT_3S          /* Transmit FIFO Underrun */
3220 +#define GM_IS_TX_COMPL BIT_2S          /* Frame Transmission Complete */
3221 +#define GM_IS_RX_FF_OR BIT_1S          /* Receive FIFO Overrun */
3222 +#define GM_IS_RX_COMPL BIT_0S          /* Frame Reception Complete */
3223
3224 -#define GMAC_DEF_MSK   (GM_IS_TX_CO_OV | GM_IS_RX_CO_OV | \
3225 +#define GMAC_DEF_MSK   (GM_IS_RX_CO_OV | GM_IS_TX_CO_OV | \
3226                                                 GM_IS_TX_FF_UR)
3227
3228  /*     GMAC_LINK_CTRL  16 bit  GMAC Link Control Reg (YUKON only) */
3229 @@ -1579,15 +2090,19 @@
3230
3231  #define WOL_CTL_DEFAULT                                \
3232         (WOL_CTL_DIS_PME_ON_LINK_CHG |  \
3233 -       WOL_CTL_DIS_PME_ON_PATTERN |    \
3234 -       WOL_CTL_DIS_PME_ON_MAGIC_PKT |  \
3235 -       WOL_CTL_DIS_LINK_CHG_UNIT |             \
3236 -       WOL_CTL_DIS_PATTERN_UNIT |              \
3237 -       WOL_CTL_DIS_MAGIC_PKT_UNIT)
3238 +        WOL_CTL_DIS_PME_ON_PATTERN |   \
3239 +        WOL_CTL_DIS_PME_ON_MAGIC_PKT | \
3240 +        WOL_CTL_DIS_LINK_CHG_UNIT |    \
3241 +        WOL_CTL_DIS_PATTERN_UNIT |             \
3242 +        WOL_CTL_DIS_MAGIC_PKT_UNIT)
3243
3244  /*     WOL_MATCH_CTL    8 bit  WOL Match Control Reg */
3245  #define WOL_CTL_PATT_ENA(x)                            (BIT_0 << (x))
3246
3247 +/*     WOL_PATT_PME    8 bit   WOL PME Match Enable (Yukon-2) */
3248 +#define WOL_PATT_FORCE_PME                             BIT_7   /* Generates a PME */
3249 +#define WOL_PATT_MATCH_PME_ALL                 0x7f
3250 +
3251  #define SK_NUM_WOL_PATTERN             7
3252  #define SK_PATTERN_PER_WORD            4
3253  #define SK_BITMASK_PATTERN             7
3254 @@ -1606,17 +2121,17 @@
3255         SK_U32  TxAdrLo;                /* Physical Tx Buffer Address lower dword */
3256         SK_U32  TxAdrHi;                /* Physical Tx Buffer Address upper dword */
3257         SK_U32  TxStat;                 /* Transmit Frame Status Word */
3258 -#ifndef        SK_USE_REV_DESC
3259 +#ifndef SK_USE_REV_DESC
3260         SK_U16  TxTcpOffs;              /* TCP Checksum Calculation Start Value */
3261         SK_U16  TxRes1;                 /* 16 bit reserved field */
3262         SK_U16  TxTcpWp;                /* TCP Checksum Write Position */
3263         SK_U16  TxTcpSp;                /* TCP Checksum Calculation Start Position */
3264 -#else  /* SK_USE_REV_DESC */
3265 +#else  /* SK_USE_REV_DESC */
3266         SK_U16  TxRes1;                 /* 16 bit reserved field */
3267         SK_U16  TxTcpOffs;              /* TCP Checksum Calculation Start Value */
3268         SK_U16  TxTcpSp;                /* TCP Checksum Calculation Start Position */
3269         SK_U16  TxTcpWp;                /* TCP Checksum Write Position */
3270 -#endif /* SK_USE_REV_DESC */
3271 +#endif /* SK_USE_REV_DESC */
3272         SK_U32  TxRes2;                 /* 32 bit reserved field */
3273  } SK_HWTXD;
3274
3275 @@ -1628,29 +2143,262 @@
3276         SK_U32  RxAdrHi;                /* Physical Rx Buffer Address upper dword */
3277         SK_U32  RxStat;                 /* Receive Frame Status Word */
3278         SK_U32  RxTiSt;                 /* Receive Time Stamp (from XMAC on GENESIS) */
3279 -#ifndef        SK_USE_REV_DESC
3280 -       SK_U16  RxTcpSum1;              /* TCP Checksum 1 */
3281 -       SK_U16  RxTcpSum2;              /* TCP Checksum 2 */
3282 +#ifndef SK_USE_REV_DESC
3283 +       SK_U16  RxTcpSum1;              /* Rx TCP Checksum 1 */
3284 +       SK_U16  RxTcpSum2;              /* Rx TCP Checksum 2 */
3285         SK_U16  RxTcpSp1;               /* TCP Checksum Calculation Start Position 1 */
3286         SK_U16  RxTcpSp2;               /* TCP Checksum Calculation Start Position 2 */
3287 -#else  /* SK_USE_REV_DESC */
3288 -       SK_U16  RxTcpSum2;              /* TCP Checksum 2 */
3289 -       SK_U16  RxTcpSum1;              /* TCP Checksum 1 */
3290 +#else  /* SK_USE_REV_DESC */
3291 +       SK_U16  RxTcpSum2;              /* Rx TCP Checksum 2 */
3292 +       SK_U16  RxTcpSum1;              /* Rx TCP Checksum 1 */
3293         SK_U16  RxTcpSp2;               /* TCP Checksum Calculation Start Position 2 */
3294         SK_U16  RxTcpSp1;               /* TCP Checksum Calculation Start Position 1 */
3295 -#endif /* SK_USE_REV_DESC */
3296 +#endif /* SK_USE_REV_DESC */
3297  } SK_HWRXD;
3298
3299  /*
3300   * Drivers which use the reverse descriptor feature (PCI_OUR_REG_2)
3301   * should set the define SK_USE_REV_DESC.
3302 - * Structures are 'normaly' not endianess dependent. But in
3303 - * this case the SK_U16 fields are bound to bit positions inside the
3304 - * descriptor. RxTcpSum1 e.g. must start at bit 0 within the 6.th DWord.
3305 + * Structures are 'normally' not endianess dependent. But in this case
3306 + * the SK_U16 fields are bound to bit positions inside the descriptor.
3307 + * RxTcpSum1 e.g. must start at bit 0 within the 7.th DWord.
3308   * The bit positions inside a DWord are of course endianess dependent and
3309 - * swaps if the DWord is swapped by the hardware.
3310 + * swap if the DWord is swapped by the hardware.
3311   */
3312
3313 +/* YUKON-2 descriptors ******************************************************/
3314 +
3315 +typedef struct _TxChksum {
3316 +#ifndef SK_USE_REV_DESC
3317 +       SK_U16  TxTcpWp;                /* TCP Checksum Write Position */
3318 +       SK_U16  TxTcpSp;                /* TCP Checksum Calculation Start Position */
3319 +#else  /* SK_USE_REV_DESC */
3320 +       SK_U16  TxTcpSp;                /* TCP Checksum Calculation Start Position */
3321 +       SK_U16  TxTcpWp;                /* TCP Checksum Write Position */
3322 +#endif /* SK_USE_REV_DESC */
3323 +} SK_HWTXCS;
3324 +
3325 +typedef struct _LargeSend {
3326 +#ifndef SK_USE_REV_DESC
3327 +       SK_U16 Length;          /* Large Send Segment Length */
3328 +       SK_U16 Reserved;        /* reserved */
3329 +#else  /* SK_USE_REV_DESC */
3330 +       SK_U16 Reserved;        /* reserved */
3331 +       SK_U16 Length;          /* Large Send Segment Length */
3332 +#endif /* SK_USE_REV_DESC */
3333 +} SK_HWTXLS;
3334 +
3335 +typedef union u_HwTxBuf {
3336 +       SK_U16  BufLen;         /* Tx Buffer Length */
3337 +       SK_U16  VlanTag;        /* VLAN Tag */
3338 +       SK_U16  InitCsum;       /* Init. Checksum */
3339 +} SK_HWTXBUF;
3340 +
3341 +/* Tx List Element structure */
3342 +typedef struct s_HwLeTx {
3343 +       union {
3344 +               SK_U32  BufAddr;        /* Tx LE Buffer Address high/low */
3345 +               SK_HWTXCS ChkSum;       /* Tx LE TCP Checksum parameters */
3346 +               SK_HWTXLS LargeSend;/* Large Send length */
3347 +       } TxUn;
3348 +#ifndef SK_USE_REV_DESC
3349 +       SK_HWTXBUF      Send;
3350 +       SK_U8   ControlFlags;   /* Tx LE Control field or Lock Number */
3351 +       SK_U8   Opcode;                 /* Tx LE Opcode field */
3352 +#else  /* SK_USE_REV_DESC */
3353 +       SK_U8   Opcode;                 /* Tx LE Opcode field */
3354 +       SK_U8   ControlFlags;   /* Tx LE Control field or Lock Number */
3355 +       SK_HWTXBUF      Send;
3356 +#endif /* SK_USE_REV_DESC */
3357 +} SK_HWLETX;
3358 +
3359 +typedef struct _RxChkSum{
3360 +#ifndef SK_USE_REV_DESC
3361 +       SK_U16  RxTcpSp1;               /* TCP Checksum Calculation Start Position 1 */
3362 +       SK_U16  RxTcpSp2;               /* TCP Checksum Calculation Start Position 2 */
3363 +#else  /* SK_USE_REV_DESC */
3364 +       SK_U16  RxTcpSp2;               /* TCP Checksum Calculation Start Position 2 */
3365 +       SK_U16  RxTcpSp1;               /* TCP Checksum Calculation Start Position 1 */
3366 +#endif /* SK_USE_REV_DESC */
3367 +} SK_HWRXCS;
3368 +
3369 +/* Rx List Element structure */
3370 +typedef struct s_HwLeRx {
3371 +       union {
3372 +               SK_U32  BufAddr;        /* Rx LE Buffer Address high/low */
3373 +               SK_HWRXCS ChkSum;       /* Rx LE TCP Checksum parameters */
3374 +       } RxUn;
3375 +#ifndef SK_USE_REV_DESC
3376 +       SK_U16  BufferLength;   /* Rx LE Buffer Length field */
3377 +       SK_U8   ControlFlags;   /* Rx LE Control field */
3378 +       SK_U8   Opcode;                 /* Rx LE Opcode field */
3379 +#else  /* SK_USE_REV_DESC */
3380 +       SK_U8   Opcode;                 /* Rx LE Opcode field */
3381 +       SK_U8   ControlFlags;   /* Rx LE Control field */
3382 +       SK_U16  BufferLength;   /* Rx LE Buffer Length field */
3383 +#endif /* SK_USE_REV_DESC */
3384 +} SK_HWLERX;
3385 +
3386 +typedef struct s_StRxTCPChkSum {
3387 +#ifndef SK_USE_REV_DESC
3388 +       SK_U16  RxTCPSum1;              /* Rx TCP Checksum 1 */
3389 +       SK_U16  RxTCPSum2;              /* Rx TCP Checksum 2 */
3390 +#else  /* SK_USE_REV_DESC */
3391 +       SK_U16  RxTCPSum2;              /* Rx TCP Checksum 2 */
3392 +       SK_U16  RxTCPSum1;              /* Rx TCP Checksum 1 */
3393 +#endif /* SK_USE_REV_DESC */
3394 +} SK_HWSTCS;
3395 +
3396 +typedef struct s_StRxRssFlags {
3397 +#ifndef SK_USE_REV_DESC
3398 +       SK_U8   FlagField;              /* contains TCP and IP flags */
3399 +       SK_U8   reserved;               /* reserved */
3400 +#else  /* SK_USE_REV_DESC */
3401 +       SK_U8   reserved;               /* reserved */
3402 +       SK_U8   FlagField;              /* contains TCP and IP flags */
3403 +#endif /* SK_USE_REV_DESC */
3404 +} SK_HWSTRSS;
3405 +
3406 +/* bit definition of RSS LE bit 32/33 (SK_HWSTRSS.FlagField) */
3407 +                                                               /* bit 7..2 reserved */
3408 +#define RSS_TCP_FLAG   BIT_1S  /* RSS value related to TCP area */
3409 +#define RSS_IP_FLAG            BIT_0S  /* RSS value related to IP area */
3410 +/* StRxRssValue is valid if at least RSS_IP_FLAG is set. */
3411 +/* For protocol errors or other protocols an empty RSS LE is generated. */
3412 +
3413 +typedef union u_HwStBuf {
3414 +       SK_U16  BufLen;         /* Rx Buffer Length */
3415 +       SK_U16  VlanTag;        /* VLAN Tag */
3416 +       SK_U16  StTxStatHi;     /* Tx Queue Status (high) */
3417 +       SK_HWSTRSS      Rss;    /* Flag Field for TCP and IP protocol */
3418 +} SK_HWSTBUF;
3419 +
3420 +/* Status List Element structure */
3421 +typedef struct s_HwLeSt {
3422 +       union {
3423 +               SK_U32  StRxStatWord;   /* Rx Status Dword */
3424 +               SK_U32  StRxTimeStamp;  /* Rx Timestamp */
3425 +               SK_HWSTCS StRxTCPCSum;  /* Rx TCP Checksum */
3426 +               SK_U32  StTxStatLow;    /* Tx Queue Status (low) */
3427 +               SK_U32  StRxRssValue;   /* Rx RSS value */
3428 +       } StUn;
3429 +#ifndef SK_USE_REV_DESC
3430 +       SK_HWSTBUF      Stat;
3431 +       SK_U8   Link;                   /* Status LE Link field */
3432 +       SK_U8   Opcode;                 /* Status LE Opcode field */
3433 +#else  /* SK_USE_REV_DESC */
3434 +       SK_U8   Opcode;                 /* Status LE Opcode field */
3435 +       SK_U8   Link;                   /* Status LE Link field */
3436 +       SK_HWSTBUF      Stat;
3437 +#endif /* SK_USE_REV_DESC */
3438 +} SK_HWLEST;
3439 +
3440 +/* Special Action List Element */
3441 +typedef struct s_HwLeSa {
3442 +#ifndef SK_USE_REV_DESC
3443 +       SK_U16  TxAIdxVld;              /* Special Action LE TxA Put Index field */
3444 +       SK_U16  TxSIdxVld;              /* Special Action LE TxS Put Index field */
3445 +       SK_U16  RxIdxVld;               /* Special Action LE Rx Put Index field */
3446 +       SK_U8   Link;                   /* Special Action LE Link field */
3447 +       SK_U8   Opcode;                 /* Special Action LE Opcode field */
3448 +#else  /* SK_USE_REV_DESC */
3449 +       SK_U16  TxSIdxVld;              /* Special Action LE TxS Put Index field */
3450 +       SK_U16  TxAIdxVld;              /* Special Action LE TxA Put Index field */
3451 +       SK_U8   Opcode;                 /* Special Action LE Opcode field */
3452 +       SK_U8   Link;                   /* Special Action LE Link field */
3453 +       SK_U16  RxIdxVld;               /* Special Action LE Rx Put Index field */
3454 +#endif /* SK_USE_REV_DESC */
3455 +} SK_HWLESA;
3456 +
3457 +/* Common List Element union */
3458 +typedef union u_HwLeTxRxSt {
3459 +       /* Transmit List Element Structure */
3460 +       SK_HWLETX Tx;
3461 +       /* Receive List Element Structure */
3462 +       SK_HWLERX Rx;
3463 +       /* Status List Element Structure */
3464 +       SK_HWLEST St;
3465 +       /* Special Action List Element Structure */
3466 +       SK_HWLESA Sa;
3467 +       /* Full List Element */
3468 +       SK_U64 Full;
3469 +} SK_HWLE;
3470 +
3471 +/* mask and shift value to get Tx async queue status for port 1 */
3472 +#define STLE_TXA1_MSKL         0x00000fff
3473 +#define STLE_TXA1_SHIFTL       0
3474 +
3475 +/* mask and shift value to get Tx sync queue status for port 1 */
3476 +#define STLE_TXS1_MSKL         0x00fff000
3477 +#define STLE_TXS1_SHIFTL       12
3478 +
3479 +/* mask and shift value to get Tx async queue status for port 2 */
3480 +#define STLE_TXA2_MSKL         0xff000000
3481 +#define STLE_TXA2_SHIFTL       24
3482 +#define STLE_TXA2_MSKH         0x000f
3483 +/* this one shifts up */
3484 +#define STLE_TXA2_SHIFTH       8
3485 +
3486 +/* mask and shift value to get Tx sync queue status for port 2 */
3487 +#define STLE_TXS2_MSKL         0x00000000
3488 +#define STLE_TXS2_SHIFTL       0
3489 +#define STLE_TXS2_MSKH         0xfff0
3490 +#define STLE_TXS2_SHIFTH       4
3491 +
3492 +/* YUKON-2 bit values */
3493 +#define HW_OWNER               BIT_7
3494 +#define SW_OWNER               0
3495 +
3496 +#define PU_PUTIDX_VALID                BIT_12
3497 +
3498 +/* YUKON-2 Control flags */
3499 +#define UDPTCP                 BIT_0S
3500 +#define CALSUM                 BIT_1S
3501 +#define WR_SUM                 BIT_2S
3502 +#define INIT_SUM               BIT_3S
3503 +#define LOCK_SUM               BIT_4S
3504 +#define INS_VLAN               BIT_5S
3505 +#define FRC_STAT               BIT_6S
3506 +#define EOP                            BIT_7S
3507 +
3508 +#define TX_LOCK                        BIT_8S
3509 +#define BUF_SEND               BIT_9S
3510 +#define PACKET_SEND            BIT_10S
3511 +
3512 +#define NO_WARNING             BIT_14S
3513 +#define NO_UPDATE              BIT_15S
3514 +
3515 +/* YUKON-2 Rx/Tx opcodes defines */
3516 +#define OP_TCPWRITE            0x11
3517 +#define OP_TCPSTART            0x12
3518 +#define OP_TCPINIT             0x14
3519 +#define OP_TCPLCK              0x18
3520 +#define OP_TCPCHKSUM   OP_TCPSTART
3521 +#define OP_TCPIS               (OP_TCPINIT | OP_TCPSTART)
3522 +#define OP_TCPLW               (OP_TCPLCK | OP_TCPWRITE)
3523 +#define OP_TCPLSW              (OP_TCPLCK | OP_TCPSTART | OP_TCPWRITE)
3524 +#define OP_TCPLISW             (OP_TCPLCK | OP_TCPINIT | OP_TCPSTART | OP_TCPWRITE)
3525 +#define OP_ADDR64              0x21
3526 +#define OP_VLAN                0x22
3527 +#define OP_ADDR64VLAN  (OP_ADDR64 | OP_VLAN)
3528 +#define OP_LRGLEN              0x24
3529 +#define OP_LRGLENVLAN  (OP_LRGLEN | OP_VLAN)
3530 +#define OP_BUFFER              0x40
3531 +#define OP_PACKET              0x41
3532 +#define OP_LARGESEND   0x43
3533 +
3534 +/* YUKON-2 STATUS opcodes defines */
3535 +#define OP_RXSTAT              0x60
3536 +#define OP_RXTIMESTAMP 0x61
3537 +#define OP_RXVLAN              0x62
3538 +#define OP_RXCHKS              0x64
3539 +#define OP_RXCHKSVLAN  (OP_RXCHKS | OP_RXVLAN)
3540 +#define OP_RXTIMEVLAN  (OP_RXTIMESTAMP | OP_RXVLAN)
3541 +#define OP_RSS_HASH            0x65
3542 +#define OP_TXINDEXLE   0x68
3543 +
3544 +/* YUKON-2 SPECIAL opcodes defines */
3545 +#define OP_PUTIDX      0x70
3546
3547  /* Descriptor Bit Definition */
3548  /*     TxCtrl          Transmit Buffer Control Field */
3549 @@ -1685,6 +2433,10 @@
3550
3551  /* macros ********************************************************************/
3552
3553 +/* Macro for accessing the key registers */
3554 +#define RSS_KEY_ADDR(Port, KeyIndex)   \
3555 +               ((B4_RSS_KEY | ( ((Port) == 0) ? 0 : 0x80)) + (KeyIndex))
3556 +
3557  /* Receive and Transmit Queues */
3558  #define Q_R1   0x0000          /* Receive Queue 1 */
3559  #define Q_R2   0x0080          /* Receive Queue 2 */
3560 @@ -1693,6 +2445,10 @@
3561  #define Q_XS2  0x0300          /* Synchronous Transmit Queue 2 */
3562  #define Q_XA2  0x0380          /* Asynchronous Transmit Queue 2 */
3563
3564 +#define Q_ASF_R1       0x100   /* ASF Rx Queue 1 */
3565 +#define Q_ASF_R2       0x180   /* ASF Rx Queue 2 */
3566 +#define Q_ASF_T1       0x140   /* ASF Tx Queue 1 */
3567 +#define Q_ASF_T2       0x1c0   /* ASF Tx Queue 2 */
3568  /*
3569   *     Macro Q_ADDR()
3570   *
3571 @@ -1704,11 +2460,27 @@
3572   *     Offs    Queue register offset.
3573   *                             Values: Q_D, Q_DA_L ... Q_T2, Q_T3
3574   *
3575 - * usage       SK_IN32(pAC, Q_ADDR(Q_R2, Q_BC), pVal)
3576 + * usage       SK_IN32(IoC, Q_ADDR(Q_R2, Q_BC), pVal)
3577   */
3578  #define Q_ADDR(Queue, Offs)    (B8_Q_REGS + (Queue) + (Offs))
3579
3580  /*
3581 + *     Macro Y2_PREF_Q_ADDR()
3582 + *
3583 + *     Use this macro to access the Prefetch Units of the receive and
3584 + *     transmit queues of Yukon-2.
3585 + *
3586 + * para:
3587 + *     Queue   Queue to access.
3588 + *                             Values: Q_R1, Q_R2, Q_XS1, Q_XA1, Q_XS2, Q_XA2,
3589 + *     Offs    Queue register offset.
3590 + *                             Values: PREF_UNIT_CTRL_REG ... PREF_UNIT_FIFO_LEV_REG
3591 + *
3592 + * usage       SK_IN16(IoC, Y2_Q_ADDR(Q_R2, PREF_UNIT_GET_IDX_REG), pVal)
3593 + */
3594 +#define Y2_PREF_Q_ADDR(Queue, Offs)    (Y2_B8_PREF_REGS + (Queue) + (Offs))
3595 +
3596 +/*
3597   *     Macro RB_ADDR()
3598   *
3599   *     Use this macro to access the RAM Buffer Registers.
3600 @@ -1719,14 +2491,14 @@
3601   *     Offs    Queue register offset.
3602   *                             Values: RB_START, RB_END ... RB_LEV, RB_CTRL
3603   *
3604 - * usage       SK_IN32(pAC, RB_ADDR(Q_R2, RB_RP), pVal)
3605 + * usage       SK_IN32(IoC, RB_ADDR(Q_R2, RB_RP), pVal)
3606   */
3607  #define RB_ADDR(Queue, Offs)   (B16_RAM_REGS + (Queue) + (Offs))
3608
3609
3610  /* MAC Related Registers */
3611 -#define MAC_1          0       /* belongs to the port near the slot */
3612 -#define MAC_2          1       /* belongs to the port far away from the slot */
3613 +#define MAC_1          0       /* 1st port */
3614 +#define MAC_2          1       /* 2nd port */
3615
3616  /*
3617   *     Macro MR_ADDR()
3618 @@ -1740,19 +2512,10 @@
3619   *                             Values: RX_MFF_EA, RX_MFF_WP ... LNK_LED_REG,
3620   *                                             TX_MFF_EA, TX_MFF_WP ... TX_LED_TST
3621   *
3622 - * usage       SK_IN32(pAC, MR_ADDR(MAC_1, TX_MFF_EA), pVal)
3623 + * usage       SK_IN32(IoC, MR_ADDR(MAC_1, TX_MFF_EA), pVal)
3624   */
3625  #define MR_ADDR(Mac, Offs)     (((Mac) << 7) + (Offs))
3626
3627 -#ifdef SK_LITTLE_ENDIAN
3628 -#define XM_WORD_LO     0
3629 -#define XM_WORD_HI     1
3630 -#else  /* !SK_LITTLE_ENDIAN */
3631 -#define XM_WORD_LO     1
3632 -#define XM_WORD_HI     0
3633 -#endif /* !SK_LITTLE_ENDIAN */
3634 -
3635 -
3636  /*
3637   * macros to access the XMAC (GENESIS only)
3638   *
3639 @@ -1777,22 +2540,31 @@
3640  #define XMA(Mac, Reg)                                                                  \
3641         ((BASE_XMAC_1 + (Mac) * (BASE_XMAC_2 - BASE_XMAC_1)) | ((Reg) << 1))
3642
3643 -#define XM_IN16(IoC, Mac, Reg, pVal)                                   \
3644 -       SK_IN16((IoC), XMA((Mac), (Reg)), (pVal))
3645 +#define XM_IN16(IoC, Mac, Reg, pVal)   \
3646 +       SK_IN16(IoC, XMA(Mac, Reg), pVal)
3647 +
3648 +#define XM_OUT16(IoC, Mac, Reg, Val)   \
3649 +       SK_OUT16(IoC, XMA(Mac, Reg), Val)
3650 +
3651 +#ifdef SK_LITTLE_ENDIAN
3652 +
3653 +#define XM_IN32(IoC, Mac, Reg, pVal) {                                                         \
3654 +       SK_IN16(IoC, XMA(Mac, Reg), (SK_U16 SK_FAR *)(pVal));                   \
3655 +       SK_IN16(IoC, XMA(Mac, (Reg) + 2), (SK_U16 SK_FAR *)(pVal) + 1); \
3656 +}
3657
3658 -#define XM_OUT16(IoC, Mac, Reg, Val)                                   \
3659 -       SK_OUT16((IoC), XMA((Mac), (Reg)), (Val))
3660 +#else  /* !SK_LITTLE_ENDIAN */
3661
3662 -#define XM_IN32(IoC, Mac, Reg, pVal) {                                 \
3663 -       SK_IN16((IoC), XMA((Mac), (Reg)),                                       \
3664 -               (SK_U16 SK_FAR*)&((SK_U16 SK_FAR*)(pVal))[XM_WORD_LO]);         \
3665 -       SK_IN16((IoC), XMA((Mac), (Reg+2)),                                     \
3666 -               (SK_U16 SK_FAR*)&((SK_U16 SK_FAR*)(pVal))[XM_WORD_HI]);         \
3667 +#define XM_IN32(IoC, Mac, Reg, pVal) {                                                 \
3668 +       SK_IN16(IoC, XMA(Mac, Reg), (SK_U16 SK_FAR *)(pVal) + 1);       \
3669 +       SK_IN16(IoC, XMA(Mac, (Reg) + 2), (SK_U16 SK_FAR *)(pVal));     \
3670  }
3671
3672 +#endif /* !SK_LITTLE_ENDIAN */
3673 +
3674  #define XM_OUT32(IoC, Mac, Reg, Val) {                                                                         \
3675 -       SK_OUT16((IoC), XMA((Mac), (Reg)), (SK_U16)((Val) & 0xffffL));                  \
3676 -       SK_OUT16((IoC), XMA((Mac), (Reg+2)), (SK_U16)(((Val) >> 16) & 0xffffL));\
3677 +       SK_OUT16(IoC, XMA(Mac, Reg), (SK_U16)((Val) & 0xffffL));                                \
3678 +       SK_OUT16(IoC, XMA(Mac, (Reg) + 2), (SK_U16)(((Val) >> 16) & 0xffffL));  \
3679  }
3680
3681  /* Remember: we are always writing to / reading from LITTLE ENDIAN memory */
3682 @@ -1802,13 +2574,13 @@
3683         SK_U8   *pByte;                                                                         \
3684         pByte = (SK_U8 *)&((SK_U8 *)(pVal))[0];                         \
3685         SK_IN16((IoC), XMA((Mac), (Reg)), &Word);                       \
3686 -       pByte[0] = (SK_U8)(Word  & 0x00ff);                                     \
3687 +       pByte[0] = (SK_U8)(Word & 0x00ff);                                      \
3688         pByte[1] = (SK_U8)((Word >> 8) & 0x00ff);                       \
3689 -       SK_IN16((IoC), XMA((Mac), (Reg+2)), &Word);                     \
3690 -       pByte[2] = (SK_U8)(Word  & 0x00ff);                                     \
3691 +       SK_IN16((IoC), XMA((Mac), (Reg) + 2), &Word);           \
3692 +       pByte[2] = (SK_U8)(Word & 0x00ff);                                      \
3693         pByte[3] = (SK_U8)((Word >> 8) & 0x00ff);                       \
3694 -       SK_IN16((IoC), XMA((Mac), (Reg+4)), &Word);                     \
3695 -       pByte[4] = (SK_U8)(Word  & 0x00ff);                                     \
3696 +       SK_IN16((IoC), XMA((Mac), (Reg) + 4), &Word);           \
3697 +       pByte[4] = (SK_U8)(Word & 0x00ff);                                      \
3698         pByte[5] = (SK_U8)((Word >> 8) & 0x00ff);                       \
3699  }
3700
3701 @@ -1818,10 +2590,10 @@
3702         SK_OUT16((IoC), XMA((Mac), (Reg)), (SK_U16)                     \
3703                 (((SK_U16)(pByte[0]) & 0x00ff) |                                \
3704                 (((SK_U16)(pByte[1]) << 8) & 0xff00)));                 \
3705 -       SK_OUT16((IoC), XMA((Mac), (Reg+2)), (SK_U16)           \
3706 +       SK_OUT16((IoC), XMA((Mac), (Reg) + 2), (SK_U16)         \
3707                 (((SK_U16)(pByte[2]) & 0x00ff) |                                \
3708                 (((SK_U16)(pByte[3]) << 8) & 0xff00)));                 \
3709 -       SK_OUT16((IoC), XMA((Mac), (Reg+4)), (SK_U16)           \
3710 +       SK_OUT16((IoC), XMA((Mac), (Reg) + 4), (SK_U16)         \
3711                 (((SK_U16)(pByte[4]) & 0x00ff) |                                \
3712                 (((SK_U16)(pByte[5]) << 8) & 0xff00)));                 \
3713  }
3714 @@ -1831,16 +2603,16 @@
3715         SK_U8   SK_FAR *pByte;                                                          \
3716         pByte = (SK_U8 SK_FAR *)&((SK_U8 SK_FAR *)(pVal))[0];   \
3717         SK_IN16((IoC), XMA((Mac), (Reg)), &Word);                       \
3718 -       pByte[0] = (SK_U8)(Word  & 0x00ff);                                     \
3719 +       pByte[0] = (SK_U8)(Word & 0x00ff);                                      \
3720         pByte[1] = (SK_U8)((Word >> 8) & 0x00ff);                       \
3721 -       SK_IN16((IoC), XMA((Mac), (Reg+2)), &Word);                     \
3722 -       pByte[2] = (SK_U8)(Word  & 0x00ff);                                     \
3723 +       SK_IN16((IoC), XMA((Mac), (Reg) + 2), &Word);           \
3724 +       pByte[2] = (SK_U8)(Word & 0x00ff);                                      \
3725         pByte[3] = (SK_U8)((Word >> 8) & 0x00ff);                       \
3726 -       SK_IN16((IoC), XMA((Mac), (Reg+4)), &Word);                     \
3727 -       pByte[4] = (SK_U8)(Word  & 0x00ff);                                     \
3728 +       SK_IN16((IoC), XMA((Mac), (Reg) + 4), &Word);           \
3729 +       pByte[4] = (SK_U8)(Word & 0x00ff);                                      \
3730         pByte[5] = (SK_U8)((Word >> 8) & 0x00ff);                       \
3731 -       SK_IN16((IoC), XMA((Mac), (Reg+6)), &Word);                     \
3732 -       pByte[6] = (SK_U8)(Word  & 0x00ff);                                     \
3733 +       SK_IN16((IoC), XMA((Mac), (Reg) + 6), &Word);           \
3734 +       pByte[6] = (SK_U8)(Word & 0x00ff);                                      \
3735         pByte[7] = (SK_U8)((Word >> 8) & 0x00ff);                       \
3736  }
3737
3738 @@ -1850,13 +2622,13 @@
3739         SK_OUT16((IoC), XMA((Mac), (Reg)), (SK_U16)                     \
3740                 (((SK_U16)(pByte[0]) & 0x00ff)|                                 \
3741                 (((SK_U16)(pByte[1]) << 8) & 0xff00)));                 \
3742 -       SK_OUT16((IoC), XMA((Mac), (Reg+2)), (SK_U16)           \
3743 +       SK_OUT16((IoC), XMA((Mac), (Reg) + 2), (SK_U16)         \
3744                 (((SK_U16)(pByte[2]) & 0x00ff)|                                 \
3745                 (((SK_U16)(pByte[3]) << 8) & 0xff00)));                 \
3746 -       SK_OUT16((IoC), XMA((Mac), (Reg+4)), (SK_U16)           \
3747 +       SK_OUT16((IoC), XMA((Mac), (Reg) + 4), (SK_U16)         \
3748                 (((SK_U16)(pByte[4]) & 0x00ff)|                                 \
3749                 (((SK_U16)(pByte[5]) << 8) & 0xff00)));                 \
3750 -       SK_OUT16((IoC), XMA((Mac), (Reg+6)), (SK_U16)           \
3751 +       SK_OUT16((IoC), XMA((Mac), (Reg) + 6), (SK_U16)         \
3752                 (((SK_U16)(pByte[6]) & 0x00ff)|                                 \
3753                 (((SK_U16)(pByte[7]) << 8) & 0xff00)));                 \
3754  }
3755 @@ -1866,7 +2638,7 @@
3756   *
3757   * GM_IN16(),          to read  a 16 bit register (e.g. GM_GP_STAT)
3758   * GM_OUT16(),         to write a 16 bit register (e.g. GM_GP_CTRL)
3759 - * GM_IN32(),          to read  a 32 bit register (e.g. GM_)
3760 + * GM_IN32(),          to read  a 32 bit register (e.g. GM_RXF_UC_OK)
3761   * GM_OUT32(),         to write a 32 bit register (e.g. GM_)
3762   * GM_INADDR(),                to read  a network address register (e.g. GM_SRC_ADDR_1L)
3763   * GM_OUTADDR(),       to write a network address register (e.g. GM_SRC_ADDR_2L)
3764 @@ -1885,22 +2657,31 @@
3765  #define GMA(Mac, Reg)                                                                  \
3766         ((BASE_GMAC_1 + (Mac) * (BASE_GMAC_2 - BASE_GMAC_1)) | (Reg))
3767
3768 -#define GM_IN16(IoC, Mac, Reg, pVal)                                   \
3769 -       SK_IN16((IoC), GMA((Mac), (Reg)), (pVal))
3770 +#define GM_IN16(IoC, Mac, Reg, pVal)   \
3771 +       SK_IN16(IoC, GMA(Mac, Reg), pVal)
3772 +
3773 +#define GM_OUT16(IoC, Mac, Reg, Val)   \
3774 +       SK_OUT16(IoC, GMA(Mac, Reg), Val)
3775
3776 -#define GM_OUT16(IoC, Mac, Reg, Val)                                   \
3777 -       SK_OUT16((IoC), GMA((Mac), (Reg)), (Val))
3778 +#ifdef SK_LITTLE_ENDIAN
3779
3780 -#define GM_IN32(IoC, Mac, Reg, pVal) {                                 \
3781 -       SK_IN16((IoC), GMA((Mac), (Reg)),                                       \
3782 -               (SK_U16 SK_FAR*)&((SK_U16 SK_FAR*)(pVal))[XM_WORD_LO]);         \
3783 -       SK_IN16((IoC), GMA((Mac), (Reg+4)),                                     \
3784 -               (SK_U16 SK_FAR*)&((SK_U16 SK_FAR*)(pVal))[XM_WORD_HI]);         \
3785 +#define GM_IN32(IoC, Mac, Reg, pVal) {                                                                 \
3786 +       SK_IN16(IoC, GMA(Mac, Reg), (SK_U16 SK_FAR *)(pVal));                           \
3787 +       SK_IN16((IoC), GMA(Mac, (Reg) + 4), (SK_U16 SK_FAR *)(pVal) + 1);       \
3788  }
3789
3790 +#else  /* !SK_LITTLE_ENDIAN */
3791 +
3792 +#define GM_IN32(IoC, Mac, Reg, pVal) {                                                 \
3793 +       SK_IN16(IoC, GMA(Mac, Reg), (SK_U16 SK_FAR *)(pVal) + 1);       \
3794 +       SK_IN16(IoC, GMA(Mac, (Reg) + 4), (SK_U16 SK_FAR *)(pVal));     \
3795 +}
3796 +
3797 +#endif /* !SK_LITTLE_ENDIAN */
3798 +
3799  #define GM_OUT32(IoC, Mac, Reg, Val) {                                                                         \
3800 -       SK_OUT16((IoC), GMA((Mac), (Reg)), (SK_U16)((Val) & 0xffffL));                  \
3801 -       SK_OUT16((IoC), GMA((Mac), (Reg+4)), (SK_U16)(((Val) >> 16) & 0xffffL));\
3802 +       SK_OUT16(IoC, GMA(Mac, Reg), (SK_U16)((Val) & 0xffffL));                                \
3803 +       SK_OUT16(IoC, GMA(Mac, (Reg) + 4), (SK_U16)(((Val) >> 16) & 0xffffL));  \
3804  }
3805
3806  #define GM_INADDR(IoC, Mac, Reg, pVal) {                               \
3807 @@ -1908,13 +2689,13 @@
3808         SK_U8   *pByte;                                                                         \
3809         pByte = (SK_U8 *)&((SK_U8 *)(pVal))[0];                         \
3810         SK_IN16((IoC), GMA((Mac), (Reg)), &Word);                       \
3811 -       pByte[0] = (SK_U8)(Word  & 0x00ff);                                     \
3812 +       pByte[0] = (SK_U8)(Word & 0x00ff);                                      \
3813         pByte[1] = (SK_U8)((Word >> 8) & 0x00ff);                       \
3814 -       SK_IN16((IoC), GMA((Mac), (Reg+4)), &Word);                     \
3815 -       pByte[2] = (SK_U8)(Word  & 0x00ff);                                     \
3816 +       SK_IN16((IoC), GMA((Mac), (Reg) + 4), &Word);           \
3817 +       pByte[2] = (SK_U8)(Word & 0x00ff);                                      \
3818         pByte[3] = (SK_U8)((Word >> 8) & 0x00ff);                       \
3819 -       SK_IN16((IoC), GMA((Mac), (Reg+8)), &Word);                     \
3820 -       pByte[4] = (SK_U8)(Word  & 0x00ff);                                     \
3821 +       SK_IN16((IoC), GMA((Mac), (Reg) + 8), &Word);           \
3822 +       pByte[4] = (SK_U8)(Word & 0x00ff);                                      \
3823         pByte[5] = (SK_U8)((Word >> 8) & 0x00ff);                       \
3824  }
3825
3826 @@ -1924,10 +2705,10 @@
3827         SK_OUT16((IoC), GMA((Mac), (Reg)), (SK_U16)                     \
3828                 (((SK_U16)(pByte[0]) & 0x00ff) |                                \
3829                 (((SK_U16)(pByte[1]) << 8) & 0xff00)));                 \
3830 -       SK_OUT16((IoC), GMA((Mac), (Reg+4)), (SK_U16)           \
3831 +       SK_OUT16((IoC), GMA((Mac), (Reg) + 4), (SK_U16)         \
3832                 (((SK_U16)(pByte[2]) & 0x00ff) |                                \
3833                 (((SK_U16)(pByte[3]) << 8) & 0xff00)));                 \
3834 -       SK_OUT16((IoC), GMA((Mac), (Reg+8)), (SK_U16)           \
3835 +       SK_OUT16((IoC), GMA((Mac), (Reg) + 8), (SK_U16)         \
3836                 (((SK_U16)(pByte[4]) & 0x00ff) |                                \
3837                 (((SK_U16)(pByte[5]) << 8) & 0xff00)));                 \
3838  }
3839 @@ -1937,16 +2718,16 @@
3840         SK_U8   *pByte;                                                                         \
3841         pByte = (SK_U8 *)&((SK_U8 *)(pVal))[0];                         \
3842         SK_IN16((IoC), GMA((Mac), (Reg)), &Word);                       \
3843 -       pByte[0] = (SK_U8)(Word  & 0x00ff);                                     \
3844 +       pByte[0] = (SK_U8)(Word & 0x00ff);                                      \
3845         pByte[1] = (SK_U8)((Word >> 8) & 0x00ff);                       \
3846 -       SK_IN16((IoC), GMA((Mac), (Reg+4)), &Word);                     \
3847 -       pByte[2] = (SK_U8)(Word  & 0x00ff);                                     \
3848 +       SK_IN16((IoC), GMA((Mac), (Reg) + 4), &Word);           \
3849 +       pByte[2] = (SK_U8)(Word & 0x00ff);                                      \
3850         pByte[3] = (SK_U8)((Word >> 8) & 0x00ff);                       \
3851 -       SK_IN16((IoC), GMA((Mac), (Reg+8)), &Word);                     \
3852 -       pByte[4] = (SK_U8)(Word  & 0x00ff);                                     \
3853 +       SK_IN16((IoC), GMA((Mac), (Reg) + 8), &Word);           \
3854 +       pByte[4] = (SK_U8)(Word & 0x00ff);                                      \
3855         pByte[5] = (SK_U8)((Word >> 8) & 0x00ff);                       \
3856 -       SK_IN16((IoC), GMA((Mac), (Reg+12)), &Word);            \
3857 -       pByte[6] = (SK_U8)(Word  & 0x00ff);                                     \
3858 +       SK_IN16((IoC), GMA((Mac), (Reg) + 12), &Word);          \
3859 +       pByte[6] = (SK_U8)(Word & 0x00ff);                                      \
3860         pByte[7] = (SK_U8)((Word >> 8) & 0x00ff);                       \
3861  }
3862
3863 @@ -1956,13 +2737,13 @@
3864         SK_OUT16((IoC), GMA((Mac), (Reg)), (SK_U16)                     \
3865                 (((SK_U16)(pByte[0]) & 0x00ff)|                                 \
3866                 (((SK_U16)(pByte[1]) << 8) & 0xff00)));                 \
3867 -       SK_OUT16((IoC), GMA((Mac), (Reg+4)), (SK_U16)           \
3868 +       SK_OUT16((IoC), GMA((Mac), (Reg) + 4), (SK_U16)         \
3869                 (((SK_U16)(pByte[2]) & 0x00ff)|                                 \
3870                 (((SK_U16)(pByte[3]) << 8) & 0xff00)));                 \
3871 -       SK_OUT16((IoC), GMA((Mac), (Reg+8)), (SK_U16)           \
3872 +       SK_OUT16((IoC), GMA((Mac), (Reg) + 8), (SK_U16)         \
3873                 (((SK_U16)(pByte[4]) & 0x00ff)|                                 \
3874                 (((SK_U16)(pByte[5]) << 8) & 0xff00)));                 \
3875 -       SK_OUT16((IoC), GMA((Mac), (Reg+12)), (SK_U16)          \
3876 +       SK_OUT16((IoC), GMA((Mac), (Reg) + 12), (SK_U16)        \
3877                 (((SK_U16)(pByte[6]) & 0x00ff)|                                 \
3878                 (((SK_U16)(pByte[7]) << 8) & 0xff00)));                 \
3879  }
3880 @@ -2010,30 +2791,30 @@
3881   *
3882   * usage:      PHY_READ(IoC, pPort, MAC_1, PHY_CTRL, Value);
3883   * Warning: a PHY_READ on an uninitialized PHY (PHY still in reset) never
3884 - *          comes back. This is checked in DEBUG mode.
3885 + *     comes back. This is checked in DEBUG mode.
3886   */
3887  #ifndef DEBUG
3888  #define PHY_READ(IoC, pPort, Mac, PhyReg, pVal) {                                              \
3889 -       SK_U16 Mmu;                                                                                                             \
3890 +       SK_U16 Mmu;                                                                                                                     \
3891                                                                                                                                                 \
3892         XM_OUT16((IoC), (Mac), XM_PHY_ADDR, (PhyReg) | (pPort)->PhyAddr);       \
3893         XM_IN16((IoC), (Mac), XM_PHY_DATA, (pVal));                                                     \
3894         if ((pPort)->PhyType != SK_PHY_XMAC) {                                                          \
3895 -               do {                                                                                                                    \
3896 +               do {                                                                                                                    \
3897                         XM_IN16((IoC), (Mac), XM_MMU_CMD, &Mmu);                                        \
3898                 } while ((Mmu & XM_MMU_PHY_RDY) == 0);                                                  \
3899                 XM_IN16((IoC), (Mac), XM_PHY_DATA, (pVal));                                             \
3900 -       }                                                                                                                                       \
3901 +       }                                                                                                                                       \
3902  }
3903  #else
3904  #define PHY_READ(IoC, pPort, Mac, PhyReg, pVal) {                                              \
3905 -       SK_U16 Mmu;                                                                                                             \
3906 +       SK_U16 Mmu;                                                                                                                     \
3907         int __i = 0;                                                                                                            \
3908                                                                                                                                                 \
3909         XM_OUT16((IoC), (Mac), XM_PHY_ADDR, (PhyReg) | (pPort)->PhyAddr);       \
3910         XM_IN16((IoC), (Mac), XM_PHY_DATA, (pVal));                                                     \
3911         if ((pPort)->PhyType != SK_PHY_XMAC) {                                                          \
3912 -               do {                                                                                                                    \
3913 +               do {                                                                                                                    \
3914                         XM_IN16((IoC), (Mac), XM_MMU_CMD, &Mmu);                                        \
3915                         __i++;                                                                                                          \
3916                         if (__i > 100000) {                                                                                     \
3917 @@ -2044,7 +2825,7 @@
3918                         }                                                                                                                       \
3919                 } while ((Mmu & XM_MMU_PHY_RDY) == 0);                                                  \
3920                 XM_IN16((IoC), (Mac), XM_PHY_DATA, (pVal));                                             \
3921 -       }                                                                                                                                       \
3922 +       }                                                                                                                                       \
3923  }
3924  #endif /* DEBUG */
3925
3926 @@ -2052,17 +2833,17 @@
3927         SK_U16 Mmu;                                                                                                                     \
3928                                                                                                                                                 \
3929         if ((pPort)->PhyType != SK_PHY_XMAC) {                                                          \
3930 -               do {                                                                                                                    \
3931 +               do {                                                                                                                    \
3932                         XM_IN16((IoC), (Mac), XM_MMU_CMD, &Mmu);                                        \
3933                 } while ((Mmu & XM_MMU_PHY_BUSY) != 0);                                                 \
3934 -       }                                                                                                                                       \
3935 +       }                                                                                                                                       \
3936         XM_OUT16((IoC), (Mac), XM_PHY_ADDR, (PhyReg) | (pPort)->PhyAddr);       \
3937         XM_OUT16((IoC), (Mac), XM_PHY_DATA, (Val));                                                     \
3938         if ((pPort)->PhyType != SK_PHY_XMAC) {                                                          \
3939 -               do {                                                                                                                    \
3940 +               do {                                                                                                                    \
3941                         XM_IN16((IoC), (Mac), XM_MMU_CMD, &Mmu);                                        \
3942                 } while ((Mmu & XM_MMU_PHY_BUSY) != 0);                                                 \
3943 -       }                                                                                                                                       \
3944 +       }                                                                                                                                       \
3945  }
3946
3947  /*
3948 @@ -2071,12 +2852,14 @@
3949   *     Use this macro to access PCI config register from the I/O space.
3950   *
3951   * para:
3952 + *     pAC             Pointer to adapter context
3953   *     Addr    PCI configuration register to access.
3954   *                     Values: PCI_VENDOR_ID ... PCI_VPD_ADR_REG,
3955   *
3956 - * usage       SK_IN16(pAC, PCI_C(PCI_VENDOR_ID), pVal);
3957 + * usage       SK_IN16(IoC, PCI_C(pAC, PCI_VENDOR_ID), pVal);
3958   */
3959 -#define PCI_C(Addr)    (B7_CFG_SPC + (Addr))   /* PCI Config Space */
3960 +#define PCI_C(p, Addr)         \
3961 +       (((CHIP_ID_YUKON_2(p)) ? Y2_CFG_SPC : B7_CFG_SPC) + (Addr))
3962
3963  /*
3964   *     Macro SK_HW_ADDR(Base, Addr)
3965 @@ -2088,7 +2871,7 @@
3966   *     Addr    Address offset
3967   *
3968   * usage:      May be used in SK_INxx and SK_OUTxx macros
3969 - *             #define SK_IN8(pAC, Addr, pVal) ...\
3970 + *             #define SK_IN8(IoC, Addr, pVal) ...\
3971   *                     *pVal = (SK_U8)inp(SK_HW_ADDR(pAC->Hw.Iop, Addr)))
3972   */
3973  #ifdef SK_MEM_MAPPED_IO
3974 @@ -2107,12 +2890,27 @@
3975   * para:
3976   *     pAC             Pointer to adapter context struct
3977   *     IoC             I/O context needed for SK I/O macros
3978 - *  Port       Port number
3979 + *     Port    Port number
3980   *     Mode    Mode to set for this LED
3981   */
3982  #define SK_HWAC_LINK_LED(pAC, IoC, Port, Mode) \
3983         SK_OUT8(IoC, MR_ADDR(Port, LNK_LED_REG), Mode);
3984
3985 +#define SK_SET_GP_IO(IoC, Bit) {       \
3986 +       SK_U32  DWord;                                  \
3987 +       SK_IN32(IoC, B2_GP_IO, &DWord); \
3988 +       DWord |= ((GP_DIR_0 | GP_IO_0) << (Bit));\
3989 +       SK_OUT32(IoC, B2_GP_IO, DWord); \
3990 +}
3991 +
3992 +#define SK_CLR_GP_IO(IoC, Bit) {       \
3993 +       SK_U32  DWord;                                  \
3994 +       SK_IN32(IoC, B2_GP_IO, &DWord); \
3995 +       DWord &= ~((GP_DIR_0 | GP_IO_0) << (Bit));\
3996 +       SK_OUT32(IoC, B2_GP_IO, DWord); \
3997 +}
3998 +
3999 +#define SK_GE_PCI_FIFO_SIZE            1600    /* PCI FIFO Size */
4000
4001  /* typedefs *******************************************************************/
4002
4003 @@ -2124,3 +2922,4 @@
4004  #endif /* __cplusplus */
4005
4006  #endif /* __INC_SKGEHW_H */
4007 +
4008 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/skgehwt.h linux-2.6.9.new/drivers/net/sk98lin/h/skgehwt.h
4009 --- linux-2.6.9.old/drivers/net/sk98lin/h/skgehwt.h     2004-10-19 05:53:51.000000000 +0800
4010 +++ linux-2.6.9.new/drivers/net/sk98lin/h/skgehwt.h     2006-12-07 14:35:03.000000000 +0800
4011 @@ -2,8 +2,8 @@
4012   *
4013   * Name:       skhwt.h
4014   * Project:    Gigabit Ethernet Adapters, Event Scheduler Module
4015 - * Version:    $Revision: 1.7 $
4016 - * Date:       $Date: 2003/09/16 12:55:08 $
4017 + * Version:    $Revision: 2.1 $
4018 + * Date:       $Date: 2003/10/27 14:16:09 $
4019   * Purpose:    Defines for the hardware timer functions
4020   *
4021   ******************************************************************************/
4022 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/skgei2c.h linux-2.6.9.new/drivers/net/sk98lin/h/skgei2c.h
4023 --- linux-2.6.9.old/drivers/net/sk98lin/h/skgei2c.h     2004-10-19 05:54:40.000000000 +0800
4024 +++ linux-2.6.9.new/drivers/net/sk98lin/h/skgei2c.h     1970-01-01 08:00:00.000000000 +0800
4025 @@ -1,210 +0,0 @@
4026 -/******************************************************************************
4027 - *
4028 - * Name:       skgei2c.h
4029 - * Project:    Gigabit Ethernet Adapters, TWSI-Module
4030 - * Version:    $Revision: 1.25 $
4031 - * Date:       $Date: 2003/10/20 09:06:05 $
4032 - * Purpose:    Special defines for TWSI
4033 - *
4034 - ******************************************************************************/
4035 -
4036 -/******************************************************************************
4037 - *
4038 - *     (C)Copyright 1998-2002 SysKonnect.
4039 - *     (C)Copyright 2002-2003 Marvell.
4040 - *
4041 - *     This program is free software; you can redistribute it and/or modify
4042 - *     it under the terms of the GNU General Public License as published by
4043 - *     the Free Software Foundation; either version 2 of the License, or
4044 - *     (at your option) any later version.
4045 - *
4046 - *     The information in this file is provided "AS IS" without warranty.
4047 - *
4048 - ******************************************************************************/
4049 -
4050 -/*
4051 - * SKGEI2C.H   contains all SK-98xx specific defines for the TWSI handling
4052 - */
4053 -
4054 -#ifndef _INC_SKGEI2C_H_
4055 -#define _INC_SKGEI2C_H_
4056 -
4057 -/*
4058 - * Macros to access the B2_I2C_CTRL
4059 - */
4060 -#define SK_I2C_CTL(IoC, flag, dev, dev_size, reg, burst) \
4061 -       SK_OUT32(IoC, B2_I2C_CTRL,\
4062 -               (flag ? 0x80000000UL : 0x0L) | \
4063 -               (((SK_U32)reg << 16) & I2C_ADDR) | \
4064 -               (((SK_U32)dev << 9) & I2C_DEV_SEL) | \
4065 -               (dev_size & I2C_DEV_SIZE) | \
4066 -               ((burst << 4) & I2C_BURST_LEN))
4067 -
4068 -#define SK_I2C_STOP(IoC) {                             \
4069 -       SK_U32  I2cCtrl;                                \
4070 -       SK_IN32(IoC, B2_I2C_CTRL, &I2cCtrl);            \
4071 -       SK_OUT32(IoC, B2_I2C_CTRL, I2cCtrl | I2C_STOP); \
4072 -}
4073 -
4074 -#define SK_I2C_GET_CTL(IoC, pI2cCtrl)  SK_IN32(IoC, B2_I2C_CTRL, pI2cCtrl)
4075 -
4076 -/*
4077 - * Macros to access the TWSI SW Registers
4078 - */
4079 -#define SK_I2C_SET_BIT(IoC, SetBits) {                 \
4080 -       SK_U8   OrgBits;                                \
4081 -       SK_IN8(IoC, B2_I2C_SW, &OrgBits);               \
4082 -       SK_OUT8(IoC, B2_I2C_SW, OrgBits | (SK_U8)(SetBits));    \
4083 -}
4084 -
4085 -#define SK_I2C_CLR_BIT(IoC, ClrBits) {                 \
4086 -       SK_U8   OrgBits;                                \
4087 -       SK_IN8(IoC, B2_I2C_SW, &OrgBits);               \
4088 -       SK_OUT8(IoC, B2_I2C_SW, OrgBits & ~((SK_U8)(ClrBits))); \
4089 -}
4090 -
4091 -#define SK_I2C_GET_SW(IoC, pI2cSw)     SK_IN8(IoC, B2_I2C_SW, pI2cSw)
4092 -
4093 -/*
4094 - * define the possible sensor states
4095 - */
4096 -#define        SK_SEN_IDLE             0       /* Idle: sensor not read */
4097 -#define        SK_SEN_VALUE    1       /* Value Read cycle */
4098 -#define        SK_SEN_VALEXT   2       /* Extended Value Read cycle */
4099 -
4100 -/*
4101 - * Conversion factor to convert read Voltage sensor to milli Volt
4102 - * Conversion factor to convert read Temperature sensor to 10th degree Celsius
4103 - */
4104 -#define        SK_LM80_VT_LSB          22      /* 22mV LSB resolution */
4105 -#define        SK_LM80_TEMP_LSB        10      /* 1 degree LSB resolution */
4106 -#define        SK_LM80_TEMPEXT_LSB      5      /* 0.5 degree LSB resolution for ext. val. */
4107 -
4108 -/*
4109 - * formula: counter = (22500*60)/(rpm * divisor * pulses/2)
4110 - * assuming: 6500rpm, 4 pulses, divisor 1
4111 - */
4112 -#define SK_LM80_FAN_FAKTOR     ((22500L*60)/(1*2))
4113 -
4114 -/*
4115 - * Define sensor management data
4116 - * Maximum is reached on Genesis copper dual port and Yukon-64
4117 - * Board specific maximum is in pAC->I2c.MaxSens
4118 - */
4119 -#define        SK_MAX_SENSORS  8       /* maximal no. of installed sensors */
4120 -#define        SK_MIN_SENSORS  5       /* minimal no. of installed sensors */
4121 -
4122 -/*
4123 - * To watch the state machine (SM) use the timer in two ways
4124 - * instead of one as hitherto
4125 - */
4126 -#define        SK_TIMER_WATCH_SM               0       /* Watch the SM to finish in a spec. time */
4127 -#define        SK_TIMER_NEW_GAUGING    1       /* Start a new gauging when timer expires */
4128 -
4129 -/*
4130 - * Defines for the individual thresholds
4131 - */
4132 -
4133 -/* Temperature sensor */
4134 -#define        SK_SEN_TEMP_HIGH_ERR    800     /* Temperature High Err  Threshold */
4135 -#define        SK_SEN_TEMP_HIGH_WARN   700     /* Temperature High Warn Threshold */
4136 -#define        SK_SEN_TEMP_LOW_WARN    100     /* Temperature Low  Warn Threshold */
4137 -#define        SK_SEN_TEMP_LOW_ERR               0     /* Temperature Low  Err  Threshold */
4138 -
4139 -/* VCC which should be 5 V */
4140 -#define        SK_SEN_PCI_5V_HIGH_ERR          5588    /* Voltage PCI High Err  Threshold */
4141 -#define        SK_SEN_PCI_5V_HIGH_WARN         5346    /* Voltage PCI High Warn Threshold */
4142 -#define        SK_SEN_PCI_5V_LOW_WARN          4664    /* Voltage PCI Low  Warn Threshold */
4143 -#define        SK_SEN_PCI_5V_LOW_ERR           4422    /* Voltage PCI Low  Err  Threshold */
4144 -
4145 -/*
4146 - * VIO may be 5 V or 3.3 V. Initialization takes two parts:
4147 - * 1. Initialize lowest lower limit and highest higher limit.
4148 - * 2. After the first value is read correct the upper or the lower limit to
4149 - *    the appropriate C constant.
4150 - *
4151 - * Warning limits are +-5% of the exepected voltage.
4152 - * Error limits are +-10% of the expected voltage.
4153 - */
4154 -
4155 -/* Bug fix AF: 16.Aug.2001: Correct the init base of LM80 sensor */
4156 -
4157 -#define        SK_SEN_PCI_IO_5V_HIGH_ERR       5566    /* + 10% V PCI-IO High Err Threshold */
4158 -#define        SK_SEN_PCI_IO_5V_HIGH_WARN      5324    /* +  5% V PCI-IO High Warn Threshold */
4159 -                                       /*              5000    mVolt */
4160 -#define        SK_SEN_PCI_IO_5V_LOW_WARN       4686    /* -  5% V PCI-IO Low Warn Threshold */
4161 -#define        SK_SEN_PCI_IO_5V_LOW_ERR        4444    /* - 10% V PCI-IO Low Err Threshold */
4162 -
4163 -#define        SK_SEN_PCI_IO_RANGE_LIMITER     4000    /* 4000 mV range delimiter */
4164 -
4165 -/* correction values for the second pass */
4166 -#define        SK_SEN_PCI_IO_3V3_HIGH_ERR      3850    /* + 15% V PCI-IO High Err Threshold */
4167 -#define        SK_SEN_PCI_IO_3V3_HIGH_WARN     3674    /* + 10% V PCI-IO High Warn Threshold */
4168 -                                       /*              3300    mVolt */
4169 -#define        SK_SEN_PCI_IO_3V3_LOW_WARN      2926    /* - 10% V PCI-IO Low Warn Threshold */
4170 -#define        SK_SEN_PCI_IO_3V3_LOW_ERR       2772    /* - 15% V PCI-IO Low Err  Threshold */
4171 -
4172 -/*
4173 - * VDD voltage
4174 - */
4175 -#define        SK_SEN_VDD_HIGH_ERR             3630    /* Voltage ASIC High Err  Threshold */
4176 -#define        SK_SEN_VDD_HIGH_WARN    3476    /* Voltage ASIC High Warn Threshold */
4177 -#define        SK_SEN_VDD_LOW_WARN             3146    /* Voltage ASIC Low  Warn Threshold */
4178 -#define        SK_SEN_VDD_LOW_ERR              2970    /* Voltage ASIC Low  Err  Threshold */
4179 -
4180 -/*
4181 - * PHY PLL 3V3 voltage
4182 - */
4183 -#define        SK_SEN_PLL_3V3_HIGH_ERR         3630    /* Voltage PMA High Err  Threshold */
4184 -#define        SK_SEN_PLL_3V3_HIGH_WARN        3476    /* Voltage PMA High Warn Threshold */
4185 -#define        SK_SEN_PLL_3V3_LOW_WARN         3146    /* Voltage PMA Low  Warn Threshold */
4186 -#define        SK_SEN_PLL_3V3_LOW_ERR          2970    /* Voltage PMA Low  Err  Threshold */
4187 -
4188 -/*
4189 - * VAUX (YUKON only)
4190 - */
4191 -#define        SK_SEN_VAUX_3V3_HIGH_ERR        3630    /* Voltage VAUX High Err Threshold */
4192 -#define        SK_SEN_VAUX_3V3_HIGH_WARN       3476    /* Voltage VAUX High Warn Threshold */
4193 -#define        SK_SEN_VAUX_3V3_LOW_WARN        3146    /* Voltage VAUX Low Warn Threshold */
4194 -#define        SK_SEN_VAUX_3V3_LOW_ERR         2970    /* Voltage VAUX Low Err Threshold */
4195 -#define        SK_SEN_VAUX_0V_WARN_ERR            0    /* if VAUX not present */
4196 -#define        SK_SEN_VAUX_RANGE_LIMITER       1000    /* 1000 mV range delimiter */
4197 -
4198 -/*
4199 - * PHY 2V5 voltage
4200 - */
4201 -#define        SK_SEN_PHY_2V5_HIGH_ERR         2750    /* Voltage PHY High Err Threshold */
4202 -#define        SK_SEN_PHY_2V5_HIGH_WARN        2640    /* Voltage PHY High Warn Threshold */
4203 -#define        SK_SEN_PHY_2V5_LOW_WARN         2376    /* Voltage PHY Low Warn Threshold */
4204 -#define        SK_SEN_PHY_2V5_LOW_ERR          2222    /* Voltage PHY Low Err Threshold */
4205 -
4206 -/*
4207 - * ASIC Core 1V5 voltage (YUKON only)
4208 - */
4209 -#define        SK_SEN_CORE_1V5_HIGH_ERR        1650    /* Voltage ASIC Core High Err Threshold */
4210 -#define        SK_SEN_CORE_1V5_HIGH_WARN       1575    /* Voltage ASIC Core High Warn Threshold */
4211 -#define        SK_SEN_CORE_1V5_LOW_WARN        1425    /* Voltage ASIC Core Low Warn Threshold */
4212 -#define        SK_SEN_CORE_1V5_LOW_ERR         1350    /* Voltage ASIC Core Low Err Threshold */
4213 -
4214 -/*
4215 - * FAN 1 speed
4216 - */
4217 -/* assuming: 6500rpm +-15%, 4 pulses,
4218 - * warning at: 80 %
4219 - * error at:   70 %
4220 - * no upper limit
4221 - */
4222 -#define        SK_SEN_FAN_HIGH_ERR             20000   /* FAN Speed High Err Threshold */
4223 -#define        SK_SEN_FAN_HIGH_WARN    20000   /* FAN Speed High Warn Threshold */
4224 -#define        SK_SEN_FAN_LOW_WARN              5200   /* FAN Speed Low Warn Threshold */
4225 -#define        SK_SEN_FAN_LOW_ERR               4550   /* FAN Speed Low Err Threshold */
4226 -
4227 -/*
4228 - * Some Voltages need dynamic thresholds
4229 - */
4230 -#define        SK_SEN_DYN_INIT_NONE             0  /* No dynamic init of thresholds */
4231 -#define        SK_SEN_DYN_INIT_PCI_IO          10  /* Init PCI-IO with new thresholds */
4232 -#define        SK_SEN_DYN_INIT_VAUX            11  /* Init VAUX with new thresholds */
4233 -
4234 -extern int SkLm80ReadSensor(SK_AC *pAC, SK_IOC IoC, SK_SENSOR *pSen);
4235 -#endif /* n_INC_SKGEI2C_H */
4236 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/skgeinit.h linux-2.6.9.new/drivers/net/sk98lin/h/skgeinit.h
4237 --- linux-2.6.9.old/drivers/net/sk98lin/h/skgeinit.h    2004-10-19 05:54:40.000000000 +0800
4238 +++ linux-2.6.9.new/drivers/net/sk98lin/h/skgeinit.h    2006-12-07 14:35:03.000000000 +0800
4239 @@ -2,8 +2,8 @@
4240   *
4241   * Name:       skgeinit.h
4242   * Project:    Gigabit Ethernet Adapters, Common Modules
4243 - * Version:    $Revision: 1.83 $
4244 - * Date:       $Date: 2003/09/16 14:07:37 $
4245 + * Version:    $Revision: 2.37 $
4246 + * Date:       $Date: 2005/05/24 08:42:19 $
4247   * Purpose:    Structures and prototypes for the GE Init Module
4248   *
4249   ******************************************************************************/
4250 @@ -11,13 +11,12 @@
4251  /******************************************************************************
4252   *
4253   *     (C)Copyright 1998-2002 SysKonnect.
4254 - *     (C)Copyright 2002-2003 Marvell.
4255 + *     (C)Copyright 2002-2005 Marvell.
4256   *
4257   *     This program is free software; you can redistribute it and/or modify
4258   *     it under the terms of the GNU General Public License as published by
4259   *     the Free Software Foundation; either version 2 of the License, or
4260   *     (at your option) any later version.
4261 - *
4262   *     The information in this file is provided "AS IS" without warranty.
4263   *
4264   ******************************************************************************/
4265 @@ -60,14 +59,17 @@
4266  #define SK_XMIT_DUR            0x002faf08UL    /*  50 ms */
4267  #define SK_BLK_DUR             0x01dcd650UL    /* 500 ms */
4268
4269 -#define SK_DPOLL_DEF   0x00ee6b28UL    /* 250 ms at 62.5 MHz */
4270 +#define SK_DPOLL_DEF   0x00ee6b28UL    /* 250 ms at 62.5 MHz (Genesis) */
4271 +#define SK_DPOLL_DEF_Y2        0x0000124fUL    /*  75 us (Yukon-2) */
4272
4273  #define SK_DPOLL_MAX   0x00ffffffUL    /* 268 ms at 62.5 MHz */
4274 -                                                                               /* 215 ms at 78.12 MHz */
4275 +                                                                               /* 215 ms at 78.12 MHz (Yukon) */
4276
4277  #define SK_FACT_62             100                     /* is given in percent */
4278 -#define SK_FACT_53              85         /* on GENESIS:      53.12 MHz */
4279 +#define SK_FACT_53              85                     /* on GENESIS:  53.12 MHz */
4280  #define SK_FACT_78             125                     /* on YUKON:    78.12 MHz */
4281 +#define SK_FACT_100            161                     /* on YUKON-FE: 100 MHz */
4282 +#define SK_FACT_125            202                     /* on YUKON-EC: 125 MHz */
4283
4284  /* Timeout values */
4285  #define SK_MAC_TO_53   72                      /* MAC arbiter timeout */
4286 @@ -83,10 +85,16 @@
4287  #define SK_RB_LLPP_B   (16 * 1024)     /* Lower Level for big Queues */
4288
4289  #ifndef SK_BMU_RX_WM
4290 -#define SK_BMU_RX_WM   0x600           /* BMU Rx Watermark */
4291 +#define SK_BMU_RX_WM           0x600   /* BMU Rx Watermark */
4292  #endif
4293 +
4294  #ifndef SK_BMU_TX_WM
4295 -#define SK_BMU_TX_WM   0x600           /* BMU Tx Watermark */
4296 +#define SK_BMU_TX_WM           0x600   /* BMU Tx Watermark */
4297 +#endif
4298 +
4299 +/* performance sensitive drivers should set this define to 0x80 */
4300 +#ifndef SK_BMU_RX_WM_PEX
4301 +#define SK_BMU_RX_WM_PEX       0x600   /* BMU Rx Watermark for PEX */
4302  #endif
4303
4304  /* XMAC II Rx High Watermark */
4305 @@ -98,37 +106,31 @@
4306  #define SK_XM_THR_MULL 0x01fb          /* .. for multiple link usage */
4307  #define SK_XM_THR_JUMBO        0x03fc          /* .. for jumbo frame usage */
4308
4309 -/* values for GIPortUsage */
4310 +/* values for PortUsage */
4311  #define SK_RED_LINK            1               /* redundant link usage */
4312  #define SK_MUL_LINK            2               /* multiple link usage */
4313  #define SK_JUMBO_LINK  3               /* driver uses jumbo frames */
4314
4315  /* Minimum RAM Buffer Rx Queue Size */
4316 -#define SK_MIN_RXQ_SIZE        16              /* 16 kB */
4317 +#define SK_MIN_RXQ_SIZE        (((pAC)->GIni.GIYukon2) ? 10 : 16)              /* 10/16 kB */
4318
4319  /* Minimum RAM Buffer Tx Queue Size */
4320 -#define SK_MIN_TXQ_SIZE        16              /* 16 kB */
4321 +#define SK_MIN_TXQ_SIZE        (((pAC)->GIni.GIYukon2) ? 10 : 16)              /* 10/16 kB */
4322
4323 -/* Queue Size units */
4324 -#define QZ_UNITS               0x7
4325 +/* Queue Size units (Genesis/Yukon) */
4326 +#define QZ_UNITS               7
4327  #define QZ_STEP                        8
4328
4329 +/* Queue Size units (Yukon-2) */
4330 +#define QZ_STEP_Y2             1
4331 +
4332  /* Percentage of queue size from whole memory */
4333  /* 80 % for receive */
4334 -#define RAM_QUOTA_RX   80L
4335 -/* 0% for sync transfer */
4336 -#define        RAM_QUOTA_SYNC  0L
4337 +#define RAM_QUOTA_RX   80
4338 +/*  0 % for sync transfer */
4339 +#define RAM_QUOTA_SYNC 0
4340  /* the rest (20%) is taken for async transfer */
4341
4342 -/* Get the rounded queue size in Bytes in 8k steps */
4343 -#define ROUND_QUEUE_SIZE(SizeInBytes)                                  \
4344 -       ((((unsigned long) (SizeInBytes) + (QZ_STEP*1024L)-1) / 1024) & \
4345 -       ~(QZ_STEP-1))
4346 -
4347 -/* Get the rounded queue size in KBytes in 8k steps */
4348 -#define ROUND_QUEUE_SIZE_KB(Kilobytes) \
4349 -       ROUND_QUEUE_SIZE((Kilobytes) * 1024L)
4350 -
4351  /* Types of RAM Buffer Queues */
4352  #define SK_RX_SRAM_Q   1       /* small receive queue */
4353  #define SK_RX_BRAM_Q   2       /* big receive queue */
4354 @@ -167,11 +169,11 @@
4355
4356
4357  /* Link Speed Capabilities */
4358 -#define SK_LSPEED_CAP_AUTO                     (1<<0)  /* Automatic resolution */
4359 -#define SK_LSPEED_CAP_10MBPS           (1<<1)  /* 10 Mbps */
4360 -#define SK_LSPEED_CAP_100MBPS          (1<<2)  /* 100 Mbps */
4361 -#define SK_LSPEED_CAP_1000MBPS         (1<<3)  /* 1000 Mbps */
4362 -#define SK_LSPEED_CAP_INDETERMINATED (1<<4) /* indeterminated */
4363 +#define SK_LSPEED_CAP_AUTO                     BIT_0S  /* Automatic resolution */
4364 +#define SK_LSPEED_CAP_10MBPS           BIT_1S  /* 10 Mbps */
4365 +#define SK_LSPEED_CAP_100MBPS          BIT_2S  /* 100 Mbps */
4366 +#define SK_LSPEED_CAP_1000MBPS         BIT_3S  /* 1000 Mbps */
4367 +#define SK_LSPEED_CAP_INDETERMINATED BIT_4S /* indeterminated */
4368
4369  /* Link Speed Parameter */
4370  #define SK_LSPEED_AUTO                         1       /* Automatic resolution */
4371 @@ -189,11 +191,11 @@
4372
4373
4374  /* Link Capability Parameter */
4375 -#define SK_LMODE_CAP_HALF              (1<<0)  /* Half Duplex Mode */
4376 -#define SK_LMODE_CAP_FULL              (1<<1)  /* Full Duplex Mode */
4377 -#define SK_LMODE_CAP_AUTOHALF  (1<<2)  /* AutoHalf Duplex Mode */
4378 -#define SK_LMODE_CAP_AUTOFULL  (1<<3)  /* AutoFull Duplex Mode */
4379 -#define SK_LMODE_CAP_INDETERMINATED (1<<4) /* indeterminated */
4380 +#define SK_LMODE_CAP_HALF              BIT_0S  /* Half Duplex Mode */
4381 +#define SK_LMODE_CAP_FULL              BIT_1S  /* Full Duplex Mode */
4382 +#define SK_LMODE_CAP_AUTOHALF  BIT_2S  /* AutoHalf Duplex Mode */
4383 +#define SK_LMODE_CAP_AUTOFULL  BIT_3S  /* AutoFull Duplex Mode */
4384 +#define SK_LMODE_CAP_INDETERMINATED BIT_4S /* indeterminated */
4385
4386  /* Link Mode Current State */
4387  #define SK_LMODE_STAT_UNKNOWN  1       /* Unknown Duplex Mode */
4388 @@ -220,10 +222,10 @@
4389  #define SK_FLOW_STAT_INDETERMINATED 5  /* indeterminated */
4390
4391  /* Master/Slave Mode Capabilities */
4392 -#define SK_MS_CAP_AUTO         (1<<0)  /* Automatic resolution */
4393 -#define SK_MS_CAP_MASTER       (1<<1)  /* This station is master */
4394 -#define SK_MS_CAP_SLAVE                (1<<2)  /* This station is slave */
4395 -#define SK_MS_CAP_INDETERMINATED (1<<3)        /* indeterminated */
4396 +#define SK_MS_CAP_AUTO         BIT_0S  /* Automatic resolution */
4397 +#define SK_MS_CAP_MASTER       BIT_1S  /* This station is master */
4398 +#define SK_MS_CAP_SLAVE                BIT_2S  /* This station is slave */
4399 +#define SK_MS_CAP_INDETERMINATED BIT_3S        /* indeterminated */
4400
4401  /* Set Master/Slave Mode Parameter (and capabilities) */
4402  #define SK_MS_MODE_AUTO                1       /* Automatic resolution */
4403 @@ -238,25 +240,25 @@
4404  #define SK_MS_STAT_FAULT       4       /* M/S resolution failed */
4405  #define SK_MS_STAT_INDETERMINATED 5    /* indeterminated */
4406
4407 -/* parameter 'Mode' when calling SkXmSetRxCmd() */
4408 -#define SK_STRIP_FCS_ON                (1<<0)  /* Enable  FCS stripping of Rx frames */
4409 -#define SK_STRIP_FCS_OFF       (1<<1)  /* Disable FCS stripping of Rx frames */
4410 -#define SK_STRIP_PAD_ON                (1<<2)  /* Enable  pad byte stripping of Rx fr */
4411 -#define SK_STRIP_PAD_OFF       (1<<3)  /* Disable pad byte stripping of Rx fr */
4412 -#define SK_LENERR_OK_ON                (1<<4)  /* Don't chk fr for in range len error */
4413 -#define SK_LENERR_OK_OFF       (1<<5)  /* Check frames for in range len error */
4414 -#define SK_BIG_PK_OK_ON                (1<<6)  /* Don't set Rx Error bit for big frames */
4415 -#define SK_BIG_PK_OK_OFF       (1<<7)  /* Set Rx Error bit for big frames */
4416 -#define SK_SELF_RX_ON          (1<<8)  /* Enable  Rx of own packets */
4417 -#define SK_SELF_RX_OFF         (1<<9)  /* Disable Rx of own packets */
4418 +/* parameter 'Mode' when calling SkMacSetRxCmd() */
4419 +#define SK_STRIP_FCS_ON                BIT_0S  /* Enable  FCS stripping of Rx frames */
4420 +#define SK_STRIP_FCS_OFF       BIT_1S  /* Disable FCS stripping of Rx frames */
4421 +#define SK_STRIP_PAD_ON                BIT_2S  /* Enable  pad byte stripping of Rx fr */
4422 +#define SK_STRIP_PAD_OFF       BIT_3S  /* Disable pad byte stripping of Rx fr */
4423 +#define SK_LENERR_OK_ON                BIT_4S  /* Don't chk fr for in range len error */
4424 +#define SK_LENERR_OK_OFF       BIT_5S  /* Check frames for in range len error */
4425 +#define SK_BIG_PK_OK_ON                BIT_6S  /* Don't set Rx Error bit for big frames */
4426 +#define SK_BIG_PK_OK_OFF       BIT_7S  /* Set Rx Error bit for big frames */
4427 +#define SK_SELF_RX_ON          BIT_8S  /* Enable  Rx of own packets */
4428 +#define SK_SELF_RX_OFF         BIT_9S  /* Disable Rx of own packets */
4429
4430  /* parameter 'Para' when calling SkMacSetRxTxEn() */
4431 -#define SK_MAC_LOOPB_ON                (1<<0)  /* Enable  MAC Loopback Mode */
4432 -#define SK_MAC_LOOPB_OFF       (1<<1)  /* Disable MAC Loopback Mode */
4433 -#define SK_PHY_LOOPB_ON                (1<<2)  /* Enable  PHY Loopback Mode */
4434 -#define SK_PHY_LOOPB_OFF       (1<<3)  /* Disable PHY Loopback Mode */
4435 -#define SK_PHY_FULLD_ON                (1<<4)  /* Enable  GMII Full Duplex */
4436 -#define SK_PHY_FULLD_OFF       (1<<5)  /* Disable GMII Full Duplex */
4437 +#define SK_MAC_LOOPB_ON                BIT_0S  /* Enable  MAC Loopback Mode */
4438 +#define SK_MAC_LOOPB_OFF       BIT_1S  /* Disable MAC Loopback Mode */
4439 +#define SK_PHY_LOOPB_ON                BIT_2S  /* Enable  PHY Loopback Mode */
4440 +#define SK_PHY_LOOPB_OFF       BIT_3S  /* Disable PHY Loopback Mode */
4441 +#define SK_PHY_FULLD_ON                BIT_4S  /* Enable  GMII Full Duplex */
4442 +#define SK_PHY_FULLD_OFF       BIT_5S  /* Disable GMII Full Duplex */
4443
4444  /* States of PState */
4445  #define SK_PRT_RESET   0       /* the port is reset */
4446 @@ -266,18 +268,24 @@
4447
4448  /* PHY power down modes */
4449  #define PHY_PM_OPERATIONAL_MODE                0       /* PHY operational mode */
4450 -#define PHY_PM_DEEP_SLEEP                      1       /* coma mode --> minimal power */
4451 +#define PHY_PM_DEEP_SLEEP                      1       /* Coma mode --> minimal power */
4452  #define PHY_PM_IEEE_POWER_DOWN         2       /* IEEE 22.2.4.1.5 compl. power down */
4453 -#define PHY_PM_ENERGY_DETECT           3       /* energy detect */
4454 -#define PHY_PM_ENERGY_DETECT_PLUS      4       /* energy detect plus */
4455 +#define PHY_PM_ENERGY_DETECT           3       /* Energy detect */
4456 +#define PHY_PM_ENERGY_DETECT_PLUS      4       /* Energy detect plus */
4457 +
4458 +/* PCI Bus Types */
4459 +#define SK_PCI_BUS             BIT_0S          /* normal PCI bus */
4460 +#define SK_PCIX_BUS            BIT_1S          /* PCI-X bus */
4461 +#define SK_PEX_BUS             BIT_2S          /* PCI-Express bus */
4462
4463  /* Default receive frame limit for Workaround of XMAC Errata */
4464  #define SK_DEF_RX_WA_LIM       SK_CONSTU64(100)
4465
4466  /* values for GILedBlinkCtrl (LED Blink Control) */
4467 -#define SK_ACT_LED_BLINK       (1<<0)  /* Active LED blinking */
4468 -#define SK_DUP_LED_NORMAL      (1<<1)  /* Duplex LED normal */
4469 -#define SK_LED_LINK100_ON      (1<<2)  /* Link 100M LED on */
4470 +#define SK_ACT_LED_BLINK       BIT_0S  /* Active LED blinking */
4471 +#define SK_DUP_LED_NORMAL      BIT_1S  /* Duplex LED normal */
4472 +#define SK_LED_LINK100_ON      BIT_2S  /* Link 100M LED on */
4473 +#define SK_DUAL_LED_ACT_LNK    BIT_3S  /* Dual LED ACT/LNK configuration */
4474
4475  /* Link Partner Status */
4476  #define SK_LIPA_UNKNOWN        0       /* Link partner is in unknown state */
4477 @@ -290,18 +298,165 @@
4478  /* Max. Auto-neg. timeouts before link detection in sense mode is reset */
4479  #define SK_MAX_ANEG_TO 10      /* Max. 10 times the sense mode is reset */
4480
4481 +
4482 +/******************************************************************************
4483 + *
4484 + * HW_FEATURE() macro
4485 + */
4486 +
4487 +/* DWORD 0: Features */
4488 +#define HWF_RED_CORE_CLK_SUP   0x01000000UL    /* Reduced Core Clock supp. */
4489 +#define HWF_SYNC_TX_SUP                        0x00800000UL    /* synch Tx queue available */
4490 +#define HWF_SINGLE_PORT_DEVICE 0x00400000UL    /* device has only one LAN IF */
4491 +#define HWF_JUMBO_FRAMES_SUP   0x00200000UL    /* Jumbo frames supported */
4492 +#define HWF_TX_TCP_CSUM_SUP            0x00100000UL    /* TCP Tx checksum supported */
4493 +#define HWF_TX_UDP_CSUM_SUP            0x00080000UL    /* UDP Tx checksum supported */
4494 +#define HWF_RX_CSUM_SUP                        0x00040000UL    /* RX checksum supported */
4495 +#define HWF_TCP_SEGM_SUP               0x00020000UL    /* TCP segmentation supported */
4496 +#define HWF_RSS_HASH_SUP               0x00010000UL    /* RSS Hash supported */
4497 +#define HWF_PORT_VLAN_SUP              0x00008000UL    /* VLAN can be config per port*/
4498 +#define HWF_ROLE_PARAM_SUP             0x00004000UL    /* Role parameter supported */
4499 +#define HWF_LOW_PMODE_SUP              0x00002000UL    /* Low Power Mode supported */
4500 +#define HWF_ENERGIE_DEMO_SUP   0x00001000UL    /* Energie detect mode supp. */
4501 +#define HWF_SPEED1000_SUP              0x00000800UL    /* Line Speed 1000 supported */
4502 +#define HWF_SPEED100_SUP               0x00000400UL    /* Line Speed 100 supported */
4503 +#define HWF_SPEED10_SUP                        0x00000200UL    /* Line Speed 10 supported */
4504 +#define HWF_AUTONEGSENSE_SUP   0x00000100UL    /* Autoneg Sense supported */
4505 +#define HWF_PHY_LOOPB_MD_SUP   0x00000080UL    /* PHY loopback mode supp. */
4506 +#define HWF_ASF_SUP                            0x00000040UL    /* ASF support possible */
4507 +#define HWF_QS_STEPS_1KB               0x00000020UL    /* The Rx/Tx queues can be */
4508 +                                                                                               /* configured with 1 kB res. */
4509 +#define HWF_OWN_RAM_PER_PORT   0x00000010UL    /* Each port has a separate */
4510 +                                                                                               /* RAM buffer */
4511 +#define HWF_MIN_LED_IF                 0x00000008UL    /* Minimal LED interface */
4512 +                                                                                               /* (e.g. for Yukon-EC) */
4513 +#define HWF_LIST_ELEMENTS_USED 0x00000004UL    /* HW uses list elements */
4514 +                                                                                               /* (otherwise desc. are used) */
4515 +#define HWF_GMAC_INSIDE                        0x00000002UL    /* device contains GMAC */
4516 +#define HWF_TWSI_PRESENT               0x00000001UL    /* TWSI sensor bus present */
4517 +
4518 +/*-RMV- DWORD 1: Deviations */
4519 +#define HWF_WA_DEV_4115                        0x10010000UL    /*-RMV- 4.115 (Rx MAC FIFO) */
4520 +#define HWF_WA_DEV_4109                        0x10008000UL    /*-RMV- 4.109 (BIU hang) */
4521 +#define HWF_WA_DEV_483                 0x10004000UL    /*-RMV- 4.83 (Rx TCP wrong) */
4522 +#define HWF_WA_DEV_479                 0x10002000UL    /*-RMV- 4.79 (Rx BMU hang II) */
4523 +#define HWF_WA_DEV_472                 0x10001000UL    /*-RMV- 4.72 (GPHY2 MDC clk) */
4524 +#define HWF_WA_DEV_463                 0x10000800UL    /*-RMV- 4.63 (Rx BMU hang I) */
4525 +#define HWF_WA_DEV_427                 0x10000400UL    /*-RMV- 4.27 (Tx Done Rep) */
4526 +#define HWF_WA_DEV_42                  0x10000200UL    /*-RMV- 4.2 (pref unit burst) */
4527 +#define HWF_WA_DEV_46                  0x10000100UL    /*-RMV- 4.6 (CPU crash II) */
4528 +#define HWF_WA_DEV_43_418              0x10000080UL    /*-RMV- 4.3 & 4.18 (PCI unexp */
4529 +                                                                                               /*-RMV- compl&Stat BMU deadl) */
4530 +#define HWF_WA_DEV_420                 0x10000040UL    /*-RMV- 4.20 (Status BMU ov) */
4531 +#define HWF_WA_DEV_423                 0x10000020UL    /*-RMV- 4.23 (TCP Segm Hang) */
4532 +#define HWF_WA_DEV_424                 0x10000010UL    /*-RMV- 4.24 (MAC reg overwr) */
4533 +#define HWF_WA_DEV_425                 0x10000008UL    /*-RMV- 4.25 (Magic packet */
4534 +                                                                                               /*-RMV- with odd offset) */
4535 +#define HWF_WA_DEV_428                 0x10000004UL    /*-RMV- 4.28 (Poll-U &BigEndi)*/
4536 +#define HWF_WA_FIFO_FLUSH_YLA0 0x10000002UL    /*-RMV- dis Rx GMAC FIFO Flush*/
4537 +                                                                                               /*-RMV- for Yu-L Rev. A0 only */
4538 +#define HWF_WA_COMA_MODE               0x10000001UL    /*-RMV- Coma Mode WA req */
4539 +
4540 +/* DWORD 2: still unused */
4541 +/* DWORD 3: still unused */
4542 +
4543 +
4544 +/*
4545 + * HW_FEATURE()        -       returns whether the feature is serviced or not
4546 + */
4547 +#define HW_FEATURE(pAC, ReqFeature) \
4548 +       (((pAC)->GIni.HwF.Features[((ReqFeature) & 0x30000000UL) >> 28] &\
4549 +        ((ReqFeature) & 0x0fffffffUL)) != 0)
4550 +
4551 +#define HW_FEAT_LIST   0
4552 +#define HW_DEV_LIST            1
4553 +
4554 +#define SET_HW_FEATURE_MASK(pAC, List, OffMaskValue, OnMaskValue) {    \
4555 +       if ((List) == HW_FEAT_LIST || (List) == HW_DEV_LIST) {                  \
4556 +               (pAC)->GIni.HwF.OffMask[List] = (OffMaskValue);                         \
4557 +               (pAC)->GIni.HwF.OnMask[List] = (OnMaskValue);                           \
4558 +       }                                                                                                                               \
4559 +}
4560 +
4561 +/* driver access macros for GIni structure ***********************************/
4562 +
4563 +#define CHIP_ID_YUKON_2(pAC)           ((pAC)->GIni.GIYukon2)
4564 +#define HW_SYNC_TX_SUPPORTED(pAC)                                              \
4565 +               ((pAC)->GIni.GIChipId != CHIP_ID_YUKON_EC &&    \
4566 +                (pAC)->GIni.GIChipId != CHIP_ID_YUKON_FE)
4567 +
4568 +#define HW_MS_TO_TICKS(pAC, MsTime) \
4569 +       ((MsTime) * (62500L/100) * (pAC)->GIni.GIHstClkFact)
4570 +
4571 +#ifdef XXX
4572 +/* still under construction */
4573 +#define HW_IS_SINGLE_PORT(pAC)         ((pAC)->GIni.GIMacsFound == 1)
4574 +#define HW_NUMBER_OF_PORTS(pAC)                ((pAC)->GIni.GIMacsFound)
4575 +
4576 +#define HW_TX_UDP_CSUM_SUPPORTED(pAC) \
4577 +       ((((pAC)->GIni.GIChipId >= CHIP_ID_YUKON) && ((pAC)->GIni.GIChipRev != 0))
4578 +
4579 +#define HW_DEFAULT_LINESPEED(pAC)      \
4580 +       ((!(pAC)->GIni.GIGenesis && (pAC)->GIni.GICopperType) ? \
4581 +       SK_LSPEED_AUTO : SK_LSPEED_1000MBPS)
4582 +
4583 +#define HW_ROLE_PARAM_SUPPORTED(pAC)   ((pAC)->GIni.GICopperType)
4584 +
4585 +#define HW_SPEED1000_SUPPORTED(pAC, Port)              \
4586 +        ((pAC)->GIni.GP[Port].PLinkSpeedCap & SK_LSPEED_CAP_1000MBPS)
4587 +
4588 +#define HW_SPEED100_SUPPORTED(pAC, Port)               \
4589 +        ((pAC)->GIni.GP[Port].PLinkSpeedCap & SK_LSPEED_CAP_100MBPS)
4590 +
4591 +#define HW_SPEED10_SUPPORTED(pAC, Port)                \
4592 +        ((pAC)->GIni.GP[Port].PLinkSpeedCap & SK_LSPEED_CAP_10MBPS)
4593 +
4594 +#define HW_AUTONEGSENSE_SUPPORTED(pAC) ((pAC)->GIni.GP[0].PhyType==SK_PHY_XMAC)
4595 +
4596 +#define HW_FREQ_TO_CARD_TICKS(pAC, AdapterClkSpeed, Freq) \
4597 +       (((AdapterClkSpeed / 100) * (pAC)->GIni.GIHstClkFact) / Freq)
4598 +
4599 +#define HW_IS_LINK_UP(pAC, Port)               ((pAC)->GIni.GP[Port].PHWLinkUp)
4600 +#define HW_LINK_SPEED_USED(pAC, Port)  ((pAC)->GIni.GP[Port].PLinkSpeedUsed)
4601 +#define HW_RAM_SIZE(pAC)                               ((pAC)->GIni.GIRamSize)
4602 +
4603 +#define HW_PHY_LP_MODE_SUPPORTED(pAC)  (pAC0->???
4604 +#define HW_ASF_ACTIVE(pAC)                             ???
4605 +#define RAWIO_OUT32(pAC, pAC->RegIrqMask, pAC->GIni.GIValIrqMask)...
4606 +
4607 +/* macro to check whether Tx checksum is supported */
4608 +#define HW_TX_CSUM_SUPPORTED(pAC)      ((pAC)->GIni.GIChipId != CHIP_ID_GENESIS)
4609 +
4610 +BMU_UDP_CHECK : BMU_TCP_CHECK;
4611 +
4612 +/* macro for - Own Bit mirrored to DWORD7 (Yukon LP receive descriptor) */
4613 +#endif /* 0 */
4614 +
4615 +
4616  /* structures *****************************************************************/
4617
4618  /*
4619 + * HW Feature structure
4620 + */
4621 +typedef struct s_HwFeatures {
4622 +       SK_U32  Features[4];    /* Feature list */
4623 +       SK_U32  OffMask[4];             /* Off Mask */
4624 +       SK_U32  OnMask[4];              /* On Mask */
4625 +} SK_HW_FEATURES;
4626 +
4627 +/*
4628   * MAC specific functions
4629   */
4630  typedef struct s_GeMacFunc {
4631 -       int  (*pFnMacUpdateStats)(SK_AC *pAC, SK_IOC IoC, unsigned int Port);
4632 -       int  (*pFnMacStatistic)(SK_AC *pAC, SK_IOC IoC, unsigned int Port,
4633 -                                                       SK_U16 StatAddr, SK_U32 SK_FAR *pVal);
4634 -       int  (*pFnMacResetCounter)(SK_AC *pAC, SK_IOC IoC, unsigned int Port);
4635 -       int  (*pFnMacOverflow)(SK_AC *pAC, SK_IOC IoC, unsigned int Port,
4636 -                                                  SK_U16 IStatus, SK_U64 SK_FAR *pVal);
4637 +       int     (*pFnMacUpdateStats)(SK_AC *, SK_IOC, unsigned int);
4638 +       int     (*pFnMacStatistic)(SK_AC *, SK_IOC, unsigned int, SK_U16, SK_U32 SK_FAR *);
4639 +       int     (*pFnMacResetCounter)(SK_AC *, SK_IOC, unsigned int);
4640 +       int     (*pFnMacOverflow)(SK_AC *, SK_IOC, unsigned int, SK_U16, SK_U64 SK_FAR *);
4641 +       void (*pSkGeSirqIsr)(SK_AC *, SK_IOC, SK_U32);
4642 +#ifdef SK_DIAG
4643 +       int     (*pFnMacPhyRead)(SK_AC *, SK_IOC, int, int, SK_U16 SK_FAR *);
4644 +       int     (*pFnMacPhyWrite)(SK_AC *, SK_IOC, int, int, SK_U16);
4645 +#endif /* SK_DIAG */
4646  } SK_GEMACFUNC;
4647
4648  /*
4649 @@ -311,7 +466,7 @@
4650  #ifndef SK_DIAG
4651         SK_TIMER        PWaTimer;       /* Workaround Timer */
4652         SK_TIMER        HalfDupChkTimer;
4653 -#endif /* SK_DIAG */
4654 +#endif /* !SK_DIAG */
4655         SK_U32  PPrevShorts;    /* Previous Short Counter checking */
4656         SK_U32  PPrevFcs;               /* Previous FCS Error Counter checking */
4657         SK_U64  PPrevRx;                /* Previous RxOk Counter checking */
4658 @@ -335,6 +490,7 @@
4659         int             PXaQOff;                /* Asynchronous Tx Queue Address Offset */
4660         int             PhyType;                /* PHY used on this port */
4661         int             PState;                 /* Port status (reset, stop, init, run) */
4662 +       int             PPortUsage;             /* Driver Port Usage */
4663         SK_U16  PhyId1;                 /* PHY Id1 on this port */
4664         SK_U16  PhyAddr;                /* MDIO/MDC PHY address */
4665         SK_U16  PIsave;                 /* Saved Interrupt status word */
4666 @@ -367,6 +523,8 @@
4667         int             PMacJamLen;             /* MAC Jam length */
4668         int             PMacJamIpgVal;  /* MAC Jam IPG */
4669         int             PMacJamIpgData; /* MAC IPG Jam to Data */
4670 +       int             PMacBackOffLim; /* MAC Back-off Limit */
4671 +       int             PMacDataBlind;  /* MAC Data Blinder */
4672         int             PMacIpgData;    /* MAC Data IPG */
4673         SK_BOOL PMacLimit4;             /* reset collision counter and backoff algorithm */
4674  } SK_GEPORT;
4675 @@ -379,27 +537,37 @@
4676         int                     GIChipId;               /* Chip Identification Number */
4677         int                     GIChipRev;              /* Chip Revision Number */
4678         SK_U8           GIPciHwRev;             /* PCI HW Revision Number */
4679 +       SK_U8           GIPciBus;               /* PCI Bus Type (PCI / PCI-X / PCI-Express) */
4680 +       SK_U8           GIPciMode;              /* PCI / PCI-X Mode @ Clock */
4681 +       SK_U8           GIPexWidth;             /* PCI-Express Negotiated Link Width */
4682         SK_BOOL         GIGenesis;              /* Genesis adapter ? */
4683 -       SK_BOOL         GIYukon;                /* YUKON-A1/Bx chip */
4684 +       SK_BOOL         GIYukon;                /* YUKON family (1 and 2) */
4685         SK_BOOL         GIYukonLite;    /* YUKON-Lite chip */
4686 +       SK_BOOL         GIYukon2;               /* YUKON-2 chip (-XL, -EC or -FE) */
4687 +       SK_U8           GIConTyp;               /* Connector Type */
4688 +       SK_U8           GIPmdTyp;               /* PMD Type */
4689         SK_BOOL         GICopperType;   /* Copper Type adapter ? */
4690         SK_BOOL         GIPciSlot64;    /* 64-bit PCI Slot */
4691         SK_BOOL         GIPciClock66;   /* 66 MHz PCI Clock */
4692         SK_BOOL         GIVauxAvail;    /* VAUX available (YUKON) */
4693         SK_BOOL         GIYukon32Bit;   /* 32-Bit YUKON adapter */
4694 +       SK_BOOL         GIAsfEnabled;   /* ASF subsystem enabled */
4695 +       SK_BOOL         GIAsfRunning;   /* ASF subsystem running */
4696         SK_U16          GILedBlinkCtrl; /* LED Blink Control */
4697         int                     GIMacsFound;    /* Number of MACs found on this adapter */
4698         int                     GIMacType;              /* MAC Type used on this adapter */
4699 -       int                     GIHstClkFact;   /* Host Clock Factor (62.5 / HstClk * 100) */
4700 -       int                     GIPortUsage;    /* Driver Port Usage */
4701 +       int                     GIChipCap;              /* Adapter's Capabilities */
4702 +       int                     GIHstClkFact;   /* Host Clock Factor (HstClk / 62.5 * 100) */
4703         int                     GILevel;                /* Initialization Level completed */
4704         int                     GIRamSize;              /* The RAM size of the adapter in kB */
4705         int                     GIWolOffs;              /* WOL Register Offset (HW-Bug in Rev. A) */
4706         SK_U32          GIRamOffs;              /* RAM Address Offset for addr calculation */
4707         SK_U32          GIPollTimerVal; /* Descr. Poll Timer Init Val (HstClk ticks) */
4708         SK_U32          GIValIrqMask;   /* Value for Interrupt Mask */
4709 +       SK_U32          GIValHwIrqMask; /* Value for Interrupt Mask */
4710         SK_U32          GITimeStampCnt; /* Time Stamp High Counter (YUKON only) */
4711         SK_GEPORT       GP[SK_MAX_MACS];/* Port Dependent Information */
4712 +       SK_HW_FEATURES HwF;                     /* HW Features struct */
4713         SK_GEMACFUNC GIFunc;            /* MAC depedent functions */
4714  } SK_GEINIT;
4715
4716 @@ -417,7 +585,7 @@
4717  #define SKERR_HWI_E005         (SKERR_HWI_E004+1)
4718  #define SKERR_HWI_E005MSG      "SkGeInitPort(): cannot init running ports"
4719  #define SKERR_HWI_E006         (SKERR_HWI_E005+1)
4720 -#define SKERR_HWI_E006MSG      "SkGeMacInit(): PState does not match HW state"
4721 +#define SKERR_HWI_E006MSG      "unused"
4722  #define SKERR_HWI_E007         (SKERR_HWI_E006+1)
4723  #define SKERR_HWI_E007MSG      "SkXmInitDupMd() called with invalid Dup Mode"
4724  #define SKERR_HWI_E008         (SKERR_HWI_E007+1)
4725 @@ -433,11 +601,11 @@
4726  #define SKERR_HWI_E013         (SKERR_HWI_E012+1)
4727  #define SKERR_HWI_E013MSG      "SkGeInitPort(): cfg changed for running queue"
4728  #define SKERR_HWI_E014         (SKERR_HWI_E013+1)
4729 -#define SKERR_HWI_E014MSG      "SkGeInitPort(): unknown GIPortUsage specified"
4730 +#define SKERR_HWI_E014MSG      "SkGeInitPort(): unknown PortUsage specified"
4731  #define SKERR_HWI_E015         (SKERR_HWI_E014+1)
4732 -#define SKERR_HWI_E015MSG      "Illegal Link mode parameter"
4733 +#define SKERR_HWI_E015MSG      "Illegal Link Mode parameter"
4734  #define SKERR_HWI_E016         (SKERR_HWI_E015+1)
4735 -#define SKERR_HWI_E016MSG      "Illegal Flow control mode parameter"
4736 +#define SKERR_HWI_E016MSG      "Illegal Flow Control Mode parameter"
4737  #define SKERR_HWI_E017         (SKERR_HWI_E016+1)
4738  #define SKERR_HWI_E017MSG      "Illegal value specified for GIPollTimerVal"
4739  #define SKERR_HWI_E018         (SKERR_HWI_E017+1)
4740 @@ -447,9 +615,9 @@
4741  #define SKERR_HWI_E020         (SKERR_HWI_E019+1)
4742  #define SKERR_HWI_E020MSG      "Illegal Master/Slave parameter"
4743  #define SKERR_HWI_E021         (SKERR_HWI_E020+1)
4744 -#define        SKERR_HWI_E021MSG       "MacUpdateStats(): cannot update statistic counter"
4745 -#define        SKERR_HWI_E022          (SKERR_HWI_E021+1)
4746 -#define        SKERR_HWI_E022MSG       "MacStatistic(): illegal statistic base address"
4747 +#define SKERR_HWI_E021MSG      "MacUpdateStats(): cannot update statistic counter"
4748 +#define SKERR_HWI_E022         (SKERR_HWI_E021+1)
4749 +#define SKERR_HWI_E022MSG      "MacStatistic(): illegal statistic base address"
4750  #define SKERR_HWI_E023         (SKERR_HWI_E022+1)
4751  #define SKERR_HWI_E023MSG      "SkGeInitPort(): Transmit Queue Size too small"
4752  #define SKERR_HWI_E024         (SKERR_HWI_E023+1)
4753 @@ -464,6 +632,24 @@
4754  /*
4755   * public functions in skgeinit.c
4756   */
4757 +extern void SkGePortVlan(
4758 +       SK_AC   *pAC,
4759 +       SK_IOC  IoC,
4760 +       int             Port,
4761 +       SK_BOOL Enable);
4762 +
4763 +extern void SkGeRxRss(
4764 +       SK_AC   *pAC,
4765 +       SK_IOC  IoC,
4766 +       int             Port,
4767 +       SK_BOOL Enable);
4768 +
4769 +extern void SkGeRxCsum(
4770 +       SK_AC   *pAC,
4771 +       SK_IOC  IoC,
4772 +       int             Port,
4773 +       SK_BOOL Enable);
4774 +
4775  extern void    SkGePollRxD(
4776         SK_AC   *pAC,
4777         SK_IOC  IoC,
4778 @@ -601,13 +787,13 @@
4779         int             Port,
4780         SK_U16  IStatus);
4781
4782 -extern void  SkMacSetRxTxEn(
4783 +extern void    SkMacSetRxTxEn(
4784         SK_AC   *pAC,
4785         SK_IOC  IoC,
4786         int             Port,
4787         int             Para);
4788
4789 -extern int  SkMacRxTxEnable(
4790 +extern int     SkMacRxTxEnable(
4791         SK_AC   *pAC,
4792         SK_IOC  IoC,
4793         int             Port);
4794 @@ -624,28 +810,28 @@
4795         int             Port,
4796         SK_BOOL Enable);
4797
4798 -extern void    SkXmPhyRead(
4799 +extern int     SkXmPhyRead(
4800         SK_AC   *pAC,
4801         SK_IOC  IoC,
4802         int             Port,
4803         int             Addr,
4804         SK_U16  SK_FAR *pVal);
4805
4806 -extern void    SkXmPhyWrite(
4807 +extern int     SkXmPhyWrite(
4808         SK_AC   *pAC,
4809         SK_IOC  IoC,
4810         int             Port,
4811         int             Addr,
4812         SK_U16  Val);
4813
4814 -extern void    SkGmPhyRead(
4815 +extern int     SkGmPhyRead(
4816         SK_AC   *pAC,
4817         SK_IOC  IoC,
4818         int             Port,
4819         int             Addr,
4820         SK_U16  SK_FAR *pVal);
4821
4822 -extern void    SkGmPhyWrite(
4823 +extern int     SkGmPhyWrite(
4824         SK_AC   *pAC,
4825         SK_IOC  IoC,
4826         int             Port,
4827 @@ -713,7 +899,7 @@
4828         SK_AC   *pAC,
4829         SK_IOC  IoC,
4830         unsigned int Port,
4831 -       SK_U16  IStatus,
4832 +       SK_U16  IStatus,
4833         SK_U64  SK_FAR *pStatus);
4834
4835  extern int SkGmOverflowStatus(
4836 @@ -729,6 +915,7 @@
4837         int             Port,
4838         SK_BOOL StartTest);
4839
4840 +#ifdef SK_PHY_LP_MODE
4841  extern int SkGmEnterLowPowerMode(
4842         SK_AC   *pAC,
4843         SK_IOC  IoC,
4844 @@ -739,6 +926,7 @@
4845         SK_AC   *pAC,
4846         SK_IOC  IoC,
4847         int             Port);
4848 +#endif /* SK_PHY_LP_MODE */
4849
4850  #ifdef SK_DIAG
4851  extern void    SkGePhyRead(
4852 @@ -794,6 +982,9 @@
4853  extern void    SkGeXmitLED();
4854  extern void    SkGeInitRamIface();
4855  extern int     SkGeInitAssignRamToQueues();
4856 +extern void SkGePortVlan();
4857 +extern void SkGeRxCsum();
4858 +extern void SkGeRxRss();
4859
4860  /*
4861   * public functions in skxmac2.c
4862 @@ -803,7 +994,7 @@
4863  extern void    SkMacHardRst();
4864  extern void    SkMacClearRst();
4865  extern void SkMacInitPhy();
4866 -extern int  SkMacRxTxEnable();
4867 +extern int     SkMacRxTxEnable();
4868  extern void SkMacPromiscMode();
4869  extern void SkMacHashing();
4870  extern void SkMacIrqDisable();
4871 @@ -814,11 +1005,11 @@
4872  extern void    SkMacAutoNegLipaPhy();
4873  extern void SkMacSetRxTxEn();
4874  extern void    SkXmInitMac();
4875 -extern void    SkXmPhyRead();
4876 -extern void    SkXmPhyWrite();
4877 +extern int     SkXmPhyRead();
4878 +extern int     SkXmPhyWrite();
4879  extern void    SkGmInitMac();
4880 -extern void    SkGmPhyRead();
4881 -extern void    SkGmPhyWrite();
4882 +extern int     SkGmPhyRead();
4883 +extern int     SkGmPhyWrite();
4884  extern void    SkXmClrExactAddr();
4885  extern void    SkXmInitDupMd();
4886  extern void    SkXmInitPauseMd();
4887 @@ -832,8 +1023,10 @@
4888  extern int     SkXmOverflowStatus();
4889  extern int     SkGmOverflowStatus();
4890  extern int     SkGmCableDiagStatus();
4891 +#ifdef SK_PHY_LP_MODE
4892  extern int     SkGmEnterLowPowerMode();
4893  extern int     SkGmLeaveLowPowerMode();
4894 +#endif /* SK_PHY_LP_MODE */
4895
4896  #ifdef SK_DIAG
4897  extern void    SkGePhyRead();
4898 @@ -844,10 +1037,11 @@
4899  extern void    SkXmSendCont();
4900  #endif /* SK_DIAG */
4901
4902 -#endif /* SK_KR_PROTO */
4903 +#endif /* SK_KR_PROTO */
4904
4905  #ifdef __cplusplus
4906  }
4907  #endif /* __cplusplus */
4908
4909  #endif /* __INC_SKGEINIT_H_ */
4910 +
4911 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/skgepnm2.h linux-2.6.9.new/drivers/net/sk98lin/h/skgepnm2.h
4912 --- linux-2.6.9.old/drivers/net/sk98lin/h/skgepnm2.h    2004-10-19 05:54:38.000000000 +0800
4913 +++ linux-2.6.9.new/drivers/net/sk98lin/h/skgepnm2.h    2006-12-07 14:35:03.000000000 +0800
4914 @@ -2,8 +2,8 @@
4915   *
4916   * Name:       skgepnm2.h
4917   * Project:    GEnesis, PCI Gigabit Ethernet Adapter
4918 - * Version:    $Revision: 1.36 $
4919 - * Date:       $Date: 2003/05/23 12:45:13 $
4920 + * Version:    $Revision: 2.4 $
4921 + * Date:       $Date: 2005/05/03 06:42:43 $
4922   * Purpose:    Defines for Private Network Management Interface
4923   *
4924   ****************************************************************************/
4925 @@ -28,8 +28,13 @@
4926  /*
4927   * General definitions
4928   */
4929 -#define SK_PNMI_CHIPSET_XMAC   1       /* XMAC11800FP */
4930 -#define SK_PNMI_CHIPSET_YUKON  2       /* YUKON */
4931 +#define SK_PNMI_CHIPSET_XMAC           1       /* XMAC11800FP */
4932 +#define SK_PNMI_CHIPSET_YUKON          2       /* YUKON */
4933 +#define SK_PNMI_CHIPSET_YUKON_LITE     3       /* YUKON-Lite (Rev. A1-A3) */
4934 +#define SK_PNMI_CHIPSET_YUKON_LP       4       /* YUKON-LP */
4935 +#define SK_PNMI_CHIPSET_YUKON_XL       5       /* YUKON-2 XL */
4936 +#define SK_PNMI_CHIPSET_YUKON_EC       6       /* YUKON-2 EC */
4937 +#define SK_PNMI_CHIPSET_YUKON_FE       7       /* YUKON-2 FE */
4938
4939  #define        SK_PNMI_BUS_PCI         1       /* PCI bus*/
4940
4941 @@ -70,9 +75,9 @@
4942  /*
4943   * VCT internal status values
4944   */
4945 -#define SK_PNMI_VCT_PENDING    32
4946 -#define SK_PNMI_VCT_TEST_DONE  64
4947 -#define SK_PNMI_VCT_LINK       128
4948 +#define SK_PNMI_VCT_PENDING            0x20
4949 +#define SK_PNMI_VCT_TEST_DONE  0x40
4950 +#define SK_PNMI_VCT_LINK               0x80
4951
4952  /*
4953   * Internal table definitions
4954 @@ -323,7 +328,7 @@
4955                                                 vSt, \
4956                                                 pAC->Pnmi.MacUpdatedFlag, \
4957                                                 pAC->Pnmi.RlmtUpdatedFlag, \
4958 -                                               pAC->Pnmi.SirqUpdatedFlag))}}
4959 +                                               pAC->Pnmi.SirqUpdatedFlag));}}
4960
4961  #else  /* !DEBUG */
4962
4963 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/skgepnmi.h linux-2.6.9.new/drivers/net/sk98lin/h/skgepnmi.h
4964 --- linux-2.6.9.old/drivers/net/sk98lin/h/skgepnmi.h    2004-10-19 05:53:13.000000000 +0800
4965 +++ linux-2.6.9.new/drivers/net/sk98lin/h/skgepnmi.h    2006-12-07 14:35:03.000000000 +0800
4966 @@ -1,9 +1,9 @@
4967  /*****************************************************************************
4968   *
4969   * Name:       skgepnmi.h
4970 - * Project:    GEnesis, PCI Gigabit Ethernet Adapter
4971 - * Version:    $Revision: 1.62 $
4972 - * Date:       $Date: 2003/08/15 12:31:52 $
4973 + * Project:    Gigabit Ethernet Adapters, PNMI-Module
4974 + * Version:    $Revision: 2.9 $
4975 + * Date:       $Date: 2004/10/26 12:42:39 $
4976   * Purpose:    Defines for Private Network Management Interface
4977   *
4978   ****************************************************************************/
4979 @@ -31,7 +31,7 @@
4980  #include "h/sktypes.h"
4981  #include "h/skerror.h"
4982  #include "h/sktimer.h"
4983 -#include "h/ski2c.h"
4984 +#include "h/sktwsi.h"
4985  #include "h/skaddr.h"
4986  #include "h/skrlmt.h"
4987  #include "h/skvpd.h"
4988 @@ -41,7 +41,6 @@
4989   */
4990  #define SK_PNMI_MDB_VERSION            0x00030001      /* 3.1 */
4991
4992 -
4993  /*
4994   * Event definitions
4995   */
4996 @@ -54,16 +53,13 @@
4997  #define SK_PNMI_EVT_UTILIZATION_TIMER  7       /* Timer event for Utiliza. */
4998  #define SK_PNMI_EVT_CLEAR_COUNTER              8       /* Clear statistic counters */
4999  #define SK_PNMI_EVT_XMAC_RESET                 9       /* XMAC will be reset */
5000 -
5001  #define SK_PNMI_EVT_RLMT_PORT_UP               10      /* Port came logically up */
5002  #define SK_PNMI_EVT_RLMT_PORT_DOWN             11      /* Port went logically down */
5003  #define SK_PNMI_EVT_RLMT_SEGMENTATION  13      /* Two SP root bridges found */
5004  #define SK_PNMI_EVT_RLMT_ACTIVE_DOWN   14      /* Port went logically down */
5005  #define SK_PNMI_EVT_RLMT_ACTIVE_UP             15      /* Port came logically up */
5006 -#define SK_PNMI_EVT_RLMT_SET_NETS              16      /* 1. Parameter is number of nets
5007 -                                                                                               1 = single net; 2 = dual net */
5008 -#define SK_PNMI_EVT_VCT_RESET          17      /* VCT port reset timer event started with SET. */
5009 -
5010 +#define SK_PNMI_EVT_RLMT_SET_NETS              16      /* Number of nets (1 or 2). */
5011 +#define SK_PNMI_EVT_VCT_RESET                  17      /* VCT port reset timer event started with SET. */
5012
5013  /*
5014   * Return values
5015 @@ -78,7 +74,6 @@
5016  #define SK_PNMI_ERR_UNKNOWN_NET        7
5017  #define SK_PNMI_ERR_NOT_SUPPORTED      10
5018
5019 -
5020  /*
5021   * Return values of driver reset function SK_DRIVER_RESET() and
5022   * driver event function SK_DRIVER_EVENT()
5023 @@ -86,19 +81,17 @@
5024  #define SK_PNMI_ERR_OK                 0
5025  #define SK_PNMI_ERR_FAIL               1
5026
5027 -
5028  /*
5029   * Return values of driver test function SK_DRIVER_SELFTEST()
5030   */
5031  #define SK_PNMI_TST_UNKNOWN            (1 << 0)
5032 -#define SK_PNMI_TST_TRANCEIVER         (1 << 1)
5033 +#define SK_PNMI_TST_TRANCEIVER (1 << 1)
5034  #define SK_PNMI_TST_ASIC               (1 << 2)
5035  #define SK_PNMI_TST_SENSOR             (1 << 3)
5036 -#define SK_PNMI_TST_POWERMGMT          (1 << 4)
5037 +#define SK_PNMI_TST_POWERMGMT  (1 << 4)
5038  #define SK_PNMI_TST_PCI                        (1 << 5)
5039  #define SK_PNMI_TST_MAC                        (1 << 6)
5040
5041 -
5042  /*
5043   * RLMT specific definitions
5044   */
5045 @@ -352,6 +345,7 @@
5046  #define OID_SKGE_VCT_GET                               0xFF020200
5047  #define OID_SKGE_VCT_SET                               0xFF020201
5048  #define OID_SKGE_VCT_STATUS                            0xFF020202
5049 +#define OID_SKGE_VCT_CAPABILITIES              0xFF020203
5050
5051  #ifdef SK_DIAG_SUPPORT
5052  /* Defines for driver DIAG mode. */
5053 @@ -367,22 +361,69 @@
5054  #define OID_SKGE_PHY_TYPE                              0xFF020215
5055  #define OID_SKGE_PHY_LP_MODE                   0xFF020216
5056
5057 +/*
5058 + * Added for new DualNet IM driver V2
5059 + * these OIDs should later  be in pnmi.h
5060 + */
5061 +#define OID_SKGE_MAC_COUNT             0xFF020217
5062 +#define OID_SKGE_DUALNET_MODE          0xFF020218
5063 +#define OID_SKGE_SET_TAGHEADER 0xFF020219
5064 +
5065 +#ifdef SK_ASF
5066 +/* Defines for ASF */
5067 +#define OID_SKGE_ASF                    0xFF02021a
5068 +#define OID_SKGE_ASF_STORE_CONFIG       0xFF02021b
5069 +#define OID_SKGE_ASF_ENA                0xFF02021c
5070 +#define OID_SKGE_ASF_RETRANS            0xFF02021d
5071 +#define OID_SKGE_ASF_RETRANS_INT        0xFF02021e
5072 +#define OID_SKGE_ASF_HB_ENA             0xFF02021f
5073 +#define OID_SKGE_ASF_HB_INT             0xFF020220
5074 +#define OID_SKGE_ASF_WD_ENA             0xFF020221
5075 +#define OID_SKGE_ASF_WD_TIME            0xFF020222
5076 +#define OID_SKGE_ASF_IP_SOURCE          0xFF020223
5077 +#define OID_SKGE_ASF_MAC_SOURCE                        0xFF020224
5078 +#define OID_SKGE_ASF_IP_DEST            0xFF020225
5079 +#define OID_SKGE_ASF_MAC_DEST           0xFF020226
5080 +#define OID_SKGE_ASF_COMMUNITY_NAME     0xFF020227
5081 +#define OID_SKGE_ASF_RSP_ENA            0xFF020228
5082 +#define OID_SKGE_ASF_RETRANS_COUNT_MIN 0xFF020229
5083 +#define OID_SKGE_ASF_RETRANS_COUNT_MAX 0xFF02022a
5084 +#define OID_SKGE_ASF_RETRANS_INT_MIN   0xFF02022b
5085 +#define OID_SKGE_ASF_RETRANS_INT_MAX   0xFF02022c
5086 +#define OID_SKGE_ASF_HB_INT_MIN                        0xFF02022d
5087 +#define OID_SKGE_ASF_HB_INT_MAX                        0xFF02022e
5088 +#define OID_SKGE_ASF_WD_TIME_MIN               0xFF02022f
5089 +#define OID_SKGE_ASF_WD_TIME_MAX               0xFF020230
5090 +#define OID_SKGE_ASF_HB_CAP                            0xFF020231
5091 +#define OID_SKGE_ASF_WD_TIMER_RES              0xFF020232
5092 +#define OID_SKGE_ASF_GUID                              0xFF020233
5093 +#define OID_SKGE_ASF_KEY_OP                            0xFF020234
5094 +#define OID_SKGE_ASF_KEY_ADM                   0xFF020235
5095 +#define OID_SKGE_ASF_KEY_GEN                   0xFF020236
5096 +#define OID_SKGE_ASF_CAP                               0xFF020237
5097 +#define OID_SKGE_ASF_PAR_1                             0xFF020238
5098 +#define OID_SKGE_ASF_OVERALL_OID        0xFF020239
5099 +#define OID_SKGE_ASF_FWVER_OID          0xFF020240
5100 +#define OID_SKGE_ASF_ACPI_OID           0xFF020241
5101 +#define OID_SKGE_ASF_SMBUS_OID          0xFF020242
5102 +#endif /* SK_ASF */
5103 +
5104  /* VCT struct to store a backup copy of VCT data after a port reset. */
5105  typedef struct s_PnmiVct {
5106         SK_U8                   VctStatus;
5107 -       SK_U8                   PCableLen;
5108 -       SK_U32                  PMdiPairLen[4];
5109 -       SK_U8                   PMdiPairSts[4];
5110 +       SK_U8                   CableLen;
5111 +       SK_U32                  MdiPairLen[4];
5112 +       SK_U8                   MdiPairSts[4];
5113  } SK_PNMI_VCT;
5114
5115
5116  /* VCT status values (to be given to CPA via OID_SKGE_VCT_STATUS). */
5117 -#define SK_PNMI_VCT_NONE               0
5118 -#define SK_PNMI_VCT_OLD_VCT_DATA       1
5119 -#define SK_PNMI_VCT_NEW_VCT_DATA       2
5120 -#define SK_PNMI_VCT_OLD_DSP_DATA       4
5121 -#define SK_PNMI_VCT_NEW_DSP_DATA       8
5122 -#define SK_PNMI_VCT_RUNNING            16
5123 +#define SK_PNMI_VCT_NONE                       0x00
5124 +#define SK_PNMI_VCT_OLD_VCT_DATA       0x01
5125 +#define SK_PNMI_VCT_NEW_VCT_DATA       0x02
5126 +#define SK_PNMI_VCT_OLD_DSP_DATA       0x04
5127 +#define SK_PNMI_VCT_NEW_DSP_DATA       0x08
5128 +#define SK_PNMI_VCT_RUNNING                    0x10
5129
5130
5131  /* VCT cable test status. */
5132 @@ -390,7 +431,12 @@
5133  #define SK_PNMI_VCT_SHORT_CABLE                        1
5134  #define SK_PNMI_VCT_OPEN_CABLE                 2
5135  #define SK_PNMI_VCT_TEST_FAIL                  3
5136 -#define SK_PNMI_VCT_IMPEDANCE_MISMATCH         4
5137 +#define SK_PNMI_VCT_IMPEDANCE_MISMATCH 4
5138 +#define SK_PNMI_VCT_NOT_PRESENT                        5
5139 +
5140 +/* VCT capabilities (needed for OID_SKGE_VCT_CAPABILITIES. */
5141 +#define SK_PNMI_VCT_SUPPORTED                  1
5142 +#define SK_PNMI_VCT_NOT_SUPPORTED              0
5143
5144  #define        OID_SKGE_TRAP_SEN_WAR_LOW               500
5145  #define OID_SKGE_TRAP_SEN_WAR_UPP              501
5146 @@ -419,7 +465,6 @@
5147  #define        SK_SET_FULL_MIB                 5
5148  #define        SK_PRESET_FULL_MIB              6
5149
5150 -
5151  /*
5152   * Define error numbers and messages for syslog
5153   */
5154 @@ -452,7 +497,7 @@
5155  #define SK_PNMI_ERR014         (SK_ERRBASE_PNMI + 14)
5156  #define SK_PNMI_ERR014MSG      "Vpd: Cannot read VPD keys"
5157  #define SK_PNMI_ERR015         (SK_ERRBASE_PNMI + 15)
5158 -#define SK_PNMI_ERR015MSG      "Vpd: Internal array for VPD keys to small"
5159 +#define SK_PNMI_ERR015MSG      "Vpd: Internal array for VPD keys too small"
5160  #define SK_PNMI_ERR016         (SK_ERRBASE_PNMI + 16)
5161  #define SK_PNMI_ERR016MSG      "Vpd: Key string too long"
5162  #define SK_PNMI_ERR017         (SK_ERRBASE_PNMI + 17)
5163 @@ -494,9 +539,9 @@
5164  #define SK_PNMI_ERR036         (SK_ERRBASE_PNMI + 36)
5165  #define SK_PNMI_ERR036MSG      ""
5166  #define SK_PNMI_ERR037         (SK_ERRBASE_PNMI + 37)
5167 -#define SK_PNMI_ERR037MSG      "Rlmt: SK_RLMT_MODE_CHANGE event return not 0"
5168 +#define SK_PNMI_ERR037MSG      "Rlmt: SK_RLMT_MODE_CHANGE event returned not 0"
5169  #define SK_PNMI_ERR038         (SK_ERRBASE_PNMI + 38)
5170 -#define SK_PNMI_ERR038MSG      "Rlmt: SK_RLMT_PREFPORT_CHANGE event return not 0"
5171 +#define SK_PNMI_ERR038MSG      "Rlmt: SK_RLMT_PREFPORT_CHANGE event returned not 0"
5172  #define SK_PNMI_ERR039         (SK_ERRBASE_PNMI + 39)
5173  #define SK_PNMI_ERR039MSG      "RlmtStat: Unknown OID"
5174  #define SK_PNMI_ERR040         (SK_ERRBASE_PNMI + 40)
5175 @@ -514,9 +559,9 @@
5176  #define SK_PNMI_ERR046         (SK_ERRBASE_PNMI + 46)
5177  #define SK_PNMI_ERR046MSG      "Monitor: Unknown OID"
5178  #define SK_PNMI_ERR047         (SK_ERRBASE_PNMI + 47)
5179 -#define SK_PNMI_ERR047MSG      "SirqUpdate: Event function returns not 0"
5180 +#define SK_PNMI_ERR047MSG      "SirqUpdate: Event function returned not 0"
5181  #define SK_PNMI_ERR048         (SK_ERRBASE_PNMI + 48)
5182 -#define SK_PNMI_ERR048MSG      "RlmtUpdate: Event function returns not 0"
5183 +#define SK_PNMI_ERR048MSG      "RlmtUpdate: Event function returned not 0"
5184  #define SK_PNMI_ERR049         (SK_ERRBASE_PNMI + 49)
5185  #define SK_PNMI_ERR049MSG      "SkPnmiInit: Invalid size of 'CounterOffset' struct!!"
5186  #define SK_PNMI_ERR050         (SK_ERRBASE_PNMI + 50)
5187 @@ -826,23 +871,25 @@
5188  } SK_PNMI_STRUCT_DATA;
5189
5190  #define SK_PNMI_STRUCT_SIZE    (sizeof(SK_PNMI_STRUCT_DATA))
5191 +
5192 +/* The ReturnStatus field must be located before VpdFreeBytes! */
5193  #define SK_PNMI_MIN_STRUCT_SIZE        ((unsigned int)(SK_UPTR)\
5194                                  &(((SK_PNMI_STRUCT_DATA *)0)->VpdFreeBytes))
5195 -                                                                                                               /*
5196 -                                                                                                                * ReturnStatus field
5197 -                                                                                                                * must be located
5198 -                                                                                                                * before VpdFreeBytes
5199 -                                                                                                                */
5200
5201  /*
5202   * Various definitions
5203   */
5204 +#define SK_PNMI_EVT_TIMER_CHECK                28125000L       /* 28125 ms */
5205 +
5206 +#define SK_PNMI_VCT_TIMER_CHECK                 4000000L       /* 4 sec. */
5207 +
5208  #define SK_PNMI_MAX_PROTOS             3
5209
5210 -#define SK_PNMI_CNT_NO                 66      /* Must have the value of the enum
5211 -                                                                        * SK_PNMI_MAX_IDX. Define SK_PNMI_CHECK
5212 -                                                                        * for check while init phase 1
5213 -                                                                        */
5214 +/*
5215 + * SK_PNMI_CNT_NO must have the value of the enum SK_PNMI_MAX_IDX.
5216 + * Define SK_PNMI_CHECK to check this during init level SK_INIT_IO.
5217 + */
5218 +#define SK_PNMI_CNT_NO                 66
5219
5220  /*
5221   * Estimate data structure
5222 @@ -856,14 +903,6 @@
5223
5224
5225  /*
5226 - * VCT timer data structure
5227 - */
5228 -typedef struct s_VctTimer {
5229 -       SK_TIMER                VctTimer;
5230 -} SK_PNMI_VCT_TIMER;
5231 -
5232 -
5233 -/*
5234   * PNMI specific adapter context structure
5235   */
5236  typedef struct s_PnmiPort {
5237 @@ -933,9 +972,9 @@
5238         unsigned int    TrapQueueEnd;
5239         unsigned int    TrapBufPad;
5240         unsigned int    TrapUnique;
5241 -       SK_U8           VctStatus[SK_MAX_MACS];
5242 -       SK_PNMI_VCT     VctBackup[SK_MAX_MACS];
5243 -       SK_PNMI_VCT_TIMER VctTimeout[SK_MAX_MACS];
5244 +       SK_U8                   VctStatus[SK_MAX_MACS];
5245 +       SK_PNMI_VCT             VctBackup[SK_MAX_MACS];
5246 +       SK_TIMER                VctTimeout[SK_MAX_MACS];
5247  #ifdef SK_DIAG_SUPPORT
5248         SK_U32                  DiagAttached;
5249  #endif /* SK_DIAG_SUPPORT */
5250 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/skgesirq.h linux-2.6.9.new/drivers/net/sk98lin/h/skgesirq.h
5251 --- linux-2.6.9.old/drivers/net/sk98lin/h/skgesirq.h    2004-10-19 05:55:17.000000000 +0800
5252 +++ linux-2.6.9.new/drivers/net/sk98lin/h/skgesirq.h    2006-12-07 14:35:03.000000000 +0800
5253 @@ -2,22 +2,21 @@
5254   *
5255   * Name:       skgesirq.h
5256   * Project:    Gigabit Ethernet Adapters, Common Modules
5257 - * Version:    $Revision: 1.30 $
5258 - * Date:       $Date: 2003/07/04 12:34:13 $
5259 - * Purpose:    SK specific Gigabit Ethernet special IRQ functions
5260 + * Version:    $Revision: 2.3 $
5261 + * Date:       $Date: 2004/05/28 14:42:03 $
5262 + * Purpose:    Gigabit Ethernet special IRQ functions
5263   *
5264   ******************************************************************************/
5265
5266  /******************************************************************************
5267   *
5268   *     (C)Copyright 1998-2002 SysKonnect.
5269 - *     (C)Copyright 2002-2003 Marvell.
5270 + *     (C)Copyright 2002-2004 Marvell.
5271   *
5272   *     This program is free software; you can redistribute it and/or modify
5273   *     it under the terms of the GNU General Public License as published by
5274   *     the Free Software Foundation; either version 2 of the License, or
5275   *     (at your option) any later version.
5276 - *
5277   *     The information in this file is provided "AS IS" without warranty.
5278   *
5279   ******************************************************************************/
5280 @@ -44,10 +43,10 @@
5281  #define SK_HWEV_SET_SPEED              9       /* Set Link Speed by PNMI */
5282  #define SK_HWEV_HALFDUP_CHK            10      /* Half Duplex Hangup Workaround */
5283
5284 -#define SK_WA_ACT_TIME         (5000000UL)     /* 5 sec */
5285 -#define SK_WA_INA_TIME         (100000UL)      /* 100 msec */
5286 +#define SK_WA_ACT_TIME         1000000UL       /* 1000 msec (1 sec) */
5287 +#define SK_WA_INA_TIME          100000UL       /*  100 msec */
5288
5289 -#define SK_HALFDUP_CHK_TIME    (10000UL)       /* 10 msec */
5290 +#define SK_HALFDUP_CHK_TIME      10000UL       /*   10 msec */
5291
5292  /*
5293   * Define the error numbers and messages
5294 @@ -102,10 +101,35 @@
5295  #define SKERR_SIRQ_E024MSG     "FIFO overflow error"
5296  #define SKERR_SIRQ_E025                (SKERR_SIRQ_E024+1)
5297  #define SKERR_SIRQ_E025MSG     "2 Pair Downshift detected"
5298 +#define SKERR_SIRQ_E026                (SKERR_SIRQ_E025+1)
5299 +#define SKERR_SIRQ_E026MSG     "Uncorrectable PCI Express error"
5300 +#define SKERR_SIRQ_E027                (SKERR_SIRQ_E026+1)
5301 +#define SKERR_SIRQ_E027MSG     "PCI express protocol violation error"
5302 +#define SKERR_SIRQ_E028                (SKERR_SIRQ_E027+1)
5303 +#define SKERR_SIRQ_E028MSG     "Parity error on RAM 1 (read)"
5304 +#define SKERR_SIRQ_E029                (SKERR_SIRQ_E028+1)
5305 +#define SKERR_SIRQ_E029MSG     "Parity error on RAM 1 (write)"
5306 +#define SKERR_SIRQ_E030                (SKERR_SIRQ_E029+1)
5307 +#define SKERR_SIRQ_E030MSG     "Parity error on RAM 2 (read)"
5308 +#define SKERR_SIRQ_E031                (SKERR_SIRQ_E030+1)
5309 +#define SKERR_SIRQ_E031MSG     "Parity error on RAM 2 (write)"
5310 +#define SKERR_SIRQ_E032                (SKERR_SIRQ_E031+1)
5311 +#define SKERR_SIRQ_E032MSG     "TCP segmentation error async. queue 1"
5312 +#define SKERR_SIRQ_E033                (SKERR_SIRQ_E032+1)
5313 +#define SKERR_SIRQ_E033MSG     "TCP segmentation error sync. queue 1"
5314 +#define SKERR_SIRQ_E034                (SKERR_SIRQ_E033+1)
5315 +#define SKERR_SIRQ_E034MSG     "TCP segmentation error async. queue 2"
5316 +#define SKERR_SIRQ_E035                (SKERR_SIRQ_E034+1)
5317 +#define SKERR_SIRQ_E035MSG     "TCP segmentation error sync. queue 2"
5318 +#define SKERR_SIRQ_E036                (SKERR_SIRQ_E035+1)
5319 +#define SKERR_SIRQ_E036MSG     "CHECK failure polling unit"
5320
5321  extern void SkGeSirqIsr(SK_AC *pAC, SK_IOC IoC, SK_U32 Istatus);
5322  extern int  SkGeSirqEvent(SK_AC *pAC, SK_IOC IoC, SK_U32 Event, SK_EVPARA Para);
5323  extern void SkHWLinkUp(SK_AC *pAC, SK_IOC IoC, int Port);
5324  extern void SkHWLinkDown(SK_AC *pAC, SK_IOC IoC, int Port);
5325 +extern void SkGeYuSirqIsr(SK_AC *pAC, SK_IOC IoC, SK_U32 Istatus);
5326 +extern void SkYuk2SirqIsr(SK_AC *pAC, SK_IOC IoC, SK_U32 Istatus);
5327
5328  #endif /* _INC_SKGESIRQ_H_ */
5329 +
5330 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/skgetwsi.h linux-2.6.9.new/drivers/net/sk98lin/h/skgetwsi.h
5331 --- linux-2.6.9.old/drivers/net/sk98lin/h/skgetwsi.h    1970-01-01 08:00:00.000000000 +0800
5332 +++ linux-2.6.9.new/drivers/net/sk98lin/h/skgetwsi.h    2006-12-07 14:35:03.000000000 +0800
5333 @@ -0,0 +1,241 @@
5334 +/******************************************************************************
5335 + *
5336 + * Name:       skgetwsi.h
5337 + * Project:    Gigabit Ethernet Adapters, TWSI-Module
5338 + * Version:    $Revision: 1.7 $
5339 + * Date:       $Date: 2004/12/20 14:48:51 $
5340 + * Purpose:    Special defines for TWSI
5341 + *
5342 + ******************************************************************************/
5343 +
5344 +/******************************************************************************
5345 + *
5346 + *     (C)Copyright 1998-2002 SysKonnect.
5347 + *     (C)Copyright 2002-2004 Marvell.
5348 + *
5349 + *     This program is free software; you can redistribute it and/or modify
5350 + *     it under the terms of the GNU General Public License as published by
5351 + *     the Free Software Foundation; either version 2 of the License, or
5352 + *     (at your option) any later version.
5353 + *     The information in this file is provided "AS IS" without warranty.
5354 + *
5355 + ******************************************************************************/
5356 +
5357 +/*
5358 + * SKGETWSI.H  contains all SK-98xx specific defines for the TWSI handling
5359 + */
5360 +
5361 +#ifndef _INC_SKGETWSI_H_
5362 +#define _INC_SKGETWSI_H_
5363 +
5364 +/*
5365 + * Macros to access the B2_I2C_CTRL
5366 + */
5367 +#define SK_I2C_CTL(IoC, flag, dev, dev_size, reg, burst) \
5368 +       SK_OUT32(IoC, B2_I2C_CTRL,\
5369 +               (flag ? 0x80000000UL : 0x0L) | \
5370 +               (((SK_U32)reg << 16) & I2C_ADDR) | \
5371 +               (((SK_U32)dev << 9) & I2C_DEV_SEL) | \
5372 +               (dev_size & I2C_DEV_SIZE) | \
5373 +               ((burst << 4) & I2C_BURST_LEN))
5374 +
5375 +#define SK_I2C_STOP(IoC) {                     \
5376 +       SK_U32  I2cCtrl;                                \
5377 +       SK_IN32(IoC, B2_I2C_CTRL, &I2cCtrl);            \
5378 +       SK_OUT32(IoC, B2_I2C_CTRL, I2cCtrl | I2C_STOP); \
5379 +}
5380 +
5381 +#define SK_I2C_GET_CTL(IoC, pI2cCtrl)  SK_IN32(IoC, B2_I2C_CTRL, pI2cCtrl)
5382 +
5383 +/*
5384 + * Macros to access the TWSI SW Registers
5385 + */
5386 +#define SK_I2C_SET_BIT(IoC, SetBits) {                 \
5387 +       SK_U8   OrgBits;                                \
5388 +       SK_IN8(IoC, B2_I2C_SW, &OrgBits);               \
5389 +       SK_OUT8(IoC, B2_I2C_SW, OrgBits | (SK_U8)(SetBits));    \
5390 +}
5391 +
5392 +#define SK_I2C_CLR_BIT(IoC, ClrBits) {                 \
5393 +       SK_U8   OrgBits;                                \
5394 +       SK_IN8(IoC, B2_I2C_SW, &OrgBits);               \
5395 +       SK_OUT8(IoC, B2_I2C_SW, OrgBits & ~((SK_U8)(ClrBits))); \
5396 +}
5397 +
5398 +#define SK_I2C_GET_SW(IoC, pI2cSw)     SK_IN8(IoC, B2_I2C_SW, pI2cSw)
5399 +
5400 +/*
5401 + * define the possible sensor states
5402 + */
5403 +#define SK_SEN_IDLE            0       /* Idle: sensor not read */
5404 +#define SK_SEN_VALUE   1       /* Value Read cycle */
5405 +#define SK_SEN_VALEXT  2       /* Extended Value Read cycle */
5406 +
5407 +/*
5408 + * Conversion factor to convert read Voltage sensor to milli Volt
5409 + * Conversion factor to convert read Temperature sensor to 10th degree Celsius
5410 + */
5411 +#define SK_LM80_VT_LSB         22      /* 22mV LSB resolution */
5412 +#define SK_LM80_TEMP_LSB       10      /* 1 degree LSB resolution */
5413 +#define SK_LM80_TEMPEXT_LSB     5      /* 0.5 degree LSB resolution for ext. val. */
5414 +
5415 +/*
5416 + * formula: counter = (22500*60)/(rpm * divisor * pulses/2)
5417 + * assuming: 6500rpm, 4 pulses, divisor 1
5418 + */
5419 +#define SK_LM80_FAN_FAKTOR     ((22500L*60)/(1*2))
5420 +
5421 +/*
5422 + * Define sensor management data
5423 + * Maximum is reached on Genesis copper dual port and Yukon-64
5424 + * Board specific maximum is in pAC->I2c.MaxSens
5425 + */
5426 +#define SK_MAX_SENSORS 8       /* maximal no. of installed sensors */
5427 +#define SK_MIN_SENSORS 5       /* minimal no. of installed sensors */
5428 +
5429 +/*
5430 + * To watch the state machine (SM) use the timer in two ways
5431 + * instead of one as hitherto
5432 + */
5433 +#define SK_TIMER_WATCH_SM              0       /* Watch the SM to finish in a spec. time */
5434 +#define SK_TIMER_NEW_GAUGING   1       /* Start a new gauging when timer expires */
5435 +
5436 +/*
5437 + * Defines for the individual thresholds
5438 + */
5439 +
5440 +#define C_PLUS_20              120 / 100
5441 +#define C_PLUS_15              115 / 100
5442 +#define C_PLUS_10              110 / 100
5443 +#define C_PLUS_5               105 / 100
5444 +#define C_MINUS_5               95 / 100
5445 +#define C_MINUS_10              90 / 100
5446 +#define C_MINUS_15              85 / 100
5447 +
5448 +/* Temperature sensor */
5449 +#define SK_SEN_TEMP_HIGH_ERR   800     /* Temperature High Err  Threshold */
5450 +#define SK_SEN_TEMP_HIGH_WARN  700     /* Temperature High Warn Threshold */
5451 +#define SK_SEN_TEMP_LOW_WARN   100     /* Temperature Low  Warn Threshold */
5452 +#define SK_SEN_TEMP_LOW_ERR              0     /* Temperature Low  Err  Threshold */
5453 +
5454 +/* VCC which should be 5 V */
5455 +#define SK_SEN_PCI_5V_HIGH_ERR         5588    /* Voltage PCI High Err  Threshold */
5456 +#define SK_SEN_PCI_5V_HIGH_WARN                5346    /* Voltage PCI High Warn Threshold */
5457 +#define SK_SEN_PCI_5V_LOW_WARN         4664    /* Voltage PCI Low  Warn Threshold */
5458 +#define SK_SEN_PCI_5V_LOW_ERR          4422    /* Voltage PCI Low  Err  Threshold */
5459 +
5460 +/*
5461 + * VIO may be 5 V or 3.3 V. Initialization takes two parts:
5462 + * 1. Initialize lowest lower limit and highest higher limit.
5463 + * 2. After the first value is read correct the upper or the lower limit to
5464 + *    the appropriate C constant.
5465 + *
5466 + * Warning limits are +-5% of the exepected voltage.
5467 + * Error limits are +-10% of the expected voltage.
5468 + */
5469 +
5470 +/* Bug fix AF: 16.Aug.2001: Correct the init base of LM80 sensor */
5471 +
5472 +#define SK_SEN_PCI_IO_5V_HIGH_ERR      5566    /* + 10% V PCI-IO High Err Threshold */
5473 +#define SK_SEN_PCI_IO_5V_HIGH_WARN     5324    /* +  5% V PCI-IO High Warn Threshold */
5474 +                                       /*              5000    mVolt */
5475 +#define SK_SEN_PCI_IO_5V_LOW_WARN      4686    /* -  5% V PCI-IO Low Warn Threshold */
5476 +#define SK_SEN_PCI_IO_5V_LOW_ERR       4444    /* - 10% V PCI-IO Low Err Threshold */
5477 +
5478 +#define SK_SEN_PCI_IO_RANGE_LIMITER    4000    /* 4000 mV range delimiter */
5479 +
5480 +/* correction values for the second pass */
5481 +#define SK_SEN_PCI_IO_3V3_HIGH_ERR     3850    /* + 15% V PCI-IO High Err Threshold */
5482 +#define SK_SEN_PCI_IO_3V3_HIGH_WARN    3674    /* + 10% V PCI-IO High Warn Threshold */
5483 +                                       /*              3300    mVolt */
5484 +#define SK_SEN_PCI_IO_3V3_LOW_WARN     2926    /* - 10% V PCI-IO Low Warn Threshold */
5485 +#define SK_SEN_PCI_IO_3V3_LOW_ERR      2772    /* - 15% V PCI-IO Low Err  Threshold */
5486 +
5487 +/*
5488 + * VDD voltage
5489 + */
5490 +#define SK_SEN_VDD_HIGH_ERR            3630    /* Voltage ASIC High Err  Threshold */
5491 +#define SK_SEN_VDD_HIGH_WARN   3476    /* Voltage ASIC High Warn Threshold */
5492 +#define SK_SEN_VDD_LOW_WARN            3146    /* Voltage ASIC Low  Warn Threshold */
5493 +#define SK_SEN_VDD_LOW_ERR             2970    /* Voltage ASIC Low  Err  Threshold */
5494 +
5495 +/*
5496 + * PHY PLL 3V3 voltage
5497 + */
5498 +#define SK_SEN_PLL_3V3_HIGH_ERR                3630    /* Voltage PMA High Err  Threshold */
5499 +#define SK_SEN_PLL_3V3_HIGH_WARN       3476    /* Voltage PMA High Warn Threshold */
5500 +#define SK_SEN_PLL_3V3_LOW_WARN                3146    /* Voltage PMA Low  Warn Threshold */
5501 +#define SK_SEN_PLL_3V3_LOW_ERR         2970    /* Voltage PMA Low  Err  Threshold */
5502 +
5503 +/*
5504 + * VAUX (YUKON only)
5505 + */
5506 +#define SK_SEN_VAUX_3V3_VAL            3300    /* Voltage VAUX 3.3 Volt */
5507 +
5508 +#define SK_SEN_VAUX_3V3_HIGH_ERR       (SK_I32)(SK_SEN_VAUX_3V3_VAL * C_PLUS_10)
5509 +#define SK_SEN_VAUX_3V3_HIGH_WARN      (SK_I32)(SK_SEN_VAUX_3V3_VAL * C_PLUS_5)
5510 +#define SK_SEN_VAUX_3V3_LOW_WARN       (SK_I32)(SK_SEN_VAUX_3V3_VAL * C_MINUS_5)
5511 +#define SK_SEN_VAUX_3V3_LOW_ERR                (SK_I32)(SK_SEN_VAUX_3V3_VAL * C_MINUS_10)
5512 +
5513 +#define SK_SEN_VAUX_RANGE_LIMITER      1000    /* 1000 mV range delimiter */
5514 +
5515 +/*
5516 + * PHY 2V5 voltage
5517 + */
5518 +#define SK_SEN_PHY_2V5_VAL             2500    /* Voltage PHY 2.5 Volt */
5519 +
5520 +#define SK_SEN_PHY_2V5_HIGH_ERR                (SK_I32)(SK_SEN_PHY_2V5_VAL * C_PLUS_10)
5521 +#define SK_SEN_PHY_2V5_HIGH_WARN       (SK_I32)(SK_SEN_PHY_2V5_VAL * C_PLUS_5)
5522 +#define SK_SEN_PHY_2V5_LOW_WARN                (SK_I32)(SK_SEN_PHY_2V5_VAL * C_MINUS_5)
5523 +#define SK_SEN_PHY_2V5_LOW_ERR         (SK_I32)(SK_SEN_PHY_2V5_VAL * C_MINUS_10)
5524 +
5525 +/*
5526 + * ASIC Core 1V5 voltage (YUKON only)
5527 + */
5528 +#define SK_SEN_CORE_1V5_VAL            1500    /* Voltage ASIC Core 1.5 Volt */
5529 +
5530 +#define SK_SEN_CORE_1V5_HIGH_ERR       (SK_I32)(SK_SEN_CORE_1V5_VAL * C_PLUS_10)
5531 +#define SK_SEN_CORE_1V5_HIGH_WARN      (SK_I32)(SK_SEN_CORE_1V5_VAL * C_PLUS_5)
5532 +#define SK_SEN_CORE_1V5_LOW_WARN       (SK_I32)(SK_SEN_CORE_1V5_VAL * C_MINUS_5)
5533 +#define SK_SEN_CORE_1V5_LOW_ERR        (SK_I32)(SK_SEN_CORE_1V5_VAL * C_MINUS_10)
5534 +
5535 +/*
5536 + * ASIC Core 1V2 (1V3) voltage (YUKON-2 only)
5537 + */
5538 +#define SK_SEN_CORE_1V2_VAL            1200    /* Voltage ASIC Core 1.2 Volt */
5539 +
5540 +#define SK_SEN_CORE_1V2_HIGH_ERR       (SK_I32)(SK_SEN_CORE_1V2_VAL * C_PLUS_20)
5541 +#define SK_SEN_CORE_1V2_HIGH_WARN      (SK_I32)(SK_SEN_CORE_1V2_VAL * C_PLUS_15)
5542 +#define SK_SEN_CORE_1V2_LOW_WARN       (SK_I32)(SK_SEN_CORE_1V2_VAL * C_MINUS_5)
5543 +#define SK_SEN_CORE_1V2_LOW_ERR        (SK_I32)(SK_SEN_CORE_1V2_VAL * C_MINUS_10)
5544 +
5545 +#define SK_SEN_CORE_1V3_VAL            1300    /* Voltage ASIC Core 1.3 Volt */
5546 +
5547 +#define SK_SEN_CORE_1V3_HIGH_ERR       (SK_I32)(SK_SEN_CORE_1V3_VAL * C_PLUS_15)
5548 +#define SK_SEN_CORE_1V3_HIGH_WARN      (SK_I32)(SK_SEN_CORE_1V3_VAL * C_PLUS_10)
5549 +#define SK_SEN_CORE_1V3_LOW_WARN       (SK_I32)(SK_SEN_CORE_1V3_VAL * C_MINUS_5)
5550 +#define SK_SEN_CORE_1V3_LOW_ERR        (SK_I32)(SK_SEN_CORE_1V3_VAL * C_MINUS_10)
5551 +
5552 +/*
5553 + * FAN 1 speed
5554 + */
5555 +/* assuming: 6500rpm +-15%, 4 pulses,
5556 + * warning at: 80 %
5557 + * error at:   70 %
5558 + * no upper limit
5559 + */
5560 +#define SK_SEN_FAN_HIGH_ERR            20000   /* FAN Speed High Err Threshold */
5561 +#define SK_SEN_FAN_HIGH_WARN   20000   /* FAN Speed High Warn Threshold */
5562 +#define SK_SEN_FAN_LOW_WARN             5200   /* FAN Speed Low Warn Threshold */
5563 +#define SK_SEN_FAN_LOW_ERR              4550   /* FAN Speed Low Err Threshold */
5564 +
5565 +/*
5566 + * Some Voltages need dynamic thresholds
5567 + */
5568 +#define SK_SEN_DYN_INIT_NONE            0  /* No dynamic init of thresholds */
5569 +#define SK_SEN_DYN_INIT_PCI_IO         10  /* Init PCI-IO with new thresholds */
5570 +#define SK_SEN_DYN_INIT_VAUX           11  /* Init VAUX with new thresholds */
5571 +
5572 +extern int SkLm80ReadSensor(SK_AC *pAC, SK_IOC IoC, SK_SENSOR *pSen);
5573 +#endif /* n_INC_SKGETWSI_H */
5574 +
5575 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/ski2c.h linux-2.6.9.new/drivers/net/sk98lin/h/ski2c.h
5576 --- linux-2.6.9.old/drivers/net/sk98lin/h/ski2c.h       2004-10-19 05:53:45.000000000 +0800
5577 +++ linux-2.6.9.new/drivers/net/sk98lin/h/ski2c.h       1970-01-01 08:00:00.000000000 +0800
5578 @@ -1,177 +0,0 @@
5579 -/******************************************************************************
5580 - *
5581 - * Name:       ski2c.h
5582 - * Project:    Gigabit Ethernet Adapters, TWSI-Module
5583 - * Version:    $Revision: 1.35 $
5584 - * Date:       $Date: 2003/10/20 09:06:30 $
5585 - * Purpose:    Defines to access Voltage and Temperature Sensor
5586 - *
5587 - ******************************************************************************/
5588 -
5589 -/******************************************************************************
5590 - *
5591 - *     (C)Copyright 1998-2002 SysKonnect.
5592 - *     (C)Copyright 2002-2003 Marvell.
5593 - *
5594 - *     This program is free software; you can redistribute it and/or modify
5595 - *     it under the terms of the GNU General Public License as published by
5596 - *     the Free Software Foundation; either version 2 of the License, or
5597 - *     (at your option) any later version.
5598 - *
5599 - *     The information in this file is provided "AS IS" without warranty.
5600 - *
5601 - ******************************************************************************/
5602 -
5603 -/*
5604 - * SKI2C.H     contains all I2C specific defines
5605 - */
5606 -
5607 -#ifndef _SKI2C_H_
5608 -#define _SKI2C_H_
5609 -
5610 -typedef struct  s_Sensor SK_SENSOR;
5611 -
5612 -#include "h/skgei2c.h"
5613 -
5614 -/*
5615 - * Define the I2C events.
5616 - */
5617 -#define SK_I2CEV_IRQ   1       /* IRQ happened Event */
5618 -#define SK_I2CEV_TIM   2       /* Timeout event */
5619 -#define SK_I2CEV_CLEAR 3       /* Clear MIB Values */
5620 -
5621 -/*
5622 - * Define READ and WRITE Constants.
5623 - */
5624 -#define I2C_READ       0
5625 -#define I2C_WRITE      1
5626 -#define I2C_BURST      1
5627 -#define I2C_SINGLE     0
5628 -
5629 -#define SKERR_I2C_E001         (SK_ERRBASE_I2C+0)
5630 -#define SKERR_I2C_E001MSG      "Sensor index unknown"
5631 -#define SKERR_I2C_E002         (SKERR_I2C_E001+1)
5632 -#define SKERR_I2C_E002MSG      "TWSI: transfer does not complete"
5633 -#define SKERR_I2C_E003         (SKERR_I2C_E002+1)
5634 -#define SKERR_I2C_E003MSG      "LM80: NAK on device send"
5635 -#define SKERR_I2C_E004         (SKERR_I2C_E003+1)
5636 -#define SKERR_I2C_E004MSG      "LM80: NAK on register send"
5637 -#define SKERR_I2C_E005         (SKERR_I2C_E004+1)
5638 -#define SKERR_I2C_E005MSG      "LM80: NAK on device (2) send"
5639 -#define SKERR_I2C_E006         (SKERR_I2C_E005+1)
5640 -#define SKERR_I2C_E006MSG      "Unknown event"
5641 -#define SKERR_I2C_E007         (SKERR_I2C_E006+1)
5642 -#define SKERR_I2C_E007MSG      "LM80 read out of state"
5643 -#define SKERR_I2C_E008         (SKERR_I2C_E007+1)
5644 -#define SKERR_I2C_E008MSG      "Unexpected sensor read completed"
5645 -#define SKERR_I2C_E009         (SKERR_I2C_E008+1)
5646 -#define SKERR_I2C_E009MSG      "WARNING: temperature sensor out of range"
5647 -#define SKERR_I2C_E010         (SKERR_I2C_E009+1)
5648 -#define SKERR_I2C_E010MSG      "WARNING: voltage sensor out of range"
5649 -#define SKERR_I2C_E011         (SKERR_I2C_E010+1)
5650 -#define SKERR_I2C_E011MSG      "ERROR: temperature sensor out of range"
5651 -#define SKERR_I2C_E012         (SKERR_I2C_E011+1)
5652 -#define SKERR_I2C_E012MSG      "ERROR: voltage sensor out of range"
5653 -#define SKERR_I2C_E013         (SKERR_I2C_E012+1)
5654 -#define SKERR_I2C_E013MSG      "ERROR: couldn't init sensor"
5655 -#define SKERR_I2C_E014         (SKERR_I2C_E013+1)
5656 -#define SKERR_I2C_E014MSG      "WARNING: fan sensor out of range"
5657 -#define SKERR_I2C_E015         (SKERR_I2C_E014+1)
5658 -#define SKERR_I2C_E015MSG      "ERROR: fan sensor out of range"
5659 -#define SKERR_I2C_E016         (SKERR_I2C_E015+1)
5660 -#define SKERR_I2C_E016MSG      "TWSI: active transfer does not complete"
5661 -
5662 -/*
5663 - * Define Timeout values
5664 - */
5665 -#define SK_I2C_TIM_LONG                2000000L        /* 2 seconds */
5666 -#define SK_I2C_TIM_SHORT        100000L        /* 100 milliseconds */
5667 -#define SK_I2C_TIM_WATCH       1000000L        /* 1 second */
5668 -
5669 -/*
5670 - * Define trap and error log hold times
5671 - */
5672 -#ifndef        SK_SEN_ERR_TR_HOLD
5673 -#define SK_SEN_ERR_TR_HOLD             (4*SK_TICKS_PER_SEC)
5674 -#endif
5675 -#ifndef        SK_SEN_ERR_LOG_HOLD
5676 -#define SK_SEN_ERR_LOG_HOLD            (60*SK_TICKS_PER_SEC)
5677 -#endif
5678 -#ifndef        SK_SEN_WARN_TR_HOLD
5679 -#define SK_SEN_WARN_TR_HOLD            (15*SK_TICKS_PER_SEC)
5680 -#endif
5681 -#ifndef        SK_SEN_WARN_LOG_HOLD
5682 -#define SK_SEN_WARN_LOG_HOLD   (15*60*SK_TICKS_PER_SEC)
5683 -#endif
5684 -
5685 -/*
5686 - * Defines for SenType
5687 - */
5688 -#define SK_SEN_UNKNOWN 0
5689 -#define SK_SEN_TEMP            1
5690 -#define SK_SEN_VOLT            2
5691 -#define SK_SEN_FAN             3
5692 -
5693 -/*
5694 - * Define for the SenErrorFlag
5695 - */
5696 -#define SK_SEN_ERR_NOT_PRESENT 0       /* Error Flag: Sensor not present */
5697 -#define SK_SEN_ERR_OK                  1       /* Error Flag: O.K. */
5698 -#define SK_SEN_ERR_WARN                        2       /* Error Flag: Warning */
5699 -#define SK_SEN_ERR_ERR                 3       /* Error Flag: Error */
5700 -#define SK_SEN_ERR_FAULTY              4       /* Error Flag: Faulty */
5701 -
5702 -/*
5703 - * Define the Sensor struct
5704 - */
5705 -struct s_Sensor {
5706 -       char    *SenDesc;                       /* Description */
5707 -       int             SenType;                        /* Voltage or Temperature */
5708 -       SK_I32  SenValue;                       /* Current value of the sensor */
5709 -       SK_I32  SenThreErrHigh;         /* High error Threshhold of this sensor */
5710 -       SK_I32  SenThreWarnHigh;        /* High warning Threshhold of this sensor */
5711 -       SK_I32  SenThreErrLow;          /* Lower error Threshold of the sensor */
5712 -       SK_I32  SenThreWarnLow;         /* Lower warning Threshold of the sensor */
5713 -       int             SenErrFlag;                     /* Sensor indicated an error */
5714 -       SK_BOOL SenInit;                        /* Is sensor initialized ? */
5715 -       SK_U64  SenErrCts;                      /* Error trap counter */
5716 -       SK_U64  SenWarnCts;                     /* Warning trap counter */
5717 -       SK_U64  SenBegErrTS;            /* Begin error timestamp */
5718 -       SK_U64  SenBegWarnTS;           /* Begin warning timestamp */
5719 -       SK_U64  SenLastErrTrapTS;       /* Last error trap timestamp */
5720 -       SK_U64  SenLastErrLogTS;        /* Last error log timestamp */
5721 -       SK_U64  SenLastWarnTrapTS;      /* Last warning trap timestamp */
5722 -       SK_U64  SenLastWarnLogTS;       /* Last warning log timestamp */
5723 -       int             SenState;                       /* Sensor State (see HW specific include) */
5724 -       int             (*SenRead)(SK_AC *pAC, SK_IOC IoC, struct s_Sensor *pSen);
5725 -                                                               /* Sensors read function */
5726 -       SK_U16  SenReg;                         /* Register Address for this sensor */
5727 -       SK_U8   SenDev;                         /* Device Selection for this sensor */
5728 -};
5729 -
5730 -typedef        struct  s_I2c {
5731 -       SK_SENSOR       SenTable[SK_MAX_SENSORS];       /* Sensor Table */
5732 -       int                     CurrSens;       /* Which sensor is currently queried */
5733 -       int                     MaxSens;        /* Max. number of sensors */
5734 -       int                     TimerMode;      /* Use the timer also to watch the state machine */
5735 -       int                     InitLevel;      /* Initialized Level */
5736 -#ifndef SK_DIAG
5737 -       int                     DummyReads;     /* Number of non-checked dummy reads */
5738 -       SK_TIMER        SenTimer;       /* Sensors timer */
5739 -#endif /* !SK_DIAG */
5740 -} SK_I2C;
5741 -
5742 -extern int SkI2cInit(SK_AC *pAC, SK_IOC IoC, int Level);
5743 -extern int SkI2cWrite(SK_AC *pAC, SK_IOC IoC, SK_U32 Data, int Dev, int Size,
5744 -                                          int Reg, int Burst);
5745 -extern int SkI2cReadSensor(SK_AC *pAC, SK_IOC IoC, SK_SENSOR *pSen);
5746 -#ifdef SK_DIAG
5747 -extern SK_U32 SkI2cRead(SK_AC *pAC, SK_IOC IoC, int Dev, int Size, int Reg,
5748 -                                                int Burst);
5749 -#else /* !SK_DIAG */
5750 -extern int SkI2cEvent(SK_AC *pAC, SK_IOC IoC, SK_U32 Event, SK_EVPARA Para);
5751 -extern void SkI2cWaitIrq(SK_AC *pAC, SK_IOC IoC);
5752 -extern void SkI2cIsr(SK_AC *pAC, SK_IOC IoC);
5753 -#endif /* !SK_DIAG */
5754 -#endif /* n_SKI2C_H */
5755 -
5756 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/skqueue.h linux-2.6.9.new/drivers/net/sk98lin/h/skqueue.h
5757 --- linux-2.6.9.old/drivers/net/sk98lin/h/skqueue.h     2004-10-19 05:55:29.000000000 +0800
5758 +++ linux-2.6.9.new/drivers/net/sk98lin/h/skqueue.h     2006-12-07 14:35:03.000000000 +0800
5759 @@ -2,8 +2,8 @@
5760   *
5761   * Name:       skqueue.h
5762   * Project:    Gigabit Ethernet Adapters, Event Scheduler Module
5763 - * Version:    $Revision: 1.16 $
5764 - * Date:       $Date: 2003/09/16 12:50:32 $
5765 + * Version:    $Revision: 2.3 $
5766 + * Date:       $Date: 2004/05/14 13:39:15 $
5767   * Purpose:    Defines for the Event queue
5768   *
5769   ******************************************************************************/
5770 @@ -45,6 +45,9 @@
5771  #define        SKGE_RSF        11      /* RSF Aggregation Event Class */
5772  #define        SKGE_MARKER     12      /* MARKER Aggregation Event Class */
5773  #define        SKGE_FD         13      /* FD Distributor Event Class */
5774 +#ifdef SK_ASF
5775 +#define        SKGE_ASF        14      /* ASF Event Class */
5776 +#endif
5777
5778  /*
5779   * define event queue as circular buffer
5780 @@ -90,5 +93,11 @@
5781  #define        SKERR_Q_E001MSG "Event queue overflow"
5782  #define        SKERR_Q_E002    (SKERR_Q_E001+1)
5783  #define        SKERR_Q_E002MSG "Undefined event class"
5784 +#define        SKERR_Q_E003    (SKERR_Q_E001+2)
5785 +#define        SKERR_Q_E003MSG "Event queued in Init Level 0"
5786 +#define        SKERR_Q_E004    (SKERR_Q_E001+3)
5787 +#define        SKERR_Q_E004MSG "Error Reported from Event Fuction (Queue Blocked)"
5788 +#define        SKERR_Q_E005    (SKERR_Q_E001+4)
5789 +#define        SKERR_Q_E005MSG "Event scheduler called in Init Level 0 or 1"
5790  #endif /* _SKQUEUE_H_ */
5791
5792 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/skrlmt.h linux-2.6.9.new/drivers/net/sk98lin/h/skrlmt.h
5793 --- linux-2.6.9.old/drivers/net/sk98lin/h/skrlmt.h      2004-10-19 05:55:36.000000000 +0800
5794 +++ linux-2.6.9.new/drivers/net/sk98lin/h/skrlmt.h      2006-12-07 14:35:03.000000000 +0800
5795 @@ -2,8 +2,8 @@
5796   *
5797   * Name:       skrlmt.h
5798   * Project:    GEnesis, PCI Gigabit Ethernet Adapter
5799 - * Version:    $Revision: 1.37 $
5800 - * Date:       $Date: 2003/04/15 09:43:43 $
5801 + * Version:    $Revision: 2.1 $
5802 + * Date:       $Date: 2003/10/27 14:16:09 $
5803   * Purpose:    Header file for Redundant Link ManagemenT.
5804   *
5805   ******************************************************************************/
5806 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/sktimer.h linux-2.6.9.new/drivers/net/sk98lin/h/sktimer.h
5807 --- linux-2.6.9.old/drivers/net/sk98lin/h/sktimer.h     2004-10-19 05:53:35.000000000 +0800
5808 +++ linux-2.6.9.new/drivers/net/sk98lin/h/sktimer.h     2006-12-07 14:35:03.000000000 +0800
5809 @@ -2,8 +2,8 @@
5810   *
5811   * Name:       sktimer.h
5812   * Project:    Gigabit Ethernet Adapters, Event Scheduler Module
5813 - * Version:    $Revision: 1.11 $
5814 - * Date:       $Date: 2003/09/16 12:58:18 $
5815 + * Version:    $Revision: 2.1 $
5816 + * Date:       $Date: 2003/10/27 14:16:09 $
5817   * Purpose:    Defines for the timer functions
5818   *
5819   ******************************************************************************/
5820 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/sktwsi.h linux-2.6.9.new/drivers/net/sk98lin/h/sktwsi.h
5821 --- linux-2.6.9.old/drivers/net/sk98lin/h/sktwsi.h      1970-01-01 08:00:00.000000000 +0800
5822 +++ linux-2.6.9.new/drivers/net/sk98lin/h/sktwsi.h      2006-12-07 14:35:03.000000000 +0800
5823 @@ -0,0 +1,177 @@
5824 +/******************************************************************************
5825 + *
5826 + * Name:       sktwsi.h
5827 + * Project:    Gigabit Ethernet Adapters, TWSI-Module
5828 + * Version:    $Revision: 1.1 $
5829 + * Date:       $Date: 2003/12/19 14:02:56 $
5830 + * Purpose:    Defines to access Voltage and Temperature Sensor
5831 + *
5832 + ******************************************************************************/
5833 +
5834 +/******************************************************************************
5835 + *
5836 + *     (C)Copyright 1998-2002 SysKonnect.
5837 + *     (C)Copyright 2002-2003 Marvell.
5838 + *
5839 + *     This program is free software; you can redistribute it and/or modify
5840 + *     it under the terms of the GNU General Public License as published by
5841 + *     the Free Software Foundation; either version 2 of the License, or
5842 + *     (at your option) any later version.
5843 + *
5844 + *     The information in this file is provided "AS IS" without warranty.
5845 + *
5846 + ******************************************************************************/
5847 +
5848 +/*
5849 + * SKTWSI.H    contains all TWSI specific defines
5850 + */
5851 +
5852 +#ifndef _SKTWSI_H_
5853 +#define _SKTWSI_H_
5854 +
5855 +typedef struct  s_Sensor SK_SENSOR;
5856 +
5857 +#include "h/skgetwsi.h"
5858 +
5859 +/*
5860 + * Define the TWSI events.
5861 + */
5862 +#define SK_I2CEV_IRQ   1       /* IRQ happened Event */
5863 +#define SK_I2CEV_TIM   2       /* Timeout event */
5864 +#define SK_I2CEV_CLEAR 3       /* Clear MIB Values */
5865 +
5866 +/*
5867 + * Define READ and WRITE Constants.
5868 + */
5869 +#define I2C_READ       0
5870 +#define I2C_WRITE      1
5871 +#define I2C_BURST      1
5872 +#define I2C_SINGLE     0
5873 +
5874 +#define SKERR_I2C_E001         (SK_ERRBASE_I2C+0)
5875 +#define SKERR_I2C_E001MSG      "Sensor index unknown"
5876 +#define SKERR_I2C_E002         (SKERR_I2C_E001+1)
5877 +#define SKERR_I2C_E002MSG      "TWSI: transfer does not complete"
5878 +#define SKERR_I2C_E003         (SKERR_I2C_E002+1)
5879 +#define SKERR_I2C_E003MSG      "LM80: NAK on device send"
5880 +#define SKERR_I2C_E004         (SKERR_I2C_E003+1)
5881 +#define SKERR_I2C_E004MSG      "LM80: NAK on register send"
5882 +#define SKERR_I2C_E005         (SKERR_I2C_E004+1)
5883 +#define SKERR_I2C_E005MSG      "LM80: NAK on device (2) send"
5884 +#define SKERR_I2C_E006         (SKERR_I2C_E005+1)
5885 +#define SKERR_I2C_E006MSG      "Unknown event"
5886 +#define SKERR_I2C_E007         (SKERR_I2C_E006+1)
5887 +#define SKERR_I2C_E007MSG      "LM80 read out of state"
5888 +#define SKERR_I2C_E008         (SKERR_I2C_E007+1)
5889 +#define SKERR_I2C_E008MSG      "Unexpected sensor read completed"
5890 +#define SKERR_I2C_E009         (SKERR_I2C_E008+1)
5891 +#define SKERR_I2C_E009MSG      "WARNING: temperature sensor out of range"
5892 +#define SKERR_I2C_E010         (SKERR_I2C_E009+1)
5893 +#define SKERR_I2C_E010MSG      "WARNING: voltage sensor out of range"
5894 +#define SKERR_I2C_E011         (SKERR_I2C_E010+1)
5895 +#define SKERR_I2C_E011MSG      "ERROR: temperature sensor out of range"
5896 +#define SKERR_I2C_E012         (SKERR_I2C_E011+1)
5897 +#define SKERR_I2C_E012MSG      "ERROR: voltage sensor out of range"
5898 +#define SKERR_I2C_E013         (SKERR_I2C_E012+1)
5899 +#define SKERR_I2C_E013MSG      "ERROR: couldn't init sensor"
5900 +#define SKERR_I2C_E014         (SKERR_I2C_E013+1)
5901 +#define SKERR_I2C_E014MSG      "WARNING: fan sensor out of range"
5902 +#define SKERR_I2C_E015         (SKERR_I2C_E014+1)
5903 +#define SKERR_I2C_E015MSG      "ERROR: fan sensor out of range"
5904 +#define SKERR_I2C_E016         (SKERR_I2C_E015+1)
5905 +#define SKERR_I2C_E016MSG      "TWSI: active transfer does not complete"
5906 +
5907 +/*
5908 + * Define Timeout values
5909 + */
5910 +#define SK_I2C_TIM_LONG                2000000L        /* 2 seconds */
5911 +#define SK_I2C_TIM_SHORT        100000L        /* 100 milliseconds */
5912 +#define SK_I2C_TIM_WATCH       1000000L        /* 1 second */
5913 +
5914 +/*
5915 + * Define trap and error log hold times
5916 + */
5917 +#ifndef        SK_SEN_ERR_TR_HOLD
5918 +#define SK_SEN_ERR_TR_HOLD             (4*SK_TICKS_PER_SEC)
5919 +#endif
5920 +#ifndef        SK_SEN_ERR_LOG_HOLD
5921 +#define SK_SEN_ERR_LOG_HOLD            (60*SK_TICKS_PER_SEC)
5922 +#endif
5923 +#ifndef        SK_SEN_WARN_TR_HOLD
5924 +#define SK_SEN_WARN_TR_HOLD            (15*SK_TICKS_PER_SEC)
5925 +#endif
5926 +#ifndef        SK_SEN_WARN_LOG_HOLD
5927 +#define SK_SEN_WARN_LOG_HOLD   (15*60*SK_TICKS_PER_SEC)
5928 +#endif
5929 +
5930 +/*
5931 + * Defines for SenType
5932 + */
5933 +#define SK_SEN_UNKNOWN 0
5934 +#define SK_SEN_TEMP            1
5935 +#define SK_SEN_VOLT            2
5936 +#define SK_SEN_FAN             3
5937 +
5938 +/*
5939 + * Define for the SenErrorFlag
5940 + */
5941 +#define SK_SEN_ERR_NOT_PRESENT 0       /* Error Flag: Sensor not present */
5942 +#define SK_SEN_ERR_OK                  1       /* Error Flag: O.K. */
5943 +#define SK_SEN_ERR_WARN                        2       /* Error Flag: Warning */
5944 +#define SK_SEN_ERR_ERR                 3       /* Error Flag: Error */
5945 +#define SK_SEN_ERR_FAULTY              4       /* Error Flag: Faulty */
5946 +
5947 +/*
5948 + * Define the Sensor struct
5949 + */
5950 +struct s_Sensor {
5951 +       char    *SenDesc;                       /* Description */
5952 +       int             SenType;                        /* Voltage or Temperature */
5953 +       SK_I32  SenValue;                       /* Current value of the sensor */
5954 +       SK_I32  SenThreErrHigh;         /* High error Threshhold of this sensor */
5955 +       SK_I32  SenThreWarnHigh;        /* High warning Threshhold of this sensor */
5956 +       SK_I32  SenThreErrLow;          /* Lower error Threshold of the sensor */
5957 +       SK_I32  SenThreWarnLow;         /* Lower warning Threshold of the sensor */
5958 +       int             SenErrFlag;                     /* Sensor indicated an error */
5959 +       SK_BOOL SenInit;                        /* Is sensor initialized ? */
5960 +       SK_U64  SenErrCts;                      /* Error trap counter */
5961 +       SK_U64  SenWarnCts;                     /* Warning trap counter */
5962 +       SK_U64  SenBegErrTS;            /* Begin error timestamp */
5963 +       SK_U64  SenBegWarnTS;           /* Begin warning timestamp */
5964 +       SK_U64  SenLastErrTrapTS;       /* Last error trap timestamp */
5965 +       SK_U64  SenLastErrLogTS;        /* Last error log timestamp */
5966 +       SK_U64  SenLastWarnTrapTS;      /* Last warning trap timestamp */
5967 +       SK_U64  SenLastWarnLogTS;       /* Last warning log timestamp */
5968 +       int             SenState;                       /* Sensor State (see HW specific include) */
5969 +       int             (*SenRead)(SK_AC *pAC, SK_IOC IoC, struct s_Sensor *pSen);
5970 +                                                               /* Sensors read function */
5971 +       SK_U16  SenReg;                         /* Register Address for this sensor */
5972 +       SK_U8   SenDev;                         /* Device Selection for this sensor */
5973 +};
5974 +
5975 +typedef        struct  s_I2c {
5976 +       SK_SENSOR       SenTable[SK_MAX_SENSORS];       /* Sensor Table */
5977 +       int                     CurrSens;       /* Which sensor is currently queried */
5978 +       int                     MaxSens;        /* Max. number of sensors */
5979 +       int                     TimerMode;      /* Use the timer also to watch the state machine */
5980 +       int                     InitLevel;      /* Initialized Level */
5981 +#ifndef SK_DIAG
5982 +       int                     DummyReads;     /* Number of non-checked dummy reads */
5983 +       SK_TIMER        SenTimer;       /* Sensors timer */
5984 +#endif /* !SK_DIAG */
5985 +} SK_I2C;
5986 +
5987 +extern int SkI2cInit(SK_AC *pAC, SK_IOC IoC, int Level);
5988 +extern int SkI2cWrite(SK_AC *pAC, SK_IOC IoC, SK_U32 Data, int Dev, int Size,
5989 +                                          int Reg, int Burst);
5990 +extern int SkI2cReadSensor(SK_AC *pAC, SK_IOC IoC, SK_SENSOR *pSen);
5991 +#ifdef SK_DIAG
5992 +extern SK_U32 SkI2cRead(SK_AC *pAC, SK_IOC IoC, int Dev, int Size, int Reg,
5993 +                                                int Burst);
5994 +#else /* !SK_DIAG */
5995 +extern int SkI2cEvent(SK_AC *pAC, SK_IOC IoC, SK_U32 Event, SK_EVPARA Para);
5996 +extern void SkI2cWaitIrq(SK_AC *pAC, SK_IOC IoC);
5997 +extern void SkI2cIsr(SK_AC *pAC, SK_IOC IoC);
5998 +#endif /* !SK_DIAG */
5999 +#endif /* n_SKTWSI_H */
6000 +
6001 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/sktypes.h linux-2.6.9.new/drivers/net/sk98lin/h/sktypes.h
6002 --- linux-2.6.9.old/drivers/net/sk98lin/h/sktypes.h     2004-10-19 05:55:35.000000000 +0800
6003 +++ linux-2.6.9.new/drivers/net/sk98lin/h/sktypes.h     2006-12-07 14:35:03.000000000 +0800
6004 @@ -2,8 +2,8 @@
6005   *
6006   * Name:       sktypes.h
6007   * Project:    GEnesis, PCI Gigabit Ethernet Adapter
6008 - * Version:    $Revision: 1.2 $
6009 - * Date:       $Date: 2003/10/07 08:16:51 $
6010 + * Version:    $Revision: 1.2.2.1 $
6011 + * Date:       $Date: 2005/04/11 09:00:53 $
6012   * Purpose:    Define data types for Linux
6013   *
6014   ******************************************************************************/
6015 @@ -11,7 +11,7 @@
6016  /******************************************************************************
6017   *
6018   *     (C)Copyright 1998-2002 SysKonnect GmbH.
6019 - *     (C)Copyright 2002-2003 Marvell.
6020 + *     (C)Copyright 2002-2005 Marvell.
6021   *
6022   *     This program is free software; you can redistribute it and/or modify
6023   *     it under the terms of the GNU General Public License as published by
6024 @@ -22,48 +22,28 @@
6025   *
6026   ******************************************************************************/
6027
6028 -/******************************************************************************
6029 - *
6030 - * Description:
6031 - *
6032 - * In this file, all data types that are needed by the common modules
6033 - * are mapped to Linux data types.
6034 - *
6035 - *
6036 - * Include File Hierarchy:
6037 - *
6038 - *
6039 - ******************************************************************************/
6040 -
6041  #ifndef __INC_SKTYPES_H
6042  #define __INC_SKTYPES_H
6043
6044 -
6045 -/* defines *******************************************************************/
6046 -
6047 -/*
6048 - * Data types with a specific size. 'I' = signed, 'U' = unsigned.
6049 - */
6050 -#define SK_I8  s8
6051 -#define SK_U8  u8
6052 -#define SK_I16 s16
6053 -#define SK_U16 u16
6054 -#define SK_I32 s32
6055 -#define SK_U32 u32
6056 -#define SK_I64 s64
6057 -#define SK_U64 u64
6058 -
6059 -#define SK_UPTR        ulong           /* casting pointer <-> integral */
6060 -
6061 -/*
6062 -* Boolean type.
6063 -*/
6064 -#define SK_BOOL                SK_U8
6065 -#define SK_FALSE       0
6066 -#define SK_TRUE                (!SK_FALSE)
6067 -
6068 -/* typedefs *******************************************************************/
6069 -
6070 -/* function prototypes ********************************************************/
6071 +#define SK_I8    s8    /* 8 bits (1 byte) signed       */
6072 +#define SK_U8    u8    /* 8 bits (1 byte) unsigned     */
6073 +#define SK_I16  s16    /* 16 bits (2 bytes) signed     */
6074 +#define SK_U16  u16    /* 16 bits (2 bytes) unsigned   */
6075 +#define SK_I32  s32    /* 32 bits (4 bytes) signed     */
6076 +#define SK_U32  u32    /* 32 bits (4 bytes) unsigned   */
6077 +#define SK_I64  s64    /* 64 bits (8 bytes) signed     */
6078 +#define SK_U64  u64    /* 64 bits (8 bytes) unsigned   */
6079 +
6080 +#define SK_UPTR        ulong  /* casting pointer <-> integral */
6081 +
6082 +#define SK_BOOL   SK_U8
6083 +#define SK_FALSE  0
6084 +#define SK_TRUE   (!SK_FALSE)
6085
6086  #endif /* __INC_SKTYPES_H */
6087 +
6088 +/*******************************************************************************
6089 + *
6090 + * End of file
6091 + *
6092 + ******************************************************************************/
6093 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/skversion.h linux-2.6.9.new/drivers/net/sk98lin/h/skversion.h
6094 --- linux-2.6.9.old/drivers/net/sk98lin/h/skversion.h   2004-10-19 05:54:32.000000000 +0800
6095 +++ linux-2.6.9.new/drivers/net/sk98lin/h/skversion.h   2006-12-07 14:35:03.000000000 +0800
6096 @@ -1,17 +1,17 @@
6097  /******************************************************************************
6098   *
6099 - * Name:       version.h
6100 + * Name:       skversion.h
6101   * Project:    GEnesis, PCI Gigabit Ethernet Adapter
6102 - * Version:    $Revision: 1.5 $
6103 - * Date:       $Date: 2003/10/07 08:16:51 $
6104 - * Purpose:    SK specific Error log support
6105 + * Version:    $Revision: 1.3.2.1 $
6106 + * Date:       $Date: 2005/04/11 09:00:53 $
6107 + * Purpose:    specific version strings and numbers
6108   *
6109   ******************************************************************************/
6110
6111  /******************************************************************************
6112   *
6113   *     (C)Copyright 1998-2002 SysKonnect GmbH.
6114 - *     (C)Copyright 2002-2003 Marvell.
6115 + *     (C)Copyright 2002-2005 Marvell.
6116   *
6117   *     This program is free software; you can redistribute it and/or modify
6118   *     it under the terms of the GNU General Public License as published by
6119 @@ -22,17 +22,15 @@
6120   *
6121   ******************************************************************************/
6122
6123 -#ifdef lint
6124 -static const char SysKonnectFileId[] = "@(#) (C) SysKonnect GmbH.";
6125 -static const char SysKonnectBuildNumber[] =
6126 -       "@(#)SK-BUILD: 6.23 PL: 01";
6127 -#endif /* !defined(lint) */
6128 -
6129 -#define BOOT_STRING    "sk98lin: Network Device Driver v6.23\n" \
6130 -                       "(C)Copyright 1999-2004 Marvell(R)."
6131 -
6132 -#define VER_STRING     "6.23"
6133 -#define DRIVER_FILE_NAME       "sk98lin"
6134 -#define DRIVER_REL_DATE                "Feb-13-2004"
6135 -
6136 +#define BOOT_STRING  "sk98lin: Network Device Driver v8.23.1.3\n" \
6137 +                     "(C)Copyright 1999-2005 Marvell(R)."
6138 +#define VER_STRING   "8.23.1.3"
6139 +#define PATCHLEVEL   "01"
6140 +#define DRIVER_FILE_NAME   "sk98lin"
6141 +#define DRIVER_REL_DATE    "Jun-20-2005"
6142
6143 +/*******************************************************************************
6144 + *
6145 + * End of file
6146 + *
6147 + ******************************************************************************/
6148 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/skvpd.h linux-2.6.9.new/drivers/net/sk98lin/h/skvpd.h
6149 --- linux-2.6.9.old/drivers/net/sk98lin/h/skvpd.h       2004-10-19 05:53:46.000000000 +0800
6150 +++ linux-2.6.9.new/drivers/net/sk98lin/h/skvpd.h       2006-12-07 14:35:03.000000000 +0800
6151 @@ -1,22 +1,22 @@
6152  /******************************************************************************
6153   *
6154   * Name:       skvpd.h
6155 - * Project:    GEnesis, PCI Gigabit Ethernet Adapter
6156 - * Version:    $Revision: 1.15 $
6157 - * Date:       $Date: 2003/01/13 10:39:38 $
6158 + * Project:    Gigabit Ethernet Adapters, VPD-Module
6159 + * Version:    $Revision: 2.6 $
6160 + * Date:       $Date: 2004/11/09 15:18:00 $
6161   * Purpose:    Defines and Macros for VPD handling
6162   *
6163   ******************************************************************************/
6164
6165  /******************************************************************************
6166   *
6167 - *     (C)Copyright 1998-2003 SysKonnect GmbH.
6168 + *     (C)Copyright 1998-2002 SysKonnect.
6169 + *     (C)Copyright 2002-2004 Marvell.
6170   *
6171   *     This program is free software; you can redistribute it and/or modify
6172   *     it under the terms of the GNU General Public License as published by
6173   *     the Free Software Foundation; either version 2 of the License, or
6174   *     (at your option) any later version.
6175 - *
6176   *     The information in this file is provided "AS IS" without warranty.
6177   *
6178   ******************************************************************************/
6179 @@ -31,7 +31,7 @@
6180  /*
6181   * Define Resource Type Identifiers and VPD keywords
6182   */
6183 -#define        RES_ID          0x82    /* Resource Type ID String (Product Name) */
6184 +#define RES_ID         0x82    /* Resource Type ID String (Product Name) */
6185  #define RES_VPD_R      0x90    /* start of VPD read only area */
6186  #define RES_VPD_W      0x91    /* start of VPD read/write area */
6187  #define RES_END                0x78    /* Resource Type End Tag */
6188 @@ -40,14 +40,16 @@
6189  #define VPD_NAME       "Name"  /* Product Name, VPD name of RES_ID */
6190  #endif /* VPD_NAME */
6191  #define VPD_PN         "PN"    /* Adapter Part Number */
6192 -#define        VPD_EC          "EC"    /* Adapter Engineering Level */
6193 +#define VPD_EC         "EC"    /* Adapter Engineering Level */
6194  #define VPD_MN         "MN"    /* Manufacture ID */
6195  #define VPD_SN         "SN"    /* Serial Number */
6196  #define VPD_CP         "CP"    /* Extended Capability */
6197  #define VPD_RV         "RV"    /* Checksum and Reserved */
6198 -#define        VPD_YA          "YA"    /* Asset Tag Identifier */
6199 +#define VPD_YA         "YA"    /* Asset Tag Identifier */
6200  #define VPD_VL         "VL"    /* First Error Log Message (SK specific) */
6201  #define VPD_VF         "VF"    /* Second Error Log Message (SK specific) */
6202 +#define VPD_VB         "VB"    /* Boot Agent ROM Configuration (SK specific) */
6203 +#define VPD_VE         "VE"    /* EFI UNDI Configuration (SK specific) */
6204  #define VPD_RW         "RW"    /* Remaining Read / Write Area */
6205
6206  /* 'type' values for vpd_setup_para() */
6207 @@ -55,7 +57,7 @@
6208  #define VPD_RW_KEY     2       /* RW keys are "Yx", "Vx", and "RW" */
6209
6210  /* 'op' values for vpd_setup_para() */
6211 -#define        ADD_KEY         1       /* add the key at the pos "RV" or "RW" */
6212 +#define ADD_KEY                1       /* add the key at the pos "RV" or "RW" */
6213  #define OWR_KEY                2       /* overwrite key if already exists */
6214
6215  /*
6216 @@ -64,18 +66,18 @@
6217
6218  #define VPD_DEV_ID_GENESIS     0x4300
6219
6220 -#define        VPD_SIZE_YUKON          256
6221 -#define        VPD_SIZE_GENESIS        512
6222 -#define        VPD_SIZE                        512
6223 +#define VPD_SIZE_YUKON         256
6224 +#define VPD_SIZE_GENESIS       512
6225 +#define VPD_SIZE                       512
6226  #define VPD_READ       0x0000
6227  #define VPD_WRITE      0x8000
6228
6229  #define VPD_STOP(pAC,IoC)      VPD_OUT16(pAC,IoC,PCI_VPD_ADR_REG,VPD_WRITE)
6230
6231 -#define VPD_GET_RES_LEN(p)     ((unsigned int) \
6232 -                                       (* (SK_U8 *)&(p)[1]) |\
6233 -                                       ((* (SK_U8 *)&(p)[2]) << 8))
6234 -#define VPD_GET_VPD_LEN(p)     ((unsigned int)(* (SK_U8 *)&(p)[2]))
6235 +#define VPD_GET_RES_LEN(p)     ((unsigned int)\
6236 +                                       (*(SK_U8 *)&(p)[1]) |\
6237 +                                       ((*(SK_U8 *)&(p)[2]) << 8))
6238 +#define VPD_GET_VPD_LEN(p)     ((unsigned int)(*(SK_U8 *)&(p)[2]))
6239  #define VPD_GET_VAL(p)         ((char *)&(p)[3])
6240
6241  #define VPD_MAX_LEN    50
6242 @@ -126,7 +128,7 @@
6243  /*
6244   * System specific VPD macros
6245   */
6246 -#ifndef SKDIAG
6247 +#ifndef SK_DIAG
6248  #ifndef VPD_DO_IO
6249  #define VPD_OUT8(pAC,IoC,Addr,Val)     (void)SkPciWriteCfgByte(pAC,Addr,Val)
6250  #define VPD_OUT16(pAC,IoC,Addr,Val)    (void)SkPciWriteCfgWord(pAC,Addr,Val)
6251 @@ -135,61 +137,61 @@
6252  #define VPD_IN16(pAC,IoC,Addr,pVal)    (void)SkPciReadCfgWord(pAC,Addr,pVal)
6253  #define VPD_IN32(pAC,IoC,Addr,pVal)    (void)SkPciReadCfgDWord(pAC,Addr,pVal)
6254  #else  /* VPD_DO_IO */
6255 -#define VPD_OUT8(pAC,IoC,Addr,Val)     SK_OUT8(IoC,PCI_C(Addr),Val)
6256 -#define VPD_OUT16(pAC,IoC,Addr,Val)    SK_OUT16(IoC,PCI_C(Addr),Val)
6257 -#define VPD_OUT32(pAC,IoC,Addr,Val)    SK_OUT32(IoC,PCI_C(Addr),Val)
6258 -#define VPD_IN8(pAC,IoC,Addr,pVal)     SK_IN8(IoC,PCI_C(Addr),pVal)
6259 -#define VPD_IN16(pAC,IoC,Addr,pVal)    SK_IN16(IoC,PCI_C(Addr),pVal)
6260 -#define VPD_IN32(pAC,IoC,Addr,pVal)    SK_IN32(IoC,PCI_C(Addr),pVal)
6261 +#define VPD_OUT8(pAC,IoC,Addr,Val)     SK_OUT8(IoC,PCI_C(pAC,Addr),Val)
6262 +#define VPD_OUT16(pAC,IoC,Addr,Val)    SK_OUT16(IoC,PCI_C(pAC,Addr),Val)
6263 +#define VPD_OUT32(pAC,IoC,Addr,Val)    SK_OUT32(IoC,PCI_C(pAC,Addr),Val)
6264 +#define VPD_IN8(pAC,IoC,Addr,pVal)     SK_IN8(IoC,PCI_C(pAC,Addr),pVal)
6265 +#define VPD_IN16(pAC,IoC,Addr,pVal)    SK_IN16(IoC,PCI_C(pAC,Addr),pVal)
6266 +#define VPD_IN32(pAC,IoC,Addr,pVal)    SK_IN32(IoC,PCI_C(pAC,Addr),pVal)
6267  #endif /* VPD_DO_IO */
6268 -#else  /* SKDIAG */
6269 +#else  /* SK_DIAG */
6270  #define VPD_OUT8(pAC,Ioc,Addr,Val) {                   \
6271                 if ((pAC)->DgT.DgUseCfgCycle)                   \
6272                         SkPciWriteCfgByte(pAC,Addr,Val);        \
6273                 else                                                                    \
6274 -                       SK_OUT8(pAC,PCI_C(Addr),Val);           \
6275 +                       SK_OUT8(pAC,PCI_C(pAC,Addr),Val);       \
6276                 }
6277  #define VPD_OUT16(pAC,Ioc,Addr,Val) {                  \
6278                 if ((pAC)->DgT.DgUseCfgCycle)                   \
6279                         SkPciWriteCfgWord(pAC,Addr,Val);        \
6280                 else                                            \
6281 -                       SK_OUT16(pAC,PCI_C(Addr),Val);          \
6282 +                       SK_OUT16(pAC,PCI_C(pAC,Addr),Val);      \
6283                 }
6284  #define VPD_OUT32(pAC,Ioc,Addr,Val) {                  \
6285                 if ((pAC)->DgT.DgUseCfgCycle)                   \
6286                         SkPciWriteCfgDWord(pAC,Addr,Val);       \
6287                 else                                            \
6288 -                       SK_OUT32(pAC,PCI_C(Addr),Val);          \
6289 +                       SK_OUT32(pAC,PCI_C(pAC,Addr),Val);      \
6290                 }
6291  #define VPD_IN8(pAC,Ioc,Addr,pVal) {                   \
6292 -               if ((pAC)->DgT.DgUseCfgCycle)                   \
6293 +               if ((pAC)->DgT.DgUseCfgCycle)                   \
6294                         SkPciReadCfgByte(pAC,Addr,pVal);        \
6295                 else                                            \
6296 -                       SK_IN8(pAC,PCI_C(Addr),pVal);           \
6297 +                       SK_IN8(pAC,PCI_C(pAC,Addr),pVal);       \
6298                 }
6299  #define VPD_IN16(pAC,Ioc,Addr,pVal) {                  \
6300 -               if ((pAC)->DgT.DgUseCfgCycle)                   \
6301 +               if ((pAC)->DgT.DgUseCfgCycle)                   \
6302                         SkPciReadCfgWord(pAC,Addr,pVal);        \
6303                 else                                            \
6304 -                       SK_IN16(pAC,PCI_C(Addr),pVal);          \
6305 +                       SK_IN16(pAC,PCI_C(pAC,Addr),pVal);      \
6306                 }
6307  #define VPD_IN32(pAC,Ioc,Addr,pVal) {                  \
6308                 if ((pAC)->DgT.DgUseCfgCycle)                   \
6309                         SkPciReadCfgDWord(pAC,Addr,pVal);       \
6310                 else                                            \
6311 -                       SK_IN32(pAC,PCI_C(Addr),pVal);          \
6312 +                       SK_IN32(pAC,PCI_C(pAC,Addr),pVal);      \
6313                 }
6314 -#endif /* nSKDIAG */
6315 +#endif /* SK_DIAG */
6316
6317  /* function prototypes ********************************************************/
6318
6319  #ifndef        SK_KR_PROTO
6320 -#ifdef SKDIAG
6321 +#ifdef SK_DIAG
6322  extern SK_U32  VpdReadDWord(
6323         SK_AC           *pAC,
6324         SK_IOC          IoC,
6325         int                     addr);
6326 -#endif /* SKDIAG */
6327 +#endif /* SK_DIAG */
6328
6329  extern int     VpdSetupPara(
6330         SK_AC           *pAC,
6331 @@ -240,7 +242,12 @@
6332         SK_IOC          IoC,
6333         char            *msg);
6334
6335 -#ifdef SKDIAG
6336 +int VpdInit(
6337 +       SK_AC           *pAC,
6338 +       SK_IOC          IoC);
6339 +
6340 +#if defined(SK_DIAG) || defined(SK_ASF)
6341 +
6342  extern int     VpdReadBlock(
6343         SK_AC           *pAC,
6344         SK_IOC          IoC,
6345 @@ -254,7 +261,9 @@
6346         char            *buf,
6347         int                     addr,
6348         int                     len);
6349 -#endif /* SKDIAG */
6350 +
6351 +#endif /* SK_DIAG || SK_ASF */
6352 +
6353  #else  /* SK_KR_PROTO */
6354  extern SK_U32  VpdReadDWord();
6355  extern int     VpdSetupPara();
6356 @@ -269,3 +278,4 @@
6357  #endif /* SK_KR_PROTO */
6358
6359  #endif /* __INC_SKVPD_H_ */
6360 +
6361 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/sky2le.h linux-2.6.9.new/drivers/net/sk98lin/h/sky2le.h
6362 --- linux-2.6.9.old/drivers/net/sk98lin/h/sky2le.h      1970-01-01 08:00:00.000000000 +0800
6363 +++ linux-2.6.9.new/drivers/net/sk98lin/h/sky2le.h      2006-12-07 14:35:03.000000000 +0800
6364 @@ -0,0 +1,891 @@
6365 +/******************************************************************************
6366 + *
6367 + * Name:       sky2le.h
6368 + * Project:    Gigabit Ethernet Adapters, Common Modules
6369 + * Version:    $Revision: 1.9 $
6370 + * Date:       $Date: 2005/01/26 10:53:34 $
6371 + * Purpose:    Common list element definitions and access macros.
6372 + *
6373 + ******************************************************************************/
6374 +
6375 +/******************************************************************************
6376 + *
6377 + *     (C)Copyright 2003-2004 Marvell
6378 + *
6379 + *     This program is free software; you can redistribute it and/or modify
6380 + *     it under the terms of the GNU General Public License as published by
6381 + *     the Free Software Foundation; either version 2 of the License, or
6382 + *     (at your option) any later version.
6383 + *     The information in this file is provided "AS IS" without warranty.
6384 + *
6385 + ******************************************************************************/
6386 +
6387 +#ifndef __INC_SKY2LE_H
6388 +#define __INC_SKY2LE_H
6389 +
6390 +#ifdef __cplusplus
6391 +extern "C" {
6392 +#endif /* __cplusplus */
6393 +
6394 +/* defines ********************************************************************/
6395 +
6396 +#define MIN_LEN_OF_LE_TAB      128
6397 +#define MAX_LEN_OF_LE_TAB      4096
6398 +#ifdef USE_POLLING_UNIT
6399 +#define NUM_LE_POLLING_UNIT    2
6400 +#endif
6401 +#define MAX_FRAG_OVERHEAD      10
6402 +
6403 +/* Macro for aligning a given value */
6404 +#define SK_ALIGN_SIZE(Value, Alignment, AlignedVal) {                                  \
6405 +       (AlignedVal) = (((Value) + (Alignment) - 1) & (~((Alignment) - 1)));\
6406 +}
6407 +
6408 +/******************************************************************************
6409 + *
6410 + * LE2DWord() - Converts the given Little Endian value to machine order value
6411 + *
6412 + * Description:
6413 + *     This function converts the Little Endian value received as an argument to
6414 + *     the machine order value.
6415 + *
6416 + * Returns:
6417 + *     The converted value
6418 + *
6419 + */
6420 +
6421 +#ifdef SK_LITTLE_ENDIAN
6422 +
6423 +#ifndef        SK_USE_REV_DESC
6424 +#define LE2DWord(value)        (value)
6425 +#else  /* SK_USE_REV_DESC */
6426 +#define LE2DWord(value)                                        \
6427 +       ((((value)<<24L) & 0xff000000L) +       \
6428 +        (((value)<< 8L) & 0x00ff0000L) +       \
6429 +        (((value)>> 8L) & 0x0000ff00L) +       \
6430 +        (((value)>>24L) & 0x000000ffL))
6431 +#endif /* SK_USE_REV_DESC */
6432 +
6433 +#else  /* !SK_LITTLE_ENDIAN */
6434 +
6435 +#ifndef        SK_USE_REV_DESC
6436 +#define LE2DWord(value)                                        \
6437 +       ((((value)<<24L) & 0xff000000L) +       \
6438 +        (((value)<< 8L) & 0x00ff0000L) +       \
6439 +        (((value)>> 8L) & 0x0000ff00L) +       \
6440 +        (((value)>>24L) & 0x000000ffL))
6441 +#else  /* SK_USE_REV_DESC */
6442 +#define LE2DWord(value)        (value)
6443 +#endif /* SK_USE_REV_DESC */
6444 +
6445 +#endif /* !SK_LITTLE_ENDIAN */
6446 +
6447 +/******************************************************************************
6448 + *
6449 + * DWord2LE() - Converts the given value to a Little Endian value
6450 + *
6451 + * Description:
6452 + *     This function converts the value received as an argument to a Little Endian
6453 + *     value on Big Endian machines. If the machine running the code is Little
6454 + *     Endian, then no conversion is done.
6455 + *
6456 + * Returns:
6457 + *     The converted value
6458 + *
6459 + */
6460 +
6461 +#ifdef SK_LITTLE_ENDIAN
6462 +
6463 +#ifndef        SK_USE_REV_DESC
6464 +#define DWord2LE(value) (value)
6465 +#else  /* SK_USE_REV_DESC */
6466 +#define DWord2LE(value)                                        \
6467 +       ((((value)<<24L) & 0xff000000L) +       \
6468 +        (((value)<< 8L) & 0x00ff0000L) +       \
6469 +        (((value)>> 8L) & 0x0000ff00L) +       \
6470 +        (((value)>>24L) & 0x000000ffL))
6471 +#endif /* SK_USE_REV_DESC */
6472 +
6473 +#else  /* !SK_LITTLE_ENDIAN */
6474 +
6475 +#ifndef        SK_USE_REV_DESC
6476 +#define DWord2LE(value)                                        \
6477 +       ((((value)<<24L) & 0xff000000L) +       \
6478 +        (((value)<< 8L) & 0x00ff0000L) +       \
6479 +        (((value)>> 8L) & 0x0000ff00L) +       \
6480 +        (((value)>>24L) & 0x000000ffL))
6481 +#else  /* SK_USE_REV_DESC */
6482 +#define DWord2LE(value) (value)
6483 +#endif /* SK_USE_REV_DESC */
6484 +#endif /* !SK_LITTLE_ENDIAN */
6485 +
6486 +/******************************************************************************
6487 + *
6488 + * LE2Word() - Converts the given Little Endian value to machine order value
6489 + *
6490 + * Description:
6491 + *     This function converts the Little Endian value received as an argument to
6492 + *     the machine order value.
6493 + *
6494 + * Returns:
6495 + *     The converted value
6496 + *
6497 + */
6498 +
6499 +#ifdef SK_LITTLE_ENDIAN
6500 +#ifndef        SK_USE_REV_DESC
6501 +#define LE2Word(value) (value)
6502 +#else  /* SK_USE_REV_DESC */
6503 +#define LE2Word(value)                         \
6504 +       ((((value)<< 8L) & 0xff00) +    \
6505 +        (((value)>> 8L) & 0x00ff))
6506 +#endif /* SK_USE_REV_DESC */
6507 +
6508 +#else  /* !SK_LITTLE_ENDIAN */
6509 +#ifndef        SK_USE_REV_DESC
6510 +#define LE2Word(value)                         \
6511 +       ((((value)<< 8L) & 0xff00) +    \
6512 +        (((value)>> 8L) & 0x00ff))
6513 +#else  /* SK_USE_REV_DESC */
6514 +#define LE2Word(value) (value)
6515 +#endif /* SK_USE_REV_DESC */
6516 +#endif /* !SK_LITTLE_ENDIAN */
6517 +
6518 +/******************************************************************************
6519 + *
6520 + * Word2LE() - Converts the given value to a Little Endian value
6521 + *
6522 + * Description:
6523 + *     This function converts the value received as an argument to a Little Endian
6524 + *     value on Big Endian machines. If the machine running the code is Little
6525 + *     Endian, then no conversion is done.
6526 + *
6527 + * Returns:
6528 + *     The converted value
6529 + *
6530 + */
6531 +
6532 +#ifdef SK_LITTLE_ENDIAN
6533 +#ifndef        SK_USE_REV_DESC
6534 +#define Word2LE(value) (value)
6535 +#else  /* SK_USE_REV_DESC */
6536 +#define Word2LE(value)                         \
6537 +       ((((value)<< 8L) & 0xff00) +    \
6538 +        (((value)>> 8L) & 0x00ff))
6539 +#endif /* SK_USE_REV_DESC */
6540 +
6541 +#else  /* !SK_LITTLE_ENDIAN */
6542 +#ifndef        SK_USE_REV_DESC
6543 +#define Word2LE(value)                         \
6544 +       ((((value)<< 8L) & 0xff00) +    \
6545 +        (((value)>> 8L) & 0x00ff))
6546 +#else  /* SK_USE_REV_DESC */
6547 +#define Word2LE(value) (value)
6548 +#endif /* SK_USE_REV_DESC */
6549 +#endif /* !SK_LITTLE_ENDIAN */
6550 +
6551 +/******************************************************************************
6552 + *
6553 + * Transmit list element macros
6554 + *
6555 + */
6556 +
6557 +#define TXLE_SET_ADDR(pLE, Addr)       \
6558 +       ((pLE)->Tx.TxUn.BufAddr = DWord2LE(Addr))
6559 +#define TXLE_SET_LSLEN(pLE, Len)       \
6560 +       ((pLE)->Tx.TxUn.LargeSend.Length = Word2LE(Len))
6561 +#define TXLE_SET_STACS(pLE, Start)     \
6562 +       ((pLE)->Tx.TxUn.ChkSum.TxTcpSp = Word2LE(Start))
6563 +#define TXLE_SET_WRICS(pLE, Write)     \
6564 +       ((pLE)->Tx.TxUn.ChkSum.TxTcpWp = Word2LE(Write))
6565 +#define TXLE_SET_INICS(pLE, Ini)       ((pLE)->Tx.Send.InitCsum = Word2LE(Ini))
6566 +#define TXLE_SET_LEN(pLE, Len)         ((pLE)->Tx.Send.BufLen = Word2LE(Len))
6567 +#define TXLE_SET_VLAN(pLE, Vlan)       ((pLE)->Tx.Send.VlanTag = Word2LE(Vlan))
6568 +#define TXLE_SET_LCKCS(pLE, Lock)      ((pLE)->Tx.ControlFlags = (Lock))
6569 +#define TXLE_SET_CTRL(pLE, Ctrl)       ((pLE)->Tx.ControlFlags = (Ctrl))
6570 +#define TXLE_SET_OPC(pLE, Opc)         ((pLE)->Tx.Opcode = (Opc))
6571 +
6572 +#define TXLE_GET_ADDR(pLE)             LE2DWord((pLE)->Tx.TxUn.BufAddr)
6573 +#define TXLE_GET_LSLEN(pLE)            LE2Word((pLE)->Tx.TxUn.LargeSend.Length)
6574 +#define TXLE_GET_STACS(pLE)            LE2Word((pLE)->Tx.TxUn.ChkSum.TxTcpSp)
6575 +#define TXLE_GET_WRICS(pLE)            LE2Word((pLE)->Tx.TxUn.ChkSum.TxTcpWp)
6576 +#define TXLE_GET_INICS(pLE)            LE2Word((pLE)->Tx.Send.InitCsum)
6577 +#define TXLE_GET_LEN(pLE)              LE2Word((pLE)->Tx.Send.BufLen)
6578 +#define TXLE_GET_VLAN(pLE)             LE2Word((pLE)->Tx.Send.VlanTag)
6579 +#define TXLE_GET_LCKCS(pLE)            ((pLE)->Tx.ControlFlags)
6580 +#define TXLE_GET_CTRL(pLE)             ((pLE)->Tx.ControlFlags)
6581 +#define TXLE_GET_OPC(pLE)              ((pLE)->Tx.Opcode)
6582 +
6583 +/******************************************************************************
6584 + *
6585 + * Receive list element macros
6586 + *
6587 + */
6588 +
6589 +#define RXLE_SET_ADDR(pLE, Addr)       \
6590 +       ((pLE)->Rx.RxUn.BufAddr = (SK_U32) DWord2LE(Addr))
6591 +#define RXLE_SET_STACS2(pLE, Offs)     \
6592 +       ((pLE)->Rx.RxUn.ChkSum.RxTcpSp2 = Word2LE(Offs))
6593 +#define RXLE_SET_STACS1(pLE, Offs)     \
6594 +       ((pLE)->Rx.RxUn.ChkSum.RxTcpSp1 = Word2LE(Offs))
6595 +#define RXLE_SET_LEN(pLE, Len)         ((pLE)->Rx.BufferLength = Word2LE(Len))
6596 +#define RXLE_SET_CTRL(pLE, Ctrl)       ((pLE)->Rx.ControlFlags = (Ctrl))
6597 +#define RXLE_SET_OPC(pLE, Opc)         ((pLE)->Rx.Opcode = (Opc))
6598 +
6599 +#define RXLE_GET_ADDR(pLE)             LE2DWord((pLE)->Rx.RxUn.BufAddr)
6600 +#define RXLE_GET_STACS2(pLE)   LE2Word((pLE)->Rx.RxUn.ChkSum.RxTcpSp2)
6601 +#define RXLE_GET_STACS1(pLE)   LE2Word((pLE)->Rx.RxUn.ChkSum.RxTcpSp1)
6602 +#define RXLE_GET_LEN(pLE)              LE2Word((pLE)->Rx.BufferLength)
6603 +#define RXLE_GET_CTRL(pLE)             ((pLE)->Rx.ControlFlags)
6604 +#define RXLE_GET_OPC(pLE)              ((pLE)->Rx.Opcode)
6605 +
6606 +/******************************************************************************
6607 + *
6608 + * Status list element macros
6609 + *
6610 + */
6611 +
6612 +#define STLE_SET_OPC(pLE, Opc)         ((pLE)->St.Opcode = (Opc))
6613 +
6614 +#define STLE_GET_FRSTATUS(pLE) LE2DWord((pLE)->St.StUn.StRxStatWord)
6615 +#define STLE_GET_TIST(pLE)             LE2DWord((pLE)->St.StUn.StRxTimeStamp)
6616 +#define STLE_GET_TCP1(pLE)             LE2Word((pLE)->St.StUn.StRxTCPCSum.RxTCPSum1)
6617 +#define STLE_GET_TCP2(pLE)             LE2Word((pLE)->St.StUn.StRxTCPCSum.RxTCPSum2)
6618 +#define STLE_GET_LEN(pLE)              LE2Word((pLE)->St.Stat.BufLen)
6619 +#define STLE_GET_VLAN(pLE)             LE2Word((pLE)->St.Stat.VlanTag)
6620 +#define STLE_GET_LINK(pLE)             ((pLE)->St.Link)
6621 +#define STLE_GET_OPC(pLE)              ((pLE)->St.Opcode)
6622 +#define STLE_GET_DONE_IDX(pLE,LowVal,HighVal) {                        \
6623 +       (LowVal) = LE2DWord((pLE)->St.StUn.StTxStatLow);        \
6624 +       (HighVal) = LE2Word((pLE)->St.Stat.StTxStatHi);         \
6625 +}
6626 +
6627 +#define STLE_GET_RSS(pLE)              LE2DWord((pLE)->St.StUn.StRxRssValue)
6628 +#define STLE_GET_IPBIT(pLE)            ((pLE)->St.Stat.Rss.FlagField & RSS_IP_FLAG)
6629 +#define STLE_GET_TCPBIT(pLE)   ((pLE)->St.Stat.Rss.FlagField & RSS_TCP_FLAG)
6630 +
6631 +
6632 +/* I always take both values as a paramter to avoid typos */
6633 +#define STLE_GET_DONE_IDX_TXA1(LowVal,HighVal)                 \
6634 +       (((LowVal) & STLE_TXA1_MSKL) >> STLE_TXA1_SHIFTL)
6635 +#define STLE_GET_DONE_IDX_TXS1(LowVal,HighVal)                 \
6636 +       ((LowVal & STLE_TXS1_MSKL) >> STLE_TXS1_SHIFTL)
6637 +#define STLE_GET_DONE_IDX_TXA2(LowVal,HighVal)                 \
6638 +       (((LowVal & STLE_TXA2_MSKL) >> STLE_TXA2_SHIFTL) +      \
6639 +       ((HighVal & STLE_TXA2_MSKH) << STLE_TXA2_SHIFTH))
6640 +#define STLE_GET_DONE_IDX_TXS2(LowVal,HighVal)                 \
6641 +       ((HighVal & STLE_TXS2_MSKH) >> STLE_TXS2_SHIFTH)
6642 +
6643 +
6644 +#define SK_Y2_RXSTAT_CHECK_PKT(Len, RxStat, IsOk) {                    \
6645 +       (IsOk) = (((RxStat) & GMR_FS_RX_OK) != 0) &&                    \
6646 +                        (((RxStat) & GMR_FS_ANY_ERR) == 0);                    \
6647 +                                                                                                                       \
6648 +       if ((IsOk) && ((SK_U16)(((RxStat) & GMR_FS_LEN_MSK) >>  \
6649 +               GMR_FS_LEN_SHIFT) != (Len))) {                                          \
6650 +               /* length in MAC status differs from length in LE */\
6651 +               (IsOk) = SK_FALSE;                                                                      \
6652 +       }                                                                                                               \
6653 +}
6654 +
6655 +
6656 +/******************************************************************************
6657 + *
6658 + * Polling unit list element macros
6659 + *
6660 + * NOTE: the Idx must be <= 0xfff and PU_PUTIDX_VALID makes them valid
6661 + *
6662 + */
6663 +
6664 +#ifdef USE_POLLING_UNIT
6665 +
6666 +#define POLE_SET_OPC(pLE, Opc)         ((pLE)->Sa.Opcode = (Opc))
6667 +#define POLE_SET_LINK(pLE, Port)       ((pLE)->Sa.Link = (Port))
6668 +#define POLE_SET_RXIDX(pLE, Idx)       ((pLE)->Sa.RxIdxVld = Word2LE(Idx))
6669 +#define POLE_SET_TXAIDX(pLE, Idx)      ((pLE)->Sa.TxAIdxVld = Word2LE(Idx))
6670 +#define POLE_SET_TXSIDX(pLE, Idx)      ((pLE)->Sa.TxSIdxVld = Word2LE(Idx))
6671 +
6672 +#define POLE_GET_OPC(pLE)              ((pLE)->Sa.Opcode)
6673 +#define POLE_GET_LINK(pLE)             ((pLE)->Sa.Link)
6674 +#define POLE_GET_RXIDX(pLE)            LE2Word((pLE)->Sa.RxIdxVld)
6675 +#define POLE_GET_TXAIDX(pLE)   LE2Word((pLE)->Sa.TxAIdxVld)
6676 +#define POLE_GET_TXSIDX(pLE)   LE2Word((pLE)->Sa.TxSIdxVld)
6677 +
6678 +#endif /* USE_POLLING_UNIT */
6679 +
6680 +/******************************************************************************
6681 + *
6682 + * Debug macros for list elements
6683 + *
6684 + */
6685 +
6686 +#ifdef DEBUG
6687 +
6688 +#define SK_DBG_DUMP_RX_LE(pLE) {                                                                               \
6689 +       SK_U8   Opcode;                                                                                                         \
6690 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
6691 +               ("=== RX_LIST_ELEMENT @addr: %p cont: %02x %02x %02x %02x %02x %02x %02x %02x\n",       \
6692 +               pLE, ((SK_U8 *) pLE)[0], ((SK_U8 *) pLE)[1], ((SK_U8 *) pLE)[2],\
6693 +               ((SK_U8 *) pLE)[3], ((SK_U8 *) pLE)[4], ((SK_U8 *) pLE)[5],             \
6694 +               ((SK_U8 *) pLE)[6], ((SK_U8 *) pLE)[7]));                                               \
6695 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
6696 +               ("\t (16bit) %04x %04x %04x %04x\n",                                                    \
6697 +               ((SK_U16 *) pLE)[0], ((SK_U16 *) pLE)[1], ((SK_U16 *) pLE)[2],  \
6698 +               ((SK_U16 *) pLE)[3]));                                                                                  \
6699 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
6700 +               ("\t (32bit) %08x %08x\n",                                                                              \
6701 +               ((SK_U32 *) pLE)[0], ((SK_U32 *) pLE)[1]));                                     \
6702 +       Opcode = RXLE_GET_OPC(pLE);                                                                                     \
6703 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
6704 +               ("\tOwn belongs to %s\n", ((Opcode & HW_OWNER) == HW_OWNER) ?   \
6705 +                "Hardware" : "Software"));                                                                             \
6706 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
6707 +               ("\tOpc: 0x%x ",Opcode));                                                                               \
6708 +       switch (Opcode & (~HW_OWNER)) {                                                                         \
6709 +       case OP_BUFFER:                                                                                                         \
6710 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6711 +                       ("\tOP_BUFFER\n"));                                                                                     \
6712 +               break;                                                                                                                  \
6713 +       case OP_PACKET:                                                                                                         \
6714 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6715 +                       ("\tOP_PACKET\n"));                                                                                     \
6716 +               break;                                                                                                                  \
6717 +       case OP_ADDR64:                                                                                                         \
6718 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6719 +                       ("\tOP_ADDR64\n"));                                                                                     \
6720 +               break;                                                                                                                  \
6721 +       case OP_TCPSTART:                                                                                                       \
6722 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6723 +                       ("\tOP_TCPPAR\n"));                                                                                     \
6724 +               break;                                                                                                                  \
6725 +       case SW_OWNER:                                                                                                          \
6726 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6727 +                       ("\tunused LE\n"));                                                                                     \
6728 +               break;                                                                                                                  \
6729 +       default:                                                                                                                        \
6730 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6731 +                       ("\tunknown Opcode!!!\n"));                                                                     \
6732 +               break;                                                                                                                  \
6733 +       }                                                                                                                                       \
6734 +       if ((Opcode & OP_BUFFER) == OP_BUFFER) {                                                        \
6735 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6736 +                       ("\tControl: 0x%x\n", RXLE_GET_CTRL(pLE)));                                     \
6737 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6738 +                       ("\tBufLen: 0x%x\n", RXLE_GET_LEN(pLE)));                                       \
6739 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6740 +                       ("\tLowAddr: 0x%x\n", RXLE_GET_ADDR(pLE)));                                     \
6741 +       }                                                                                                                                       \
6742 +       if ((Opcode & OP_ADDR64) == OP_ADDR64) {                                                        \
6743 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6744 +                       ("\tHighAddr: 0x%x\n", RXLE_GET_ADDR(pLE)));                            \
6745 +       }                                                                                                                                       \
6746 +       if ((Opcode & OP_TCPSTART) == OP_TCPSTART) {                                            \
6747 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6748 +                       ("\tTCP Sum Start 1 : 0x%x\n", RXLE_GET_STACS1(pLE)));          \
6749 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6750 +                       ("\tTCP Sum Start 2 : 0x%x\n", RXLE_GET_STACS2(pLE)));          \
6751 +       }                                                                                                                                       \
6752 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
6753 +               ("=====================\n"));                                                                   \
6754 +}
6755 +
6756 +#define SK_DBG_DUMP_TX_LE(pLE) {                                                                               \
6757 +       SK_U8   Opcode;                                                                                                         \
6758 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
6759 +               ("=== TX_LIST_ELEMENT @addr: %p cont: %02x %02x %02x %02x %02x %02x %02x %02x\n",       \
6760 +               pLE, ((SK_U8 *) pLE)[0], ((SK_U8 *) pLE)[1], ((SK_U8 *) pLE)[2],\
6761 +               ((SK_U8 *) pLE)[3], ((SK_U8 *) pLE)[4], ((SK_U8 *) pLE)[5],             \
6762 +               ((SK_U8 *) pLE)[6], ((SK_U8 *) pLE)[7]));                                               \
6763 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
6764 +               ("\t (16bit) %04x %04x %04x %04x\n",                                                    \
6765 +               ((SK_U16 *) pLE)[0], ((SK_U16 *) pLE)[1], ((SK_U16 *) pLE)[2],  \
6766 +               ((SK_U16 *) pLE)[3]));                                                                                  \
6767 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
6768 +               ("\t (32bit) %08x %08x\n",                                                                              \
6769 +               ((SK_U32 *) pLE)[0], ((SK_U32 *) pLE)[1]));                                     \
6770 +       Opcode = TXLE_GET_OPC(pLE);                                                                                     \
6771 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
6772 +               ("\tOwn belongs to %s\n", ((Opcode & HW_OWNER) == HW_OWNER) ?   \
6773 +               "Hardware" : "Software"));                                                                              \
6774 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
6775 +               ("\tOpc: 0x%x ",Opcode));                                                                               \
6776 +       switch (Opcode & (~HW_OWNER)) {                                                                         \
6777 +       case OP_TCPCHKSUM:                                                                                                      \
6778 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6779 +                       ("\tOP_TCPCHKSUM\n"));                                                                          \
6780 +               break;                                                                                                                  \
6781 +       case OP_TCPIS:                                                                                                          \
6782 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6783 +                       ("\tOP_TCPIS\n"));                                                                                      \
6784 +               break;                                                                                                                  \
6785 +       case OP_TCPLCK:                                                                                                         \
6786 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6787 +                       ("\tOP_TCPLCK\n"));                                                                                     \
6788 +               break;                                                                                                                  \
6789 +       case OP_TCPLW:                                                                                                          \
6790 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6791 +                       ("\tOP_TCPLW\n"));                                                                                      \
6792 +               break;                                                                                                                  \
6793 +       case OP_TCPLSW:                                                                                                         \
6794 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6795 +                       ("\tOP_TCPLSW\n"));                                                                                     \
6796 +               break;                                                                                                                  \
6797 +       case OP_TCPLISW:                                                                                                        \
6798 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6799 +                       ("\tOP_TCPLISW\n"));                                                                            \
6800 +               break;                                                                                                                  \
6801 +       case OP_ADDR64:                                                                                                         \
6802 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6803 +                       ("\tOP_ADDR64\n"));                                                                                     \
6804 +               break;                                                                                                                  \
6805 +       case OP_VLAN:                                                                                                           \
6806 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6807 +                       ("\tOP_VLAN\n"));                                                                                       \
6808 +               break;                                                                                                                  \
6809 +       case OP_ADDR64VLAN:                                                                                                     \
6810 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6811 +                       ("\tOP_ADDR64VLAN\n"));                                                                         \
6812 +               break;                                                                                                                  \
6813 +       case OP_LRGLEN:                                                                                                         \
6814 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6815 +                       ("\tOP_LRGLEN\n"));                                                                                     \
6816 +               break;                                                                                                                  \
6817 +       case OP_LRGLENVLAN:                                                                                                     \
6818 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6819 +                       ("\tOP_LRGLENVLAN\n"));                                                                         \
6820 +               break;                                                                                                                  \
6821 +       case OP_BUFFER:                                                                                                         \
6822 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6823 +                       ("\tOP_BUFFER\n"));                                                                                     \
6824 +               break;                                                                                                                  \
6825 +       case OP_PACKET:                                                                                                         \
6826 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6827 +                       ("\tOP_PACKET\n"));                                                                                     \
6828 +               break;                                                                                                                  \
6829 +       case OP_LARGESEND:                                                                                                      \
6830 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6831 +                       ("\tOP_LARGESEND\n"));                                                                          \
6832 +               break;                                                                                                                  \
6833 +       case SW_OWNER:                                                                                                          \
6834 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6835 +                       ("\tunused LE\n"));                                                                                     \
6836 +               break;                                                                                                                  \
6837 +       default:                                                                                                                        \
6838 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6839 +                       ("\tunknown Opcode!!!\n"));                                                                     \
6840 +               break;                                                                                                                  \
6841 +       }                                                                                                                                       \
6842 +       if ((Opcode & OP_BUFFER) == OP_BUFFER) {                                                        \
6843 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6844 +                       ("\tControl: 0x%x\n", TXLE_GET_CTRL(pLE)));                                     \
6845 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6846 +                       ("\tBufLen: 0x%x\n", TXLE_GET_LEN(pLE)));                                       \
6847 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6848 +                       ("\tLowAddr: 0x%x\n", TXLE_GET_ADDR(pLE)));                                     \
6849 +       }                                                                                                                                       \
6850 +       if ((Opcode & OP_ADDR64) == OP_ADDR64) {                                                        \
6851 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6852 +                       ("\tHighAddr: 0x%x\n", TXLE_GET_ADDR(pLE)));                            \
6853 +       }                                                                                                                                       \
6854 +       if ((Opcode & OP_VLAN) == OP_VLAN) {                                                            \
6855 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6856 +                       ("\tVLAN Id: 0x%x\n", TXLE_GET_VLAN(pLE)));                                     \
6857 +       }                                                                                                                                       \
6858 +       if ((Opcode & OP_LRGLEN) == OP_LRGLEN) {                                                        \
6859 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6860 +                       ("\tLarge send length: 0x%x\n", TXLE_GET_LSLEN(pLE)));          \
6861 +       }                                                                                                                                       \
6862 +       if ((Opcode &(~HW_OWNER)) <= OP_ADDR64) {                                                       \
6863 +               if ((Opcode & OP_TCPWRITE) == OP_TCPWRITE) {                                    \
6864 +                       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                          \
6865 +                               ("\tTCP Sum Write: 0x%x\n", TXLE_GET_WRICS(pLE)));              \
6866 +               }                                                                                                                               \
6867 +               if ((Opcode & OP_TCPSTART) == OP_TCPSTART) {                                    \
6868 +                       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                          \
6869 +                               ("\tTCP Sum Start: 0x%x\n", TXLE_GET_STACS(pLE)));              \
6870 +               }                                                                                                                               \
6871 +               if ((Opcode & OP_TCPINIT) == OP_TCPINIT) {                                              \
6872 +                       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                          \
6873 +                               ("\tTCP Sum Init: 0x%x\n", TXLE_GET_INICS(pLE)));               \
6874 +               }                                                                                                                               \
6875 +               if ((Opcode & OP_TCPLCK) == OP_TCPLCK) {                                                \
6876 +                       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                          \
6877 +                               ("\tTCP Sum Lock: 0x%x\n", TXLE_GET_LCKCS(pLE)));               \
6878 +               }                                                                                                                               \
6879 +       }                                                                                                                                       \
6880 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
6881 +               ("=====================\n"));                                                                   \
6882 +}
6883 +
6884 +#define SK_DBG_DUMP_ST_LE(pLE) {                                                                               \
6885 +       SK_U8   Opcode;                                                                                                         \
6886 +       SK_U16  HighVal;                                                                                                        \
6887 +       SK_U32  LowVal;                                                                                                         \
6888 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
6889 +               ("=== ST_LIST_ELEMENT @addr: %p contains: %02x %02x %02x %02x %02x %02x %02x %02x\n",\
6890 +               pLE, ((SK_U8 *) pLE)[0], ((SK_U8 *) pLE)[1], ((SK_U8 *) pLE)[2],\
6891 +               ((SK_U8 *) pLE)[3], ((SK_U8 *) pLE)[4], ((SK_U8 *) pLE)[5],             \
6892 +               ((SK_U8 *) pLE)[6], ((SK_U8 *) pLE)[7]));                                               \
6893 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
6894 +               ("\t (16bit) %04x %04x %04x %04x\n",                                                    \
6895 +               ((SK_U16 *) pLE)[0], ((SK_U16 *) pLE)[1], ((SK_U16 *) pLE)[2],  \
6896 +               ((SK_U16 *) pLE)[3]));                                                                                  \
6897 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
6898 +               ("\t (32bit) %08x %08x\n",                                                                              \
6899 +               ((SK_U32 *) pLE)[0], ((SK_U32 *) pLE)[1]));                                             \
6900 +       Opcode = STLE_GET_OPC(pLE);                                                                                     \
6901 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
6902 +               ("\tOwn belongs to %s\n", ((Opcode & HW_OWNER) == SW_OWNER) ?   \
6903 +               "Hardware" : "Software"));                                                                              \
6904 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
6905 +               ("\tOpc: 0x%x", Opcode));                                                                               \
6906 +       Opcode &= (~HW_OWNER);                                                                                          \
6907 +       switch (Opcode) {                                                                                                       \
6908 +       case OP_RXSTAT:                                                                                                         \
6909 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6910 +                       ("\tOP_RXSTAT\n"));                                                                                     \
6911 +               break;                                                                                                                  \
6912 +       case OP_RXTIMESTAMP:                                                                                            \
6913 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6914 +                       ("\tOP_RXTIMESTAMP\n"));                                                                        \
6915 +               break;                                                                                                                  \
6916 +       case OP_RXVLAN:                                                                                                         \
6917 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6918 +                       ("\tOP_RXVLAN\n"));                                                                                     \
6919 +               break;                                                                                                                  \
6920 +       case OP_RXCHKS:                                                                                                         \
6921 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6922 +                       ("\tOP_RXCHKS\n"));                                                                                     \
6923 +               break;                                                                                                                  \
6924 +       case OP_RXCHKSVLAN:                                                                                                     \
6925 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6926 +                       ("\tOP_RXCHKSVLAN\n"));                                                                         \
6927 +               break;                                                                                                                  \
6928 +       case OP_RXTIMEVLAN:                                                                                                     \
6929 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6930 +                       ("\tOP_RXTIMEVLAN\n"));                                                                         \
6931 +               break;                                                                                                                  \
6932 +       case OP_RSS_HASH:                                                                                                       \
6933 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6934 +                       ("\tOP_RSS_HASH\n"));                                                                           \
6935 +               break;                                                                                                                  \
6936 +       case OP_TXINDEXLE:                                                                                                      \
6937 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6938 +                       ("\tOP_TXINDEXLE\n"));                                                                          \
6939 +               break;                                                                                                                  \
6940 +       case HW_OWNER:                                                                                                          \
6941 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6942 +                       ("\tunused LE\n"));                                                                                     \
6943 +               break;                                                                                                                  \
6944 +       default:                                                                                                                        \
6945 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6946 +                       ("\tunknown status list element!!!\n"));                                        \
6947 +               break;                                                                                                                  \
6948 +       }                                                                                                                                       \
6949 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
6950 +               ("\tPort: %c\n", 'A' + STLE_GET_LINK(pLE)));                                    \
6951 +       if (Opcode == OP_RXSTAT) {                                                                                      \
6952 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6953 +                       ("\tFrameLen: 0x%x\n", STLE_GET_LEN(pLE)));                                     \
6954 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6955 +                       ("\tFrameStat: 0x%x\n", STLE_GET_FRSTATUS(pLE)));                       \
6956 +       }                                                                                                                                       \
6957 +       if ((Opcode & OP_RXVLAN) == OP_RXVLAN) {                                                        \
6958 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6959 +                       ("\tVLAN Id: 0x%x\n", STLE_GET_VLAN(pLE)));                                     \
6960 +       }                                                                                                                                       \
6961 +       if ((Opcode & OP_RXTIMESTAMP) == OP_RXTIMESTAMP) {                                      \
6962 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6963 +                       ("\tTimestamp: 0x%x\n", STLE_GET_TIST(pLE)));                           \
6964 +       }                                                                                                                                       \
6965 +       if ((Opcode & OP_RXCHKS) == OP_RXCHKS) {                                                        \
6966 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6967 +                       ("\tTCP: 0x%x 0x%x\n", STLE_GET_TCP1(pLE),                                      \
6968 +                       STLE_GET_TCP2(pLE)));                                                                           \
6969 +       }                                                                                                                                       \
6970 +       if (Opcode == OP_TXINDEXLE) {                                                                           \
6971 +               STLE_GET_DONE_IDX(pLE, LowVal, HighVal);                                                \
6972 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6973 +                       ("\tTx Index TxA1: 0x%x\n",                                                                     \
6974 +                       STLE_GET_DONE_IDX_TXA1(LowVal,HighVal)));                                       \
6975 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6976 +                       ("\tTx Index TxS1: 0x%x\n",                                                                     \
6977 +                       STLE_GET_DONE_IDX_TXS1(LowVal,HighVal)));                                       \
6978 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6979 +                       ("\tTx Index TxA2: 0x%x\n",                                                                     \
6980 +                       STLE_GET_DONE_IDX_TXA2(LowVal,HighVal)));                                       \
6981 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
6982 +                       ("\tTx Index TxS2: 0x%x\n",                                                                     \
6983 +                       STLE_GET_DONE_IDX_TXS2(LowVal,HighVal)));                                       \
6984 +       }                                                                                                                                       \
6985 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
6986 +               ("=====================\n"));                                                                   \
6987 +}
6988 +
6989 +#ifdef USE_POLLING_UNIT
6990 +#define SK_DBG_DUMP_PO_LE(pLE) {                                                                               \
6991 +       SK_U8   Opcode;                                                                                                         \
6992 +       SK_U16  Idx;                                                                                                            \
6993 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
6994 +               ("=== PO_LIST_ELEMENT @addr: %p cont: %02x %02x %02x %02x %02x %02x %02x %02x\n",       \
6995 +               pLE, ((SK_U8 *) pLE)[0], ((SK_U8 *) pLE)[1], ((SK_U8 *) pLE)[2],\
6996 +               ((SK_U8 *) pLE)[3], ((SK_U8 *) pLE)[4], ((SK_U8 *) pLE)[5],             \
6997 +               ((SK_U8 *) pLE)[6], ((SK_U8 *) pLE)[7]));                                               \
6998 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
6999 +               ("\t (16bit) %04x %04x %04x %04x\n",                                                    \
7000 +               ((SK_U16 *) pLE)[0], ((SK_U16 *) pLE)[1], ((SK_U16 *) pLE)[2],  \
7001 +               ((SK_U16 *) pLE)[3]));                                                                                  \
7002 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
7003 +               ("\t (32bit) %08x %08x\n",                                                                              \
7004 +               ((SK_U32 *) pLE)[0], ((SK_U32 *) pLE)[1]));                                             \
7005 +       Opcode = POLE_GET_OPC(pLE);                                                                                     \
7006 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
7007 +                ("\tOwn belongs to %s\n", ((Opcode & HW_OWNER) == HW_OWNER) ?  \
7008 +                 "Hardware" : "Software"));                                                                    \
7009 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
7010 +                ("\tOpc: 0x%x ",Opcode));                                                                              \
7011 +       if ((Opcode & ~HW_OWNER) == OP_PUTIDX) {                                                        \
7012 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
7013 +                       ("\tOP_PUTIDX\n"));                                                                                     \
7014 +       }                                                                                                                                       \
7015 +       else {                                                                                                                          \
7016 +               SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                  \
7017 +                       ("\tunknown Opcode!!!\n"));                                                                     \
7018 +       }                                                                                                                                       \
7019 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
7020 +               ("\tPort %c\n", 'A' + POLE_GET_LINK(pLE)));                                             \
7021 +       Idx = POLE_GET_TXAIDX(pLE);                                                                                     \
7022 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
7023 +               ("\tTxA Index is 0x%X and %svalid\n", Idx,                                              \
7024 +               (Idx & PU_PUTIDX_VALID) ? "" : "not "));                                                \
7025 +       Idx = POLE_GET_TXSIDX(pLE);                                                                                     \
7026 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
7027 +               ("\tTxS Index is 0x%X and %svalid\n", Idx,                                              \
7028 +               (Idx & PU_PUTIDX_VALID) ? "" : "not "));                                                \
7029 +       Idx = POLE_GET_RXIDX(pLE);                                                                                      \
7030 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
7031 +               ("\tRx Index is 0x%X and %svalid\n", Idx,                                               \
7032 +               (Idx & PU_PUTIDX_VALID) ? "" : "not "));                                                \
7033 +       SK_DBG_MSG(pAc, SK_DBGMOD_HWM, SK_DBGCAT_INIT,                                          \
7034 +               ("=====================\n"));                                                                   \
7035 +}
7036 +#endif /* USE_POLLING_UNIT */
7037 +
7038 +#else  /* !DEBUG */
7039 +
7040 +#define SK_DBG_DUMP_RX_LE(pLE)
7041 +#define SK_DBG_DUMP_TX_LE(pLE)
7042 +#define SK_DBG_DUMP_ST_LE(pLE)
7043 +#define SK_DBG_DUMP_PO_LE(pLE)
7044 +
7045 +#endif /* !DEBUG */
7046 +
7047 +/******************************************************************************
7048 + *
7049 + * Macros for listelement tables
7050 + *
7051 + *
7052 + */
7053 +
7054 +#define LE_SIZE sizeof(SK_HWLE)
7055 +#define LE_TAB_SIZE(NumElements)       ((NumElements) * LE_SIZE)
7056 +
7057 +/* Number of unused list elements in table
7058 + * this macro always returns the number of free listelements - 1
7059 + * this way we want to guarantee that always one LE remains unused
7060 + */
7061 +#define NUM_FREE_LE_IN_TABLE(pTable)                                                           \
7062 +       ( ((pTable)->Put >= (pTable)->Done) ?                                                   \
7063 +       (NUM_LE_IN_TABLE(pTable) - (pTable)->Put + (pTable)->Done - 1) :\
7064 +       ((pTable)->Done - (pTable)->Put - 1) )
7065 +
7066 +/* total number of list elements in table */
7067 +#define NUM_LE_IN_TABLE(pTable)                ((pTable)->Num)
7068 +
7069 +/* get next unused Rx list element */
7070 +#define GET_RX_LE(pLE, pTable) {                                                                       \
7071 +       pLE = &(pTable)->pLETab[(pTable)->Put];                                                 \
7072 +       (pTable)->Put = ((pTable)->Put + 1) & (NUM_LE_IN_TABLE(pTable) - 1);\
7073 +}
7074 +
7075 +/* get next unused Tx list element */
7076 +#define GET_TX_LE(pLE, pTable) GET_RX_LE(pLE, pTable)
7077 +
7078 +/* get next status list element expected to be finished by hw */
7079 +#define GET_ST_LE(pLE, pTable) {                                                                       \
7080 +       pLE = &(pTable)->pLETab[(pTable)->Done];                                                \
7081 +               (pTable)->Done = ((pTable)->Done +1) & (NUM_LE_IN_TABLE(pTable) - 1);\
7082 +}
7083 +
7084 +#ifdef USE_POLLING_UNIT
7085 +/* get next polling unit list element for port */
7086 +#define GET_PO_LE(pLE, pTable, Port) {                                                         \
7087 +       pLE = &(pTable)->pLETab[(Port)];                                                                \
7088 +}
7089 +#endif /* USE_POLLING_UNIT */
7090 +
7091 +#define GET_PUT_IDX(pTable)                    ((pTable)->Put)
7092 +
7093 +#define UPDATE_HWPUT_IDX(pTable)       {(pTable)->HwPut = (pTable)->Put; }
7094 +
7095 +/*
7096 + * get own bit of next status LE
7097 + * if the result is != 0 there has been at least one status LE finished
7098 + */
7099 +#define OWN_OF_FIRST_LE(pTable)                                                                        \
7100 +       (STLE_GET_OPC(&(pTable)->pLETab[(pTable)->Done]) & HW_OWNER)
7101 +
7102 +#define SET_DONE_INDEX(pTable, Idx)    (pTable)->Done = (Idx);
7103 +
7104 +#define GET_DONE_INDEX(pTable) ((pTable)->Done)
7105 +
7106 +#ifdef SAFE_BUT_SLOW
7107 +
7108 +/* check own bit of LE before current done idx */
7109 +#define CHECK_STLE_OVERFLOW(pTable, IsOk) {                                            \
7110 +               unsigned i;                                                                                             \
7111 +               if ((i = (pTable)->Done) == 0) {                                                \
7112 +                       i = NUM_LE_IN_TABLE(pTable);                                            \
7113 +               }                                                                                                               \
7114 +               else {                                                                                                  \
7115 +                       i = i - 1;                                                                                      \
7116 +               }                                                                                                               \
7117 +               if (STLE_GET_OPC(&(pTable)->pLETab[i]) == HW_OWNER) {   \
7118 +                       (IsOk) = SK_TRUE;                                                                       \
7119 +               }                                                                                                               \
7120 +               else {                                                                                                  \
7121 +                       (IsOk) = SK_FALSE;                                                                      \
7122 +               }                                                                                                               \
7123 +       }
7124 +
7125 +
7126 +/*
7127 + * for Yukon-2 the hardware is not polling the list elements, so it
7128 + * is not necessary to change the own-bit of Rx or Tx LEs before
7129 + * reusing them
7130 + * but it might make debugging easier if one simply can see whether
7131 + * a LE has been worked on
7132 + */
7133 +
7134 +#define CLEAR_LE_OWN(pTable, Idx)                                                              \
7135 +       STLE_SET_OPC(&(pTable)->pLETab[(Idx)], SW_OWNER)
7136 +
7137 +/*
7138 + * clear all own bits starting from old done index up to the LE before
7139 + * the new done index
7140 + */
7141 +#define CLEAR_LE_OWN_FROM_DONE_TO(pTable, To) {                                        \
7142 +               int i;                                                                                                  \
7143 +               i = (pTable)->Done;                                                                             \
7144 +               while (i != To) {                                                                               \
7145 +                       CLEAR_LE_OWN(pTable, i);                                                        \
7146 +                       i = (i + 1) & (NUM_LE_IN_TABLE(pTable) - 1);            \
7147 +               }                                                                                                               \
7148 +       }
7149 +
7150 +#else  /* !SAFE_BUT_SLOW */
7151 +
7152 +#define CHECK_STLE_OVERFLOW(pTable, IsOk)
7153 +#define CLEAR_LE_OWN(pTable, Idx)
7154 +#define CLEAR_LE_OWN_FROM_DONE_TO(pTable, To)
7155 +
7156 +#endif /* !SAFE_BUT_SLOW */
7157 +
7158 +
7159 +/* typedefs *******************************************************************/
7160 +
7161 +typedef struct s_LetRxTx {
7162 +       SK_U16  VlanId;                 /* VLAN Id given down last time */
7163 +       SK_U16  TcpWp;                  /* TCP Checksum Write Position */
7164 +       SK_U16  TcpSp1;                 /* TCP Checksum Calculation Start Position 1 */
7165 +       SK_U16  TcpSp2;                 /* TCP Checksum Calculation Start Position 2 */
7166 +       SK_U16  MssValue;               /* Maximum Segment Size */
7167 +       SK_U16  Reserved1;              /* reserved word for furture extensions */
7168 +       SK_U16  Reserved2;              /* reserved word for furture extensions */
7169 +       SK_U16  Reserved3;              /* reserved word for furture extensions */
7170 +} SK_LET_RX_TX;
7171 +
7172 +typedef struct s_LetStat {
7173 +       SK_U32  RxTimeStamp;    /* Receive Timestamp */
7174 +       SK_U32  RssHashValue;   /* RSS Hash Value */
7175 +       SK_BOOL RssIsIp;                /* RSS Hash Value: IP packet detected */
7176 +       SK_BOOL RssIsTcp;               /* RSS Hash Value: IP+TCP packet detected */
7177 +       SK_U16  VlanId;                 /* VLAN Id given received by Status BMU */
7178 +       SK_U16  TcpSum1;                /* TCP checksum 1 (status BMU) */
7179 +       SK_U16  TcpSum2;                /* TCP checksum 2 (status BMU) */
7180 +} SK_LET_STAT;
7181 +
7182 +typedef union s_LetBmuSpec {
7183 +       SK_LET_RX_TX    RxTx;   /* Rx/Tx BMU specific variables */
7184 +       SK_LET_STAT             Stat;   /* Status BMU specific variables */
7185 +} SK_LET_BMU_S;
7186 +
7187 +typedef        struct s_le_table {
7188 +       /* all LE's between Done and HWPut are owned by the hardware */
7189 +       /* all LE's between Put and Done can be used from Software */
7190 +       /* all LE's between HWPut and Put are currently processed in DriverSend */
7191 +       unsigned Done;                  /* done index - consumed from HW and available */
7192 +       unsigned Put;                   /* put index - to be given to hardware */
7193 +       unsigned HwPut;                 /* put index actually given to hardware */
7194 +       unsigned Num;                   /* total number of list elements */
7195 +       SK_HWLE *pLETab;                /* virtual address of list element table */
7196 +       SK_U32  pPhyLETABLow;   /* physical address of list element table */
7197 +       SK_U32  pPhyLETABHigh;  /* physical address of list element table */
7198 +       /* values to remember in order to save some LEs */
7199 +       SK_U32  BufHighAddr;    /* high addr given down last time */
7200 +       SK_LET_BMU_S Bmu;               /* contains BMU specific information */
7201 +       SK_U32  private;                /* driver private variable free usable */
7202 +       SK_U16  TcpInitCsum;    /* Init. Checksum */
7203 +} SK_LE_TABLE;
7204 +
7205 +/* function prototypes ********************************************************/
7206 +
7207 +#ifndef        SK_KR_PROTO
7208 +
7209 +/*
7210 + * public functions in sky2le.c
7211 + */
7212 +extern void SkGeY2SetPutIndex(
7213 +       SK_AC   *pAC,
7214 +       SK_IOC  IoC,
7215 +       SK_U32  StartAddrPrefetchUnit,
7216 +       SK_LE_TABLE *pLETab);
7217 +
7218 +extern void SkGeY2InitPrefetchUnit(
7219 +       SK_AC   *pAC,
7220 +       SK_IOC  IoC,
7221 +       unsigned int Queue,
7222 +       SK_LE_TABLE *pLETab);
7223 +
7224 +extern void SkGeY2InitStatBmu(
7225 +       SK_AC   *pAC,
7226 +       SK_IOC  IoC,
7227 +       SK_LE_TABLE *pLETab);
7228 +
7229 +extern void SkGeY2InitPollUnit(
7230 +       SK_AC   *pAC,
7231 +       SK_IOC  IoC,
7232 +       SK_LE_TABLE *pLETab);
7233 +
7234 +extern void SkGeY2InitSingleLETable(
7235 +       SK_AC   *pAC,
7236 +       SK_LE_TABLE *pLETab,
7237 +       unsigned int NumLE,
7238 +       void    *pVMem,
7239 +       SK_U32  PMemLowAddr,
7240 +       SK_U32  PMemHighAddr);
7241 +
7242 +#else  /* SK_KR_PROTO */
7243 +extern void SkGeY2SetPutIndex();
7244 +extern void SkGeY2InitPrefetchUnit();
7245 +extern void SkGeY2InitStatBmu();
7246 +extern void SkGeY2InitPollUnit();
7247 +extern void SkGeY2InitSingleLETable();
7248 +#endif /* SK_KR_PROTO */
7249 +
7250 +#ifdef __cplusplus
7251 +}
7252 +#endif /* __cplusplus */
7253 +
7254 +#endif /* __INC_SKY2LE_H */
7255 +
7256 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/h/xmac_ii.h linux-2.6.9.new/drivers/net/sk98lin/h/xmac_ii.h
7257 --- linux-2.6.9.old/drivers/net/sk98lin/h/xmac_ii.h     2004-10-19 05:54:55.000000000 +0800
7258 +++ linux-2.6.9.new/drivers/net/sk98lin/h/xmac_ii.h     2006-12-07 14:35:03.000000000 +0800
7259 @@ -2,8 +2,8 @@
7260   *
7261   * Name:       xmac_ii.h
7262   * Project:    Gigabit Ethernet Adapters, Common Modules
7263 - * Version:    $Revision: 1.52 $
7264 - * Date:       $Date: 2003/10/02 16:35:50 $
7265 + * Version:    $Revision: 2.11 $
7266 + * Date:       $Date: 2005/01/04 14:14:20 $
7267   * Purpose:    Defines and Macros for Gigabit Ethernet Controller
7268   *
7269   ******************************************************************************/
7270 @@ -11,13 +11,12 @@
7271  /******************************************************************************
7272   *
7273   *     (C)Copyright 1998-2002 SysKonnect.
7274 - *     (C)Copyright 2002-2003 Marvell.
7275 + *     (C)Copyright 2002-2004 Marvell.
7276   *
7277   *     This program is free software; you can redistribute it and/or modify
7278   *     it under the terms of the GNU General Public License as published by
7279   *     the Free Software Foundation; either version 2 of the License, or
7280   *     (at your option) any later version.
7281 - *
7282   *     The information in this file is provided "AS IS" without warranty.
7283   *
7284   ******************************************************************************/
7285 @@ -449,7 +448,7 @@
7286  /*
7287   * Receive Frame Status Encoding
7288   */
7289 -#define XMR_FS_LEN     (0x3fffUL<<18)  /* Bit 31..18:  Rx Frame Length */
7290 +#define XMR_FS_LEN_MSK (0x3fffUL<<18)  /* Bit 31..18:  Rx Frame Length */
7291  #define XMR_FS_2L_VLAN (1L<<17)        /* Bit 17:      tagged wh 2Lev VLAN ID*/
7292  #define XMR_FS_1L_VLAN (1L<<16)        /* Bit 16:      tagged wh 1Lev VLAN ID*/
7293  #define XMR_FS_BC              (1L<<15)        /* Bit 15:      Broadcast Frame */
7294 @@ -469,6 +468,8 @@
7295  #define XMR_FS_ERR             (1L<<1)         /* Bit  1:      Frame Error */
7296  #define XMR_FS_MCTRL   (1L<<0)         /* Bit  0:      MAC Control Packet */
7297
7298 +#define XMR_FS_LEN_SHIFT       18
7299 +
7300  /*
7301   * XMR_FS_ERR will be set if
7302   *     XMR_FS_FCS_ERR, XMR_FS_LNG_ERR, XMR_FS_RUNT,
7303 @@ -510,7 +511,7 @@
7304  #define PHY_BCOM_NEPG          0x07    /* 16 bit r/w   Next Page Register */
7305  #define PHY_BCOM_NEPG_LP       0x08    /* 16 bit r/o   Next Page Link Partner */
7306         /* Broadcom-specific registers */
7307 -#define PHY_BCOM_1000T_CTRL    0x09    /* 16 bit r/w   1000Base-T Ctrl Reg */
7308 +#define PHY_BCOM_1000T_CTRL    0x09    /* 16 bit r/w   1000Base-T Control Reg */
7309  #define PHY_BCOM_1000T_STAT    0x0a    /* 16 bit r/o   1000Base-T Status Reg */
7310         /* 0x0b - 0x0e:         reserved */
7311  #define PHY_BCOM_EXT_STAT      0x0f    /* 16 bit r/o   Extended Status Reg */
7312 @@ -541,24 +542,32 @@
7313  #define PHY_MARV_NEPG          0x07    /* 16 bit r/w   Next Page Register */
7314  #define PHY_MARV_NEPG_LP       0x08    /* 16 bit r/o   Next Page Link Partner */
7315         /* Marvel-specific registers */
7316 -#define PHY_MARV_1000T_CTRL    0x09    /* 16 bit r/w   1000Base-T Ctrl Reg */
7317 +#define PHY_MARV_1000T_CTRL    0x09    /* 16 bit r/w   1000Base-T Control Reg */
7318  #define PHY_MARV_1000T_STAT    0x0a    /* 16 bit r/o   1000Base-T Status Reg */
7319         /* 0x0b - 0x0e:         reserved */
7320  #define PHY_MARV_EXT_STAT      0x0f    /* 16 bit r/o   Extended Status Reg */
7321 -#define PHY_MARV_PHY_CTRL      0x10    /* 16 bit r/w   PHY Specific Ctrl Reg */
7322 -#define PHY_MARV_PHY_STAT      0x11    /* 16 bit r/o   PHY Specific Stat Reg */
7323 +#define PHY_MARV_PHY_CTRL      0x10    /* 16 bit r/w   PHY Specific Control Reg */
7324 +#define PHY_MARV_PHY_STAT      0x11    /* 16 bit r/o   PHY Specific Status Reg */
7325  #define PHY_MARV_INT_MASK      0x12    /* 16 bit r/w   Interrupt Mask Reg */
7326  #define PHY_MARV_INT_STAT      0x13    /* 16 bit r/o   Interrupt Status Reg */
7327  #define PHY_MARV_EXT_CTRL      0x14    /* 16 bit r/w   Ext. PHY Specific Ctrl */
7328  #define PHY_MARV_RXE_CNT       0x15    /* 16 bit r/w   Receive Error Counter */
7329  #define PHY_MARV_EXT_ADR       0x16    /* 16 bit r/w   Ext. Ad. for Cable Diag. */
7330 -       /* 0x17:                reserved */
7331 +#define PHY_MARV_PORT_IRQ      0x17    /* 16 bit r/o   Port 0 IRQ (88E1111 only) */
7332  #define PHY_MARV_LED_CTRL      0x18    /* 16 bit r/w   LED Control Reg */
7333  #define PHY_MARV_LED_OVER      0x19    /* 16 bit r/w   Manual LED Override Reg */
7334  #define PHY_MARV_EXT_CTRL_2    0x1a    /* 16 bit r/w   Ext. PHY Specific Ctrl 2 */
7335  #define PHY_MARV_EXT_P_STAT    0x1b    /* 16 bit r/w   Ext. PHY Spec. Stat Reg */
7336  #define PHY_MARV_CABLE_DIAG    0x1c    /* 16 bit r/o   Cable Diagnostic Reg */
7337 -       /* 0x1d - 0x1f:         reserved */
7338 +#define PHY_MARV_PAGE_ADDR     0x1d    /* 16 bit r/w   Extended Page Address Reg */
7339 +#define PHY_MARV_PAGE_DATA     0x1e    /* 16 bit r/w   Extended Page Data Reg */
7340 +
7341 +/* for 10/100 Fast Ethernet PHY (88E3082 only) */
7342 +#define PHY_MARV_FE_LED_PAR    0x16    /* 16 bit r/w   LED Parallel Select Reg. */
7343 +#define PHY_MARV_FE_LED_SER    0x17    /* 16 bit r/w   LED Stream Select S. LED */
7344 +#define PHY_MARV_FE_VCT_TX     0x1a    /* 16 bit r/w   VCT Reg. for TXP/N Pins */
7345 +#define PHY_MARV_FE_VCT_RX     0x1b    /* 16 bit r/o   VCT Reg. for RXP/N Pins */
7346 +#define PHY_MARV_FE_SPEC_2     0x1c    /* 16 bit r/w   Specific Control Reg. 2 */
7347
7348  /*----------------------------------------------------------------------------*/
7349  /*
7350 @@ -574,9 +583,9 @@
7351  #define PHY_LONE_NEPG          0x07    /* 16 bit r/w   Next Page Register */
7352  #define PHY_LONE_NEPG_LP       0x08    /* 16 bit r/o   Next Page Link Partner */
7353         /* Level One-specific registers */
7354 -#define PHY_LONE_1000T_CTRL    0x09    /* 16 bit r/w   1000Base-T Control Reg*/
7355 +#define PHY_LONE_1000T_CTRL    0x09    /* 16 bit r/w   1000Base-T Control Reg */
7356  #define PHY_LONE_1000T_STAT    0x0a    /* 16 bit r/o   1000Base-T Status Reg */
7357 -       /* 0x0b -0x0e:          reserved */
7358 +       /* 0x0b - 0x0e:         reserved */
7359  #define PHY_LONE_EXT_STAT      0x0f    /* 16 bit r/o   Extended Status Reg */
7360  #define PHY_LONE_PORT_CFG      0x10    /* 16 bit r/w   Port Configuration Reg*/
7361  #define PHY_LONE_Q_STAT                0x11    /* 16 bit r/o   Quick Status Reg */
7362 @@ -585,7 +594,7 @@
7363  #define PHY_LONE_LED_CFG       0x14    /* 16 bit r/w   LED Configuration Reg */
7364  #define PHY_LONE_PORT_CTRL     0x15    /* 16 bit r/w   Port Control Reg */
7365  #define PHY_LONE_CIM           0x16    /* 16 bit r/o   CIM Reg */
7366 -       /* 0x17 -0x1c:          reserved */
7367 +       /* 0x17 - 0x1c:         reserved */
7368
7369  /*----------------------------------------------------------------------------*/
7370  /*
7371 @@ -603,14 +612,14 @@
7372         /* National-specific registers */
7373  #define PHY_NAT_1000T_CTRL     0x09    /* 16 bit r/w   1000Base-T Control Reg */
7374  #define PHY_NAT_1000T_STAT     0x0a    /* 16 bit r/o   1000Base-T Status Reg */
7375 -       /* 0x0b -0x0e:          reserved */
7376 +       /* 0x0b - 0x0e:         reserved */
7377  #define PHY_NAT_EXT_STAT       0x0f    /* 16 bit r/o   Extended Status Register */
7378  #define PHY_NAT_EXT_CTRL1      0x10    /* 16 bit r/o   Extended Control Reg1 */
7379  #define PHY_NAT_Q_STAT1                0x11    /* 16 bit r/o   Quick Status Reg1 */
7380  #define PHY_NAT_10B_OP         0x12    /* 16 bit r/o   10Base-T Operations Reg */
7381  #define PHY_NAT_EXT_CTRL2      0x13    /* 16 bit r/o   Extended Control Reg1 */
7382  #define PHY_NAT_Q_STAT2                0x14    /* 16 bit r/o   Quick Status Reg2 */
7383 -       /* 0x15 -0x18:          reserved */
7384 +       /* 0x15 - 0x18:         reserved */
7385  #define PHY_NAT_PHY_ADDR       0x19    /* 16 bit r/o   PHY Address Register */
7386
7387
7388 @@ -618,7 +627,7 @@
7389
7390  /*
7391   * PHY bit definitions
7392 - * Bits defined as PHY_X_..., PHY_B_..., PHY_L_... or PHY_N_... are
7393 + * Bits defined as PHY_X_..., PHY_B_..., PHY_L_..., PHY_N_... or PHY_M_... are
7394   * XMAC/Broadcom/LevelOne/National/Marvell-specific.
7395   * All other are general.
7396   */
7397 @@ -629,14 +638,14 @@
7398  /*****  PHY_LONE_CTRL  16 bit r/w      PHY Control Register *****/
7399  #define PHY_CT_RESET   (1<<15) /* Bit 15: (sc) clear all PHY related regs */
7400  #define PHY_CT_LOOP            (1<<14) /* Bit 14:      enable Loopback over PHY */
7401 -#define PHY_CT_SPS_LSB (1<<13) /* Bit 13: (BC,L1) Speed select, lower bit */
7402 +#define PHY_CT_SPS_LSB (1<<13) /* Bit 13:      Speed select, lower bit */
7403  #define PHY_CT_ANE             (1<<12) /* Bit 12:      Auto-Negotiation Enabled */
7404 -#define PHY_CT_PDOWN   (1<<11) /* Bit 11: (BC,L1) Power Down Mode */
7405 -#define PHY_CT_ISOL            (1<<10) /* Bit 10: (BC,L1) Isolate Mode */
7406 -#define PHY_CT_RE_CFG  (1<<9)  /* Bit  9: (sc) Restart Auto-Negotiation */
7407 +#define PHY_CT_PDOWN   (1<<11) /* Bit 11:      Power Down Mode */
7408 +#define PHY_CT_ISOL            (1<<10) /* Bit 10:      Isolate Mode */
7409 +#define PHY_CT_RE_CFG  (1<<9)  /* Bit  9:      (sc) Restart Auto-Negotiation */
7410  #define PHY_CT_DUP_MD  (1<<8)  /* Bit  8:      Duplex Mode */
7411 -#define PHY_CT_COL_TST (1<<7)  /* Bit  7: (BC,L1) Collision Test enabled */
7412 -#define PHY_CT_SPS_MSB (1<<6)  /* Bit  6: (BC,L1) Speed select, upper bit */
7413 +#define PHY_CT_COL_TST (1<<7)  /* Bit  7:      Collision Test enabled */
7414 +#define PHY_CT_SPS_MSB (1<<6)  /* Bit  6:      Speed select, upper bit */
7415                                                                 /* Bit  5..0:   reserved */
7416
7417  #define PHY_CT_SP1000  PHY_CT_SPS_MSB  /* enable speed of 1000 Mbps */
7418 @@ -649,25 +658,25 @@
7419  /*****  PHY_MARV_STAT  16 bit r/w      PHY Status Register *****/
7420  /*****  PHY_LONE_STAT  16 bit r/w      PHY Status Register *****/
7421                                                                 /* Bit 15..9:   reserved */
7422 -                               /*      (BC/L1) 100/10 Mbps cap bits ignored*/
7423 +                               /*      (BC/L1) 100/10 Mbps cap bits ignored */
7424  #define PHY_ST_EXT_ST  (1<<8)  /* Bit  8:      Extended Status Present */
7425                                                                 /* Bit  7:      reserved */
7426 -#define PHY_ST_PRE_SUP (1<<6)  /* Bit  6: (BC/L1) preamble suppression */
7427 +#define PHY_ST_PRE_SUP (1<<6)  /* Bit  6:      Preamble Suppression */
7428  #define PHY_ST_AN_OVER (1<<5)  /* Bit  5:      Auto-Negotiation Over */
7429  #define PHY_ST_REM_FLT (1<<4)  /* Bit  4:      Remote Fault Condition Occured */
7430  #define PHY_ST_AN_CAP  (1<<3)  /* Bit  3:      Auto-Negotiation Capability */
7431  #define PHY_ST_LSYNC   (1<<2)  /* Bit  2:      Link Synchronized */
7432 -#define PHY_ST_JAB_DET (1<<1)  /* Bit  1: (BC/L1) Jabber Detected */
7433 +#define PHY_ST_JAB_DET (1<<1)  /* Bit  1:      Jabber Detected */
7434  #define PHY_ST_EXT_REG (1<<0)  /* Bit  0:      Extended Register available */
7435
7436
7437 -/***** PHY_XMAC_ID1            16 bit r/o      PHY ID1 Register */
7438 -/***** PHY_BCOM_ID1            16 bit r/o      PHY ID1 Register */
7439 -/***** PHY_MARV_ID1            16 bit r/o      PHY ID1 Register */
7440 -/***** PHY_LONE_ID1            16 bit r/o      PHY ID1 Register */
7441 +/*****  PHY_XMAC_ID1           16 bit r/o      PHY ID1 Register */
7442 +/*****  PHY_BCOM_ID1           16 bit r/o      PHY ID1 Register */
7443 +/*****  PHY_MARV_ID1           16 bit r/o      PHY ID1 Register */
7444 +/*****  PHY_LONE_ID1           16 bit r/o      PHY ID1 Register */
7445  #define PHY_I1_OUI_MSK (0x3f<<10)      /* Bit 15..10:  Organization Unique ID */
7446  #define PHY_I1_MOD_NUM (0x3f<<4)       /* Bit  9.. 4:  Model Number */
7447 -#define PHY_I1_REV_MSK 0x0f            /* Bit  3.. 0:  Revision Number */
7448 +#define PHY_I1_REV_MSK 0xf                     /* Bit  3.. 0:  Revision Number */
7449
7450  /* different Broadcom PHY Ids */
7451  #define PHY_BCOM_ID1_A1                0x6041
7452 @@ -675,11 +684,19 @@
7453  #define PHY_BCOM_ID1_C0                0x6044
7454  #define PHY_BCOM_ID1_C5                0x6047
7455
7456 +/* different Marvell PHY Ids */
7457 +#define PHY_MARV_ID0_VAL       0x0141          /* Marvell Unique Identifier */
7458 +
7459 +#define PHY_MARV_ID1_B0                0x0C23          /* Yukon (PHY 88E1011) */
7460 +#define PHY_MARV_ID1_B2                0x0C25          /* Yukon-Plus (PHY 88E1011) */
7461 +#define PHY_MARV_ID1_C2                0x0CC2          /* Yukon-EC (PHY 88E1111) */
7462 +#define PHY_MARV_ID1_Y2                0x0C91          /* Yukon-2 (PHY 88E1112) */
7463 +
7464
7465  /*****  PHY_XMAC_AUNE_ADV      16 bit r/w      Auto-Negotiation Advertisement *****/
7466  /*****  PHY_XMAC_AUNE_LP       16 bit r/o      Link Partner Ability Reg *****/
7467  #define PHY_AN_NXT_PG  (1<<15) /* Bit 15:      Request Next Page */
7468 -#define PHY_X_AN_ACK   (1<<14) /* Bit 14: (ro) Acknowledge Received */
7469 +#define PHY_X_AN_ACK   (1<<14) /* Bit 14:      (ro) Acknowledge Received */
7470  #define PHY_X_AN_RFB   (3<<12) /* Bit 13..12:  Remote Fault Bits */
7471                                                                 /* Bit 11.. 9:  reserved */
7472  #define PHY_X_AN_PAUSE (3<<7)  /* Bit  8.. 7:  Pause Bits */
7473 @@ -827,7 +844,7 @@
7474  #define PHY_B_PEC_BY_MLT3      (1<<8)  /* Bit  8:      Bypass MLT3 Encoder */
7475  #define PHY_B_PEC_BY_RXA       (1<<7)  /* Bit  7:      Bypass Rx Alignm. */
7476  #define PHY_B_PEC_RES_SCR      (1<<6)  /* Bit  6:      Reset Scrambler */
7477 -#define PHY_B_PEC_EN_LTR       (1<<5)  /* Bit  5:      Ena LED Traffic Mode */
7478 +#define PHY_B_PEC_EN_LTR       (1<<5)  /* Bit  5:      Enable LED Traffic Mode */
7479  #define PHY_B_PEC_LED_ON       (1<<4)  /* Bit  4:      Force LED's on */
7480  #define PHY_B_PEC_LED_OFF      (1<<3)  /* Bit  3:      Force LED's off */
7481  #define PHY_B_PEC_EX_IPG       (1<<2)  /* Bit  2:      Extend Tx IPG Mode */
7482 @@ -981,7 +998,7 @@
7483  #define PHY_L_QS_DUP_MOD       (1<<9)  /* Bit  9:      Full/Half Duplex */
7484  #define PHY_L_QS_AN                    (1<<8)  /* Bit  8:      AutoNeg is On */
7485  #define PHY_L_QS_AN_C          (1<<7)  /* Bit  7:      AN is Complete */
7486 -#define PHY_L_QS_LLE           (7<<4)  /* Bit  6:      Line Length Estim. */
7487 +#define PHY_L_QS_LLE           (7<<4)  /* Bit  6..4:   Line Length Estim. */
7488  #define PHY_L_QS_PAUSE         (1<<3)  /* Bit  3:      LP advertised Pause */
7489  #define PHY_L_QS_AS_PAUSE      (1<<2)  /* Bit  2:      LP adv. asym. Pause */
7490  #define PHY_L_QS_ISOLATE       (1<<1)  /* Bit  1:      CIM Isolated */
7491 @@ -1029,9 +1046,8 @@
7492                                                                         /* Bit  9..0:   not described */
7493
7494  /*****  PHY_LONE_CIM           16 bit r/o      CIM Reg *****/
7495 -#define PHY_L_CIM_ISOL         (255<<8)/* Bit 15..8:   Isolate Count */
7496 -#define PHY_L_CIM_FALSE_CAR    (255<<0)/* Bit  7..0:   False Carrier Count */
7497 -
7498 +#define PHY_L_CIM_ISOL         (0xff<<8)       /* Bit 15..8:   Isolate Count */
7499 +#define PHY_L_CIM_FALSE_CAR    0xff            /* Bit  7..0:   False Carrier Count */
7500
7501  /*
7502   * Pause Bits (PHY_L_AN_ASP and PHY_L_AN_PC) encoding
7503 @@ -1041,7 +1057,6 @@
7504  #define PHY_L_P_ASYM_MD                (2<<10) /* Bit 11..10:  asymmetric Pause Mode */
7505  #define PHY_L_P_BOTH_MD                (3<<10) /* Bit 11..10:  both Pause Mode */
7506
7507 -
7508  /*
7509   * National-Specific
7510   */
7511 @@ -1086,22 +1101,24 @@
7512   */
7513  /*****  PHY_MARV_AUNE_ADV      16 bit r/w      Auto-Negotiation Advertisement *****/
7514  /*****  PHY_MARV_AUNE_LP       16 bit r/w      Link Part Ability Reg *****/
7515 -#define PHY_M_AN_NXT_PG                BIT_15  /* Request Next Page */
7516 -#define PHY_M_AN_ACK           BIT_14  /* (ro) Acknowledge Received */
7517 -#define PHY_M_AN_RF                    BIT_13  /* Remote Fault */
7518 -                                                                       /* Bit 12:      reserved */
7519 -#define PHY_M_AN_ASP           BIT_11  /* Asymmetric Pause */
7520 -#define PHY_M_AN_PC                    BIT_10  /* MAC Pause implemented */
7521 -#define PHY_M_AN_100_FD                BIT_8   /* Advertise 100Base-TX Full Duplex */
7522 -#define PHY_M_AN_100_HD                BIT_7   /* Advertise 100Base-TX Half Duplex */
7523 -#define PHY_M_AN_10_FD         BIT_6   /* Advertise 10Base-TX Full Duplex */
7524 -#define PHY_M_AN_10_HD         BIT_5   /* Advertise 10Base-TX Half Duplex */
7525 +#define PHY_M_AN_NXT_PG                BIT_15S /* Request Next Page */
7526 +#define PHY_M_AN_ACK           BIT_14S /* (ro) Acknowledge Received */
7527 +#define PHY_M_AN_RF                    BIT_13S /* Remote Fault */
7528 +                                                               /* Bit 12:      reserved */
7529 +#define PHY_M_AN_ASP           BIT_11S /* Asymmetric Pause */
7530 +#define PHY_M_AN_PC                    BIT_10S /* MAC Pause implemented */
7531 +#define PHY_M_AN_100_T4                BIT_9S  /* Not cap. 100Base-T4 (always 0) */
7532 +#define PHY_M_AN_100_FD                BIT_8S  /* Advertise 100Base-TX Full Duplex */
7533 +#define PHY_M_AN_100_HD                BIT_7S  /* Advertise 100Base-TX Half Duplex */
7534 +#define PHY_M_AN_10_FD         BIT_6S  /* Advertise 10Base-TX Full Duplex */
7535 +#define PHY_M_AN_10_HD         BIT_5S  /* Advertise 10Base-TX Half Duplex */
7536 +#define PHY_M_AN_SEL_MSK       (0x1f<<4)       /* Bit  4.. 0: Selector Field Mask */
7537
7538  /* special defines for FIBER (88E1011S only) */
7539 -#define PHY_M_AN_ASP_X         BIT_8   /* Asymmetric Pause */
7540 -#define PHY_M_AN_PC_X          BIT_7   /* MAC Pause implemented */
7541 -#define PHY_M_AN_1000X_AHD     BIT_6   /* Advertise 10000Base-X Half Duplex */
7542 -#define PHY_M_AN_1000X_AFD     BIT_5   /* Advertise 10000Base-X Full Duplex */
7543 +#define PHY_M_AN_ASP_X         BIT_8S  /* Asymmetric Pause */
7544 +#define PHY_M_AN_PC_X          BIT_7S  /* MAC Pause implemented */
7545 +#define PHY_M_AN_1000X_AHD     BIT_6S  /* Advertise 10000Base-X Half Duplex */
7546 +#define PHY_M_AN_1000X_AFD     BIT_5S  /* Advertise 10000Base-X Full Duplex */
7547
7548  /* Pause Bits (PHY_M_AN_ASP_X and PHY_M_AN_PC_X) encoding */
7549  #define PHY_M_P_NO_PAUSE_X     (0<<7)  /* Bit  8.. 7:  no Pause Mode */
7550 @@ -1111,105 +1128,162 @@
7551
7552  /*****  PHY_MARV_1000T_CTRL    16 bit r/w      1000Base-T Control Reg *****/
7553  #define PHY_M_1000C_TEST       (7<<13) /* Bit 15..13:  Test Modes */
7554 -#define PHY_M_1000C_MSE                (1<<12) /* Bit 12:      Manual Master/Slave Enable */
7555 -#define PHY_M_1000C_MSC                (1<<11) /* Bit 11:      M/S Configuration (1=Master) */
7556 -#define PHY_M_1000C_MPD                (1<<10) /* Bit 10:      Multi-Port Device */
7557 -#define PHY_M_1000C_AFD                (1<<9)  /* Bit  9:      Advertise Full Duplex */
7558 -#define PHY_M_1000C_AHD                (1<<8)  /* Bit  8:      Advertise Half Duplex */
7559 +#define PHY_M_1000C_MSE                BIT_12S /* Manual Master/Slave Enable */
7560 +#define PHY_M_1000C_MSC                BIT_11S /* M/S Configuration (1=Master) */
7561 +#define PHY_M_1000C_MPD                BIT_10S /* Multi-Port Device */
7562 +#define PHY_M_1000C_AFD                BIT_9S  /* Advertise Full Duplex */
7563 +#define PHY_M_1000C_AHD                BIT_8S  /* Advertise Half Duplex */
7564                                                                         /* Bit  7..0:   reserved */
7565
7566  /*****  PHY_MARV_PHY_CTRL      16 bit r/w      PHY Specific Ctrl Reg *****/
7567 -#define PHY_M_PC_TX_FFD_MSK    (3<<14) /* Bit 15..14:  Tx FIFO Depth Mask */
7568 -#define PHY_M_PC_RX_FFD_MSK    (3<<12) /* Bit 13..12:  Rx FIFO Depth Mask */
7569 -#define PHY_M_PC_ASS_CRS_TX    (1<<11) /* Bit 11:      Assert CRS on Transmit */
7570 -#define PHY_M_PC_FL_GOOD       (1<<10) /* Bit 10:      Force Link Good */
7571 -#define PHY_M_PC_EN_DET_MSK    (3<<8)  /* Bit  9.. 8:  Energy Detect Mask */
7572 -#define PHY_M_PC_ENA_EXT_D     (1<<7)  /* Bit  7:      Enable Ext. Distance (10BT) */
7573 -#define PHY_M_PC_MDIX_MSK      (3<<5)  /* Bit  6.. 5:  MDI/MDIX Config. Mask */
7574 -#define PHY_M_PC_DIS_125CLK    (1<<4)  /* Bit  4:      Disable 125 CLK */
7575 -#define PHY_M_PC_MAC_POW_UP    (1<<3)  /* Bit  3:      MAC Power up */
7576 -#define PHY_M_PC_SQE_T_ENA     (1<<2)  /* Bit  2:      SQE Test Enabled */
7577 -#define PHY_M_PC_POL_R_DIS     (1<<1)  /* Bit  1:      Polarity Reversal Disabled */
7578 -#define PHY_M_PC_DIS_JABBER    (1<<0)  /* Bit  0:      Disable Jabber */
7579 +#define PHY_M_PC_TX_FFD_MSK    (3<<14) /* Bit 15..14: Tx FIFO Depth Mask */
7580 +#define PHY_M_PC_RX_FFD_MSK    (3<<12) /* Bit 13..12: Rx FIFO Depth Mask */
7581 +#define PHY_M_PC_ASS_CRS_TX    BIT_11S /* Assert CRS on Transmit */
7582 +#define PHY_M_PC_FL_GOOD       BIT_10S /* Force Link Good */
7583 +#define PHY_M_PC_EN_DET_MSK    (3<<8)  /* Bit  9.. 8: Energy Detect Mask */
7584 +#define PHY_M_PC_ENA_EXT_D     BIT_7S  /* Enable Ext. Distance (10BT) */
7585 +#define PHY_M_PC_MDIX_MSK      (3<<5)  /* Bit  6.. 5: MDI/MDIX Config. Mask */
7586 +#define PHY_M_PC_DIS_125CLK    BIT_4S  /* Disable 125 CLK */
7587 +#define PHY_M_PC_MAC_POW_UP    BIT_3S  /* MAC Power up */
7588 +#define PHY_M_PC_SQE_T_ENA     BIT_2S  /* SQE Test Enabled */
7589 +#define PHY_M_PC_POL_R_DIS     BIT_1S  /* Polarity Reversal Disabled */
7590 +#define PHY_M_PC_DIS_JABBER    BIT_0S  /* Disable Jabber */
7591
7592  #define PHY_M_PC_EN_DET                        SHIFT8(2)       /* Energy Detect (Mode 1) */
7593  #define PHY_M_PC_EN_DET_PLUS   SHIFT8(3)       /* Energy Detect Plus (Mode 2) */
7594
7595 -#define PHY_M_PC_MDI_XMODE(x)  SHIFT5(x)
7596 -#define PHY_M_PC_MAN_MDI       0       /* 00 = Manual MDI configuration */
7597 +#define PHY_M_PC_MDI_XMODE(x)  (SHIFT5(x) & PHY_M_PC_MDIX_MSK)
7598 +
7599 +#define PHY_M_PC_MAN_MDI       0               /* 00 = Manual MDI configuration */
7600  #define PHY_M_PC_MAN_MDIX      1               /* 01 = Manual MDIX configuration */
7601  #define PHY_M_PC_ENA_AUTO      3               /* 11 = Enable Automatic Crossover */
7602
7603 +/* for Yukon-2 Gigabit Ethernet PHY (88E1112 only) */
7604 +#define PHY_M_PC_DIS_LINK_P    BIT_15S /* Disable Link Pulses */
7605 +#define PHY_M_PC_DSC_MSK       (7<<12) /* Bit 14..12:  Downshift Counter */
7606 +#define PHY_M_PC_DOWN_S_ENA    BIT_11S /* Downshift Enable */
7607 +                                                                       /* !!! Errata in spec. (1 = disable) */
7608 +
7609 +#define PHY_M_PC_DSC(x)                        (SHIFT12(x) & PHY_M_PC_DSC_MSK)
7610 +                                                                               /* 000=1x; 001=2x; 010=3x; 011=4x */
7611 +                                                                               /* 100=5x; 101=6x; 110=7x; 111=8x */
7612 +
7613 +/* for 10/100 Fast Ethernet PHY (88E3082 only) */
7614 +#define PHY_M_PC_ENA_DTE_DT    BIT_15S /* Enable Data Terminal Equ. (DTE) Detect */
7615 +#define PHY_M_PC_ENA_ENE_DT    BIT_14S /* Enable Energy Detect (sense & pulse) */
7616 +#define PHY_M_PC_DIS_NLP_CK    BIT_13S /* Disable Normal Link Puls (NLP) Check */
7617 +#define PHY_M_PC_ENA_LIP_NP    BIT_12S /* Enable Link Partner Next Page Reg. */
7618 +#define PHY_M_PC_DIS_NLP_GN    BIT_11S /* Disable Normal Link Puls Generation */
7619 +
7620 +#define PHY_M_PC_DIS_SCRAMB    BIT_9S  /* Disable Scrambler */
7621 +#define PHY_M_PC_DIS_FEFI      BIT_8S  /* Disable Far End Fault Indic. (FEFI) */
7622 +
7623 +#define PHY_M_PC_SH_TP_SEL     BIT_6S  /* Shielded Twisted Pair Select */
7624 +#define PHY_M_PC_RX_FD_MSK     (3<<2)  /* Bit  3.. 2: Rx FIFO Depth Mask */
7625 +
7626  /*****  PHY_MARV_PHY_STAT      16 bit r/o      PHY Specific Status Reg *****/
7627 -#define PHY_M_PS_SPEED_MSK     (3<<14) /* Bit 15..14:  Speed Mask */
7628 -#define PHY_M_PS_SPEED_1000    (1<<15) /*       10 = 1000 Mbps */
7629 -#define PHY_M_PS_SPEED_100     (1<<14) /*       01 =  100 Mbps */
7630 -#define PHY_M_PS_SPEED_10      0               /*       00 =   10 Mbps */
7631 -#define PHY_M_PS_FULL_DUP      (1<<13) /* Bit 13:      Full Duplex */
7632 -#define PHY_M_PS_PAGE_REC      (1<<12) /* Bit 12:      Page Received */
7633 -#define PHY_M_PS_SPDUP_RES     (1<<11) /* Bit 11:      Speed & Duplex Resolved */
7634 -#define PHY_M_PS_LINK_UP       (1<<10) /* Bit 10:      Link Up */
7635 -#define PHY_M_PS_CABLE_MSK     (3<<7)  /* Bit  9.. 7:  Cable Length Mask */
7636 -#define PHY_M_PS_MDI_X_STAT    (1<<6)  /* Bit  6:      MDI Crossover Stat (1=MDIX) */
7637 -#define PHY_M_PS_DOWNS_STAT    (1<<5)  /* Bit  5:      Downshift Status (1=downsh.) */
7638 -#define PHY_M_PS_ENDET_STAT    (1<<4)  /* Bit  4:      Energy Detect Status (1=act) */
7639 -#define PHY_M_PS_TX_P_EN       (1<<3)  /* Bit  3:      Tx Pause Enabled */
7640 -#define PHY_M_PS_RX_P_EN       (1<<2)  /* Bit  2:      Rx Pause Enabled */
7641 -#define PHY_M_PS_POL_REV       (1<<1)  /* Bit  1:      Polarity Reversed */
7642 -#define PHY_M_PC_JABBER                (1<<0)  /* Bit  0:      Jabber */
7643 +#define PHY_M_PS_SPEED_MSK     (3<<14) /* Bit 15..14: Speed Mask */
7644 +#define PHY_M_PS_SPEED_1000    BIT_15S /*              10 = 1000 Mbps */
7645 +#define PHY_M_PS_SPEED_100     BIT_14S /*              01 =  100 Mbps */
7646 +#define PHY_M_PS_SPEED_10      0               /*              00 =   10 Mbps */
7647 +#define PHY_M_PS_FULL_DUP      BIT_13S /* Full Duplex */
7648 +#define PHY_M_PS_PAGE_REC      BIT_12S /* Page Received */
7649 +#define PHY_M_PS_SPDUP_RES     BIT_11S /* Speed & Duplex Resolved */
7650 +#define PHY_M_PS_LINK_UP       BIT_10S /* Link Up */
7651 +#define PHY_M_PS_CABLE_MSK     (7<<7)  /* Bit  9.. 7: Cable Length Mask */
7652 +#define PHY_M_PS_MDI_X_STAT    BIT_6S  /* MDI Crossover Stat (1=MDIX) */
7653 +#define PHY_M_PS_DOWNS_STAT    BIT_5S  /* Downshift Status (1=downsh.) */
7654 +#define PHY_M_PS_ENDET_STAT    BIT_4S  /* Energy Detect Status (1=act) */
7655 +#define PHY_M_PS_TX_P_EN       BIT_3S  /* Tx Pause Enabled */
7656 +#define PHY_M_PS_RX_P_EN       BIT_2S  /* Rx Pause Enabled */
7657 +#define PHY_M_PS_POL_REV       BIT_1S  /* Polarity Reversed */
7658 +#define PHY_M_PS_JABBER                BIT_0S  /* Jabber */
7659
7660  #define PHY_M_PS_PAUSE_MSK     (PHY_M_PS_TX_P_EN | PHY_M_PS_RX_P_EN)
7661
7662 +/* for 10/100 Fast Ethernet PHY (88E3082 only) */
7663 +#define PHY_M_PS_DTE_DETECT    BIT_15S /* Data Terminal Equipment (DTE) Detected */
7664 +#define PHY_M_PS_RES_SPEED     BIT_14S /* Resolved Speed (1=100 Mbps, 0=10 Mbps */
7665 +
7666  /*****  PHY_MARV_INT_MASK      16 bit r/w      Interrupt Mask Reg *****/
7667  /*****  PHY_MARV_INT_STAT      16 bit r/o      Interrupt Status Reg *****/
7668 -#define PHY_M_IS_AN_ERROR      (1<<15) /* Bit 15:      Auto-Negotiation Error */
7669 -#define PHY_M_IS_LSP_CHANGE    (1<<14) /* Bit 14:      Link Speed Changed */
7670 -#define PHY_M_IS_DUP_CHANGE    (1<<13) /* Bit 13:      Duplex Mode Changed */
7671 -#define PHY_M_IS_AN_PR         (1<<12) /* Bit 12:      Page Received */
7672 -#define PHY_M_IS_AN_COMPL      (1<<11) /* Bit 11:      Auto-Negotiation Completed */
7673 -#define PHY_M_IS_LST_CHANGE    (1<<10) /* Bit 10:      Link Status Changed */
7674 -#define PHY_M_IS_SYMB_ERROR    (1<<9)  /* Bit  9:      Symbol Error */
7675 -#define PHY_M_IS_FALSE_CARR    (1<<8)  /* Bit  8:      False Carrier */
7676 -#define PHY_M_IS_FIFO_ERROR    (1<<7)  /* Bit  7:      FIFO Overflow/Underrun Error */
7677 -#define PHY_M_IS_MDI_CHANGE    (1<<6)  /* Bit  6:      MDI Crossover Changed */
7678 -#define PHY_M_IS_DOWNSH_DET    (1<<5)  /* Bit  5:      Downshift Detected */
7679 -#define PHY_M_IS_END_CHANGE    (1<<4)  /* Bit  4:      Energy Detect Changed */
7680 -                                                                       /* Bit  3..2:   reserved */
7681 -#define PHY_M_IS_POL_CHANGE    (1<<1)  /* Bit  1:      Polarity Changed */
7682 -#define PHY_M_IS_JABBER                (1<<0)  /* Bit  0:      Jabber */
7683 +#define PHY_M_IS_AN_ERROR      BIT_15S /* Auto-Negotiation Error */
7684 +#define PHY_M_IS_LSP_CHANGE    BIT_14S /* Link Speed Changed */
7685 +#define PHY_M_IS_DUP_CHANGE    BIT_13S /* Duplex Mode Changed */
7686 +#define PHY_M_IS_AN_PR         BIT_12S /* Page Received */
7687 +#define PHY_M_IS_AN_COMPL      BIT_11S /* Auto-Negotiation Completed */
7688 +#define PHY_M_IS_LST_CHANGE    BIT_10S /* Link Status Changed */
7689 +#define PHY_M_IS_SYMB_ERROR    BIT_9S  /* Symbol Error */
7690 +#define PHY_M_IS_FALSE_CARR    BIT_8S  /* False Carrier */
7691 +#define PHY_M_IS_FIFO_ERROR    BIT_7S  /* FIFO Overflow/Underrun Error */
7692 +#define PHY_M_IS_MDI_CHANGE    BIT_6S  /* MDI Crossover Changed */
7693 +#define PHY_M_IS_DOWNSH_DET    BIT_5S  /* Downshift Detected */
7694 +#define PHY_M_IS_END_CHANGE    BIT_4S  /* Energy Detect Changed */
7695 +                                                               /* Bit   3:     reserved */
7696 +#define PHY_M_IS_DTE_CHANGE    BIT_2S  /* DTE Power Det. Status Changed */
7697 +                                                                       /* (88E1111 only) */
7698 +#define PHY_M_IS_POL_CHANGE    BIT_1S  /* Polarity Changed */
7699 +#define PHY_M_IS_JABBER                BIT_0S  /* Jabber */
7700
7701  #define PHY_M_DEF_MSK          (PHY_M_IS_AN_ERROR | PHY_M_IS_AN_PR | \
7702                                                         PHY_M_IS_LST_CHANGE | PHY_M_IS_FIFO_ERROR)
7703
7704  /*****  PHY_MARV_EXT_CTRL      16 bit r/w      Ext. PHY Specific Ctrl *****/
7705 -#define PHY_M_EC_M_DSC_MSK     (3<<10) /* Bit 11..10:  Master downshift counter */
7706 -#define PHY_M_EC_S_DSC_MSK     (3<<8)  /* Bit  9.. 8:  Slave  downshift counter */
7707 +#define PHY_M_EC_ENA_BC_EXT    BIT_15S /* Enable Block Carr. Ext. (88E1111 only) */
7708 +#define PHY_M_EC_ENA_LIN_LB    BIT_14S /* Enable Line Loopback (88E1111 only) */
7709 +                                                               /* Bit 13:      reserved */
7710 +#define PHY_M_EC_DIS_LINK_P    BIT_12S /* Disable Link Pulses (88E1111 only) */
7711 +#define PHY_M_EC_M_DSC_MSK     (3<<10) /* Bit 11..10:  Master Downshift Counter */
7712 +                                                                       /* (88E1011 only) */
7713 +#define PHY_M_EC_S_DSC_MSK     (3<<8)  /* Bit  9.. 8:  Slave  Downshift Counter */
7714 +                                                                       /* (88E1011 only) */
7715 +#define PHY_M_EC_DSC_MSK_2     (7<<9)  /* Bit 11.. 9:  Downshift Counter */
7716 +                                                                       /* (88E1111 only) */
7717 +#define PHY_M_EC_DOWN_S_ENA    BIT_8S  /* Downshift Enable (88E1111 only) */
7718 +                                                                       /* !!! Errata in spec. (1 = disable) */
7719 +#define PHY_M_EC_RX_TIM_CT     BIT_7S  /* RGMII Rx Timing Control*/
7720  #define PHY_M_EC_MAC_S_MSK     (7<<4)  /* Bit  6.. 4:  Def. MAC interface speed */
7721 -#define PHY_M_EC_FIB_AN_ENA    (1<<3)  /* Bit  3:      Fiber Auto-Neg. Enable */
7722 -
7723 -#define PHY_M_EC_M_DSC(x)              SHIFT10(x)      /* 00=1x; 01=2x; 10=3x; 11=4x */
7724 -#define PHY_M_EC_S_DSC(x)              SHIFT8(x)       /* 00=dis; 01=1x; 10=2x; 11=3x */
7725 -#define PHY_M_EC_MAC_S(x)              SHIFT4(x)       /* 01X=0; 110=2.5; 111=25 (MHz) */
7726 -
7727 +#define PHY_M_EC_FIB_AN_ENA    BIT_3S  /* Fiber Auto-Neg. Enable (88E1011S only) */
7728 +#define PHY_M_EC_DTE_D_ENA     BIT_2S  /* DTE Detect Enable (88E1111 only) */
7729 +#define PHY_M_EC_TX_TIM_CT     BIT_1S  /* RGMII Tx Timing Control */
7730 +#define PHY_M_EC_TRANS_DIS     BIT_0S  /* Transmitter Disable (88E1111 only) */
7731 +
7732 +#define PHY_M_EC_M_DSC(x)              (SHIFT10(x) & PHY_M_EC_M_DSC_MSK)
7733 +                                                                       /* 00=1x; 01=2x; 10=3x; 11=4x */
7734 +#define PHY_M_EC_S_DSC(x)              (SHIFT8(x) & PHY_M_EC_S_DSC_MSK)
7735 +                                                                       /* 00=dis; 01=1x; 10=2x; 11=3x */
7736 +#define PHY_M_EC_MAC_S(x)              (SHIFT4(x) & PHY_M_EC_MAC_S_MSK)
7737 +                                                                       /* 01X=0; 110=2.5; 111=25 (MHz) */
7738 +
7739 +#define PHY_M_EC_DSC_2(x)              (SHIFT9(x) & PHY_M_EC_DSC_MSK_2)
7740 +                                                                       /* 000=1x; 001=2x; 010=3x; 011=4x */
7741 +                                                                       /* 100=5x; 101=6x; 110=7x; 111=8x */
7742  #define MAC_TX_CLK_0_MHZ       2
7743  #define MAC_TX_CLK_2_5_MHZ     6
7744  #define MAC_TX_CLK_25_MHZ      7
7745
7746  /*****  PHY_MARV_LED_CTRL      16 bit r/w      LED Control Reg *****/
7747 -#define PHY_M_LEDC_DIS_LED     (1<<15) /* Bit 15:      Disable LED */
7748 -#define PHY_M_LEDC_PULS_MSK    (7<<12) /* Bit 14..12:  Pulse Stretch Mask */
7749 -#define PHY_M_LEDC_F_INT       (1<<11) /* Bit 11:      Force Interrupt */
7750 -#define PHY_M_LEDC_BL_R_MSK    (7<<8)  /* Bit 10.. 8:  Blink Rate Mask */
7751 -                                                                       /* Bit  7.. 5:  reserved */
7752 -#define PHY_M_LEDC_LINK_MSK    (3<<3)  /* Bit  4.. 3:  Link Control Mask */
7753 -#define PHY_M_LEDC_DP_CTRL     (1<<2)  /* Bit  2:      Duplex Control */
7754 -#define PHY_M_LEDC_RX_CTRL     (1<<1)  /* Bit  1:      Rx activity / Link */
7755 -#define PHY_M_LEDC_TX_CTRL     (1<<0)  /* Bit  0:      Tx activity / Link */
7756 +#define PHY_M_LEDC_DIS_LED     BIT_15S /* Disable LED */
7757 +#define PHY_M_LEDC_PULS_MSK    (7<<12) /* Bit 14..12: Pulse Stretch Mask */
7758 +#define PHY_M_LEDC_F_INT       BIT_11S /* Force Interrupt */
7759 +#define PHY_M_LEDC_BL_R_MSK    (7<<8)  /* Bit 10.. 8: Blink Rate Mask */
7760 +#define PHY_M_LEDC_DP_C_LSB    BIT_7S  /* Duplex Control (LSB, 88E1111 only) */
7761 +#define PHY_M_LEDC_TX_C_LSB    BIT_6S  /* Tx Control (LSB, 88E1111 only) */
7762 +#define PHY_M_LEDC_LK_C_MSK    (7<<3)  /* Bit  5.. 3: Link Control Mask */
7763 +                                                                       /* (88E1111 only) */
7764 +                                                               /* Bit  7.. 5:  reserved (88E1011 only) */
7765 +#define PHY_M_LEDC_LINK_MSK    (3<<3)  /* Bit  4.. 3: Link Control Mask */
7766 +                                                                       /* (88E1011 only) */
7767 +#define PHY_M_LEDC_DP_CTRL     BIT_2S  /* Duplex Control */
7768 +#define PHY_M_LEDC_DP_C_MSB    BIT_2S  /* Duplex Control (MSB, 88E1111 only) */
7769 +#define PHY_M_LEDC_RX_CTRL     BIT_1S  /* Rx Activity / Link */
7770 +#define PHY_M_LEDC_TX_CTRL     BIT_0S  /* Tx Activity / Link */
7771 +#define PHY_M_LEDC_TX_C_MSB    BIT_0S  /* Tx Control (MSB, 88E1111 only) */
7772
7773 -#define PHY_M_LED_PULS_DUR(x)  SHIFT12(x)      /* Pulse Stretch Duration */
7774 +#define PHY_M_LED_PULS_DUR(x)  (SHIFT12(x) & PHY_M_LEDC_PULS_MSK)
7775
7776 -#define        PULS_NO_STR             0               /* no pulse stretching */
7777 -#define        PULS_21MS               1               /* 21 ms to 42 ms */
7778 +#define PULS_NO_STR            0               /* no pulse stretching */
7779 +#define PULS_21MS              1               /* 21 ms to 42 ms */
7780  #define PULS_42MS              2               /* 42 ms to 84 ms */
7781  #define PULS_84MS              3               /* 84 ms to 170 ms */
7782  #define PULS_170MS             4               /* 170 ms to 340 ms */
7783 @@ -1217,7 +1291,7 @@
7784  #define PULS_670MS             6               /* 670 ms to 1.3 s */
7785  #define PULS_1300MS            7               /* 1.3 s to 2.7 s */
7786
7787 -#define PHY_M_LED_BLINK_RT(x)  SHIFT8(x)       /* Blink Rate */
7788 +#define PHY_M_LED_BLINK_RT(x)  (SHIFT8(x) & PHY_M_LEDC_BL_R_MSK)
7789
7790  #define BLINK_42MS             0               /* 42 ms */
7791  #define BLINK_84MS             1               /* 84 ms */
7792 @@ -1227,6 +1301,8 @@
7793                                                                 /* values 5 - 7: reserved */
7794
7795  /*****  PHY_MARV_LED_OVER      16 bit r/w      Manual LED Override Reg *****/
7796 +#define PHY_M_LED_MO_SGMII(x)  SHIFT14(x)      /* Bit 15..14:  SGMII AN Timer */
7797 +                                                                               /* Bit 13..12:  reserved */
7798  #define PHY_M_LED_MO_DUP(x)            SHIFT10(x)      /* Bit 11..10:  Duplex */
7799  #define PHY_M_LED_MO_10(x)             SHIFT8(x)       /* Bit  9.. 8:  Link 10 */
7800  #define PHY_M_LED_MO_100(x)            SHIFT6(x)       /* Bit  7.. 6:  Link 100 */
7801 @@ -1240,30 +1316,35 @@
7802  #define MO_LED_ON                      3
7803
7804  /*****  PHY_MARV_EXT_CTRL_2    16 bit r/w      Ext. PHY Specific Ctrl 2 *****/
7805 -                                                                       /* Bit 15.. 7:  reserved */
7806 -#define PHY_M_EC2_FI_IMPED     (1<<6)  /* Bit  6:      Fiber Input  Impedance */
7807 -#define PHY_M_EC2_FO_IMPED     (1<<5)  /* Bit  5:      Fiber Output Impedance */
7808 -#define PHY_M_EC2_FO_M_CLK     (1<<4)  /* Bit  4:      Fiber Mode Clock Enable */
7809 -#define PHY_M_EC2_FO_BOOST     (1<<3)  /* Bit  3:      Fiber Output Boost */
7810 +                                                               /* Bit 15.. 7:  reserved */
7811 +#define PHY_M_EC2_FI_IMPED     BIT_6S  /* Fiber Input  Impedance */
7812 +#define PHY_M_EC2_FO_IMPED     BIT_5S  /* Fiber Output Impedance */
7813 +#define PHY_M_EC2_FO_M_CLK     BIT_4S  /* Fiber Mode Clock Enable */
7814 +#define PHY_M_EC2_FO_BOOST     BIT_3S  /* Fiber Output Boost */
7815  #define PHY_M_EC2_FO_AM_MSK    7               /* Bit  2.. 0:  Fiber Output Amplitude */
7816
7817 -/***** PHY_MARV_EXT_P_STAT 16 bit r/w  Ext. PHY Specific Status *****/
7818 -#define PHY_M_FC_AUTO_SEL      (1<<15) /* Bit 15:      Fiber/Copper Auto Sel. dis. */
7819 -#define PHY_M_FC_AN_REG_ACC (1<<14) /* Bit 14: Fiber/Copper Autoneg. reg acc */
7820 -#define PHY_M_FC_RESULUTION (1<<13)    /* Bit 13:      Fiber/Copper Resulution */
7821 -#define PHY_M_SER_IF_AN_BP  (1<<12) /* Bit 12: Ser IF autoneg. bypass enable */
7822 -#define PHY_M_SER_IF_BP_ST     (1<<11) /* Bit 11:      Ser IF autoneg. bypass status */
7823 -#define PHY_M_IRQ_POLARITY     (1<<10) /* Bit 10:      IRQ polarity */
7824 -                                                                       /* Bit 9..4: reserved */
7825 -#define PHY_M_UNDOC1           (1<< 7) /* undocumented bit !! */
7826 -#define PHY_M_MODE_MASK                (0xf<<0)/* Bit 3..0: copy of HWCFG MODE[3:0] */
7827 -
7828 +/*****  PHY_MARV_EXT_P_STAT 16 bit r/w Ext. PHY Specific Status *****/
7829 +#define PHY_M_FC_AUTO_SEL      BIT_15S /* Fiber/Copper Auto Sel. Dis. */
7830 +#define PHY_M_FC_AN_REG_ACC    BIT_14S /* Fiber/Copper AN Reg. Access */
7831 +#define PHY_M_FC_RESOLUTION    BIT_13S /* Fiber/Copper Resolution */
7832 +#define PHY_M_SER_IF_AN_BP     BIT_12S /* Ser. IF AN Bypass Enable */
7833 +#define PHY_M_SER_IF_BP_ST     BIT_11S /* Ser. IF AN Bypass Status */
7834 +#define PHY_M_IRQ_POLARITY     BIT_10S /* IRQ polarity */
7835 +#define PHY_M_DIS_AUT_MED      BIT_9S  /* Disable Aut. Medium Reg. Selection */
7836 +                                                                       /* (88E1111 only) */
7837 +                                                               /* Bit  9.. 4: reserved (88E1011 only) */
7838 +#define PHY_M_UNDOC1           BIT_7S  /* undocumented bit !! */
7839 +#define PHY_M_DTE_POW_STAT     BIT_4S  /* DTE Power Status (88E1111 only) */
7840 +#define PHY_M_MODE_MASK                0xf             /* Bit  3.. 0: copy of HWCFG MODE[3:0] */
7841
7842  /*****  PHY_MARV_CABLE_DIAG    16 bit r/o      Cable Diagnostic Reg *****/
7843 -#define PHY_M_CABD_ENA_TEST    (1<<15) /* Bit 15:      Enable Test */
7844 -#define PHY_M_CABD_STAT_MSK    (3<<13) /* Bit 14..13:  Status */
7845 -                                                                       /* Bit 12.. 8:  reserved */
7846 -#define PHY_M_CABD_DIST_MSK    0xff    /* Bit  7.. 0:  Distance */
7847 +#define PHY_M_CABD_ENA_TEST    BIT_15S         /* Enable Test (Page 0) */
7848 +#define PHY_M_CABD_DIS_WAIT    BIT_15S         /* Disable Waiting Period (Page 1) */
7849 +                                                                               /* (88E1111 only) */
7850 +#define PHY_M_CABD_STAT_MSK    (3<<13)         /* Bit 14..13: Status Mask */
7851 +#define PHY_M_CABD_AMPL_MSK    (0x1f<<8)       /* Bit 12.. 8: Amplitude Mask */
7852 +                                                                               /* (88E1111 only) */
7853 +#define PHY_M_CABD_DIST_MSK    0xff            /* Bit  7.. 0: Distance Mask */
7854
7855  /* values for Cable Diagnostic Status (11=fail; 00=OK; 10=open; 01=short) */
7856  #define CABD_STAT_NORMAL       0
7857 @@ -1271,6 +1352,72 @@
7858  #define CABD_STAT_OPEN         2
7859  #define CABD_STAT_FAIL         3
7860
7861 +/* for 10/100 Fast Ethernet PHY (88E3082 only) */
7862 +/*****  PHY_MARV_FE_LED_PAR            16 bit r/w      LED Parallel Select Reg. *****/
7863 +                                                                       /* Bit 15..12: reserved (used internally) */
7864 +#define PHY_M_FELP_LED2_MSK    (0xf<<8)        /* Bit 11.. 8: LED2 Mask (LINK) */
7865 +#define PHY_M_FELP_LED1_MSK    (0xf<<4)        /* Bit  7.. 4: LED1 Mask (ACT) */
7866 +#define PHY_M_FELP_LED0_MSK    0xf                     /* Bit  3.. 0: LED0 Mask (SPEED) */
7867 +
7868 +#define PHY_M_FELP_LED2_CTRL(x)        (SHIFT8(x) & PHY_M_FELP_LED2_MSK)
7869 +#define PHY_M_FELP_LED1_CTRL(x)        (SHIFT4(x) & PHY_M_FELP_LED1_MSK)
7870 +#define PHY_M_FELP_LED0_CTRL(x)        (SHIFT0(x) & PHY_M_FELP_LED0_MSK)
7871 +
7872 +#define LED_PAR_CTRL_COLX      0x00
7873 +#define LED_PAR_CTRL_ERROR     0x01
7874 +#define LED_PAR_CTRL_DUPLEX    0x02
7875 +#define LED_PAR_CTRL_DP_COL    0x03
7876 +#define LED_PAR_CTRL_SPEED     0x04
7877 +#define LED_PAR_CTRL_LINK      0x05
7878 +#define LED_PAR_CTRL_TX                0x06
7879 +#define LED_PAR_CTRL_RX                0x07
7880 +#define LED_PAR_CTRL_ACT       0x08
7881 +#define LED_PAR_CTRL_LNK_RX    0x09
7882 +#define LED_PAR_CTRL_LNK_AC    0x0a
7883 +#define LED_PAR_CTRL_ACT_BL    0x0b
7884 +#define LED_PAR_CTRL_TX_BL     0x0c
7885 +#define LED_PAR_CTRL_RX_BL     0x0d
7886 +#define LED_PAR_CTRL_COL_BL    0x0e
7887 +#define LED_PAR_CTRL_INACT     0x0f
7888 +
7889 +/*****  PHY_MARV_FE_SPEC_2             16 bit r/w      Specific Control Reg. 2 *****/
7890 +#define PHY_M_FESC_DIS_WAIT    BIT_2S          /* Disable TDR Waiting Period */
7891 +#define PHY_M_FESC_ENA_MCLK    BIT_1S          /* Enable MAC Rx Clock in sleep mode */
7892 +#define PHY_M_FESC_SEL_CL_A    BIT_0S          /* Select Class A driver (100B-TX) */
7893 +
7894 +/* for Yukon-2 Gigabit Ethernet PHY (88E1112 only) */
7895 +/*****  PHY_MARV_PHY_CTRL (page 2)             16 bit r/w      MAC Specific Ctrl *****/
7896 +#define PHY_M_MAC_MD_MSK       (7<<7)          /* Bit  9.. 7: Mode Select Mask */
7897 +#define PHY_M_MAC_MD_AUTO              3       /* Auto Copper/1000Base-X */
7898 +#define PHY_M_MAC_MD_COPPER            5       /* Copper only */
7899 +#define PHY_M_MAC_MD_1000BX            7       /* 1000Base-X only */
7900 +#define PHY_M_MAC_MODE_SEL(x)  (SHIFT7(x) & PHY_M_MAC_MD_MSK)
7901 +
7902 +/*****  PHY_MARV_PHY_CTRL (page 3)             16 bit r/w      LED Control Reg. *****/
7903 +#define PHY_M_LEDC_LOS_MSK     (0xf<<12)       /* Bit 15..12: LOS LED Ctrl. Mask */
7904 +#define PHY_M_LEDC_INIT_MSK    (0xf<<8)        /* Bit 11.. 8: INIT LED Ctrl. Mask */
7905 +#define PHY_M_LEDC_STA1_MSK    (0xf<<4)        /* Bit  7.. 4: STAT1 LED Ctrl. Mask */
7906 +#define PHY_M_LEDC_STA0_MSK    0xf                     /* Bit  3.. 0: STAT0 LED Ctrl. Mask */
7907 +
7908 +#define PHY_M_LEDC_LOS_CTRL(x) (SHIFT12(x) & PHY_M_LEDC_LOS_MSK)
7909 +#define PHY_M_LEDC_INIT_CTRL(x)        (SHIFT8(x) & PHY_M_LEDC_INIT_MSK)
7910 +#define PHY_M_LEDC_STA1_CTRL(x)        (SHIFT4(x) & PHY_M_LEDC_STA1_MSK)
7911 +#define PHY_M_LEDC_STA0_CTRL(x)        (SHIFT0(x) & PHY_M_LEDC_STA0_MSK)
7912 +
7913 +/*****  PHY_MARV_PHY_STAT (page 3)             16 bit r/w      Polarity Control Reg. *****/
7914 +#define PHY_M_POLC_LS1M_MSK    (0xf<<12)       /* Bit 15..12: LOS,STAT1 Mix % Mask */
7915 +#define PHY_M_POLC_IS0M_MSK    (0xf<<8)        /* Bit 11.. 8: INIT,STAT0 Mix % Mask */
7916 +#define PHY_M_POLC_LOS_MSK     (0x3<<6)        /* Bit  7.. 6: LOS Pol. Ctrl. Mask */
7917 +#define PHY_M_POLC_INIT_MSK    (0x3<<4)        /* Bit  5.. 4: INIT Pol. Ctrl. Mask */
7918 +#define PHY_M_POLC_STA1_MSK    (0x3<<2)        /* Bit  3.. 2: STAT1 Pol. Ctrl. Mask */
7919 +#define PHY_M_POLC_STA0_MSK    0x3                     /* Bit  1.. 0: STAT0 Pol. Ctrl. Mask */
7920 +
7921 +#define PHY_M_POLC_LS1_P_MIX(x)        (SHIFT12(x) & PHY_M_POLC_LS1M_MSK)
7922 +#define PHY_M_POLC_IS0_P_MIX(x)        (SHIFT8(x) & PHY_M_POLC_IS0M_MSK)
7923 +#define PHY_M_POLC_LOS_CTRL(x) (SHIFT6(x) & PHY_M_POLC_LOS_MSK)
7924 +#define PHY_M_POLC_INIT_CTRL(x)        (SHIFT4(x) & PHY_M_POLC_INIT_MSK)
7925 +#define PHY_M_POLC_STA1_CTRL(x)        (SHIFT2(x) & PHY_M_POLC_STA1_MSK)
7926 +#define PHY_M_POLC_STA0_CTRL(x)        (SHIFT0(x) & PHY_M_POLC_STA0_MSK)
7927
7928  /*
7929   * GMAC registers
7930 @@ -1431,141 +1578,159 @@
7931   */
7932
7933  /*     GM_GP_STAT      16 bit r/o      General Purpose Status Register */
7934 -#define GM_GPSR_SPEED          (1<<15) /* Bit 15:      Port Speed (1 = 100 Mbps) */
7935 -#define GM_GPSR_DUPLEX         (1<<14) /* Bit 14:      Duplex Mode (1 = Full) */
7936 -#define GM_GPSR_FC_TX_DIS      (1<<13) /* Bit 13:      Tx Flow-Control Mode Disabled */
7937 -#define GM_GPSR_LINK_UP                (1<<12) /* Bit 12:      Link Up Status */
7938 -#define GM_GPSR_PAUSE          (1<<11) /* Bit 11:      Pause State */
7939 -#define GM_GPSR_TX_ACTIVE      (1<<10) /* Bit 10:      Tx in Progress */
7940 -#define GM_GPSR_EXC_COL                (1<<9)  /* Bit  9:      Excessive Collisions Occured */
7941 -#define GM_GPSR_LAT_COL                (1<<8)  /* Bit  8:      Late Collisions Occured */
7942 -                                                               /* Bit  7..6:   reserved */
7943 -#define GM_GPSR_PHY_ST_CH      (1<<5)  /* Bit  5:      PHY Status Change */
7944 -#define GM_GPSR_GIG_SPEED      (1<<4)  /* Bit  4:      Gigabit Speed (1 = 1000 Mbps) */
7945 -#define GM_GPSR_PART_MODE      (1<<3)  /* Bit  3:      Partition mode */
7946 -#define GM_GPSR_FC_RX_DIS      (1<<2)  /* Bit  2:      Rx Flow-Control Mode Disabled */
7947 -#define GM_GPSR_PROM_EN                (1<<1)  /* Bit  1:      Promiscuous Mode Enabled */
7948 -                                                               /* Bit  0:      reserved */
7949 -
7950 +#define GM_GPSR_SPEED          BIT_15S /* Port Speed (1 = 100 Mbps) */
7951 +#define GM_GPSR_DUPLEX         BIT_14S /* Duplex Mode (1 = Full) */
7952 +#define GM_GPSR_FC_TX_DIS      BIT_13S /* Tx Flow-Control Mode Disabled */
7953 +#define GM_GPSR_LINK_UP                BIT_12S /* Link Up Status */
7954 +#define GM_GPSR_PAUSE          BIT_11S /* Pause State */
7955 +#define GM_GPSR_TX_ACTIVE      BIT_10S /* Tx in Progress */
7956 +#define GM_GPSR_EXC_COL                BIT_9S  /* Excessive Collisions Occured */
7957 +#define GM_GPSR_LAT_COL                BIT_8S  /* Late Collisions Occured */
7958 +                                                               /* Bit   7.. 6: reserved */
7959 +#define GM_GPSR_PHY_ST_CH      BIT_5S  /* PHY Status Change */
7960 +#define GM_GPSR_GIG_SPEED      BIT_4S  /* Gigabit Speed (1 = 1000 Mbps) */
7961 +#define GM_GPSR_PART_MODE      BIT_3S  /* Partition mode */
7962 +#define GM_GPSR_FC_RX_DIS      BIT_2S  /* Rx Flow-Control Mode Disabled */
7963 +                                                               /* Bit   2.. 0: reserved */
7964 +
7965  /*     GM_GP_CTRL      16 bit r/w      General Purpose Control Register */
7966 -                                                               /* Bit 15:      reserved */
7967 -#define GM_GPCR_PROM_ENA       (1<<14) /* Bit 14:      Enable Promiscuous Mode */
7968 -#define GM_GPCR_FC_TX_DIS      (1<<13) /* Bit 13:      Disable Tx Flow-Control Mode */
7969 -#define GM_GPCR_TX_ENA         (1<<12) /* Bit 12:      Enable Transmit */
7970 -#define GM_GPCR_RX_ENA         (1<<11) /* Bit 11:      Enable Receive */
7971 -#define GM_GPCR_BURST_ENA      (1<<10) /* Bit 10:      Enable Burst Mode */
7972 -#define GM_GPCR_LOOP_ENA       (1<<9)  /* Bit  9:      Enable MAC Loopback Mode */
7973 -#define GM_GPCR_PART_ENA       (1<<8)  /* Bit  8:      Enable Partition Mode */
7974 -#define GM_GPCR_GIGS_ENA       (1<<7)  /* Bit  7:      Gigabit Speed (1000 Mbps) */
7975 -#define GM_GPCR_FL_PASS                (1<<6)  /* Bit  6:      Force Link Pass */
7976 -#define GM_GPCR_DUP_FULL       (1<<5)  /* Bit  5:      Full Duplex Mode */
7977 -#define GM_GPCR_FC_RX_DIS      (1<<4)  /* Bit  4:      Disable Rx Flow-Control Mode */
7978 -#define GM_GPCR_SPEED_100      (1<<3)  /* Bit  3:      Port Speed 100 Mbps */
7979 -#define GM_GPCR_AU_DUP_DIS     (1<<2)  /* Bit  2:      Disable Auto-Update Duplex */
7980 -#define GM_GPCR_AU_FCT_DIS     (1<<1)  /* Bit  1:      Disable Auto-Update Flow-C. */
7981 -#define GM_GPCR_AU_SPD_DIS     (1<<0)  /* Bit  0:      Disable Auto-Update Speed */
7982 +#define GM_GPCR_RMII_PH_ENA    BIT_15S /* Enable RMII for PHY (Yukon-FE only) */
7983 +#define GM_GPCR_RMII_LB_ENA    BIT_14S /* Enable RMII Loopback (Yukon-FE only) */
7984 +#define GM_GPCR_FC_TX_DIS      BIT_13S /* Disable Tx Flow-Control Mode */
7985 +#define GM_GPCR_TX_ENA         BIT_12S /* Enable Transmit */
7986 +#define GM_GPCR_RX_ENA         BIT_11S /* Enable Receive */
7987 +                                                               /* Bit 10:      reserved */
7988 +#define GM_GPCR_LOOP_ENA       BIT_9S  /* Enable MAC Loopback Mode */
7989 +#define GM_GPCR_PART_ENA       BIT_8S  /* Enable Partition Mode */
7990 +#define GM_GPCR_GIGS_ENA       BIT_7S  /* Gigabit Speed (1000 Mbps) */
7991 +#define GM_GPCR_FL_PASS                BIT_6S  /* Force Link Pass */
7992 +#define GM_GPCR_DUP_FULL       BIT_5S  /* Full Duplex Mode */
7993 +#define GM_GPCR_FC_RX_DIS      BIT_4S  /* Disable Rx Flow-Control Mode */
7994 +#define GM_GPCR_SPEED_100      BIT_3S  /* Port Speed 100 Mbps */
7995 +#define GM_GPCR_AU_DUP_DIS     BIT_2S  /* Disable Auto-Update Duplex */
7996 +#define GM_GPCR_AU_FCT_DIS     BIT_1S  /* Disable Auto-Update Flow-C. */
7997 +#define GM_GPCR_AU_SPD_DIS     BIT_0S  /* Disable Auto-Update Speed */
7998
7999  #define GM_GPCR_SPEED_1000     (GM_GPCR_GIGS_ENA | GM_GPCR_SPEED_100)
8000  #define GM_GPCR_AU_ALL_DIS     (GM_GPCR_AU_DUP_DIS | GM_GPCR_AU_FCT_DIS |\
8001                                                          GM_GPCR_AU_SPD_DIS)
8002 -
8003 +
8004  /*     GM_TX_CTRL                              16 bit r/w      Transmit Control Register */
8005 -#define GM_TXCR_FORCE_JAM      (1<<15) /* Bit 15:      Force Jam / Flow-Control */
8006 -#define GM_TXCR_CRC_DIS                (1<<14) /* Bit 14:      Disable insertion of CRC */
8007 -#define GM_TXCR_PAD_DIS                (1<<13) /* Bit 13:      Disable padding of packets */
8008 -#define GM_TXCR_COL_THR_MSK    (1<<10) /* Bit 12..10:  Collision Threshold */
8009 +#define GM_TXCR_FORCE_JAM      BIT_15S /* Force Jam / Flow-Control */
8010 +#define GM_TXCR_CRC_DIS                BIT_14S /* Disable insertion of CRC */
8011 +#define GM_TXCR_PAD_DIS                BIT_13S /* Disable padding of packets */
8012 +#define GM_TXCR_COL_THR_MSK    (7<<10) /* Bit 12..10: Collision Threshold Mask */
8013 +                                                               /* Bit   9.. 8: reserved */
8014 +#define GM_TXCR_PAD_PAT_MSK    0xff    /* Bit  7.. 0: Padding Pattern Mask */
8015 +                                                                       /* (Yukon-2 only) */
8016
8017  #define TX_COL_THR(x)          (SHIFT10(x) & GM_TXCR_COL_THR_MSK)
8018
8019  #define TX_COL_DEF                     0x04
8020 -
8021 +
8022  /*     GM_RX_CTRL                              16 bit r/w      Receive Control Register */
8023 -#define GM_RXCR_UCF_ENA                (1<<15) /* Bit 15:      Enable Unicast filtering */
8024 -#define GM_RXCR_MCF_ENA                (1<<14) /* Bit 14:      Enable Multicast filtering */
8025 -#define GM_RXCR_CRC_DIS                (1<<13) /* Bit 13:      Remove 4-byte CRC */
8026 -#define GM_RXCR_PASS_FC                (1<<12) /* Bit 12:      Pass FC packets to FIFO */
8027 -
8028 +#define GM_RXCR_UCF_ENA                BIT_15S /* Enable Unicast filtering */
8029 +#define GM_RXCR_MCF_ENA                BIT_14S /* Enable Multicast filtering */
8030 +#define GM_RXCR_CRC_DIS                BIT_13S /* Remove 4-byte CRC */
8031 +#define GM_RXCR_PASS_FC                BIT_12S /* Pass FC packets to FIFO (Yukon-1 only) */
8032 +                                                               /* Bit  11.. 0: reserved */
8033 +
8034  /*     GM_TX_PARAM                             16 bit r/w      Transmit Parameter Register */
8035 -#define GM_TXPA_JAMLEN_MSK     (0x03<<14)      /* Bit 15..14:  Jam Length */
8036 -#define GM_TXPA_JAMIPG_MSK     (0x1f<<9)       /* Bit 13..9:   Jam IPG */
8037 -#define GM_TXPA_JAMDAT_MSK     (0x1f<<4)       /* Bit  8..4:   IPG Jam to Data */
8038 -                                                               /* Bit  3..0:   reserved */
8039 +#define GM_TXPA_JAMLEN_MSK     (3<<14)         /* Bit 15..14: Jam Length Mask */
8040 +#define GM_TXPA_JAMIPG_MSK     (0x1f<<9)       /* Bit 13.. 9: Jam IPG Mask */
8041 +#define GM_TXPA_JAMDAT_MSK     (0x1f<<4)       /* Bit  8.. 4: IPG Jam to Data Mask */
8042 +#define GM_TXPA_BO_LIM_MSK     0x0f            /* Bit  3.. 0: Backoff Limit Mask */
8043 +                                                                               /* (Yukon-2 only) */
8044
8045  #define TX_JAM_LEN_VAL(x)      (SHIFT14(x) & GM_TXPA_JAMLEN_MSK)
8046  #define TX_JAM_IPG_VAL(x)      (SHIFT9(x) & GM_TXPA_JAMIPG_MSK)
8047  #define TX_IPG_JAM_DATA(x)     (SHIFT4(x) & GM_TXPA_JAMDAT_MSK)
8048 +#define TX_BACK_OFF_LIM(x)     ((x) & GM_TXPA_BO_LIM_MSK)
8049
8050  #define TX_JAM_LEN_DEF         0x03
8051  #define TX_JAM_IPG_DEF         0x0b
8052  #define TX_IPG_JAM_DEF         0x1c
8053 +#define TX_BOF_LIM_DEF         0x04
8054
8055  /*     GM_SERIAL_MODE                  16 bit r/w      Serial Mode Register */
8056 -#define GM_SMOD_DATABL_MSK     (0x1f<<11)      /* Bit 15..11:  Data Blinder (r/o) */
8057 -#define GM_SMOD_LIMIT_4                (1<<10) /* Bit 10:      4 consecutive Tx trials */
8058 -#define GM_SMOD_VLAN_ENA       (1<<9)  /* Bit  9:      Enable VLAN  (Max. Frame Len) */
8059 -#define GM_SMOD_JUMBO_ENA      (1<<8)  /* Bit  8:      Enable Jumbo (Max. Frame Len) */
8060 -                                                               /* Bit  7..5:   reserved */
8061 -#define GM_SMOD_IPG_MSK                0x1f    /* Bit 4..0:    Inter-Packet Gap (IPG) */
8062 -
8063 +#define GM_SMOD_DATABL_MSK     (0x1f<<11)      /* Bit 15..11:  Data Blinder */
8064 +                                                                               /* r/o on Yukon, r/w on Yukon-EC */
8065 +#define GM_SMOD_LIMIT_4                BIT_10S /* 4 consecutive Tx trials */
8066 +#define GM_SMOD_VLAN_ENA       BIT_9S  /* Enable VLAN  (Max. Frame Len) */
8067 +#define GM_SMOD_JUMBO_ENA      BIT_8S  /* Enable Jumbo (Max. Frame Len) */
8068 +                                                               /* Bit   7.. 5: reserved */
8069 +#define GM_SMOD_IPG_MSK                0x1f    /* Bit  4.. 0:  Inter-Packet Gap (IPG) */
8070 +
8071  #define DATA_BLIND_VAL(x)      (SHIFT11(x) & GM_SMOD_DATABL_MSK)
8072 -#define DATA_BLIND_DEF         0x04
8073 +#define IPG_DATA_VAL(x)                ((x) & GM_SMOD_IPG_MSK)
8074
8075 -#define IPG_DATA_VAL(x)                (x & GM_SMOD_IPG_MSK)
8076 +#define DATA_BLIND_DEF         0x04
8077  #define IPG_DATA_DEF           0x1e
8078
8079  /*     GM_SMI_CTRL                             16 bit r/w      SMI Control Register */
8080  #define GM_SMI_CT_PHY_A_MSK    (0x1f<<11)      /* Bit 15..11:  PHY Device Address */
8081  #define GM_SMI_CT_REG_A_MSK    (0x1f<<6)       /* Bit 10.. 6:  PHY Register Address */
8082 -#define GM_SMI_CT_OP_RD                (1<<5)  /* Bit  5:      OpCode Read (0=Write)*/
8083 -#define GM_SMI_CT_RD_VAL       (1<<4)  /* Bit  4:      Read Valid (Read completed) */
8084 -#define GM_SMI_CT_BUSY         (1<<3)  /* Bit  3:      Busy (Operation in progress) */
8085 -                                                               /* Bit   2..0:  reserved */
8086 -
8087 +#define GM_SMI_CT_OP_RD                BIT_5S  /* OpCode Read (0=Write)*/
8088 +#define GM_SMI_CT_RD_VAL       BIT_4S  /* Read Valid (Read completed) */
8089 +#define GM_SMI_CT_BUSY         BIT_3S  /* Busy (Operation in progress) */
8090 +                                                               /* Bit   2.. 0: reserved */
8091 +
8092  #define GM_SMI_CT_PHY_AD(x)    (SHIFT11(x) & GM_SMI_CT_PHY_A_MSK)
8093  #define GM_SMI_CT_REG_AD(x)    (SHIFT6(x) & GM_SMI_CT_REG_A_MSK)
8094
8095         /*      GM_PHY_ADDR                             16 bit r/w      GPHY Address Register */
8096 -                                                               /* Bit  15..6:  reserved */
8097 -#define GM_PAR_MIB_CLR         (1<<5)  /* Bit  5:      Set MIB Clear Counter Mode */
8098 -#define GM_PAR_MIB_TST         (1<<4)  /* Bit  4:      MIB Load Counter (Test Mode) */
8099 -                                                               /* Bit   3..0:  reserved */
8100 -
8101 +                                                               /* Bit  15.. 6: reserved */
8102 +#define GM_PAR_MIB_CLR         BIT_5S  /* Set MIB Clear Counter Mode */
8103 +#define GM_PAR_MIB_TST         BIT_4S  /* MIB Load Counter (Test Mode) */
8104 +                                                               /* Bit   3.. 0: reserved */
8105 +
8106  /* Receive Frame Status Encoding */
8107 -#define GMR_FS_LEN     (0xffffUL<<16)  /* Bit 31..16:  Rx Frame Length */
8108 +#define GMR_FS_LEN_MSK (0xffffUL<<16)  /* Bit 31..16:  Rx Frame Length */
8109                                                                 /* Bit  15..14: reserved */
8110 -#define GMR_FS_VLAN            (1L<<13)        /* Bit 13:      VLAN Packet */
8111 -#define GMR_FS_JABBER  (1L<<12)        /* Bit 12:      Jabber Packet */
8112 -#define GMR_FS_UN_SIZE (1L<<11)        /* Bit 11:      Undersize Packet */
8113 -#define GMR_FS_MC              (1L<<10)        /* Bit 10:      Multicast Packet */
8114 -#define GMR_FS_BC              (1L<<9)         /* Bit  9:      Broadcast Packet */
8115 -#define GMR_FS_RX_OK   (1L<<8)         /* Bit  8:      Receive OK (Good Packet) */
8116 -#define GMR_FS_GOOD_FC (1L<<7)         /* Bit  7:      Good Flow-Control Packet */
8117 -#define GMR_FS_BAD_FC  (1L<<6)         /* Bit  6:      Bad  Flow-Control Packet */
8118 -#define GMR_FS_MII_ERR (1L<<5)         /* Bit  5:      MII Error */
8119 -#define GMR_FS_LONG_ERR        (1L<<4)         /* Bit  4:      Too Long Packet */
8120 -#define GMR_FS_FRAGMENT        (1L<<3)         /* Bit  3:      Fragment */
8121 +#define GMR_FS_VLAN                    BIT_13  /* VLAN Packet */
8122 +#define GMR_FS_JABBER          BIT_12  /* Jabber Packet */
8123 +#define GMR_FS_UN_SIZE         BIT_11  /* Undersize Packet */
8124 +#define GMR_FS_MC                      BIT_10  /* Multicast Packet */
8125 +#define GMR_FS_BC                      BIT_9   /* Broadcast Packet */
8126 +#define GMR_FS_RX_OK           BIT_8   /* Receive OK (Good Packet) */
8127 +#define GMR_FS_GOOD_FC         BIT_7   /* Good Flow-Control Packet */
8128 +#define GMR_FS_BAD_FC          BIT_6   /* Bad  Flow-Control Packet */
8129 +#define GMR_FS_MII_ERR         BIT_5   /* MII Error */
8130 +#define GMR_FS_LONG_ERR                BIT_4   /* Too Long Packet */
8131 +#define GMR_FS_FRAGMENT                BIT_3   /* Fragment */
8132                                                                 /* Bit  2:      reserved */
8133 -#define GMR_FS_CRC_ERR (1L<<1)         /* Bit  1:      CRC Error */
8134 -#define GMR_FS_RX_FF_OV        (1L<<0)         /* Bit  0:      Rx FIFO Overflow */
8135 +#define GMR_FS_CRC_ERR         BIT_1   /* CRC Error */
8136 +#define GMR_FS_RX_FF_OV                BIT_0   /* Rx FIFO Overflow */
8137 +
8138 +#define GMR_FS_LEN_SHIFT       16
8139
8140  /*
8141   * GMR_FS_ANY_ERR (analogous to XMR_FS_ANY_ERR)
8142   */
8143 -#define GMR_FS_ANY_ERR (GMR_FS_CRC_ERR | \
8144 -                       GMR_FS_LONG_ERR | \
8145 +#ifdef SK_DIAG
8146 +#define GMR_FS_ANY_ERR         ( \
8147 +                       GMR_FS_RX_FF_OV | \
8148 +                       GMR_FS_CRC_ERR | \
8149 +                       GMR_FS_FRAGMENT | \
8150                         GMR_FS_MII_ERR | \
8151                         GMR_FS_BAD_FC | \
8152                         GMR_FS_GOOD_FC | \
8153                         GMR_FS_JABBER)
8154 -
8155 -/* Rx GMAC FIFO Flush Mask (default) */
8156 -#define RX_FF_FL_DEF_MSK       (GMR_FS_CRC_ERR | \
8157 +#else
8158 +#define GMR_FS_ANY_ERR         ( \
8159                         GMR_FS_RX_FF_OV | \
8160 +                       GMR_FS_CRC_ERR | \
8161 +                       GMR_FS_FRAGMENT | \
8162 +                       GMR_FS_LONG_ERR | \
8163                         GMR_FS_MII_ERR | \
8164                         GMR_FS_BAD_FC | \
8165                         GMR_FS_GOOD_FC | \
8166                         GMR_FS_UN_SIZE | \
8167                         GMR_FS_JABBER)
8168 +#endif
8169 +
8170 +/* Rx GMAC FIFO Flush Mask (default) */
8171 +#define RX_FF_FL_DEF_MSK       GMR_FS_ANY_ERR
8172
8173  /* typedefs *******************************************************************/
8174
8175 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/Makefile linux-2.6.9.new/drivers/net/sk98lin/Makefile
8176 --- linux-2.6.9.old/drivers/net/sk98lin/Makefile        2004-10-19 05:53:05.000000000 +0800
8177 +++ linux-2.6.9.new/drivers/net/sk98lin/Makefile        2006-12-07 14:35:03.000000000 +0800
8178 @@ -1,6 +1,59 @@
8179 +#******************************************************************************
8180  #
8181 -# Makefile for the SysKonnect SK-98xx device driver.
8182 +# Name:         skge.c
8183 +# Project:      GEnesis, PCI Gigabit Ethernet Adapter
8184 +# Version:      $Revision: 1.9.2.1 $
8185 +# Date:         $Date: 2005/04/11 09:01:18 $
8186 +# Purpose:      The main driver source module
8187  #
8188 +#******************************************************************************
8189 +
8190 +#******************************************************************************
8191 +#
8192 +#      (C)Copyright 1998-2002 SysKonnect GmbH.
8193 +#      (C)Copyright 2002-2005 Marvell.
8194 +#
8195 +#      Makefile for Marvell Yukon chipset and SysKonnect Gigabit Ethernet
8196 +#      Server Adapter driver. (Kernel 2.6)
8197 +#
8198 +#      Author: Mirko Lindner (mlindner@syskonnect.de)
8199 +#              Ralph Roesler (rroesler@syskonnect.de)
8200 +#
8201 +#      Address all question to: linux@syskonnect.de
8202 +#
8203 +#      This program is free software; you can redistribute it and/or modify
8204 +#      it under the terms of the GNU General Public License as published by
8205 +#      the Free Software Foundation; either version 2 of the License, or
8206 +#      (at your option) any later version.
8207 +#
8208 +#      The information in this file is provided "AS IS" without warranty.
8209 +#
8210 +#******************************************************************************
8211 +
8212 +#******************************************************************************
8213 +#
8214 +# History:
8215 +#
8216 +#      $Log: Makefile2.6,v $
8217 +#      Revision 1.9.2.1  2005/04/11 09:01:18  mlindner
8218 +#      Fix: Copyright year changed
8219 +#
8220 +#      Revision 1.9  2004/07/13 15:54:50  rroesler
8221 +#      Add: file skethtool.c
8222 +#      Fix: corrected header regarding copyright
8223 +#      Fix: minor typos corrected
8224 +#
8225 +#      Revision 1.8  2004/06/08 08:39:38  mlindner
8226 +#      Fix: Add CONFIG_SK98LIN_ZEROCOPY as default
8227 +#
8228 +#      Revision 1.7  2004/06/03 16:06:56  mlindner
8229 +#      Fix: Added compile flag SK_DIAG_SUPPORT
8230 +#
8231 +#      Revision 1.6  2004/06/02 08:02:59  mlindner
8232 +#      Add: Changed header information and inserted a GPL statement
8233 +#
8234 +#
8235 +#******************************************************************************
8236
8237
8238  #
8239 @@ -13,13 +66,16 @@
8240  obj-$(CONFIG_SK98LIN) += sk98lin.o
8241  sk98lin-objs    :=     \
8242                 skge.o          \
8243 +               sky2.o          \
8244 +               skethtool.o     \
8245 +               sky2le.o        \
8246                 skdim.o         \
8247                 skaddr.o        \
8248                 skgehwt.o       \
8249                 skgeinit.o      \
8250                 skgepnmi.o      \
8251                 skgesirq.o      \
8252 -               ski2c.o         \
8253 +               sktwsi.o                \
8254                 sklm80.o        \
8255                 skqueue.o       \
8256                 skrlmt.o        \
8257 @@ -76,13 +132,11 @@
8258  # SK_DBGCAT_DRV_INT_SRC         0x04000000      interrupts sources
8259  # SK_DBGCAT_DRV_EVENT           0x08000000      driver events
8260
8261 -EXTRA_CFLAGS += -Idrivers/net/sk98lin -DSK_DIAG_SUPPORT -DSK_USE_CSUM -DGENESIS -DYUKON $(DBGDEF) $(SKPARAM)
8262 +EXTRA_CFLAGS += -Idrivers/net/sk98lin -DSK_USE_CSUM -DSK_DIAG_SUPPORT \
8263 +               -DGENESIS -DYUKON -DYUK2 -DCONFIG_SK98LIN_ZEROCOPY \
8264 +               $(DBGDEF) $(SKPARAM)
8265
8266  clean:
8267         rm -f core *.o *.a *.s
8268
8269
8270 -
8271 -
8272 -
8273 -
8274 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/skaddr.c linux-2.6.9.new/drivers/net/sk98lin/skaddr.c
8275 --- linux-2.6.9.old/drivers/net/sk98lin/skaddr.c        2004-10-19 05:54:32.000000000 +0800
8276 +++ linux-2.6.9.new/drivers/net/sk98lin/skaddr.c        2006-12-07 14:35:03.000000000 +0800
8277 @@ -2,8 +2,8 @@
8278   *
8279   * Name:       skaddr.c
8280   * Project:    Gigabit Ethernet Adapters, ADDR-Module
8281 - * Version:    $Revision: 1.52 $
8282 - * Date:       $Date: 2003/06/02 13:46:15 $
8283 + * Version:    $Revision: 2.6 $
8284 + * Date:       $Date: 2005/05/11 10:05:14 $
8285   * Purpose:    Manage Addresses (Multicast and Unicast) and Promiscuous Mode.
8286   *
8287   ******************************************************************************/
8288 @@ -44,7 +44,7 @@
8289
8290  #if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
8291  static const char SysKonnectFileId[] =
8292 -       "@(#) $Id: skaddr.c,v 1.52 2003/06/02 13:46:15 tschilli Exp $ (C) Marvell.";
8293 +       "@(#) $Id: skaddr.c,v 2.6 2005/05/11 10:05:14 tschilli Exp $ (C) Marvell.";
8294  #endif /* DEBUG ||!LINT || !SK_SLIM */
8295
8296  #define __SKADDR_C
8297 @@ -191,11 +191,11 @@
8298                 pAC->Addr.Port[pAC->Addr.Net[0].ActivePort].Exact[0] =
8299                         pAC->Addr.Net[0].CurrentMacAddress;
8300  #if SK_MAX_NETS > 1
8301 -               /* Set logical MAC address for net 2 to (log | 3). */
8302 +               /* Set logical MAC address for net 2 to. */
8303                 if (!pAC->Addr.Net[1].CurrentMacAddressSet) {
8304                         pAC->Addr.Net[1].PermanentMacAddress =
8305                                 pAC->Addr.Net[0].PermanentMacAddress;
8306 -                       pAC->Addr.Net[1].PermanentMacAddress.a[5] |= 3;
8307 +                       pAC->Addr.Net[1].PermanentMacAddress.a[5] += 1;
8308                         /* Set the current logical MAC address to the permanent one. */
8309                         pAC->Addr.Net[1].CurrentMacAddress =
8310                                 pAC->Addr.Net[1].PermanentMacAddress;
8311 @@ -213,7 +213,7 @@
8312                                         pAC->Addr.Net[i].PermanentMacAddress.a[2],
8313                                         pAC->Addr.Net[i].PermanentMacAddress.a[3],
8314                                         pAC->Addr.Net[i].PermanentMacAddress.a[4],
8315 -                                       pAC->Addr.Net[i].PermanentMacAddress.a[5]))
8316 +                                       pAC->Addr.Net[i].PermanentMacAddress.a[5]));
8317
8318                         SK_DBG_MSG(pAC, SK_DBGMOD_ADDR, SK_DBGCAT_INIT,
8319                                 ("Logical MAC Address (Net%d): %02X %02X %02X %02X %02X %02X\n",
8320 @@ -223,7 +223,7 @@
8321                                         pAC->Addr.Net[i].CurrentMacAddress.a[2],
8322                                         pAC->Addr.Net[i].CurrentMacAddress.a[3],
8323                                         pAC->Addr.Net[i].CurrentMacAddress.a[4],
8324 -                                       pAC->Addr.Net[i].CurrentMacAddress.a[5]))
8325 +                                       pAC->Addr.Net[i].CurrentMacAddress.a[5]));
8326                 }
8327  #endif /* DEBUG */
8328
8329 @@ -266,7 +266,7 @@
8330                                         pAPort->PermanentMacAddress.a[2],
8331                                         pAPort->PermanentMacAddress.a[3],
8332                                         pAPort->PermanentMacAddress.a[4],
8333 -                                       pAPort->PermanentMacAddress.a[5]))
8334 +                                       pAPort->PermanentMacAddress.a[5]));
8335
8336                         SK_DBG_MSG(pAC, SK_DBGMOD_ADDR, SK_DBGCAT_INIT,
8337                                 ("SkAddrInit: Physical MAC Address: %02X %02X %02X %02X %02X %02X\n",
8338 @@ -275,7 +275,7 @@
8339                                         pAPort->CurrentMacAddress.a[2],
8340                                         pAPort->CurrentMacAddress.a[3],
8341                                         pAPort->CurrentMacAddress.a[4],
8342 -                                       pAPort->CurrentMacAddress.a[5]))
8343 +                                       pAPort->CurrentMacAddress.a[5]));
8344  #endif /* DEBUG */
8345                 }
8346                 /* pAC->Addr.InitDone = SK_INIT_IO; */
8347 @@ -339,10 +339,14 @@
8348         }
8349
8350         if (pAC->GIni.GIGenesis) {
8351 +#ifdef GENESIS
8352                 ReturnCode = SkAddrXmacMcClear(pAC, IoC, PortNumber, Flags);
8353 +#endif
8354         }
8355         else {
8356 +#ifdef YUKON
8357                 ReturnCode = SkAddrGmacMcClear(pAC, IoC, PortNumber, Flags);
8358 +#endif
8359         }
8360
8361         return (ReturnCode);
8362 @@ -352,7 +356,7 @@
8363  #endif /* !SK_SLIM */
8364
8365  #ifndef SK_SLIM
8366 -
8367 +#ifdef GENESIS
8368  /******************************************************************************
8369   *
8370   *     SkAddrXmacMcClear - clear the multicast table
8371 @@ -404,11 +408,11 @@
8372         return (SK_ADDR_SUCCESS);
8373
8374  }      /* SkAddrXmacMcClear */
8375 -
8376 +#endif /* GENESIS */
8377  #endif /* !SK_SLIM */
8378
8379  #ifndef SK_SLIM
8380 -
8381 +#ifdef YUKON
8382  /******************************************************************************
8383   *
8384   *     SkAddrGmacMcClear - clear the multicast table
8385 @@ -447,7 +451,7 @@
8386                         pAC->Addr.Port[PortNumber].InexactFilter.Bytes[4],
8387                         pAC->Addr.Port[PortNumber].InexactFilter.Bytes[5],
8388                         pAC->Addr.Port[PortNumber].InexactFilter.Bytes[6],
8389 -                       pAC->Addr.Port[PortNumber].InexactFilter.Bytes[7]))
8390 +                       pAC->Addr.Port[PortNumber].InexactFilter.Bytes[7]));
8391  #endif /* DEBUG */
8392
8393         /* Clear InexactFilter */
8394 @@ -489,7 +493,7 @@
8395                         pAC->Addr.Port[PortNumber].InexactFilter.Bytes[4],
8396                         pAC->Addr.Port[PortNumber].InexactFilter.Bytes[5],
8397                         pAC->Addr.Port[PortNumber].InexactFilter.Bytes[6],
8398 -                       pAC->Addr.Port[PortNumber].InexactFilter.Bytes[7]))
8399 +                       pAC->Addr.Port[PortNumber].InexactFilter.Bytes[7]));
8400  #endif /* DEBUG */
8401
8402         if (!(Flags & SK_MC_SW_ONLY)) {
8403 @@ -499,9 +503,10 @@
8404         return (SK_ADDR_SUCCESS);
8405
8406  }      /* SkAddrGmacMcClear */
8407 +#endif /* YUKON */
8408
8409  #ifndef SK_ADDR_CHEAT
8410 -
8411 +#ifdef GENESIS
8412  /******************************************************************************
8413   *
8414   *     SkXmacMcHash - hash multicast address
8415 @@ -538,8 +543,9 @@
8416         return (Crc & ((1 << HASH_BITS) - 1));
8417
8418  }      /* SkXmacMcHash */
8419 +#endif /* GENESIS */
8420
8421 -
8422 +#ifdef YUKON
8423  /******************************************************************************
8424   *
8425   *     SkGmacMcHash - hash multicast address
8426 @@ -597,7 +603,7 @@
8427         return (Crc & ((1 << HASH_BITS) - 1));
8428
8429  }      /* SkGmacMcHash */
8430 -
8431 +#endif /* YUKON */
8432  #endif /* !SK_ADDR_CHEAT */
8433
8434  /******************************************************************************
8435 @@ -638,17 +644,21 @@
8436         }
8437
8438         if (pAC->GIni.GIGenesis) {
8439 +#ifdef GENESIS
8440                 ReturnCode = SkAddrXmacMcAdd(pAC, IoC, PortNumber, pMc, Flags);
8441 +#endif
8442         }
8443         else {
8444 +#ifdef YUKON
8445                 ReturnCode = SkAddrGmacMcAdd(pAC, IoC, PortNumber, pMc, Flags);
8446 +#endif
8447         }
8448
8449         return (ReturnCode);
8450
8451  }      /* SkAddrMcAdd */
8452
8453 -
8454 +#ifdef GENESIS
8455  /******************************************************************************
8456   *
8457   *     SkAddrXmacMcAdd - add a multicast address to a port
8458 @@ -758,8 +768,9 @@
8459         }
8460
8461  }      /* SkAddrXmacMcAdd */
8462 +#endif /* GENESIS */
8463
8464 -
8465 +#ifdef YUKON
8466  /******************************************************************************
8467   *
8468   *     SkAddrGmacMcAdd - add a multicast address to a port
8469 @@ -821,7 +832,7 @@
8470                         pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[4],
8471                         pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[5],
8472                         pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[6],
8473 -                       pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[7]))
8474 +                       pAC->Addr.Port[PortNumber].InexactRlmtFilter.Bytes[7]));
8475  #endif /* DEBUG */
8476         }
8477         else {  /* not permanent => DRV */
8478 @@ -845,7 +856,7 @@
8479                         pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[4],
8480                         pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[5],
8481                         pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[6],
8482 -                       pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[7]))
8483 +                       pAC->Addr.Port[PortNumber].InexactDrvFilter.Bytes[7]));
8484  #endif /* DEBUG */
8485         }
8486
8487 @@ -860,7 +871,7 @@
8488         return (SK_MC_FILTERING_INEXACT);
8489
8490  }      /* SkAddrGmacMcAdd */
8491 -
8492 +#endif /* YUKON */
8493  #endif /* !SK_SLIM */
8494
8495  /******************************************************************************
8496 @@ -892,7 +903,7 @@
8497  SK_IOC IoC,            /* I/O context */
8498  SK_U32 PortNumber)     /* Port Number */
8499  {
8500 -       int ReturnCode = 0;
8501 +       int ReturnCode = SK_ADDR_ILLEGAL_PORT;
8502  #if (!defined(SK_SLIM) || defined(DEBUG))
8503         if (PortNumber >= (SK_U32) pAC->GIni.GIMacsFound) {
8504                 return (SK_ADDR_ILLEGAL_PORT);
8505 @@ -948,13 +959,13 @@
8506         SK_ADDR_PORT    *pAPort;
8507
8508         SK_DBG_MSG(pAC,SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
8509 -               ("SkAddrXmacMcUpdate on Port %u.\n", PortNumber))
8510 +               ("SkAddrXmacMcUpdate on Port %u.\n", PortNumber));
8511
8512         pAPort = &pAC->Addr.Port[PortNumber];
8513
8514  #ifdef DEBUG
8515         SK_DBG_MSG(pAC,SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
8516 -               ("Next0 on Port %d: %d\n", PortNumber, Next0[PortNumber]))
8517 +               ("Next0 on Port %d: %d\n", PortNumber, Next0[PortNumber]));
8518  #endif /* DEBUG */
8519
8520         /* Start with 0 to also program the logical MAC address. */
8521 @@ -1043,7 +1054,7 @@
8522                                 pAPort->Exact[i].a[2],
8523                                 pAPort->Exact[i].a[3],
8524                                 pAPort->Exact[i].a[4],
8525 -                               pAPort->Exact[i].a[5]))
8526 +                               pAPort->Exact[i].a[5]));
8527         }
8528  #endif /* DEBUG */
8529
8530 @@ -1095,13 +1106,13 @@
8531         SK_ADDR_PORT    *pAPort;
8532
8533         SK_DBG_MSG(pAC,SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
8534 -               ("SkAddrGmacMcUpdate on Port %u.\n", PortNumber))
8535 +               ("SkAddrGmacMcUpdate on Port %u.\n", PortNumber));
8536
8537         pAPort = &pAC->Addr.Port[PortNumber];
8538
8539  #ifdef DEBUG
8540         SK_DBG_MSG(pAC,SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
8541 -               ("Next0 on Port %d: %d\n", PortNumber, Next0[PortNumber]))
8542 +               ("Next0 on Port %d: %d\n", PortNumber, Next0[PortNumber]));
8543  #endif /* DEBUG */
8544
8545  #ifndef SK_SLIM
8546 @@ -1157,7 +1168,7 @@
8547                         pAPort->Exact[0].a[2],
8548                         pAPort->Exact[0].a[3],
8549                         pAPort->Exact[0].a[4],
8550 -                       pAPort->Exact[0].a[5]))
8551 +                       pAPort->Exact[0].a[5]));
8552
8553         SK_DBG_MSG(pAC, SK_DBGMOD_ADDR, SK_DBGCAT_CTRL,
8554                 ("SkAddrGmacMcUpdate: Physical MAC Address: %02X %02X %02X %02X %02X %02X\n",
8555 @@ -1166,7 +1177,7 @@
8556                         pAPort->CurrentMacAddress.a[2],
8557                         pAPort->CurrentMacAddress.a[3],
8558                         pAPort->CurrentMacAddress.a[4],
8559 -                       pAPort->CurrentMacAddress.a[5]))
8560 +                       pAPort->CurrentMacAddress.a[5]));
8561  #endif /* DEBUG */
8562
8563  #ifndef SK_SLIM
8564 @@ -1275,26 +1286,42 @@
8565                 (void) SkAddrMcUpdate(pAC, IoC, PortNumber);
8566         }
8567         else if (Flags & SK_ADDR_PHYSICAL_ADDRESS) {    /* Physical MAC address. */
8568 -               if (SK_ADDR_EQUAL(pNewAddr->a,
8569 -                       pAC->Addr.Net[NetNumber].CurrentMacAddress.a)) {
8570 -                       return (SK_ADDR_DUPLICATE_ADDRESS);
8571 -               }
8572 -
8573                 for (i = 0; i < (SK_U32) pAC->GIni.GIMacsFound; i++) {
8574                         if (!pAC->Addr.Port[i].CurrentMacAddressSet) {
8575                                 return (SK_ADDR_TOO_EARLY);
8576                         }
8577 +               }
8578
8579 +               /*
8580 +                * In dual net mode it should be possible to set all MAC
8581 +                * addresses independently. Therefore the equality checks
8582 +                * against the locical address of the same port and the
8583 +                * physical address of the other port are suppressed here.
8584 +                */
8585 +               if (pAC->Rlmt.NumNets == 1) {
8586                         if (SK_ADDR_EQUAL(pNewAddr->a,
8587 -                               pAC->Addr.Port[i].CurrentMacAddress.a)) {
8588 -                               if (i == PortNumber) {
8589 -                                       return (SK_ADDR_SUCCESS);
8590 -                               }
8591 -                               else {
8592 -                                       return (SK_ADDR_DUPLICATE_ADDRESS);
8593 +                               pAC->Addr.Net[NetNumber].CurrentMacAddress.a)) {
8594 +                               return (SK_ADDR_DUPLICATE_ADDRESS);
8595 +                       }
8596 +
8597 +                       for (i = 0; i < (SK_U32) pAC->GIni.GIMacsFound; i++) {
8598 +                               if (SK_ADDR_EQUAL(pNewAddr->a,
8599 +                                       pAC->Addr.Port[i].CurrentMacAddress.a)) {
8600 +                                       if (i == PortNumber) {
8601 +                                               return (SK_ADDR_SUCCESS);
8602 +                                       }
8603 +                                       else {
8604 +                                               return (SK_ADDR_DUPLICATE_ADDRESS);
8605 +                                       }
8606                                 }
8607                         }
8608                 }
8609 +               else {
8610 +                       if (SK_ADDR_EQUAL(pNewAddr->a,
8611 +                               pAC->Addr.Port[PortNumber].CurrentMacAddress.a)) {
8612 +                               return (SK_ADDR_SUCCESS);
8613 +                       }
8614 +               }
8615
8616                 pAC->Addr.Port[PortNumber].PreviousMacAddress =
8617                         pAC->Addr.Port[PortNumber].CurrentMacAddress;
8618 @@ -1325,18 +1352,28 @@
8619                         pAC->Addr.Net[NetNumber].CurrentMacAddress.a)) {
8620                         return (SK_ADDR_SUCCESS);
8621                 }
8622 -
8623 +
8624                 for (i = 0; i < (SK_U32) pAC->GIni.GIMacsFound; i++) {
8625                         if (!pAC->Addr.Port[i].CurrentMacAddressSet) {
8626                                 return (SK_ADDR_TOO_EARLY);
8627                         }
8628 +               }
8629
8630 -                       if (SK_ADDR_EQUAL(pNewAddr->a,
8631 -                               pAC->Addr.Port[i].CurrentMacAddress.a)) {
8632 -                               return (SK_ADDR_DUPLICATE_ADDRESS);
8633 +               /*
8634 +                * In dual net mode on Yukon-2 adapters the physical address
8635 +                * of port 0 and the logical address of port 1 are equal - in
8636 +                * this case the equality check of the physical address leads
8637 +                * to an error and is suppressed here.
8638 +                */
8639 +               if (pAC->Rlmt.NumNets == 1) {
8640 +                       for (i = 0; i < (SK_U32) pAC->GIni.GIMacsFound; i++) {
8641 +                               if (SK_ADDR_EQUAL(pNewAddr->a,
8642 +                                       pAC->Addr.Port[i].CurrentMacAddress.a)) {
8643 +                                       return (SK_ADDR_DUPLICATE_ADDRESS);
8644 +                               }
8645                         }
8646                 }
8647 -
8648 +
8649                 /*
8650                  * In case that the physical and the logical MAC addresses are equal
8651                  * we must also change the physical MAC address here.
8652 @@ -1424,7 +1461,7 @@
8653  SK_U32 PortNumber,             /* port whose promiscuous mode changes */
8654  int            NewPromMode)    /* new promiscuous mode */
8655  {
8656 -       int ReturnCode = 0;
8657 +       int ReturnCode = SK_ADDR_ILLEGAL_PORT;
8658  #if (!defined(SK_SLIM) || defined(DEBUG))
8659         if (PortNumber >= (SK_U32) pAC->GIni.GIMacsFound) {
8660                 return (SK_ADDR_ILLEGAL_PORT);
8661 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/skcsum.c linux-2.6.9.new/drivers/net/sk98lin/skcsum.c
8662 --- linux-2.6.9.old/drivers/net/sk98lin/skcsum.c        2004-10-19 05:53:07.000000000 +0800
8663 +++ linux-2.6.9.new/drivers/net/sk98lin/skcsum.c        2006-12-07 14:35:03.000000000 +0800
8664 @@ -2,8 +2,8 @@
8665   *
8666   * Name:       skcsum.c
8667   * Project:    GEnesis, PCI Gigabit Ethernet Adapter
8668 - * Version:    $Revision: 1.12 $
8669 - * Date:       $Date: 2003/08/20 13:55:53 $
8670 + * Version:    $Revision: 2.1 $
8671 + * Date:       $Date: 2003/10/27 14:16:08 $
8672   * Purpose:    Store/verify Internet checksum in send/receive packets.
8673   *
8674   ******************************************************************************/
8675 @@ -25,7 +25,7 @@
8676
8677  #ifndef lint
8678  static const char SysKonnectFileId[] =
8679 -       "@(#) $Id: skcsum.c,v 1.12 2003/08/20 13:55:53 mschmid Exp $ (C) SysKonnect.";
8680 +       "@(#) $Id: skcsum.c,v 2.1 2003/10/27 14:16:08 amock Exp $ (C) SysKonnect.";
8681  #endif /* !lint */
8682
8683  /******************************************************************************
8684 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/skdim.c linux-2.6.9.new/drivers/net/sk98lin/skdim.c
8685 --- linux-2.6.9.old/drivers/net/sk98lin/skdim.c 2004-10-19 05:53:45.000000000 +0800
8686 +++ linux-2.6.9.new/drivers/net/sk98lin/skdim.c 2006-12-07 14:35:03.000000000 +0800
8687 @@ -1,17 +1,25 @@
8688  /******************************************************************************
8689   *
8690 - * Name:       skdim.c
8691 - * Project:    GEnesis, PCI Gigabit Ethernet Adapter
8692 - * Version:    $Revision: 1.5 $
8693 - * Date:       $Date: 2003/11/28 12:55:40 $
8694 - * Purpose:    All functions to maintain interrupt moderation
8695 + * Name:        skdim.c
8696 + * Project:     GEnesis, PCI Gigabit Ethernet Adapter
8697 + * Version:     $Revision: 1.5.2.2 $
8698 + * Date:        $Date: 2005/05/23 13:47:33 $
8699 + * Purpose:     All functions regardig interrupt moderation
8700   *
8701   ******************************************************************************/
8702
8703  /******************************************************************************
8704   *
8705   *     (C)Copyright 1998-2002 SysKonnect GmbH.
8706 - *     (C)Copyright 2002-2003 Marvell.
8707 + *     (C)Copyright 2002-2005 Marvell.
8708 + *
8709 + *     Driver for Marvell Yukon/2 chipset and SysKonnect Gigabit Ethernet
8710 + *      Server Adapters.
8711 + *
8712 + *     Author: Ralph Roesler (rroesler@syskonnect.de)
8713 + *             Mirko Lindner (mlindner@syskonnect.de)
8714 + *
8715 + *     Address all question to: linux@syskonnect.de
8716   *
8717   *     This program is free software; you can redistribute it and/or modify
8718   *     it under the terms of the GNU General Public License as published by
8719 @@ -20,723 +28,367 @@
8720   *
8721   *     The information in this file is provided "AS IS" without warranty.
8722   *
8723 - ******************************************************************************/
8724 + *****************************************************************************/
8725
8726 -/******************************************************************************
8727 - *
8728 - * Description:
8729 - *
8730 - * This module is intended to manage the dynamic interrupt moderation on both
8731 - * GEnesis and Yukon adapters.
8732 - *
8733 - * Include File Hierarchy:
8734 - *
8735 - *     "skdrv1st.h"
8736 - *     "skdrv2nd.h"
8737 - *
8738 - ******************************************************************************/
8739 -
8740 -#ifndef        lint
8741 -static const char SysKonnectFileId[] =
8742 -       "@(#) $Id: skdim.c,v 1.5 2003/11/28 12:55:40 rroesler Exp $ (C) SysKonnect.";
8743 -#endif
8744 -
8745 -#define __SKADDR_C
8746 -
8747 -#ifdef __cplusplus
8748 -#error C++ is not yet supported.
8749 -extern "C" {
8750 -#endif
8751 -
8752 -/*******************************************************************************
8753 -**
8754 -** Includes
8755 -**
8756 -*******************************************************************************/
8757 -
8758 -#ifndef __INC_SKDRV1ST_H
8759  #include "h/skdrv1st.h"
8760 -#endif
8761 -
8762 -#ifndef __INC_SKDRV2ND_H
8763  #include "h/skdrv2nd.h"
8764 -#endif
8765
8766 -#include       <linux/kernel_stat.h>
8767 -
8768 -/*******************************************************************************
8769 -**
8770 -** Defines
8771 -**
8772 -*******************************************************************************/
8773 -
8774 -/*******************************************************************************
8775 -**
8776 -** Typedefs
8777 -**
8778 -*******************************************************************************/
8779 +/******************************************************************************
8780 + *
8781 + * Local Function Prototypes
8782 + *
8783 + *****************************************************************************/
8784
8785 -/*******************************************************************************
8786 -**
8787 -** Local function prototypes
8788 -**
8789 -*******************************************************************************/
8790 -
8791 -static unsigned int GetCurrentSystemLoad(SK_AC *pAC);
8792 -static SK_U64       GetIsrCalls(SK_AC *pAC);
8793 -static SK_BOOL      IsIntModEnabled(SK_AC *pAC);
8794 -static void         SetCurrIntCtr(SK_AC *pAC);
8795 -static void         EnableIntMod(SK_AC *pAC);
8796 -static void         DisableIntMod(SK_AC *pAC);
8797 -static void         ResizeDimTimerDuration(SK_AC *pAC);
8798 -static void         DisplaySelectedModerationType(SK_AC *pAC);
8799 -static void         DisplaySelectedModerationMask(SK_AC *pAC);
8800 -static void         DisplayDescrRatio(SK_AC *pAC);
8801 +static SK_U64 getIsrCalls(SK_AC *pAC);
8802 +static SK_BOOL isIntModEnabled(SK_AC *pAC);
8803 +static void setCurrIntCtr(SK_AC *pAC);
8804 +static void enableIntMod(SK_AC *pAC);
8805 +static void disableIntMod(SK_AC *pAC);
8806
8807 -/*******************************************************************************
8808 -**
8809 -** Global variables
8810 -**
8811 -*******************************************************************************/
8812 +#define M_DIMINFO pAC->DynIrqModInfo
8813
8814 -/*******************************************************************************
8815 -**
8816 -** Local variables
8817 -**
8818 -*******************************************************************************/
8819 +/******************************************************************************
8820 + *
8821 + * Global Functions
8822 + *
8823 + *****************************************************************************/
8824
8825 -/*******************************************************************************
8826 -**
8827 -** Global functions
8828 -**
8829 -*******************************************************************************/
8830 +/*****************************************************************************
8831 + *
8832 + *     SkDimModerate - Moderates the IRQs depending on the current needs
8833 + *
8834 + * Description:
8835 + *     Moderation of IRQs depends on the number of occurred IRQs with
8836 + *     respect to the previous moderation cycle.
8837 + *
8838 + * Returns:    N/A
8839 + *
8840 + */
8841 +void SkDimModerate(
8842 +SK_AC *pAC)  /* pointer to adapter control context */
8843 +{
8844 +       SK_U64  IsrCalls = getIsrCalls(pAC);
8845 +
8846 +       SK_DBG_MSG(pAC,SK_DBGMOD_DRV,SK_DBGCAT_DRV_MSG,("==> SkDimModerate\n"));
8847 +
8848 +       if (M_DIMINFO.IntModTypeSelect == C_INT_MOD_DYNAMIC) {
8849 +               if (isIntModEnabled(pAC)) {
8850 +                       if (IsrCalls < M_DIMINFO.MaxModIntsPerSecLowerLimit) {
8851 +                               disableIntMod(pAC);
8852 +                       }
8853 +               } else {
8854 +                       if (IsrCalls > M_DIMINFO.MaxModIntsPerSecUpperLimit) {
8855 +                               enableIntMod(pAC);
8856 +                       }
8857 +               }
8858 +       }
8859 +       setCurrIntCtr(pAC);
8860
8861 -/*******************************************************************************
8862 -** Function     : SkDimModerate
8863 -** Description  : Called in every ISR to check if moderation is to be applied
8864 -**                or not for the current number of interrupts
8865 -** Programmer   : Ralph Roesler
8866 -** Last Modified: 22-mar-03
8867 -** Returns      : void (!)
8868 -** Notes        : -
8869 -*******************************************************************************/
8870 -
8871 -void
8872 -SkDimModerate(SK_AC *pAC) {
8873 -    unsigned int CurrSysLoad    = 0;  /* expressed in percent */
8874 -    unsigned int LoadIncrease   = 0;  /* expressed in percent */
8875 -    SK_U64       ThresholdInts  = 0;
8876 -    SK_U64       IsrCallsPerSec = 0;
8877 +       SK_DBG_MSG(pAC,SK_DBGMOD_DRV,SK_DBGCAT_DRV_MSG,("<== SkDimModerate\n"));
8878 +}
8879
8880 -#define M_DIMINFO pAC->DynIrqModInfo
8881 +/*****************************************************************************
8882 + *
8883 + *     SkDimStartModerationTimer - Starts the moderation timer
8884 + *
8885 + * Description:
8886 + *     Dynamic interrupt moderation is regularly checked using the
8887 + *     so-called moderation timer. This timer is started with this function.
8888 + *
8889 + * Returns:    N/A
8890 + */
8891 +void SkDimStartModerationTimer(
8892 +SK_AC *pAC) /* pointer to adapter control context */
8893 +{
8894 +       SK_EVPARA   EventParam;   /* Event struct for timer event */
8895 +
8896 +       SK_DBG_MSG(pAC,SK_DBGMOD_DRV,SK_DBGCAT_DRV_MSG,
8897 +                       ("==> SkDimStartModerationTimer\n"));
8898
8899 -    if (!IsIntModEnabled(pAC)) {
8900 -        if (M_DIMINFO.IntModTypeSelect == C_INT_MOD_DYNAMIC) {
8901 -            CurrSysLoad = GetCurrentSystemLoad(pAC);
8902 -            if (CurrSysLoad > 75) {
8903 -                    /*
8904 -                    ** More than 75% total system load! Enable the moderation
8905 -                    ** to shield the system against too many interrupts.
8906 -                    */
8907 -                    EnableIntMod(pAC);
8908 -            } else if (CurrSysLoad > M_DIMINFO.PrevSysLoad) {
8909 -                LoadIncrease = (CurrSysLoad - M_DIMINFO.PrevSysLoad);
8910 -                if (LoadIncrease > ((M_DIMINFO.PrevSysLoad *
8911 -                                         C_INT_MOD_ENABLE_PERCENTAGE) / 100)) {
8912 -                    if (CurrSysLoad > 10) {
8913 -                        /*
8914 -                        ** More than 50% increase with respect to the
8915 -                        ** previous load of the system. Most likely this
8916 -                        ** is due to our ISR-proc...
8917 -                        */
8918 -                        EnableIntMod(pAC);
8919 -                    }
8920 -                }
8921 -            } else {
8922 -                /*
8923 -                ** Neither too much system load at all nor too much increase
8924 -                ** with respect to the previous system load. Hence, we can leave
8925 -                ** the ISR-handling like it is without enabling moderation.
8926 -                */
8927 -            }
8928 -            M_DIMINFO.PrevSysLoad = CurrSysLoad;
8929 -        }
8930 -    } else {
8931 -        if (M_DIMINFO.IntModTypeSelect == C_INT_MOD_DYNAMIC) {
8932 -            ThresholdInts  = ((M_DIMINFO.MaxModIntsPerSec *
8933 -                                   C_INT_MOD_DISABLE_PERCENTAGE) / 100);
8934 -            IsrCallsPerSec = GetIsrCalls(pAC);
8935 -            if (IsrCallsPerSec <= ThresholdInts) {
8936 -                /*
8937 -                ** The number of interrupts within the last second is
8938 -                ** lower than the disable_percentage of the desried
8939 -                ** maxrate. Therefore we can disable the moderation.
8940 -                */
8941 -                DisableIntMod(pAC);
8942 -                M_DIMINFO.MaxModIntsPerSec =
8943 -                   (M_DIMINFO.MaxModIntsPerSecUpperLimit +
8944 -                    M_DIMINFO.MaxModIntsPerSecLowerLimit) / 2;
8945 -            } else {
8946 -                /*
8947 -                ** The number of interrupts per sec is the same as expected.
8948 -                ** Evalulate the descriptor-ratio. If it has changed, a resize
8949 -                ** in the moderation timer might be usefull
8950 -                */
8951 -                if (M_DIMINFO.AutoSizing) {
8952 -                    ResizeDimTimerDuration(pAC);
8953 -                }
8954 -            }
8955 -        }
8956 -    }
8957 -
8958 -    /*
8959 -    ** Some information to the log...
8960 -    */
8961 -    if (M_DIMINFO.DisplayStats) {
8962 -        DisplaySelectedModerationType(pAC);
8963 -        DisplaySelectedModerationMask(pAC);
8964 -        DisplayDescrRatio(pAC);
8965 -    }
8966 +       if (M_DIMINFO.IntModTypeSelect == C_INT_MOD_DYNAMIC) {
8967 +               SK_MEMSET((char *) &EventParam, 0, sizeof(EventParam));
8968 +               EventParam.Para32[0] = SK_DRV_MODERATION_TIMER;
8969 +               SkTimerStart(pAC, pAC->IoBase,
8970 +                       &pAC->DynIrqModInfo.ModTimer,
8971 +                       pAC->DynIrqModInfo.DynIrqModSampleInterval * 1000000,
8972 +                       SKGE_DRV, SK_DRV_TIMER, EventParam);
8973 +       }
8974
8975 -    M_DIMINFO.NbrProcessedDescr = 0;
8976 -    SetCurrIntCtr(pAC);
8977 +       SK_DBG_MSG(pAC,SK_DBGMOD_DRV,SK_DBGCAT_DRV_MSG,
8978 +                       ("<== SkDimStartModerationTimer\n"));
8979  }
8980
8981 -/*******************************************************************************
8982 -** Function     : SkDimStartModerationTimer
8983 -** Description  : Starts the audit-timer for the dynamic interrupt moderation
8984 -** Programmer   : Ralph Roesler
8985 -** Last Modified: 22-mar-03
8986 -** Returns      : void (!)
8987 -** Notes        : -
8988 -*******************************************************************************/
8989 -
8990 -void
8991 -SkDimStartModerationTimer(SK_AC *pAC) {
8992 -    SK_EVPARA    EventParam;   /* Event struct for timer event */
8993 -
8994 -    SK_MEMSET((char *) &EventParam, 0, sizeof(EventParam));
8995 -    EventParam.Para32[0] = SK_DRV_MODERATION_TIMER;
8996 -    SkTimerStart(pAC, pAC->IoBase, &pAC->DynIrqModInfo.ModTimer,
8997 -                 SK_DRV_MODERATION_TIMER_LENGTH,
8998 -                 SKGE_DRV, SK_DRV_TIMER, EventParam);
8999 -}
9000 +/*****************************************************************************
9001 + *
9002 + *     SkDimEnableModerationIfNeeded - Enables or disables any moderationtype
9003 + *
9004 + * Description:
9005 + *     This function effectively initializes the IRQ moderation of a network
9006 + *     adapter. Depending on the configuration, this might be either static
9007 + *     or dynamic. If no moderation is configured, this function will do
9008 + *     nothing.
9009 + *
9010 + * Returns:    N/A
9011 + */
9012 +void SkDimEnableModerationIfNeeded(
9013 +SK_AC *pAC)  /* pointer to adapter control context */
9014 +{
9015 +       SK_DBG_MSG(pAC,SK_DBGMOD_DRV,SK_DBGCAT_DRV_MSG,
9016 +                       ("==> SkDimEnableModerationIfNeeded\n"));
9017 +
9018 +       if (M_DIMINFO.IntModTypeSelect != C_INT_MOD_NONE) {
9019 +               if (M_DIMINFO.IntModTypeSelect == C_INT_MOD_STATIC) {
9020 +                       enableIntMod(pAC);
9021 +               } else { /* must be C_INT_MOD_DYNAMIC */
9022 +                       SkDimStartModerationTimer(pAC);
9023 +               }
9024 +       }
9025
9026 -/*******************************************************************************
9027 -** Function     : SkDimEnableModerationIfNeeded
9028 -** Description  : Either enables or disables moderation
9029 -** Programmer   : Ralph Roesler
9030 -** Last Modified: 22-mar-03
9031 -** Returns      : void (!)
9032 -** Notes        : This function is called when a particular adapter is opened
9033 -**                There is no Disable function, because when all interrupts
9034 -**                might be disable, the moderation timer has no meaning at all
9035 -******************************************************************************/
9036 -
9037 -void
9038 -SkDimEnableModerationIfNeeded(SK_AC *pAC) {
9039 -
9040 -    if (M_DIMINFO.IntModTypeSelect == C_INT_MOD_STATIC) {
9041 -        EnableIntMod(pAC);   /* notification print in this function */
9042 -    } else if (M_DIMINFO.IntModTypeSelect == C_INT_MOD_DYNAMIC) {
9043 -        SkDimStartModerationTimer(pAC);
9044 -        if (M_DIMINFO.DisplayStats) {
9045 -            printk("Dynamic moderation has been enabled\n");
9046 -        }
9047 -    } else {
9048 -        if (M_DIMINFO.DisplayStats) {
9049 -            printk("No moderation has been enabled\n");
9050 -        }
9051 -    }
9052 +       SK_DBG_MSG(pAC,SK_DBGMOD_DRV,SK_DBGCAT_DRV_MSG,
9053 +                       ("<== SkDimEnableModerationIfNeeded\n"));
9054  }
9055
9056 -/*******************************************************************************
9057 -** Function     : SkDimDisplayModerationSettings
9058 -** Description  : Displays the current settings regaring interrupt moderation
9059 -** Programmer   : Ralph Roesler
9060 -** Last Modified: 22-mar-03
9061 -** Returns      : void (!)
9062 -** Notes        : -
9063 -*******************************************************************************/
9064 -
9065 -void
9066 -SkDimDisplayModerationSettings(SK_AC *pAC) {
9067 -    DisplaySelectedModerationType(pAC);
9068 -    DisplaySelectedModerationMask(pAC);
9069 -}
9070 +/*****************************************************************************
9071 + *
9072 + *     SkDimDisableModeration - disables moderation if it is enabled
9073 + *
9074 + * Description:
9075 + *     Disabling of the moderation requires that is enabled already.
9076 + *
9077 + * Returns:    N/A
9078 + */
9079 +void SkDimDisableModeration(
9080 +SK_AC  *pAC,                /* pointer to adapter control context */
9081 +int     CurrentModeration)  /* type of current moderation         */
9082 +{
9083 +       SK_DBG_MSG(pAC,SK_DBGMOD_DRV,SK_DBGCAT_DRV_MSG,
9084 +                       ("==> SkDimDisableModeration\n"));
9085 +
9086 +       if (M_DIMINFO.IntModTypeSelect != C_INT_MOD_NONE) {
9087 +               if (CurrentModeration == C_INT_MOD_STATIC) {
9088 +                       disableIntMod(pAC);
9089 +               } else { /* must be C_INT_MOD_DYNAMIC */
9090 +                       SkTimerStop(pAC, pAC->IoBase, &M_DIMINFO.ModTimer);
9091 +                       disableIntMod(pAC);
9092 +               }
9093 +       }
9094
9095 -/*******************************************************************************
9096 -**
9097 -** Local functions
9098 -**
9099 -*******************************************************************************/
9100 +       SK_DBG_MSG(pAC,SK_DBGMOD_DRV,SK_DBGCAT_DRV_MSG,
9101 +                       ("<== SkDimDisableModeration\n"));
9102 +}
9103
9104 -/*******************************************************************************
9105 -** Function     : GetCurrentSystemLoad
9106 -** Description  : Retrieves the current system load of the system. This load
9107 -**                is evaluated for all processors within the system.
9108 -** Programmer   : Ralph Roesler
9109 -** Last Modified: 22-mar-03
9110 -** Returns      : unsigned int: load expressed in percentage
9111 -** Notes        : The possible range being returned is from 0 up to 100.
9112 -**                Whereas 0 means 'no load at all' and 100 'system fully loaded'
9113 -**                It is impossible to determine what actually causes the system
9114 -**                to be in 100%, but maybe that is due to too much interrupts.
9115 -*******************************************************************************/
9116 -
9117 -static unsigned int
9118 -GetCurrentSystemLoad(SK_AC *pAC) {
9119 -       unsigned long jif         = jiffies;
9120 -       unsigned int  UserTime    = 0;
9121 -       unsigned int  SystemTime  = 0;
9122 -       unsigned int  NiceTime    = 0;
9123 -       unsigned int  IdleTime    = 0;
9124 -       unsigned int  TotalTime   = 0;
9125 -       unsigned int  UsedTime    = 0;
9126 -       unsigned int  SystemLoad  = 0;
9127 +/******************************************************************************
9128 + *
9129 + * Local Functions
9130 + *
9131 + *****************************************************************************/
9132
9133 -       /* unsigned int  NbrCpu      = 0; */
9134 +/*****************************************************************************
9135 + *
9136 + *     getIsrCalls - evaluate the number of IRQs handled in mod interval
9137 + *
9138 + * Description:
9139 + *     Depending on the selected moderation mask, this function will return
9140 + *     the number of interrupts handled in the previous moderation interval.
9141 + *     This evaluated number is based on the current number of interrupts
9142 + *     stored in PNMI-context and the previous stored interrupts.
9143 + *
9144 + * Returns:
9145 + *     the number of IRQs handled
9146 + */
9147 +static SK_U64 getIsrCalls(
9148 +SK_AC *pAC)  /* pointer to adapter control context */
9149 +{
9150 +       SK_U64   RxPort0IntDiff = 0, RxPort1IntDiff = 0;
9151 +       SK_U64   TxPort0IntDiff = 0, TxPort1IntDiff = 0;
9152 +       SK_U64   StatusPort0IntDiff = 0, StatusPort1IntDiff = 0;
9153 +
9154 +        SK_DBG_MSG(pAC,SK_DBGMOD_DRV,SK_DBGCAT_DRV_MSG,("==>getIsrCalls\n"));
9155 +
9156 +       if (!CHIP_ID_YUKON_2(pAC)) {
9157 +               if ((M_DIMINFO.MaskIrqModeration == IRQ_MASK_TX_ONLY) ||
9158 +                   (M_DIMINFO.MaskIrqModeration == IRQ_MASK_SP_TX)) {
9159 +                       if (pAC->GIni.GIMacsFound == 2) {
9160 +                               TxPort1IntDiff =
9161 +                                       pAC->Pnmi.Port[1].TxIntrCts -
9162 +                                       M_DIMINFO.PrevPort1TxIntrCts;
9163 +                       }
9164 +                       TxPort0IntDiff = pAC->Pnmi.Port[0].TxIntrCts -
9165 +                                       M_DIMINFO.PrevPort0TxIntrCts;
9166 +               } else if ((M_DIMINFO.MaskIrqModeration == IRQ_MASK_RX_ONLY) ||
9167 +                          (M_DIMINFO.MaskIrqModeration == IRQ_MASK_SP_RX)) {
9168 +                       if (pAC->GIni.GIMacsFound == 2) {
9169 +                               RxPort1IntDiff =
9170 +                                       pAC->Pnmi.Port[1].RxIntrCts -
9171 +                                       M_DIMINFO.PrevPort1RxIntrCts;
9172 +                       }
9173 +                       RxPort0IntDiff = pAC->Pnmi.Port[0].RxIntrCts -
9174 +                                       M_DIMINFO.PrevPort0RxIntrCts;
9175 +               } else {
9176 +                       if (pAC->GIni.GIMacsFound == 2) {
9177 +                               RxPort1IntDiff =
9178 +                                       pAC->Pnmi.Port[1].RxIntrCts -
9179 +                                       M_DIMINFO.PrevPort1RxIntrCts;
9180 +                               TxPort1IntDiff =
9181 +                                       pAC->Pnmi.Port[1].TxIntrCts -
9182 +                                       M_DIMINFO.PrevPort1TxIntrCts;
9183 +                       }
9184 +                       RxPort0IntDiff = pAC->Pnmi.Port[0].RxIntrCts -
9185 +                                       M_DIMINFO.PrevPort0RxIntrCts;
9186 +                       TxPort0IntDiff = pAC->Pnmi.Port[0].TxIntrCts -
9187 +                                       M_DIMINFO.PrevPort0TxIntrCts;
9188 +               }
9189 +               SK_DBG_MSG(pAC,SK_DBGMOD_DRV,SK_DBGCAT_DRV_MSG,
9190 +                               ("==>getIsrCalls (!CHIP_ID_YUKON_2)\n"));
9191 +               return (RxPort0IntDiff + RxPort1IntDiff +
9192 +                       TxPort0IntDiff + TxPort1IntDiff);
9193 +       }
9194
9195         /*
9196 -       ** The following lines have been commented out, because
9197 -       ** from kernel 2.5.44 onwards, the kernel-owned structure
9198 -       **
9199 -       **      struct kernel_stat kstat
9200 -       **
9201 -       ** is not marked as an exported symbol in the file
9202 +       ** We have a Yukon2 compliant chipset if we come up to here
9203         **
9204 -       **      kernel/ksyms.c
9205 -       **
9206 -       ** As a consequence, using this driver as KLM is not possible
9207 -       ** and any access of the structure kernel_stat via the
9208 -       ** dedicated macros kstat_cpu(i).cpustat.xxx is to be avoided.
9209 -       **
9210 -       ** The kstat-information might be added again in future
9211 -       ** versions of the 2.5.xx kernel, but for the time being,
9212 -       ** number of interrupts will serve as indication how much
9213 -       ** load we currently have...
9214 -       **
9215 -       ** for (NbrCpu = 0; NbrCpu < num_online_cpus(); NbrCpu++) {
9216 -       **      UserTime   = UserTime   + kstat_cpu(NbrCpu).cpustat.user;
9217 -       **      NiceTime   = NiceTime   + kstat_cpu(NbrCpu).cpustat.nice;
9218 -       **      SystemTime = SystemTime + kstat_cpu(NbrCpu).cpustat.system;
9219 -       ** }
9220 +       if (pAC->GIni.GIMacsFound == 2) {
9221 +               StatusPort1IntDiff = pAC->Pnmi.Port[1].StatusLeIntrCts -
9222 +                                       M_DIMINFO.PrevPort1StatusIntrCts;
9223 +       }
9224 +       StatusPort0IntDiff = pAC->Pnmi.Port[0].StatusLeIntrCts -
9225 +                               M_DIMINFO.PrevPort0StatusIntrCts;
9226         */
9227 -       SK_U64 ThresholdInts  = 0;
9228 -       SK_U64 IsrCallsPerSec = 0;
9229 -
9230 -       ThresholdInts  = ((M_DIMINFO.MaxModIntsPerSec *
9231 -                          C_INT_MOD_ENABLE_PERCENTAGE) + 100);
9232 -       IsrCallsPerSec = GetIsrCalls(pAC);
9233 -       if (IsrCallsPerSec >= ThresholdInts) {
9234 -           /*
9235 -           ** We do not know how much the real CPU-load is!
9236 -           ** Return 80% as a default in order to activate DIM
9237 -           */
9238 -           SystemLoad = 80;
9239 -           return (SystemLoad);
9240 -       }
9241 -
9242 -       UsedTime  = UserTime + NiceTime + SystemTime;
9243 -
9244 -       IdleTime  = jif * num_online_cpus() - UsedTime;
9245 -       TotalTime = UsedTime + IdleTime;
9246 -
9247 -       SystemLoad = ( 100 * (UsedTime  - M_DIMINFO.PrevUsedTime) ) /
9248 -                                               (TotalTime - M_DIMINFO.PrevTotalTime);
9249 +        SK_DBG_MSG(pAC,SK_DBGMOD_DRV,SK_DBGCAT_DRV_MSG,
9250 +                       ("==>getIsrCalls (CHIP_ID_YUKON_2)\n"));
9251 +       return (StatusPort0IntDiff + StatusPort1IntDiff);
9252 +}
9253
9254 -       if (M_DIMINFO.DisplayStats) {
9255 -               printk("Current system load is: %u\n", SystemLoad);
9256 +/*****************************************************************************
9257 + *
9258 + *     setCurrIntCtr - stores the current number of interrupts
9259 + *
9260 + * Description:
9261 + *     Stores the current number of occurred interrupts in the adapter
9262 + *     context. This is needed to evaluate the  umber of interrupts within
9263 + *     the moderation interval.
9264 + *
9265 + * Returns:    N/A
9266 + *
9267 + */
9268 +static void setCurrIntCtr(
9269 +SK_AC *pAC)  /* pointer to adapter control context */
9270 +{
9271 +        SK_DBG_MSG(pAC,SK_DBGMOD_DRV,SK_DBGCAT_DRV_MSG,("==>setCurrIntCtr\n"));
9272 +
9273 +       if (!CHIP_ID_YUKON_2(pAC)) {
9274 +               if (pAC->GIni.GIMacsFound == 2) {
9275 +                       M_DIMINFO.PrevPort1RxIntrCts = pAC->Pnmi.Port[1].RxIntrCts;
9276 +                       M_DIMINFO.PrevPort1TxIntrCts = pAC->Pnmi.Port[1].TxIntrCts;
9277 +               }
9278 +               M_DIMINFO.PrevPort0RxIntrCts = pAC->Pnmi.Port[0].RxIntrCts;
9279 +               M_DIMINFO.PrevPort0TxIntrCts = pAC->Pnmi.Port[0].TxIntrCts;
9280 +               SK_DBG_MSG(pAC,SK_DBGMOD_DRV,SK_DBGCAT_DRV_MSG,
9281 +                               ("<== setCurrIntCtr (!CHIP_ID_YUKON_2)\n"));
9282 +               return;
9283         }
9284
9285 -       M_DIMINFO.PrevTotalTime = TotalTime;
9286 -       M_DIMINFO.PrevUsedTime  = UsedTime;
9287 -
9288 -       return (SystemLoad);
9289 +       /*
9290 +       ** We have a Yukon2 compliant chipset if we come up to here
9291 +       **
9292 +       if (pAC->GIni.GIMacsFound == 2) {
9293 +               M_DIMINFO.PrevPort1StatusIntrCts = pAC->Pnmi.Port[1].StatusLeIntrCts;
9294 +       }
9295 +       M_DIMINFO.PrevPort0StatusIntrCts = pAC->Pnmi.Port[0].StatusLeIntrCts;
9296 +       */
9297 +        SK_DBG_MSG(pAC,SK_DBGMOD_DRV,SK_DBGCAT_DRV_MSG,
9298 +                       ("<== setCurrIntCtr (CHIP_ID_YUKON_2)\n"));
9299  }
9300
9301 -/*******************************************************************************
9302 -** Function     : GetIsrCalls
9303 -** Description  : Depending on the selected moderation mask, this function will
9304 -**                return the number of interrupts handled in the previous time-
9305 -**                frame. This evaluated number is based on the current number
9306 -**                of interrupts stored in PNMI-context and the previous stored
9307 -**                interrupts.
9308 -** Programmer   : Ralph Roesler
9309 -** Last Modified: 23-mar-03
9310 -** Returns      : int:   the number of interrupts being executed in the last
9311 -**                       timeframe
9312 -** Notes        : It makes only sense to call this function, when dynamic
9313 -**                interrupt moderation is applied
9314 -*******************************************************************************/
9315 -
9316 -static SK_U64
9317 -GetIsrCalls(SK_AC *pAC) {
9318 -    SK_U64   RxPort0IntDiff = 0;
9319 -    SK_U64   RxPort1IntDiff = 0;
9320 -    SK_U64   TxPort0IntDiff = 0;
9321 -    SK_U64   TxPort1IntDiff = 0;
9322 -
9323 -    if (pAC->DynIrqModInfo.MaskIrqModeration == IRQ_MASK_TX_ONLY) {
9324 -        if (pAC->GIni.GIMacsFound == 2) {
9325 -            TxPort1IntDiff = pAC->Pnmi.Port[1].TxIntrCts -
9326 -                             pAC->DynIrqModInfo.PrevPort1TxIntrCts;
9327 -        }
9328 -        TxPort0IntDiff = pAC->Pnmi.Port[0].TxIntrCts -
9329 -                         pAC->DynIrqModInfo.PrevPort0TxIntrCts;
9330 -    } else if (pAC->DynIrqModInfo.MaskIrqModeration == IRQ_MASK_RX_ONLY) {
9331 -        if (pAC->GIni.GIMacsFound == 2) {
9332 -            RxPort1IntDiff = pAC->Pnmi.Port[1].RxIntrCts -
9333 -                             pAC->DynIrqModInfo.PrevPort1RxIntrCts;
9334 -        }
9335 -        RxPort0IntDiff = pAC->Pnmi.Port[0].RxIntrCts -
9336 -                         pAC->DynIrqModInfo.PrevPort0RxIntrCts;
9337 -    } else {
9338 -        if (pAC->GIni.GIMacsFound == 2) {
9339 -            RxPort1IntDiff = pAC->Pnmi.Port[1].RxIntrCts -
9340 -                             pAC->DynIrqModInfo.PrevPort1RxIntrCts;
9341 -            TxPort1IntDiff = pAC->Pnmi.Port[1].TxIntrCts -
9342 -                             pAC->DynIrqModInfo.PrevPort1TxIntrCts;
9343 -        }
9344 -        RxPort0IntDiff = pAC->Pnmi.Port[0].RxIntrCts -
9345 -                         pAC->DynIrqModInfo.PrevPort0RxIntrCts;
9346 -        TxPort0IntDiff = pAC->Pnmi.Port[0].TxIntrCts -
9347 -                         pAC->DynIrqModInfo.PrevPort0TxIntrCts;
9348 -    }
9349 -
9350 -    return (RxPort0IntDiff + RxPort1IntDiff + TxPort0IntDiff + TxPort1IntDiff);
9351 +/*****************************************************************************
9352 + *
9353 + *     isIntModEnabled - returns the current state of interrupt moderation
9354 + *
9355 + * Description:
9356 + *     This function retrieves the current value of the interrupt moderation
9357 + *     command register. Its content determines whether any moderation is
9358 + *     running or not.
9359 + *
9360 + * Returns:
9361 + *     SK_TRUE : IRQ moderation is currently active
9362 + *     SK_FALSE: No IRQ moderation is active
9363 + */
9364 +static SK_BOOL isIntModEnabled(
9365 +SK_AC *pAC)  /* pointer to adapter control context */
9366 +{
9367 +       unsigned long CtrCmd;
9368 +
9369 +        SK_DBG_MSG(pAC,SK_DBGMOD_DRV,SK_DBGCAT_DRV_MSG,("==>isIntModEnabled\n"));
9370 +
9371 +       SK_IN32(pAC->IoBase, B2_IRQM_CTRL, &CtrCmd);
9372 +       if ((CtrCmd & TIM_START) == TIM_START) {
9373 +               SK_DBG_MSG(pAC,SK_DBGMOD_DRV,SK_DBGCAT_DRV_MSG,
9374 +                       ("<== isIntModEnabled (SK_TRUE)\n"));
9375 +               return SK_TRUE;
9376 +       }
9377 +        SK_DBG_MSG(pAC,SK_DBGMOD_DRV,SK_DBGCAT_DRV_MSG,
9378 +                       ("<== isIntModEnabled (SK_FALSE)\n"));
9379 +       return SK_FALSE;
9380  }
9381
9382 -/*******************************************************************************
9383 -** Function     : GetRxCalls
9384 -** Description  : This function will return the number of times a receive inter-
9385 -**                rupt was processed. This is needed to evaluate any resizing
9386 -**                factor.
9387 -** Programmer   : Ralph Roesler
9388 -** Last Modified: 23-mar-03
9389 -** Returns      : SK_U64: the number of RX-ints being processed
9390 -** Notes        : It makes only sense to call this function, when dynamic
9391 -**                interrupt moderation is applied
9392 -*******************************************************************************/
9393 -
9394 -static SK_U64
9395 -GetRxCalls(SK_AC *pAC) {
9396 -    SK_U64   RxPort0IntDiff = 0;
9397 -    SK_U64   RxPort1IntDiff = 0;
9398 -
9399 -    if (pAC->GIni.GIMacsFound == 2) {
9400 -        RxPort1IntDiff = pAC->Pnmi.Port[1].RxIntrCts -
9401 -                         pAC->DynIrqModInfo.PrevPort1RxIntrCts;
9402 -    }
9403 -    RxPort0IntDiff = pAC->Pnmi.Port[0].RxIntrCts -
9404 -                     pAC->DynIrqModInfo.PrevPort0RxIntrCts;
9405 -
9406 -    return (RxPort0IntDiff + RxPort1IntDiff);
9407 -}
9408 +/*****************************************************************************
9409 + *
9410 + *     enableIntMod - enables the interrupt moderation
9411 + *
9412 + * Description:
9413 + *     Enabling the interrupt moderation is done by putting the desired
9414 + *     moderation interval in the B2_IRQM_INI register, specifying the
9415 + *     desired maks in the B2_IRQM_MSK register and finally starting the
9416 + *     IRQ moderation timer using the B2_IRQM_CTRL register.
9417 + *
9418 + * Returns:    N/A
9419 + *
9420 + */
9421 +static void enableIntMod(
9422 +SK_AC *pAC)  /* pointer to adapter control context */
9423 +{
9424 +       unsigned long ModBase;
9425 +
9426 +        SK_DBG_MSG(pAC,SK_DBGMOD_DRV,SK_DBGCAT_DRV_MSG,("==> enableIntMod\n"));
9427 +
9428 +       if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
9429 +               ModBase = C_CLK_FREQ_GENESIS / M_DIMINFO.MaxModIntsPerSec;
9430 +       } else if (pAC->GIni.GIChipId == CHIP_ID_YUKON_EC) {
9431 +               ModBase = C_CLK_FREQ_YUKON_EC / M_DIMINFO.MaxModIntsPerSec;
9432 +       } else {
9433 +               ModBase = C_CLK_FREQ_YUKON / M_DIMINFO.MaxModIntsPerSec;
9434 +       }
9435
9436 -/*******************************************************************************
9437 -** Function     : SetCurrIntCtr
9438 -** Description  : Will store the current number orf occured interrupts in the
9439 -**                adapter context. This is needed to evaluated the number of
9440 -**                interrupts within a current timeframe.
9441 -** Programmer   : Ralph Roesler
9442 -** Last Modified: 23-mar-03
9443 -** Returns      : void (!)
9444 -** Notes        : -
9445 -*******************************************************************************/
9446 -
9447 -static void
9448 -SetCurrIntCtr(SK_AC *pAC) {
9449 -    if (pAC->GIni.GIMacsFound == 2) {
9450 -        pAC->DynIrqModInfo.PrevPort1RxIntrCts = pAC->Pnmi.Port[1].RxIntrCts;
9451 -        pAC->DynIrqModInfo.PrevPort1TxIntrCts = pAC->Pnmi.Port[1].TxIntrCts;
9452 -    }
9453 -    pAC->DynIrqModInfo.PrevPort0RxIntrCts = pAC->Pnmi.Port[0].RxIntrCts;
9454 -    pAC->DynIrqModInfo.PrevPort0TxIntrCts = pAC->Pnmi.Port[0].TxIntrCts;
9455 -}
9456 +       SK_OUT32(pAC->IoBase, B2_IRQM_INI, ModBase);
9457 +       SK_OUT32(pAC->IoBase, B2_IRQM_MSK, M_DIMINFO.MaskIrqModeration);
9458 +       SK_OUT32(pAC->IoBase, B2_IRQM_CTRL, TIM_START);
9459
9460 -/*******************************************************************************
9461 -** Function     : IsIntModEnabled()
9462 -** Description  : Retrieves the current value of the interrupts moderation
9463 -**                command register. Its content determines whether any
9464 -**                moderation is running or not.
9465 -** Programmer   : Ralph Roesler
9466 -** Last Modified: 23-mar-03
9467 -** Returns      : SK_TRUE  : if mod timer running
9468 -**                SK_FALSE : if no moderation is being performed
9469 -** Notes        : -
9470 -*******************************************************************************/
9471 -
9472 -static SK_BOOL
9473 -IsIntModEnabled(SK_AC *pAC) {
9474 -    unsigned long CtrCmd;
9475 -
9476 -    SK_IN32(pAC->IoBase, B2_IRQM_CTRL, &CtrCmd);
9477 -    if ((CtrCmd & TIM_START) == TIM_START) {
9478 -       return SK_TRUE;
9479 -    } else {
9480 -       return SK_FALSE;
9481 -    }
9482 +        SK_DBG_MSG(pAC,SK_DBGMOD_DRV,SK_DBGCAT_DRV_MSG,("<== enableIntMod\n"));
9483  }
9484
9485 -/*******************************************************************************
9486 -** Function     : EnableIntMod()
9487 -** Description  : Enables the interrupt moderation using the values stored in
9488 -**                in the pAC->DynIntMod data structure
9489 -** Programmer   : Ralph Roesler
9490 -** Last Modified: 22-mar-03
9491 -** Returns      : -
9492 -** Notes        : -
9493 -*******************************************************************************/
9494 -
9495 -static void
9496 -EnableIntMod(SK_AC *pAC) {
9497 -    unsigned long ModBase;
9498 -
9499 -    if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
9500 -       ModBase = C_CLK_FREQ_GENESIS / pAC->DynIrqModInfo.MaxModIntsPerSec;
9501 -    } else {
9502 -       ModBase = C_CLK_FREQ_YUKON / pAC->DynIrqModInfo.MaxModIntsPerSec;
9503 -    }
9504 -
9505 -    SK_OUT32(pAC->IoBase, B2_IRQM_INI,  ModBase);
9506 -    SK_OUT32(pAC->IoBase, B2_IRQM_MSK,  pAC->DynIrqModInfo.MaskIrqModeration);
9507 -    SK_OUT32(pAC->IoBase, B2_IRQM_CTRL, TIM_START);
9508 -    if (M_DIMINFO.DisplayStats) {
9509 -        printk("Enabled interrupt moderation (%i ints/sec)\n",
9510 -               M_DIMINFO.MaxModIntsPerSec);
9511 -    }
9512 -}
9513 +/*****************************************************************************
9514 + *
9515 + *     disableIntMod - disables the interrupt moderation
9516 + *
9517 + * Description:
9518 + *     Disabling the interrupt moderation is done by stopping the
9519 + *     IRQ moderation timer using the B2_IRQM_CTRL register.
9520 + *
9521 + * Returns:    N/A
9522 + *
9523 + */
9524 +static void disableIntMod(
9525 +SK_AC *pAC)  /* pointer to adapter control context */
9526 +{
9527 +        SK_DBG_MSG(pAC,SK_DBGMOD_DRV,SK_DBGCAT_DRV_MSG,("==> disableIntMod\n"));
9528
9529 -/*******************************************************************************
9530 -** Function     : DisableIntMod()
9531 -** Description  : Disbles the interrupt moderation independent of what inter-
9532 -**                rupts are running or not
9533 -** Programmer   : Ralph Roesler
9534 -** Last Modified: 23-mar-03
9535 -** Returns      : -
9536 -** Notes        : -
9537 -*******************************************************************************/
9538 -
9539 -static void
9540 -DisableIntMod(SK_AC *pAC) {
9541 -
9542 -    SK_OUT32(pAC->IoBase, B2_IRQM_CTRL, TIM_STOP);
9543 -    if (M_DIMINFO.DisplayStats) {
9544 -        printk("Disabled interrupt moderation\n");
9545 -    }
9546 -}
9547 +       SK_OUT32(pAC->IoBase, B2_IRQM_CTRL, TIM_STOP);
9548
9549 -/*******************************************************************************
9550 -** Function     : ResizeDimTimerDuration();
9551 -** Description  : Checks the current used descriptor ratio and resizes the
9552 -**                duration timer (longer/smaller) if possible.
9553 -** Programmer   : Ralph Roesler
9554 -** Last Modified: 23-mar-03
9555 -** Returns      : -
9556 -** Notes        : There are both maximum and minimum timer duration value.
9557 -**                This function assumes that interrupt moderation is already
9558 -**                enabled!
9559 -*******************************************************************************/
9560 -
9561 -static void
9562 -ResizeDimTimerDuration(SK_AC *pAC) {
9563 -    SK_BOOL IncreaseTimerDuration;
9564 -    int     TotalMaxNbrDescr;
9565 -    int     UsedDescrRatio;
9566 -    int     RatioDiffAbs;
9567 -    int     RatioDiffRel;
9568 -    int     NewMaxModIntsPerSec;
9569 -    int     ModAdjValue;
9570 -    long    ModBase;
9571 -
9572 -    /*
9573 -    ** Check first if we are allowed to perform any modification
9574 -    */
9575 -    if (IsIntModEnabled(pAC)) {
9576 -        if (M_DIMINFO.IntModTypeSelect != C_INT_MOD_DYNAMIC) {
9577 -            return;
9578 -        } else {
9579 -            if (M_DIMINFO.ModJustEnabled) {
9580 -                M_DIMINFO.ModJustEnabled = SK_FALSE;
9581 -                return;
9582 -            }
9583 -        }
9584 -    }
9585 -
9586 -    /*
9587 -    ** If we got until here, we have to evaluate the amount of the
9588 -    ** descriptor ratio change...
9589 -    */
9590 -    TotalMaxNbrDescr = pAC->RxDescrPerRing * GetRxCalls(pAC);
9591 -    UsedDescrRatio   = (M_DIMINFO.NbrProcessedDescr * 100) / TotalMaxNbrDescr;
9592 -
9593 -    if (UsedDescrRatio > M_DIMINFO.PrevUsedDescrRatio) {
9594 -        RatioDiffAbs = (UsedDescrRatio - M_DIMINFO.PrevUsedDescrRatio);
9595 -        RatioDiffRel = (RatioDiffAbs * 100) / UsedDescrRatio;
9596 -        M_DIMINFO.PrevUsedDescrRatio = UsedDescrRatio;
9597 -        IncreaseTimerDuration = SK_FALSE;  /* in other words: DECREASE */
9598 -    } else if (UsedDescrRatio < M_DIMINFO.PrevUsedDescrRatio) {
9599 -        RatioDiffAbs = (M_DIMINFO.PrevUsedDescrRatio - UsedDescrRatio);
9600 -        RatioDiffRel = (RatioDiffAbs * 100) / M_DIMINFO.PrevUsedDescrRatio;
9601 -        M_DIMINFO.PrevUsedDescrRatio = UsedDescrRatio;
9602 -        IncreaseTimerDuration = SK_TRUE;   /* in other words: INCREASE */
9603 -    } else {
9604 -        RatioDiffAbs = (M_DIMINFO.PrevUsedDescrRatio - UsedDescrRatio);
9605 -        RatioDiffRel = (RatioDiffAbs * 100) / M_DIMINFO.PrevUsedDescrRatio;
9606 -        M_DIMINFO.PrevUsedDescrRatio = UsedDescrRatio;
9607 -        IncreaseTimerDuration = SK_TRUE;   /* in other words: INCREASE */
9608 -    }
9609 -
9610 -    /*
9611 -    ** Now we can determine the change in percent
9612 -    */
9613 -    if ((RatioDiffRel >= 0) && (RatioDiffRel <= 5) ) {
9614 -       ModAdjValue = 1;  /*  1% change - maybe some other value in future */
9615 -    } else if ((RatioDiffRel > 5) && (RatioDiffRel <= 10) ) {
9616 -       ModAdjValue = 1;  /*  1% change - maybe some other value in future */
9617 -    } else if ((RatioDiffRel > 10) && (RatioDiffRel <= 15) ) {
9618 -       ModAdjValue = 1;  /*  1% change - maybe some other value in future */
9619 -    } else {
9620 -       ModAdjValue = 1;  /*  1% change - maybe some other value in future */
9621 -    }
9622 -
9623 -    if (IncreaseTimerDuration) {
9624 -       NewMaxModIntsPerSec =  M_DIMINFO.MaxModIntsPerSec +
9625 -                             (M_DIMINFO.MaxModIntsPerSec * ModAdjValue) / 100;
9626 -    } else {
9627 -       NewMaxModIntsPerSec =  M_DIMINFO.MaxModIntsPerSec -
9628 -                             (M_DIMINFO.MaxModIntsPerSec * ModAdjValue) / 100;
9629 -    }
9630 -
9631 -    /*
9632 -    ** Check if we exceed boundaries...
9633 -    */
9634 -    if ( (NewMaxModIntsPerSec > M_DIMINFO.MaxModIntsPerSecUpperLimit) ||
9635 -         (NewMaxModIntsPerSec < M_DIMINFO.MaxModIntsPerSecLowerLimit)) {
9636 -        if (M_DIMINFO.DisplayStats) {
9637 -            printk("Cannot change ModTim from %i to %i ints/sec\n",
9638 -                   M_DIMINFO.MaxModIntsPerSec, NewMaxModIntsPerSec);
9639 -        }
9640 -        return;
9641 -    } else {
9642 -        if (M_DIMINFO.DisplayStats) {
9643 -            printk("Resized ModTim from %i to %i ints/sec\n",
9644 -                   M_DIMINFO.MaxModIntsPerSec, NewMaxModIntsPerSec);
9645 -        }
9646 -    }
9647 -
9648 -    M_DIMINFO.MaxModIntsPerSec = NewMaxModIntsPerSec;
9649 -
9650 -    if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
9651 -        ModBase = C_CLK_FREQ_GENESIS / pAC->DynIrqModInfo.MaxModIntsPerSec;
9652 -    } else {
9653 -        ModBase = C_CLK_FREQ_YUKON / pAC->DynIrqModInfo.MaxModIntsPerSec;
9654 -    }
9655 -
9656 -    /*
9657 -    ** We do not need to touch any other registers
9658 -    */
9659 -    SK_OUT32(pAC->IoBase, B2_IRQM_INI, ModBase);
9660 +        SK_DBG_MSG(pAC,SK_DBGMOD_DRV,SK_DBGCAT_DRV_MSG,("<== disableIntMod\n"));
9661  }
9662
9663  /*******************************************************************************
9664 -** Function     : DisplaySelectedModerationType()
9665 -** Description  : Displays what type of moderation we have
9666 -** Programmer   : Ralph Roesler
9667 -** Last Modified: 23-mar-03
9668 -** Returns      : void!
9669 -** Notes        : -
9670 -*******************************************************************************/
9671 -
9672 -static void
9673 -DisplaySelectedModerationType(SK_AC *pAC) {
9674 -
9675 -    if (pAC->DynIrqModInfo.DisplayStats) {
9676 -        if (pAC->DynIrqModInfo.IntModTypeSelect == C_INT_MOD_STATIC) {
9677 -             printk("Static int moderation runs with %i INTS/sec\n",
9678 -                    pAC->DynIrqModInfo.MaxModIntsPerSec);
9679 -        } else if (pAC->DynIrqModInfo.IntModTypeSelect == C_INT_MOD_DYNAMIC) {
9680 -             if (IsIntModEnabled(pAC)) {
9681 -                printk("Dynamic int moderation runs with %i INTS/sec\n",
9682 -                       pAC->DynIrqModInfo.MaxModIntsPerSec);
9683 -             } else {
9684 -                printk("Dynamic int moderation currently not applied\n");
9685 -             }
9686 -        } else {
9687 -             printk("No interrupt moderation selected!\n");
9688 -        }
9689 -    }
9690 -}
9691 -
9692 -/*******************************************************************************
9693 -** Function     : DisplaySelectedModerationMask()
9694 -** Description  : Displays what interrupts are moderated
9695 -** Programmer   : Ralph Roesler
9696 -** Last Modified: 23-mar-03
9697 -** Returns      : void!
9698 -** Notes        : -
9699 -*******************************************************************************/
9700 -
9701 -static void
9702 -DisplaySelectedModerationMask(SK_AC *pAC) {
9703 -
9704 -    if (pAC->DynIrqModInfo.DisplayStats) {
9705 -        if (pAC->DynIrqModInfo.IntModTypeSelect != C_INT_MOD_NONE) {
9706 -            switch (pAC->DynIrqModInfo.MaskIrqModeration) {
9707 -                case IRQ_MASK_TX_ONLY:
9708 -                   printk("Only Tx-interrupts are moderated\n");
9709 -                   break;
9710 -                case IRQ_MASK_RX_ONLY:
9711 -                   printk("Only Rx-interrupts are moderated\n");
9712 -                   break;
9713 -                case IRQ_MASK_SP_ONLY:
9714 -                   printk("Only special-interrupts are moderated\n");
9715 -                   break;
9716 -                case IRQ_MASK_TX_RX:
9717 -                   printk("Tx- and Rx-interrupts are moderated\n");
9718 -                   break;
9719 -                case IRQ_MASK_SP_RX:
9720 -                   printk("Special- and Rx-interrupts are moderated\n");
9721 -                   break;
9722 -                case IRQ_MASK_SP_TX:
9723 -                   printk("Special- and Tx-interrupts are moderated\n");
9724 -                   break;
9725 -                case IRQ_MASK_RX_TX_SP:
9726 -                   printk("All Rx-, Tx and special-interrupts are moderated\n");
9727 -                   break;
9728 -                default:
9729 -                   printk("Don't know what is moderated\n");
9730 -                   break;
9731 -            }
9732 -        } else {
9733 -            printk("No specific interrupts masked for moderation\n");
9734 -        }
9735 -    }
9736 -}
9737 -
9738 -/*******************************************************************************
9739 -** Function     : DisplayDescrRatio
9740 -** Description  : Like the name states...
9741 -** Programmer   : Ralph Roesler
9742 -** Last Modified: 23-mar-03
9743 -** Returns      : void!
9744 -** Notes        : -
9745 -*******************************************************************************/
9746 -
9747 -static void
9748 -DisplayDescrRatio(SK_AC *pAC) {
9749 -    int TotalMaxNbrDescr = 0;
9750 -
9751 -    if (pAC->DynIrqModInfo.DisplayStats) {
9752 -        TotalMaxNbrDescr = pAC->RxDescrPerRing * GetRxCalls(pAC);
9753 -        printk("Ratio descriptors: %i/%i\n",
9754 -               M_DIMINFO.NbrProcessedDescr, TotalMaxNbrDescr);
9755 -    }
9756 -}
9757 -
9758 -/*******************************************************************************
9759 -**
9760 -** End of file
9761 -**
9762 -*******************************************************************************/
9763 + *
9764 + * End of file
9765 + *
9766 + ******************************************************************************/
9767 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/skethtool.c linux-2.6.9.new/drivers/net/sk98lin/skethtool.c
9768 --- linux-2.6.9.old/drivers/net/sk98lin/skethtool.c     1970-01-01 08:00:00.000000000 +0800
9769 +++ linux-2.6.9.new/drivers/net/sk98lin/skethtool.c     2006-12-07 14:35:03.000000000 +0800
9770 @@ -0,0 +1,1333 @@
9771 +/******************************************************************************
9772 + *
9773 + * Name:        skethtool.c
9774 + * Project:     GEnesis, PCI Gigabit Ethernet Adapter
9775 + * Version:     $Revision: 1.3.2.9 $
9776 + * Date:        $Date: 2005/05/23 13:47:33 $
9777 + * Purpose:     All functions regarding ethtool handling
9778 + *
9779 + ******************************************************************************/
9780 +
9781 +/******************************************************************************
9782 + *
9783 + *     (C)Copyright 1998-2002 SysKonnect GmbH.
9784 + *     (C)Copyright 2002-2005 Marvell.
9785 + *
9786 + *     Driver for Marvell Yukon/2 chipset and SysKonnect Gigabit Ethernet
9787 + *      Server Adapters.
9788 + *
9789 + *     Author: Ralph Roesler (rroesler@syskonnect.de)
9790 + *             Mirko Lindner (mlindner@syskonnect.de)
9791 + *
9792 + *     Address all question to: linux@syskonnect.de
9793 + *
9794 + *     This program is free software; you can redistribute it and/or modify
9795 + *     it under the terms of the GNU General Public License as published by
9796 + *     the Free Software Foundation; either version 2 of the License, or
9797 + *     (at your option) any later version.
9798 + *
9799 + *     The information in this file is provided "AS IS" without warranty.
9800 + *
9801 + *****************************************************************************/
9802 +
9803 +#include "h/skdrv1st.h"
9804 +#include "h/skdrv2nd.h"
9805 +#include "h/skversion.h"
9806 +#include <linux/ethtool.h>
9807 +#include <linux/module.h>
9808 +#include <linux/timer.h>
9809 +
9810 +/******************************************************************************
9811 + *
9812 + * External Functions and Data
9813 + *
9814 + *****************************************************************************/
9815 +
9816 +extern void SkDimDisableModeration(SK_AC *pAC, int CurrentModeration);
9817 +extern void SkDimEnableModerationIfNeeded(SK_AC *pAC);
9818 +
9819 +/******************************************************************************
9820 + *
9821 + * Defines
9822 + *
9823 + *****************************************************************************/
9824 +
9825 +#ifndef ETHT_STATSTRING_LEN
9826 +#define ETHT_STATSTRING_LEN 32
9827 +#endif
9828 +
9829 +#define SK98LIN_STAT(m)        sizeof(((SK_AC *)0)->m),offsetof(SK_AC, m)
9830 +
9831 +#define SUPP_COPPER_ALL (SUPPORTED_10baseT_Half  | SUPPORTED_10baseT_Full  | \
9832 +                         SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full | \
9833 +                         SUPPORTED_1000baseT_Half| SUPPORTED_1000baseT_Full| \
9834 +                         SUPPORTED_TP)
9835 +
9836 +#define ADV_COPPER_ALL  (ADVERTISED_10baseT_Half  | ADVERTISED_10baseT_Full  | \
9837 +                         ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full | \
9838 +                         ADVERTISED_1000baseT_Half| ADVERTISED_1000baseT_Full| \
9839 +                         ADVERTISED_TP)
9840 +
9841 +#define SUPP_FIBRE_ALL  (SUPPORTED_1000baseT_Full | \
9842 +                         SUPPORTED_FIBRE          | \
9843 +                         SUPPORTED_Autoneg)
9844 +
9845 +#define ADV_FIBRE_ALL   (ADVERTISED_1000baseT_Full | \
9846 +                         ADVERTISED_FIBRE          | \
9847 +                         ADVERTISED_Autoneg)
9848 +
9849 +/******************************************************************************
9850 + *
9851 + * Local Function Prototypes
9852 + *
9853 + *****************************************************************************/
9854 +
9855 +#ifdef ETHTOOL_GSET
9856 +static void getSettings(SK_AC *pAC, int port, struct ethtool_cmd *ecmd);
9857 +#endif
9858 +#ifdef ETHTOOL_SSET
9859 +static int setSettings(SK_AC *pAC, int port, struct ethtool_cmd *ecmd);
9860 +#endif
9861 +#ifdef ETHTOOL_GPAUSEPARAM
9862 +static void getPauseParams(SK_AC *pAC, int port, struct ethtool_pauseparam *epause);
9863 +#endif
9864 +#ifdef ETHTOOL_SPAUSEPARAM
9865 +static int setPauseParams(SK_AC *pAC, int port, struct ethtool_pauseparam *epause);
9866 +#endif
9867 +#ifdef ETHTOOL_GDRVINFO
9868 +static void getDriverInfo(SK_AC *pAC, int port, struct ethtool_drvinfo *edrvinfo);
9869 +#endif
9870 +#ifdef ETHTOOL_PHYS_ID
9871 +static int startLocateNIC(SK_AC *pAC, int port, struct ethtool_value *blinkSecs);
9872 +static void toggleLeds(unsigned long ptr);
9873 +#endif
9874 +#ifdef ETHTOOL_GCOALESCE
9875 +static void getModerationParams(SK_AC *pAC, int port, struct ethtool_coalesce *ecoalesc);
9876 +#endif
9877 +#ifdef ETHTOOL_SCOALESCE
9878 +static int setModerationParams(SK_AC *pAC, int port, struct ethtool_coalesce *ecoalesc);
9879 +#endif
9880 +#ifdef ETHTOOL_GWOL
9881 +static void getWOLsettings(SK_AC *pAC, int port, struct ethtool_wolinfo *ewol);
9882 +#endif
9883 +#ifdef ETHTOOL_SWOL
9884 +static int setWOLsettings(SK_AC *pAC, int port, struct ethtool_wolinfo *ewol);
9885 +#endif
9886 +
9887 +static int getPortNumber(struct net_device *netdev, struct ifreq *ifr);
9888 +
9889 +/******************************************************************************
9890 + *
9891 + * Local Variables
9892 + *
9893 + *****************************************************************************/
9894 +
9895 +struct sk98lin_stats {
9896 +       char stat_string[ETHT_STATSTRING_LEN];
9897 +       int  sizeof_stat;
9898 +       int  stat_offset;
9899 +};
9900 +
9901 +static struct sk98lin_stats sk98lin_etht_stats_port0[] = {
9902 +       { "rx_packets" , SK98LIN_STAT(PnmiStruct.Stat[0].StatRxOkCts) },
9903 +       { "tx_packets" , SK98LIN_STAT(PnmiStruct.Stat[0].StatTxOkCts) },
9904 +       { "rx_bytes" , SK98LIN_STAT(PnmiStruct.Stat[0].StatRxOctetsOkCts) },
9905 +       { "tx_bytes" , SK98LIN_STAT(PnmiStruct.Stat[0].StatTxOctetsOkCts) },
9906 +       { "rx_errors" , SK98LIN_STAT(PnmiStruct.InErrorsCts) },
9907 +       { "tx_errors" , SK98LIN_STAT(PnmiStruct.Stat[0].StatTxSingleCollisionCts) },
9908 +       { "rx_dropped" , SK98LIN_STAT(PnmiStruct.RxNoBufCts) },
9909 +       { "tx_dropped" , SK98LIN_STAT(PnmiStruct.TxNoBufCts) },
9910 +       { "multicasts" , SK98LIN_STAT(PnmiStruct.Stat[0].StatRxMulticastOkCts) },
9911 +       { "collisions" , SK98LIN_STAT(PnmiStruct.Stat[0].StatTxSingleCollisionCts) },
9912 +       { "rx_length_errors" , SK98LIN_STAT(PnmiStruct.Stat[0].StatRxRuntCts) },
9913 +       { "rx_buffer_overflow_errors" , SK98LIN_STAT(PnmiStruct.Stat[0].StatRxFifoOverflowCts) },
9914 +       { "rx_crc_errors" , SK98LIN_STAT(PnmiStruct.Stat[0].StatRxFcsCts) },
9915 +       { "rx_frame_errors" , SK98LIN_STAT(PnmiStruct.Stat[0].StatRxFramingCts) },
9916 +       { "rx_too_short_errors" , SK98LIN_STAT(PnmiStruct.Stat[0].StatRxShortsCts) },
9917 +       { "rx_too_long_errors" , SK98LIN_STAT(PnmiStruct.Stat[0].StatRxTooLongCts) },
9918 +       { "rx_carrier_extension_errors", SK98LIN_STAT(PnmiStruct.Stat[0].StatRxCextCts) },
9919 +       { "rx_symbol_errors" , SK98LIN_STAT(PnmiStruct.Stat[0].StatRxSymbolCts) },
9920 +       { "rx_llc_mac_size_errors" , SK98LIN_STAT(PnmiStruct.Stat[0].StatRxIRLengthCts) },
9921 +       { "rx_carrier_errors" , SK98LIN_STAT(PnmiStruct.Stat[0].StatRxCarrierCts) },
9922 +       { "rx_jabber_errors" , SK98LIN_STAT(PnmiStruct.Stat[0].StatRxJabberCts) },
9923 +       { "rx_missed_errors" , SK98LIN_STAT(PnmiStruct.Stat[0].StatRxMissedCts) },
9924 +       { "tx_abort_collision_errors" , SK98LIN_STAT(stats.tx_aborted_errors) },
9925 +       { "tx_carrier_errors" , SK98LIN_STAT(PnmiStruct.Stat[0].StatTxCarrierCts) },
9926 +       { "tx_buffer_underrun_errors" , SK98LIN_STAT(PnmiStruct.Stat[0].StatTxFifoUnderrunCts) },
9927 +       { "tx_heartbeat_errors" , SK98LIN_STAT(PnmiStruct.Stat[0].StatTxCarrierCts) } ,
9928 +       { "tx_window_errors" , SK98LIN_STAT(stats.tx_window_errors) }
9929 +};
9930 +
9931 +static struct sk98lin_stats sk98lin_etht_stats_port1[] = {
9932 +       { "rx_packets" , SK98LIN_STAT(PnmiStruct.Stat[1].StatRxOkCts) },
9933 +       { "tx_packets" , SK98LIN_STAT(PnmiStruct.Stat[1].StatTxOkCts) },
9934 +       { "rx_bytes" , SK98LIN_STAT(PnmiStruct.Stat[1].StatRxOctetsOkCts) },
9935 +       { "tx_bytes" , SK98LIN_STAT(PnmiStruct.Stat[1].StatTxOctetsOkCts) },
9936 +       { "rx_errors" , SK98LIN_STAT(PnmiStruct.InErrorsCts) },
9937 +       { "tx_errors" , SK98LIN_STAT(PnmiStruct.Stat[1].StatTxSingleCollisionCts) },
9938 +       { "rx_dropped" , SK98LIN_STAT(PnmiStruct.RxNoBufCts) },
9939 +       { "tx_dropped" , SK98LIN_STAT(PnmiStruct.TxNoBufCts) },
9940 +       { "multicasts" , SK98LIN_STAT(PnmiStruct.Stat[1].StatRxMulticastOkCts) },
9941 +       { "collisions" , SK98LIN_STAT(PnmiStruct.Stat[1].StatTxSingleCollisionCts) },
9942 +       { "rx_length_errors" , SK98LIN_STAT(PnmiStruct.Stat[1].StatRxRuntCts) },
9943 +       { "rx_buffer_overflow_errors" , SK98LIN_STAT(PnmiStruct.Stat[1].StatRxFifoOverflowCts) },
9944 +       { "rx_crc_errors" , SK98LIN_STAT(PnmiStruct.Stat[1].StatRxFcsCts) },
9945 +       { "rx_frame_errors" , SK98LIN_STAT(PnmiStruct.Stat[1].StatRxFramingCts) },
9946 +       { "rx_too_short_errors" , SK98LIN_STAT(PnmiStruct.Stat[1].StatRxShortsCts) },
9947 +       { "rx_too_long_errors" , SK98LIN_STAT(PnmiStruct.Stat[1].StatRxTooLongCts) },
9948 +       { "rx_carrier_extension_errors", SK98LIN_STAT(PnmiStruct.Stat[1].StatRxCextCts) },
9949 +       { "rx_symbol_errors" , SK98LIN_STAT(PnmiStruct.Stat[1].StatRxSymbolCts) },
9950 +       { "rx_llc_mac_size_errors" , SK98LIN_STAT(PnmiStruct.Stat[1].StatRxIRLengthCts) },
9951 +       { "rx_carrier_errors" , SK98LIN_STAT(PnmiStruct.Stat[1].StatRxCarrierCts) },
9952 +       { "rx_jabber_errors" , SK98LIN_STAT(PnmiStruct.Stat[1].StatRxJabberCts) },
9953 +       { "rx_missed_errors" , SK98LIN_STAT(PnmiStruct.Stat[1].StatRxMissedCts) },
9954 +       { "tx_abort_collision_errors" , SK98LIN_STAT(stats.tx_aborted_errors) },
9955 +       { "tx_carrier_errors" , SK98LIN_STAT(PnmiStruct.Stat[1].StatTxCarrierCts) },
9956 +       { "tx_buffer_underrun_errors" , SK98LIN_STAT(PnmiStruct.Stat[1].StatTxFifoUnderrunCts) },
9957 +       { "tx_heartbeat_errors" , SK98LIN_STAT(PnmiStruct.Stat[1].StatTxCarrierCts) } ,
9958 +       { "tx_window_errors" , SK98LIN_STAT(stats.tx_window_errors) }
9959 +};
9960 +
9961 +#define SK98LIN_STATS_LEN sizeof(sk98lin_etht_stats_port0) / sizeof(struct sk98lin_stats)
9962 +
9963 +static int nbrBlinkQuarterSeconds;
9964 +static int currentPortIndex;
9965 +static SK_BOOL isLocateNICrunning   = SK_FALSE;
9966 +static SK_BOOL isDualNetCard        = SK_FALSE;
9967 +static SK_BOOL doSwitchLEDsOn       = SK_FALSE;
9968 +static SK_BOOL boardWasDown[2]      = { SK_FALSE, SK_FALSE };
9969 +static struct timer_list locateNICtimer;
9970 +
9971 +/******************************************************************************
9972 + *
9973 + * Global Functions
9974 + *
9975 + *****************************************************************************/
9976 +
9977 +/*****************************************************************************
9978 + *
9979 + *     SkEthIoctl - IOCTL entry point for all ethtool queries
9980 + *
9981 + * Description:
9982 + *     Any IOCTL request that has to deal with the ethtool command tool is
9983 + *     dispatched via this function.
9984 + *
9985 + * Returns:
9986 + *     ==0:    everything fine, no error
9987 + *     !=0:    the return value is the error code of the failure
9988 + */
9989 +int SkEthIoctl(
9990 +struct net_device *netdev,  /* the pointer to netdev structure       */
9991 +struct ifreq      *ifr)     /* what interface the request refers to? */
9992 +{
9993 +       DEV_NET             *pNet        = (DEV_NET*) netdev->priv;
9994 +       SK_AC               *pAC         = pNet->pAC;
9995 +       void                *pAddr       = ifr->ifr_data;
9996 +       int                  port        = getPortNumber(netdev, ifr);
9997 +       SK_PNMI_STRUCT_DATA *pPnmiStruct = &pAC->PnmiStruct;
9998 +       SK_U32               Size        = sizeof(SK_PNMI_STRUCT_DATA);
9999 +       SK_U32               cmd;
10000 +       struct sk98lin_stats *sk98lin_etht_stats =
10001 +               (port == 0) ? sk98lin_etht_stats_port0 : sk98lin_etht_stats_port1;
10002 +
10003 +        if (get_user(cmd, (uint32_t *) pAddr)) {
10004 +                return -EFAULT;
10005 +       }
10006 +
10007 +       switch(cmd) {
10008 +#ifdef ETHTOOL_GSET
10009 +       case ETHTOOL_GSET: {
10010 +               struct ethtool_cmd ecmd = { ETHTOOL_GSET };
10011 +               getSettings(pAC, port, &ecmd);
10012 +               if(copy_to_user(pAddr, &ecmd, sizeof(ecmd))) {
10013 +                       return -EFAULT;
10014 +               }
10015 +               return 0;
10016 +       }
10017 +       break;
10018 +#endif
10019 +#ifdef ETHTOOL_SSET
10020 +       case ETHTOOL_SSET: {
10021 +               struct ethtool_cmd ecmd;
10022 +               if(copy_from_user(&ecmd, pAddr, sizeof(ecmd))) {
10023 +                       return -EFAULT;
10024 +               }
10025 +               return setSettings(pAC, port, &ecmd);
10026 +       }
10027 +       break;
10028 +#endif
10029 +#ifdef ETHTOOL_GDRVINFO
10030 +       case ETHTOOL_GDRVINFO: {
10031 +               struct ethtool_drvinfo drvinfo = { ETHTOOL_GDRVINFO };
10032 +               getDriverInfo(pAC, port, &drvinfo);
10033 +               if(copy_to_user(pAddr, &drvinfo, sizeof(drvinfo))) {
10034 +                       return -EFAULT;
10035 +               }
10036 +               return 0;
10037 +       }
10038 +       break;
10039 +#endif
10040 +#ifdef ETHTOOL_GSTRINGS
10041 +       case ETHTOOL_GSTRINGS: {
10042 +               struct ethtool_gstrings gstrings = { ETHTOOL_GSTRINGS };
10043 +               char *strings = NULL;
10044 +               int err = 0;
10045 +               if(copy_from_user(&gstrings, pAddr, sizeof(gstrings))) {
10046 +                       return -EFAULT;
10047 +               }
10048 +               switch(gstrings.string_set) {
10049 +#ifdef ETHTOOL_GSTATS
10050 +                       case ETH_SS_STATS: {
10051 +                               int i;
10052 +                               gstrings.len = SK98LIN_STATS_LEN;
10053 +                               if ((strings = kmalloc(SK98LIN_STATS_LEN*ETHT_STATSTRING_LEN,GFP_KERNEL)) == NULL) {
10054 +                                       return -ENOMEM;
10055 +                               }
10056 +                               for(i=0; i < SK98LIN_STATS_LEN; i++) {
10057 +                                       memcpy(&strings[i * ETHT_STATSTRING_LEN],
10058 +                                               &(sk98lin_etht_stats[i].stat_string),
10059 +                                               ETHT_STATSTRING_LEN);
10060 +                               }
10061 +                       }
10062 +                       break;
10063 +#endif
10064 +                       default:
10065 +                               return -EOPNOTSUPP;
10066 +               }
10067 +               if(copy_to_user(pAddr, &gstrings, sizeof(gstrings))) {
10068 +                       err = -EFAULT;
10069 +               }
10070 +               pAddr = (void *) ((unsigned long int) pAddr + offsetof(struct ethtool_gstrings, data));
10071 +               if(!err && copy_to_user(pAddr, strings, gstrings.len * ETH_GSTRING_LEN)) {
10072 +                       err = -EFAULT;
10073 +               }
10074 +               kfree(strings);
10075 +               return err;
10076 +       }
10077 +#endif
10078 +#ifdef ETHTOOL_GSTATS
10079 +       case ETHTOOL_GSTATS: {
10080 +               struct {
10081 +                       struct ethtool_stats eth_stats;
10082 +                       uint64_t data[SK98LIN_STATS_LEN];
10083 +               } stats = { {ETHTOOL_GSTATS, SK98LIN_STATS_LEN} };
10084 +               int i;
10085 +
10086 +               if (netif_running(pAC->dev[port])) {
10087 +                       SkPnmiGetStruct(pAC, pAC->IoBase, pPnmiStruct, &Size, port);
10088 +               }
10089 +               for(i = 0; i < SK98LIN_STATS_LEN; i++) {
10090 +                       if (netif_running(pAC->dev[port])) {
10091 +                               stats.data[i] = (sk98lin_etht_stats[i].sizeof_stat ==
10092 +                                       sizeof(uint64_t)) ?
10093 +                                       *(uint64_t *)((char *)pAC +
10094 +                                               sk98lin_etht_stats[i].stat_offset) :
10095 +                                       *(uint32_t *)((char *)pAC +
10096 +                                               sk98lin_etht_stats[i].stat_offset);
10097 +                       } else {
10098 +                               stats.data[i] = (sk98lin_etht_stats[i].sizeof_stat ==
10099 +                                       sizeof(uint64_t)) ? (uint64_t) 0 : (uint32_t) 0;
10100 +                       }
10101 +               }
10102 +               if(copy_to_user(pAddr, &stats, sizeof(stats))) {
10103 +                       return -EFAULT;
10104 +               }
10105 +               return 0;
10106 +       }
10107 +#endif
10108 +#ifdef ETHTOOL_PHYS_ID
10109 +       case ETHTOOL_PHYS_ID: {
10110 +               struct ethtool_value blinkSecs;
10111 +               if(copy_from_user(&blinkSecs, pAddr, sizeof(blinkSecs))) {
10112 +                       return -EFAULT;
10113 +               }
10114 +               return startLocateNIC(pAC, port, &blinkSecs);
10115 +       }
10116 +#endif
10117 +#ifdef ETHTOOL_GPAUSEPARAM
10118 +       case ETHTOOL_GPAUSEPARAM: {
10119 +               struct ethtool_pauseparam epause = { ETHTOOL_GPAUSEPARAM };
10120 +               getPauseParams(pAC, port, &epause);
10121 +               if(copy_to_user(pAddr, &epause, sizeof(epause))) {
10122 +                       return -EFAULT;
10123 +               }
10124 +               return 0;
10125 +       }
10126 +#endif
10127 +#ifdef ETHTOOL_SPAUSEPARAM
10128 +       case ETHTOOL_SPAUSEPARAM: {
10129 +               struct ethtool_pauseparam epause;
10130 +               if(copy_from_user(&epause, pAddr, sizeof(epause))) {
10131 +                       return -EFAULT;
10132 +               }
10133 +               return setPauseParams(pAC, port, &epause);
10134 +       }
10135 +#endif
10136 +#ifdef ETHTOOL_GSG
10137 +       case ETHTOOL_GSG: {
10138 +               struct ethtool_value edata = { ETHTOOL_GSG };
10139 +               edata.data = (netdev->features & NETIF_F_SG) != 0;
10140 +               if (copy_to_user(pAddr, &edata, sizeof(edata))) {
10141 +                       return -EFAULT;
10142 +               }
10143 +               return 0;
10144 +       }
10145 +#endif
10146 +#ifdef ETHTOOL_SSG
10147 +       case ETHTOOL_SSG: {
10148 +               struct ethtool_value edata;
10149 +               if (copy_from_user(&edata, pAddr, sizeof(edata))) {
10150 +                        return -EFAULT;
10151 +               }
10152 +               if (pAC->ChipsetType) { /* Don't handle if Genesis */
10153 +                       if (edata.data) {
10154 +                               netdev->features |= NETIF_F_SG;
10155 +                       } else {
10156 +                               netdev->features &= ~NETIF_F_SG;
10157 +                       }
10158 +               }
10159 +               return 0;
10160 +       }
10161 +#endif
10162 +#ifdef ETHTOOL_GRXCSUM
10163 +       case ETHTOOL_GRXCSUM: {
10164 +               struct ethtool_value edata = { ETHTOOL_GRXCSUM };
10165 +               edata.data = pAC->RxPort[port].UseRxCsum;
10166 +               if (copy_to_user(pAddr, &edata, sizeof(edata))) {
10167 +                       return -EFAULT;
10168 +               }
10169 +               return 0;
10170 +       }
10171 +#endif
10172 +#ifdef ETHTOOL_SRXCSUM
10173 +       case ETHTOOL_SRXCSUM: {
10174 +               struct ethtool_value edata;
10175 +               if (copy_from_user(&edata, pAddr, sizeof(edata))) {
10176 +                       return -EFAULT;
10177 +               }
10178 +               pAC->RxPort[port].UseRxCsum = edata.data;
10179 +                return 0;
10180 +       }
10181 +#endif
10182 +#ifdef ETHTOOL_GTXCSUM
10183 +       case ETHTOOL_GTXCSUM: {
10184 +               struct ethtool_value edata = { ETHTOOL_GTXCSUM };
10185 +               edata.data = ((netdev->features & NETIF_F_IP_CSUM) != 0);
10186 +               if (copy_to_user(pAddr, &edata, sizeof(edata))) {
10187 +                       return -EFAULT;
10188 +               }
10189 +               return 0;
10190 +       }
10191 +#endif
10192 +#ifdef ETHTOOL_STXCSUM
10193 +       case ETHTOOL_STXCSUM: {
10194 +               struct ethtool_value edata;
10195 +               if (copy_from_user(&edata, pAddr, sizeof(edata))) {
10196 +                       return -EFAULT;
10197 +               }
10198 +               if (pAC->ChipsetType) { /* Don't handle if Genesis */
10199 +                       if (edata.data) {
10200 +                               netdev->features |= NETIF_F_IP_CSUM;
10201 +                       } else {
10202 +                               netdev->features &= ~NETIF_F_IP_CSUM;
10203 +                       }
10204 +               }
10205 +               return 0;
10206 +       }
10207 +#endif
10208 +#ifdef ETHTOOL_NWAY_RST
10209 +       case ETHTOOL_NWAY_RST: {
10210 +               if(netif_running(netdev)) {
10211 +                       (*netdev->stop)(netdev);
10212 +                       (*netdev->open)(netdev);
10213 +               }
10214 +               return 0;
10215 +       }
10216 +#endif
10217 +#ifdef NETIF_F_TSO
10218 +#ifdef ETHTOOL_GTSO
10219 +       case ETHTOOL_GTSO: {
10220 +               struct ethtool_value edata = { ETHTOOL_GTSO };
10221 +               edata.data = (netdev->features & NETIF_F_TSO) != 0;
10222 +               if (copy_to_user(pAddr, &edata, sizeof(edata))) {
10223 +                       return -EFAULT;
10224 +               }
10225 +               return 0;
10226 +       }
10227 +#endif
10228 +#ifdef ETHTOOL_STSO
10229 +       case ETHTOOL_STSO: {
10230 +               struct ethtool_value edata;
10231 +               if (CHIP_ID_YUKON_2(pAC)) {
10232 +                       if (copy_from_user(&edata, pAddr, sizeof(edata))) {
10233 +                               return -EFAULT;
10234 +                       }
10235 +                       if (edata.data) {
10236 +                               netdev->features |= NETIF_F_TSO;
10237 +                       } else {
10238 +                               netdev->features &= ~NETIF_F_TSO;
10239 +                       }
10240 +                       return 0;
10241 +               }
10242 +                return -EOPNOTSUPP;
10243 +       }
10244 +#endif
10245 +#endif
10246 +#ifdef ETHTOOL_GCOALESCE
10247 +       case ETHTOOL_GCOALESCE: {
10248 +               struct ethtool_coalesce ecoalesc = { ETHTOOL_GCOALESCE };
10249 +               getModerationParams(pAC, port, &ecoalesc);
10250 +               if(copy_to_user(pAddr, &ecoalesc, sizeof(ecoalesc))) {
10251 +                       return -EFAULT;
10252 +               }
10253 +               return 0;
10254 +       }
10255 +#endif
10256 +#ifdef ETHTOOL_SCOALESCE
10257 +       case ETHTOOL_SCOALESCE: {
10258 +               struct ethtool_coalesce ecoalesc;
10259 +               if(copy_from_user(&ecoalesc, pAddr, sizeof(ecoalesc))) {
10260 +                       return -EFAULT;
10261 +               }
10262 +               return setModerationParams(pAC, port, &ecoalesc);
10263 +       }
10264 +#endif
10265 +#ifdef ETHTOOL_GWOL
10266 +       case ETHTOOL_GWOL: {
10267 +               struct ethtool_wolinfo ewol = { ETHTOOL_GWOL };
10268 +               getWOLsettings(pAC, port, &ewol);
10269 +               if(copy_to_user(pAddr, &ewol, sizeof(ewol))) {
10270 +                       return -EFAULT;
10271 +               }
10272 +               return 0;
10273 +       }
10274 +#endif
10275 +#ifdef ETHTOOL_SWOL
10276 +       case ETHTOOL_SWOL: {
10277 +               struct ethtool_wolinfo ewol;
10278 +               if(copy_from_user(&ewol, pAddr, sizeof(ewol))) {
10279 +                       return -EFAULT;
10280 +               }
10281 +               return setWOLsettings(pAC, port, &ewol);
10282 +       }
10283 +#endif
10284 +        default:
10285 +                return -EOPNOTSUPP;
10286 +        }
10287 +} /* SkEthIoctl() */
10288 +
10289 +/******************************************************************************
10290 + *
10291 + * Local Functions
10292 + *
10293 + *****************************************************************************/
10294 +
10295 +#ifdef ETHTOOL_GSET
10296 +/*****************************************************************************
10297 + *
10298 + *     getSettings - retrieves the current settings of the selected adapter
10299 + *
10300 + * Description:
10301 + *     The current configuration of the selected adapter is returned.
10302 + *     This configuration involves a)speed, b)duplex and c)autoneg plus
10303 + *     a number of other variables.
10304 + *
10305 + * Returns:    N/A
10306 + *
10307 + */
10308 +static void getSettings(
10309 +SK_AC              *pAC,  /* pointer to adapter control context      */
10310 +int                 port, /* the port of the selected adapter        */
10311 +struct ethtool_cmd *ecmd) /* mandatory command structure for results */
10312 +{
10313 +       SK_GEPORT *pPort = &pAC->GIni.GP[port];
10314 +
10315 +       static int DuplexAutoNegConfMap[9][3]= {
10316 +               { -1                     , -1         , -1              },
10317 +               { 0                      , -1         , -1              },
10318 +               { SK_LMODE_HALF          , DUPLEX_HALF, AUTONEG_DISABLE },
10319 +               { SK_LMODE_FULL          , DUPLEX_FULL, AUTONEG_DISABLE },
10320 +               { SK_LMODE_AUTOHALF      , DUPLEX_HALF, AUTONEG_ENABLE  },
10321 +               { SK_LMODE_AUTOFULL      , DUPLEX_FULL, AUTONEG_ENABLE  },
10322 +               { SK_LMODE_AUTOBOTH      , DUPLEX_FULL, AUTONEG_ENABLE  },
10323 +               { SK_LMODE_AUTOSENSE     , -1         , -1              },
10324 +               { SK_LMODE_INDETERMINATED, -1         , -1              }
10325 +       };
10326 +
10327 +       static int SpeedConfMap[6][2] = {
10328 +               { 0                       , -1         },
10329 +               { SK_LSPEED_AUTO          , -1         },
10330 +               { SK_LSPEED_10MBPS        , SPEED_10   },
10331 +               { SK_LSPEED_100MBPS       , SPEED_100  },
10332 +               { SK_LSPEED_1000MBPS      , SPEED_1000 },
10333 +               { SK_LSPEED_INDETERMINATED, -1         }
10334 +       };
10335 +
10336 +       static int AdvSpeedMap[6][2] = {
10337 +               { 0                       , -1         },
10338 +               { SK_LSPEED_AUTO          , -1         },
10339 +               { SK_LSPEED_10MBPS        , ADVERTISED_10baseT_Half   | ADVERTISED_10baseT_Full },
10340 +               { SK_LSPEED_100MBPS       , ADVERTISED_100baseT_Half  | ADVERTISED_100baseT_Full },
10341 +               { SK_LSPEED_1000MBPS      , ADVERTISED_1000baseT_Half | ADVERTISED_1000baseT_Full},
10342 +               { SK_LSPEED_INDETERMINATED, -1         }
10343 +       };
10344 +
10345 +       ecmd->phy_address = port;
10346 +       ecmd->speed       = SpeedConfMap[pPort->PLinkSpeedUsed][1];
10347 +       ecmd->duplex      = DuplexAutoNegConfMap[pPort->PLinkModeStatus][1];
10348 +       ecmd->autoneg     = DuplexAutoNegConfMap[pPort->PLinkModeStatus][2];
10349 +       ecmd->transceiver = XCVR_INTERNAL;
10350 +
10351 +       if (pAC->GIni.GICopperType) {
10352 +               ecmd->port        = PORT_TP;
10353 +               ecmd->supported   = (SUPP_COPPER_ALL|SUPPORTED_Autoneg);
10354 +               if (pAC->GIni.GIGenesis) {
10355 +                       ecmd->supported &= ~(SUPPORTED_10baseT_Half);
10356 +                       ecmd->supported &= ~(SUPPORTED_10baseT_Full);
10357 +                       ecmd->supported &= ~(SUPPORTED_100baseT_Half);
10358 +                       ecmd->supported &= ~(SUPPORTED_100baseT_Full);
10359 +               } else {
10360 +                       if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
10361 +                               ecmd->supported &= ~(SUPPORTED_1000baseT_Half);
10362 +                       }
10363 +                       if (pAC->GIni.GIChipId == CHIP_ID_YUKON_FE) {
10364 +                               ecmd->supported &= ~(SUPPORTED_1000baseT_Half);
10365 +                               ecmd->supported &= ~(SUPPORTED_1000baseT_Full);
10366 +                       }
10367 +               }
10368 +               if (pAC->GIni.GP[0].PLinkSpeed != SK_LSPEED_AUTO) {
10369 +                       ecmd->advertising = AdvSpeedMap[pPort->PLinkSpeed][1];
10370 +                       if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
10371 +                               ecmd->advertising &= ~(SUPPORTED_1000baseT_Half);
10372 +                       }
10373 +               } else {
10374 +                       ecmd->advertising = ecmd->supported;
10375 +               }
10376 +               if (ecmd->autoneg == AUTONEG_ENABLE) {
10377 +                       ecmd->advertising |= ADVERTISED_Autoneg;
10378 +               }
10379 +       } else {
10380 +               ecmd->port        = PORT_FIBRE;
10381 +               ecmd->supported   = (SUPP_FIBRE_ALL);
10382 +               ecmd->advertising = (ADV_FIBRE_ALL);
10383 +       }
10384 +}
10385 +#endif
10386 +
10387 +#ifdef ETHTOOL_SSET
10388 +/*****************************************************************************
10389 + *
10390 + *     setSettings - configures the settings of a selected adapter
10391 + *
10392 + * Description:
10393 + *     Possible settings that may be altered are a)speed, b)duplex or
10394 + *     c)autonegotiation.
10395 + *
10396 + * Returns:
10397 + *     ==0:    everything fine, no error
10398 + *     !=0:    the return value is the error code of the failure
10399 + */
10400 +static int setSettings(
10401 +SK_AC              *pAC,  /* pointer to adapter control context    */
10402 +int                 port, /* the port of the selected adapter      */
10403 +struct ethtool_cmd *ecmd) /* command structure containing settings */
10404 +{
10405 +       DEV_NET     *pNet  = (DEV_NET *) pAC->dev[port]->priv;
10406 +       SK_U32       Instance;
10407 +       char         Buf[4];
10408 +       unsigned int Len = 1;
10409 +       int Ret;
10410 +
10411 +       if (port == 0) {
10412 +               Instance = (pAC->RlmtNets == 2) ? 1 : 2;
10413 +       } else {
10414 +               Instance = (pAC->RlmtNets == 2) ? 2 : 3;
10415 +       }
10416 +
10417 +       if (((ecmd->autoneg == AUTONEG_DISABLE) || (ecmd->autoneg == AUTONEG_ENABLE)) &&
10418 +           ((ecmd->duplex == DUPLEX_FULL) || (ecmd->duplex == DUPLEX_HALF))) {
10419 +               if (ecmd->autoneg == AUTONEG_DISABLE) {
10420 +                       if (ecmd->duplex == DUPLEX_FULL) {
10421 +                               *Buf = (char) SK_LMODE_FULL;
10422 +                       } else {
10423 +                               *Buf = (char) SK_LMODE_HALF;
10424 +                       }
10425 +               } else {
10426 +                       if (ecmd->duplex == DUPLEX_FULL) {
10427 +                               *Buf = (char) SK_LMODE_AUTOFULL;
10428 +                       } else {
10429 +                               *Buf = (char) SK_LMODE_AUTOHALF;
10430 +                       }
10431 +               }
10432 +
10433 +               Ret = SkPnmiSetVar(pAC, pAC->IoBase, OID_SKGE_LINK_MODE,
10434 +                                       &Buf, &Len, Instance, pNet->NetNr);
10435 +
10436 +               if (Ret != SK_PNMI_ERR_OK) {
10437 +                       return -EINVAL;
10438 +               }
10439 +       }
10440 +
10441 +       if ((ecmd->speed == SPEED_1000) ||
10442 +           (ecmd->speed == SPEED_100)  ||
10443 +           (ecmd->speed == SPEED_10)) {
10444 +               if (ecmd->speed == SPEED_1000) {
10445 +                       *Buf = (char) SK_LSPEED_1000MBPS;
10446 +               } else if (ecmd->speed == SPEED_100) {
10447 +                       *Buf = (char) SK_LSPEED_100MBPS;
10448 +               } else {
10449 +                       *Buf = (char) SK_LSPEED_10MBPS;
10450 +               }
10451 +
10452 +               Ret = SkPnmiSetVar(pAC, pAC->IoBase, OID_SKGE_SPEED_MODE,
10453 +                                       &Buf, &Len, Instance, pNet->NetNr);
10454 +
10455 +               if (Ret != SK_PNMI_ERR_OK) {
10456 +                       return -EINVAL;
10457 +               }
10458 +       } else {
10459 +               return -EINVAL;
10460 +       }
10461 +       return 0;
10462 +}
10463 +#endif
10464 +
10465 +#ifdef ETHTOOL_GPAUSEPARAM
10466 +/*****************************************************************************
10467 + *
10468 + *     getPauseParams - retrieves the pause parameters
10469 + *
10470 + * Description:
10471 + *     All current pause parameters of a selected adapter are placed
10472 + *     in the passed ethtool_pauseparam structure and are returned.
10473 + *
10474 + * Returns:    N/A
10475 + *
10476 + */
10477 +static void getPauseParams(
10478 +SK_AC                     *pAC,    /* pointer to adapter control context */
10479 +int                        port,   /* the port of the selected adapter   */
10480 +struct ethtool_pauseparam *epause) /* pause parameter struct for result  */
10481 +{
10482 +       SK_GEPORT *pPort            = &pAC->GIni.GP[port];
10483 +
10484 +       epause->rx_pause = 0;
10485 +       epause->tx_pause = 0;
10486 +
10487 +       if (pPort->PFlowCtrlMode == SK_FLOW_MODE_LOC_SEND) {
10488 +               epause->tx_pause = 1;
10489 +       }
10490 +       if ((pPort->PFlowCtrlMode == SK_FLOW_MODE_SYMMETRIC) ||
10491 +           (pPort->PFlowCtrlMode == SK_FLOW_MODE_SYM_OR_REM)) {
10492 +               epause->tx_pause = 1;
10493 +               epause->rx_pause = 1;
10494 +       }
10495 +
10496 +       if ((epause->rx_pause == 0) && (epause->tx_pause == 0)) {
10497 +               epause->autoneg = SK_FALSE;
10498 +       } else {
10499 +               epause->autoneg = SK_TRUE;
10500 +       }
10501 +}
10502 +#endif
10503 +
10504 +#ifdef ETHTOOL_SPAUSEPARAM
10505 +/*****************************************************************************
10506 + *
10507 + *     setPauseParams - configures the pause parameters of an adapter
10508 + *
10509 + * Description:
10510 + *     This function sets the Rx or Tx pause parameters
10511 + *
10512 + * Returns:
10513 + *     ==0:    everything fine, no error
10514 + *     !=0:    the return value is the error code of the failure
10515 + */
10516 +static int setPauseParams(
10517 +SK_AC                     *pAC,    /* pointer to adapter control context */
10518 +int                        port,   /* the port of the selected adapter   */
10519 +struct ethtool_pauseparam *epause) /* pause parameter struct with params */
10520 +{
10521 +       SK_GEPORT *pPort            = &pAC->GIni.GP[port];
10522 +       DEV_NET   *pNet             = (DEV_NET *) pAC->dev[port]->priv;
10523 +       int        PrevSpeedVal     = pPort->PLinkSpeedUsed;
10524 +
10525 +       SK_U32         Instance;
10526 +       char           Buf[4];
10527 +       int            Ret;
10528 +       SK_BOOL        prevAutonegValue = SK_TRUE;
10529 +       int            prevTxPause      = 0;
10530 +       int            prevRxPause      = 0;
10531 +       unsigned int   Len              = 1;
10532 +
10533 +        if (port == 0) {
10534 +                Instance = (pAC->RlmtNets == 2) ? 1 : 2;
10535 +        } else {
10536 +                Instance = (pAC->RlmtNets == 2) ? 2 : 3;
10537 +        }
10538 +
10539 +       /*
10540 +       ** we have to determine the current settings to see if
10541 +       ** the operator requested any modification of the flow
10542 +       ** control parameters...
10543 +       */
10544 +       if (pPort->PFlowCtrlMode == SK_FLOW_MODE_LOC_SEND) {
10545 +               prevTxPause = 1;
10546 +       }
10547 +       if ((pPort->PFlowCtrlMode == SK_FLOW_MODE_SYMMETRIC) ||
10548 +           (pPort->PFlowCtrlMode == SK_FLOW_MODE_SYM_OR_REM)) {
10549 +               prevTxPause = 1;
10550 +               prevRxPause = 1;
10551 +       }
10552 +
10553 +       if ((prevRxPause == 0) && (prevTxPause == 0)) {
10554 +               prevAutonegValue = SK_FALSE;
10555 +       }
10556 +
10557 +
10558 +       /*
10559 +       ** perform modifications regarding the changes
10560 +       ** requested by the operator
10561 +       */
10562 +       if (epause->autoneg != prevAutonegValue) {
10563 +               if (epause->autoneg == AUTONEG_DISABLE) {
10564 +                       *Buf = (char) SK_FLOW_MODE_NONE;
10565 +               } else {
10566 +                       *Buf = (char) SK_FLOW_MODE_SYMMETRIC;
10567 +               }
10568 +       } else {
10569 +               if(epause->rx_pause && epause->tx_pause) {
10570 +                       *Buf = (char) SK_FLOW_MODE_SYMMETRIC;
10571 +               } else if (epause->rx_pause && !epause->tx_pause) {
10572 +                       *Buf = (char) SK_FLOW_MODE_SYM_OR_REM;
10573 +               } else if(!epause->rx_pause && epause->tx_pause) {
10574 +                       *Buf = (char) SK_FLOW_MODE_LOC_SEND;
10575 +               } else {
10576 +                       *Buf = (char) SK_FLOW_MODE_NONE;
10577 +               }
10578 +       }
10579 +
10580 +       Ret = SkPnmiSetVar(pAC, pAC->IoBase, OID_SKGE_FLOWCTRL_MODE,
10581 +                       &Buf, &Len, Instance, pNet->NetNr);
10582 +
10583 +       if (Ret != SK_PNMI_ERR_OK) {
10584 +               SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_CTRL,
10585 +               ("ethtool (sk98lin): error changing rx/tx pause (%i)\n", Ret));
10586 +       }  else {
10587 +               Len = 1; /* set buffer length to correct value */
10588 +       }
10589 +
10590 +       /*
10591 +       ** It may be that autoneg has been disabled! Therefore
10592 +       ** set the speed to the previously used value...
10593 +       */
10594 +       *Buf = (char) PrevSpeedVal;
10595 +
10596 +       Ret = SkPnmiSetVar(pAC, pAC->IoBase, OID_SKGE_SPEED_MODE,
10597 +                       &Buf, &Len, Instance, pNet->NetNr);
10598 +
10599 +       if (Ret != SK_PNMI_ERR_OK) {
10600 +               SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_CTRL,
10601 +               ("ethtool (sk98lin): error setting speed (%i)\n", Ret));
10602 +       }
10603 +        return 0;
10604 +}
10605 +#endif
10606 +
10607 +#ifdef ETHTOOL_GCOALESCE
10608 +/*****************************************************************************
10609 + *
10610 + *     getModerationParams - retrieves the IRQ moderation settings
10611 + *
10612 + * Description:
10613 + *     All current IRQ moderation settings of a selected adapter are placed
10614 + *     in the passed ethtool_coalesce structure and are returned.
10615 + *
10616 + * Returns:    N/A
10617 + *
10618 + */
10619 +static void getModerationParams(
10620 +SK_AC                   *pAC,      /* pointer to adapter control context */
10621 +int                      port,     /* the port of the selected adapter   */
10622 +struct ethtool_coalesce *ecoalesc) /* IRQ moderation struct for results  */
10623 +{
10624 +       DIM_INFO *Info = &pAC->DynIrqModInfo;
10625 +       SK_BOOL UseTxIrqModeration = SK_FALSE;
10626 +       SK_BOOL UseRxIrqModeration = SK_FALSE;
10627 +
10628 +       if (Info->IntModTypeSelect != C_INT_MOD_NONE) {
10629 +               if (CHIP_ID_YUKON_2(pAC)) {
10630 +                       UseRxIrqModeration = SK_TRUE;
10631 +                       UseTxIrqModeration = SK_TRUE;
10632 +               } else {
10633 +                       if ((Info->MaskIrqModeration == IRQ_MASK_RX_ONLY) ||
10634 +                           (Info->MaskIrqModeration == IRQ_MASK_SP_RX)   ||
10635 +                           (Info->MaskIrqModeration == IRQ_MASK_RX_TX_SP)) {
10636 +                               UseRxIrqModeration = SK_TRUE;
10637 +                       }
10638 +                       if ((Info->MaskIrqModeration == IRQ_MASK_TX_ONLY) ||
10639 +                           (Info->MaskIrqModeration == IRQ_MASK_SP_TX)   ||
10640 +                           (Info->MaskIrqModeration == IRQ_MASK_RX_TX_SP)) {
10641 +                               UseTxIrqModeration = SK_TRUE;
10642 +                       }
10643 +               }
10644 +
10645 +               if (UseRxIrqModeration) {
10646 +                       ecoalesc->rx_coalesce_usecs = 1000000 / Info->MaxModIntsPerSec;
10647 +               }
10648 +               if (UseTxIrqModeration) {
10649 +                       ecoalesc->tx_coalesce_usecs = 1000000 / Info->MaxModIntsPerSec;
10650 +               }
10651 +               if (Info->IntModTypeSelect == C_INT_MOD_DYNAMIC) {
10652 +                       ecoalesc->rate_sample_interval = Info->DynIrqModSampleInterval;
10653 +                       if (UseRxIrqModeration) {
10654 +                               ecoalesc->use_adaptive_rx_coalesce = 1;
10655 +                               ecoalesc->rx_coalesce_usecs_low =
10656 +                                       1000000 / Info->MaxModIntsPerSecLowerLimit;
10657 +                               ecoalesc->rx_coalesce_usecs_high =
10658 +                                       1000000 / Info->MaxModIntsPerSecUpperLimit;
10659 +                       }
10660 +                       if (UseTxIrqModeration) {
10661 +                               ecoalesc->use_adaptive_tx_coalesce = 1;
10662 +                               ecoalesc->tx_coalesce_usecs_low =
10663 +                                       1000000 / Info->MaxModIntsPerSecLowerLimit;
10664 +                               ecoalesc->tx_coalesce_usecs_high =
10665 +                                       1000000 / Info->MaxModIntsPerSecUpperLimit;
10666 +                       }
10667 +               }
10668 +       }
10669 +}
10670 +#endif
10671 +
10672 +#ifdef ETHTOOL_SCOALESCE
10673 +/*****************************************************************************
10674 + *
10675 + *     setModerationParams - configures the IRQ moderation of an adapter
10676 + *
10677 + * Description:
10678 + *     Depending on the desired IRQ moderation parameters, either a) static,
10679 + *     b) dynamic or c) no moderation is configured.
10680 + *
10681 + * Returns:
10682 + *     ==0:    everything fine, no error
10683 + *     !=0:    the return value is the error code of the failure
10684 + *
10685 + * Notes:
10686 + *     The supported timeframe for the coalesced interrupts ranges from
10687 + *     33.333us (30 IntsPerSec) down to 25us (40.000 IntsPerSec).
10688 + *     Any requested value that is not in this range will abort the request!
10689 + */
10690 +static int setModerationParams(
10691 +SK_AC                   *pAC,      /* pointer to adapter control context */
10692 +int                      port,     /* the port of the selected adapter   */
10693 +struct ethtool_coalesce *ecoalesc) /* IRQ moderation struct with params  */
10694 +{
10695 +       DIM_INFO  *Info             = &pAC->DynIrqModInfo;
10696 +       int        PrevModeration   = Info->IntModTypeSelect;
10697 +
10698 +       Info->IntModTypeSelect = C_INT_MOD_NONE; /* initial default */
10699 +
10700 +       if ((ecoalesc->rx_coalesce_usecs) || (ecoalesc->tx_coalesce_usecs)) {
10701 +               if (ecoalesc->rx_coalesce_usecs) {
10702 +                       if ((ecoalesc->rx_coalesce_usecs < 25) ||
10703 +                           (ecoalesc->rx_coalesce_usecs > 33333)) {
10704 +                               return -EINVAL;
10705 +                       }
10706 +               }
10707 +               if (ecoalesc->tx_coalesce_usecs) {
10708 +                       if ((ecoalesc->tx_coalesce_usecs < 25) ||
10709 +                           (ecoalesc->tx_coalesce_usecs > 33333)) {
10710 +                               return -EINVAL;
10711 +                       }
10712 +               }
10713 +               if (!CHIP_ID_YUKON_2(pAC)) {
10714 +                       if ((Info->MaskIrqModeration == IRQ_MASK_SP_RX) ||
10715 +                           (Info->MaskIrqModeration == IRQ_MASK_SP_TX) ||
10716 +                           (Info->MaskIrqModeration == IRQ_MASK_RX_TX_SP)) {
10717 +                               Info->MaskIrqModeration = IRQ_MASK_SP_ONLY;
10718 +                       }
10719 +               }
10720 +               Info->IntModTypeSelect = C_INT_MOD_STATIC;
10721 +               if (ecoalesc->rx_coalesce_usecs) {
10722 +                       Info->MaxModIntsPerSec =
10723 +                               1000000 / ecoalesc->rx_coalesce_usecs;
10724 +                       if (!CHIP_ID_YUKON_2(pAC)) {
10725 +                               if (Info->MaskIrqModeration == IRQ_MASK_TX_ONLY) {
10726 +                                       Info->MaskIrqModeration = IRQ_MASK_TX_RX;
10727 +                               }
10728 +                               if (Info->MaskIrqModeration == IRQ_MASK_SP_ONLY) {
10729 +                                       Info->MaskIrqModeration = IRQ_MASK_SP_RX;
10730 +                               }
10731 +                               if (Info->MaskIrqModeration == IRQ_MASK_SP_TX) {
10732 +                                       Info->MaskIrqModeration = IRQ_MASK_RX_TX_SP;
10733 +                               }
10734 +                       } else {
10735 +                               Info->MaskIrqModeration = Y2_IRQ_MASK;
10736 +                       }
10737 +               }
10738 +               if (ecoalesc->tx_coalesce_usecs) {
10739 +                       Info->MaxModIntsPerSec =
10740 +                               1000000 / ecoalesc->tx_coalesce_usecs;
10741 +                       if (!CHIP_ID_YUKON_2(pAC)) {
10742 +                               if (Info->MaskIrqModeration == IRQ_MASK_RX_ONLY) {
10743 +                                       Info->MaskIrqModeration = IRQ_MASK_TX_RX;
10744 +                               }
10745 +                               if (Info->MaskIrqModeration == IRQ_MASK_SP_ONLY) {
10746 +                                       Info->MaskIrqModeration = IRQ_MASK_SP_TX;
10747 +                               }
10748 +                               if (Info->MaskIrqModeration == IRQ_MASK_SP_RX) {
10749 +                                       Info->MaskIrqModeration = IRQ_MASK_RX_TX_SP;
10750 +                               }
10751 +                       } else {
10752 +                               Info->MaskIrqModeration = Y2_IRQ_MASK;
10753 +                       }
10754 +               }
10755 +       }
10756 +       if ((ecoalesc->rate_sample_interval)  ||
10757 +           (ecoalesc->rx_coalesce_usecs_low) ||
10758 +           (ecoalesc->tx_coalesce_usecs_low) ||
10759 +           (ecoalesc->rx_coalesce_usecs_high)||
10760 +           (ecoalesc->tx_coalesce_usecs_high)) {
10761 +               if (ecoalesc->rate_sample_interval) {
10762 +                       if ((ecoalesc->rate_sample_interval < 1) ||
10763 +                           (ecoalesc->rate_sample_interval > 10)) {
10764 +                               return -EINVAL;
10765 +                       }
10766 +               }
10767 +               if (ecoalesc->rx_coalesce_usecs_low) {
10768 +                       if ((ecoalesc->rx_coalesce_usecs_low < 25) ||
10769 +                           (ecoalesc->rx_coalesce_usecs_low > 33333)) {
10770 +                               return -EINVAL;
10771 +                       }
10772 +               }
10773 +               if (ecoalesc->rx_coalesce_usecs_high) {
10774 +                       if ((ecoalesc->rx_coalesce_usecs_high < 25) ||
10775 +                           (ecoalesc->rx_coalesce_usecs_high > 33333)) {
10776 +                               return -EINVAL;
10777 +                       }
10778 +               }
10779 +               if (ecoalesc->tx_coalesce_usecs_low) {
10780 +                       if ((ecoalesc->tx_coalesce_usecs_low < 25) ||
10781 +                           (ecoalesc->tx_coalesce_usecs_low > 33333)) {
10782 +                               return -EINVAL;
10783 +                       }
10784 +               }
10785 +               if (ecoalesc->tx_coalesce_usecs_high) {
10786 +                       if ((ecoalesc->tx_coalesce_usecs_high < 25) ||
10787 +                           (ecoalesc->tx_coalesce_usecs_high > 33333)) {
10788 +                               return -EINVAL;
10789 +                       }
10790 +               }
10791 +
10792 +               Info->IntModTypeSelect = C_INT_MOD_DYNAMIC;
10793 +               if (ecoalesc->rate_sample_interval) {
10794 +                       Info->DynIrqModSampleInterval =
10795 +                               ecoalesc->rate_sample_interval;
10796 +               }
10797 +               if (ecoalesc->rx_coalesce_usecs_low) {
10798 +                       Info->MaxModIntsPerSecLowerLimit =
10799 +                               1000000 / ecoalesc->rx_coalesce_usecs_low;
10800 +               }
10801 +               if (ecoalesc->tx_coalesce_usecs_low) {
10802 +                       Info->MaxModIntsPerSecLowerLimit =
10803 +                               1000000 / ecoalesc->tx_coalesce_usecs_low;
10804 +               }
10805 +               if (ecoalesc->rx_coalesce_usecs_high) {
10806 +                       Info->MaxModIntsPerSecUpperLimit =
10807 +                               1000000 / ecoalesc->rx_coalesce_usecs_high;
10808 +               }
10809 +               if (ecoalesc->tx_coalesce_usecs_high) {
10810 +                       Info->MaxModIntsPerSecUpperLimit =
10811 +                               1000000 / ecoalesc->tx_coalesce_usecs_high;
10812 +               }
10813 +       }
10814 +
10815 +       if ((PrevModeration         == C_INT_MOD_NONE) &&
10816 +           (Info->IntModTypeSelect != C_INT_MOD_NONE)) {
10817 +               SkDimEnableModerationIfNeeded(pAC);
10818 +       }
10819 +       if (PrevModeration != C_INT_MOD_NONE) {
10820 +               SkDimDisableModeration(pAC, PrevModeration);
10821 +               if (Info->IntModTypeSelect != C_INT_MOD_NONE) {
10822 +                       SkDimEnableModerationIfNeeded(pAC);
10823 +               }
10824 +       }
10825 +
10826 +        return 0;
10827 +}
10828 +#endif
10829 +
10830 +#ifdef ETHTOOL_GWOL
10831 +/*****************************************************************************
10832 + *
10833 + *     getWOLsettings - retrieves the WOL settings of the selected adapter
10834 + *
10835 + * Description:
10836 + *     All current WOL settings of a selected adapter are placed in the
10837 + *     passed ethtool_wolinfo structure and are returned to the caller.
10838 + *
10839 + * Returns:    N/A
10840 + *
10841 + */
10842 +static void getWOLsettings(
10843 +SK_AC                  *pAC,  /* pointer to adapter control context  */
10844 +int                     port, /* the port of the selected adapter    */
10845 +struct ethtool_wolinfo *ewol) /* mandatory WOL structure for results */
10846 +{
10847 +       ewol->supported = pAC->WolInfo.SupportedWolOptions;
10848 +       ewol->wolopts   = pAC->WolInfo.ConfiguredWolOptions;
10849 +
10850 +       return;
10851 +}
10852 +#endif
10853 +
10854 +#ifdef ETHTOOL_SWOL
10855 +/*****************************************************************************
10856 + *
10857 + *     setWOLsettings - configures the WOL settings of a selected adapter
10858 + *
10859 + * Description:
10860 + *     The WOL settings of a selected adapter are configured regarding
10861 + *     the parameters in the passed ethtool_wolinfo structure.
10862 + *     Note that currently only wake on magic packet is supported!
10863 + *
10864 + * Returns:
10865 + *     ==0:    everything fine, no error
10866 + *     !=0:    the return value is the error code of the failure
10867 + */
10868 +static int setWOLsettings(
10869 +SK_AC                  *pAC,  /* pointer to adapter control context */
10870 +int                     port, /* the port of the selected adapter   */
10871 +struct ethtool_wolinfo *ewol) /* WOL structure containing settings  */
10872 +{
10873 +       if (((ewol->wolopts & WAKE_MAGIC) == WAKE_MAGIC) || (ewol->wolopts == 0)) {
10874 +               pAC->WolInfo.ConfiguredWolOptions = ewol->wolopts;
10875 +               return 0;
10876 +       }
10877 +       return -EFAULT;
10878 +}
10879 +#endif
10880 +
10881 +#ifdef ETHTOOL_GDRVINFO
10882 +/*****************************************************************************
10883 + *
10884 + *     getDriverInfo - returns generic driver and adapter information
10885 + *
10886 + * Description:
10887 + *     Generic driver information is returned via this function, such as
10888 + *     the name of the driver, its version and and firmware version.
10889 + *     In addition to this, the location of the selected adapter is
10890 + *     returned as a bus info string (e.g. '01:05.0').
10891 + *
10892 + * Returns:    N/A
10893 + *
10894 + */
10895 +static void getDriverInfo(
10896 +SK_AC                  *pAC,      /* pointer to adapter control context   */
10897 +int                     port,     /* the port of the selected adapter     */
10898 +struct ethtool_drvinfo *edrvinfo) /* mandatory info structure for results */
10899 +{
10900 +       char versionString[32];
10901 +
10902 +       snprintf(versionString, 32, "%s (%s)", VER_STRING, PATCHLEVEL);
10903 +       strncpy(edrvinfo->driver, DRIVER_FILE_NAME , 32);
10904 +       strncpy(edrvinfo->version, versionString , 32);
10905 +       strncpy(edrvinfo->fw_version, "N/A", 32);
10906 +       strncpy(edrvinfo->bus_info, pci_name(pAC->PciDev), 32);
10907 +
10908 +#ifdef  ETHTOOL_GSTATS
10909 +       edrvinfo->n_stats = SK98LIN_STATS_LEN;
10910 +#endif
10911 +}
10912 +#endif
10913 +
10914 +#ifdef ETHTOOL_PHYS_ID
10915 +/*****************************************************************************
10916 + *
10917 + *     startLocateNIC - start the locate NIC feature of the elected adapter
10918 + *
10919 + * Description:
10920 + *     This function is used if the user want to locate a particular NIC.
10921 + *     All LEDs are regularly switched on and off, so the NIC can easily
10922 + *     be identified.
10923 + *
10924 + * Returns:
10925 + *     ==0:    everything fine, no error, locateNIC test was started
10926 + *     !=0:    one locateNIC test runs already
10927 + *
10928 + */
10929 +static int startLocateNIC(
10930 +SK_AC                *pAC,        /* pointer to adapter control context        */
10931 +int                   port,       /* the port of the selected adapter          */
10932 +struct ethtool_value *blinkSecs)  /* how long the LEDs should blink in seconds */
10933 +{
10934 +       struct SK_NET_DEVICE *pDev      = pAC->dev[port];
10935 +       int                   OtherPort = (port) ? 0 : 1;
10936 +       struct SK_NET_DEVICE *pOtherDev = pAC->dev[OtherPort];
10937 +
10938 +       if (isLocateNICrunning) {
10939 +               return -EFAULT;
10940 +       }
10941 +       isLocateNICrunning = SK_TRUE;
10942 +       currentPortIndex = port;
10943 +       isDualNetCard = (pDev != pOtherDev) ? SK_TRUE : SK_FALSE;
10944 +
10945 +       if (netif_running(pAC->dev[port])) {
10946 +               boardWasDown[0] = SK_FALSE;
10947 +       } else {
10948 +               (*pDev->open)(pDev);
10949 +               boardWasDown[0] = SK_TRUE;
10950 +       }
10951 +
10952 +       if (isDualNetCard) {
10953 +               if (netif_running(pAC->dev[OtherPort])) {
10954 +                       boardWasDown[1] = SK_FALSE;
10955 +               } else {
10956 +                       (*pOtherDev->open)(pOtherDev);
10957 +                       boardWasDown[1] = SK_TRUE;
10958 +               }
10959 +       }
10960 +
10961 +       if ((blinkSecs->data < 1) || (blinkSecs->data > 30)) {
10962 +               blinkSecs->data = 3; /* three seconds default */
10963 +       }
10964 +       nbrBlinkQuarterSeconds = 4*blinkSecs->data;
10965 +
10966 +       init_timer(&locateNICtimer);
10967 +       locateNICtimer.function = toggleLeds;
10968 +       locateNICtimer.data     = (unsigned long) pAC;
10969 +       locateNICtimer.expires  = jiffies + HZ; /* initially 1sec */
10970 +       add_timer(&locateNICtimer);
10971 +
10972 +       return 0;
10973 +}
10974 +
10975 +/*****************************************************************************
10976 + *
10977 + *     toggleLeds - Changes the LED state of an adapter
10978 + *
10979 + * Description:
10980 + *     This function changes the current state of all LEDs of an adapter so
10981 + *     that it can be located by a user. If the requested time interval for
10982 + *     this test has elapsed, this function cleans up everything that was
10983 + *     temporarily setup during the locate NIC test. This involves of course
10984 + *     also closing or opening any adapter so that the initial board state
10985 + *     is recovered.
10986 + *
10987 + * Returns:    N/A
10988 + *
10989 + */
10990 +static void toggleLeds(
10991 +unsigned long ptr)  /* holds the pointer to adapter control context */
10992 +{
10993 +       SK_AC                *pAC       = (SK_AC *) ptr;
10994 +       int                   port      = currentPortIndex;
10995 +       SK_IOC                IoC       = pAC->IoBase;
10996 +       struct SK_NET_DEVICE *pDev      = pAC->dev[port];
10997 +       int                   OtherPort = (port) ? 0 : 1;
10998 +       struct SK_NET_DEVICE *pOtherDev = pAC->dev[OtherPort];
10999 +
11000 +       SK_U16  YukLedOn = (PHY_M_LED_MO_DUP(MO_LED_ON)  |
11001 +                           PHY_M_LED_MO_10(MO_LED_ON)   |
11002 +                           PHY_M_LED_MO_100(MO_LED_ON)  |
11003 +                           PHY_M_LED_MO_1000(MO_LED_ON) |
11004 +                           PHY_M_LED_MO_RX(MO_LED_ON));
11005 +       SK_U16  YukLedOff = (PHY_M_LED_MO_DUP(MO_LED_OFF)  |
11006 +                            PHY_M_LED_MO_10(MO_LED_OFF)   |
11007 +                            PHY_M_LED_MO_100(MO_LED_OFF)  |
11008 +                            PHY_M_LED_MO_1000(MO_LED_OFF) |
11009 +                            PHY_M_LED_MO_RX(MO_LED_OFF));
11010 +
11011 +       nbrBlinkQuarterSeconds--;
11012 +       if (nbrBlinkQuarterSeconds <= 0) {
11013 +               (*pDev->stop)(pDev);
11014 +               if (isDualNetCard) {
11015 +                       (*pOtherDev->stop)(pOtherDev);
11016 +               }
11017 +
11018 +               if (!boardWasDown[0]) {
11019 +                       (*pDev->open)(pDev);
11020 +               }
11021 +               if (isDualNetCard) {
11022 +                       (*pOtherDev->open)(pOtherDev);
11023 +               }
11024 +               isDualNetCard      = SK_FALSE;
11025 +               isLocateNICrunning = SK_FALSE;
11026 +               return;
11027 +       }
11028 +
11029 +       doSwitchLEDsOn = (doSwitchLEDsOn) ? SK_FALSE : SK_TRUE;
11030 +       if (doSwitchLEDsOn) {
11031 +               if (pAC->GIni.GIGenesis) {
11032 +                       SK_OUT8(IoC,MR_ADDR(port,LNK_LED_REG),(SK_U8)SK_LNK_ON);
11033 +                       SkGeYellowLED(pAC,IoC,LED_ON >> 1);
11034 +                       SkGeXmitLED(pAC,IoC,MR_ADDR(port,RX_LED_INI),SK_LED_TST);
11035 +                       if (pAC->GIni.GP[port].PhyType == SK_PHY_BCOM) {
11036 +                               SkXmPhyWrite(pAC,IoC,port,PHY_BCOM_P_EXT_CTRL,PHY_B_PEC_LED_ON);
11037 +                       } else if (pAC->GIni.GP[port].PhyType == SK_PHY_LONE) {
11038 +                               SkXmPhyWrite(pAC,IoC,port,PHY_LONE_LED_CFG,0x0800);
11039 +                       } else {
11040 +                               SkGeXmitLED(pAC,IoC,MR_ADDR(port,TX_LED_INI),SK_LED_TST);
11041 +                       }
11042 +               } else {
11043 +                       SkGmPhyWrite(pAC,IoC,port,PHY_MARV_LED_CTRL,0);
11044 +                       SkGmPhyWrite(pAC,IoC,port,PHY_MARV_LED_OVER,YukLedOn);
11045 +               }
11046 +       } else {
11047 +               if (pAC->GIni.GIGenesis) {
11048 +                       SK_OUT8(IoC,MR_ADDR(port,LNK_LED_REG),(SK_U8)SK_LNK_OFF);
11049 +                       SkGeYellowLED(pAC,IoC,LED_OFF >> 1);
11050 +                       SkGeXmitLED(pAC,IoC,MR_ADDR(port,RX_LED_INI),SK_LED_DIS);
11051 +                       if (pAC->GIni.GP[port].PhyType == SK_PHY_BCOM) {
11052 +                               SkXmPhyWrite(pAC,IoC,port,PHY_BCOM_P_EXT_CTRL,PHY_B_PEC_LED_OFF);
11053 +                       } else if (pAC->GIni.GP[port].PhyType == SK_PHY_LONE) {
11054 +                               SkXmPhyWrite(pAC,IoC,port,PHY_LONE_LED_CFG,PHY_L_LC_LEDT);
11055 +                       } else {
11056 +                               SkGeXmitLED(pAC,IoC,MR_ADDR(port,TX_LED_INI),SK_LED_DIS);
11057 +                       }
11058 +               } else {
11059 +                       SkGmPhyWrite(pAC,IoC,port,PHY_MARV_LED_CTRL,0);
11060 +                       SkGmPhyWrite(pAC,IoC,port,PHY_MARV_LED_OVER,YukLedOff);
11061 +               }
11062 +       }
11063 +
11064 +       locateNICtimer.function = toggleLeds;
11065 +       locateNICtimer.data     = (unsigned long) pAC;
11066 +       locateNICtimer.expires  = jiffies + (HZ/4); /* 250ms */
11067 +       add_timer(&locateNICtimer);
11068 +}
11069 +#endif
11070 +
11071 +/*****************************************************************************
11072 + *
11073 + *     getPortNumber - evaluates the port number of an interface
11074 + *
11075 + * Description:
11076 + *     It may be that the current interface refers to one which is located
11077 + *     on a dual net adapter. Hence, this function will return the correct
11078 + *     port for further use.
11079 + *
11080 + * Returns:
11081 + *     the port number that corresponds to the selected adapter
11082 + *
11083 + */
11084 +static int getPortNumber(
11085 +struct net_device *netdev,  /* the pointer to netdev structure       */
11086 +struct ifreq      *ifr)     /* what interface the request refers to? */
11087 +{
11088 +       DEV_NET *pNet = (DEV_NET*) netdev->priv;
11089 +       SK_AC   *pAC  = pNet->pAC;
11090 +
11091 +       if (pAC->dev[1] != pAC->dev[0]) {
11092 +               if (!strcmp(pAC->dev[1]->name, ifr->ifr_name)) {
11093 +                       return 1; /* port index 1 */
11094 +               }
11095 +       }
11096 +       return 0;
11097 +}
11098 +
11099 +/*******************************************************************************
11100 + *
11101 + * End of file
11102 + *
11103 + ******************************************************************************/
11104 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/skge.c linux-2.6.9.new/drivers/net/sk98lin/skge.c
11105 --- linux-2.6.9.old/drivers/net/sk98lin/skge.c  2006-08-01 06:23:10.000000000 +0800
11106 +++ linux-2.6.9.new/drivers/net/sk98lin/skge.c  2006-12-07 14:35:03.000000000 +0800
11107 @@ -1,32 +1,26 @@
11108  /******************************************************************************
11109   *
11110 - * Name:       skge.c
11111 - * Project:    GEnesis, PCI Gigabit Ethernet Adapter
11112 - * Version:    $Revision: 1.45 $
11113 - * Date:               $Date: 2004/02/12 14:41:02 $
11114 - * Purpose:    The main driver source module
11115 + * Name:        skge.c
11116 + * Project:     GEnesis, PCI Gigabit Ethernet Adapter
11117 + * Version:     $Revision: 1.60.2.51 $
11118 + * Date:        $Date: 2005/06/17 14:09:14 $
11119 + * Purpose:     The main driver source module
11120   *
11121   ******************************************************************************/
11122
11123  /******************************************************************************
11124   *
11125   *     (C)Copyright 1998-2002 SysKonnect GmbH.
11126 - *     (C)Copyright 2002-2003 Marvell.
11127 + *     (C)Copyright 2002-2005 Marvell.
11128   *
11129   *     Driver for Marvell Yukon chipset and SysKonnect Gigabit Ethernet
11130   *      Server Adapters.
11131   *
11132 - *     Created 10-Feb-1999, based on Linux' acenic.c, 3c59x.c and
11133 - *     SysKonnects GEnesis Solaris driver
11134 - *     Author: Christoph Goos (cgoos@syskonnect.de)
11135 - *             Mirko Lindner (mlindner@syskonnect.de)
11136 + *     Author: Mirko Lindner (mlindner@syskonnect.de)
11137 + *             Ralph Roesler (rroesler@syskonnect.de)
11138   *
11139   *     Address all question to: linux@syskonnect.de
11140   *
11141 - *     The technical manual for the adapters is available from SysKonnect's
11142 - *     web pages: www.syskonnect.com
11143 - *     Goto "Support" and search Knowledge Base for "manual".
11144 - *
11145   *     This program is free software; you can redistribute it and/or modify
11146   *     it under the terms of the GNU General Public License as published by
11147   *     the Free Software Foundation; either version 2 of the License, or
11148 @@ -38,71 +32,33 @@
11149
11150  /******************************************************************************
11151   *
11152 - * Possible compiler options (#define xxx / -Dxxx):
11153 - *
11154 - *     debugging can be enable by changing SK_DEBUG_CHKMOD and
11155 - *     SK_DEBUG_CHKCAT in makefile (described there).
11156 - *
11157 - ******************************************************************************/
11158 -
11159 -/******************************************************************************
11160 - *
11161   * Description:
11162   *
11163 - *     This is the main module of the Linux GE driver.
11164 - *
11165 - *     All source files except skge.c, skdrv1st.h, skdrv2nd.h and sktypes.h
11166 - *     are part of SysKonnect's COMMON MODULES for the SK-98xx adapters.
11167 - *     Those are used for drivers on multiple OS', so some thing may seem
11168 - *     unnecessary complicated on Linux. Please do not try to 'clean up'
11169 - *     them without VERY good reasons, because this will make it more
11170 - *     difficult to keep the Linux driver in synchronisation with the
11171 - *     other versions.
11172 - *
11173 - * Include file hierarchy:
11174 - *
11175 - *     <linux/module.h>
11176 - *
11177 - *     "h/skdrv1st.h"
11178 - *             <linux/types.h>
11179 - *             <linux/kernel.h>
11180 - *             <linux/string.h>
11181 - *             <linux/errno.h>
11182 - *             <linux/ioport.h>
11183 - *             <linux/slab.h>
11184 - *             <linux/interrupt.h>
11185 - *             <linux/pci.h>
11186 - *             <asm/byteorder.h>
11187 - *             <asm/bitops.h>
11188 - *             <asm/io.h>
11189 - *             <linux/netdevice.h>
11190 - *             <linux/etherdevice.h>
11191 - *             <linux/skbuff.h>
11192 - *         those three depending on kernel version used:
11193 - *             <linux/bios32.h>
11194 - *             <linux/init.h>
11195 - *             <asm/uaccess.h>
11196 - *             <net/checksum.h>
11197 - *
11198 - *             "h/skerror.h"
11199 - *             "h/skdebug.h"
11200 - *             "h/sktypes.h"
11201 - *             "h/lm80.h"
11202 - *             "h/xmac_ii.h"
11203 - *
11204 - *      "h/skdrv2nd.h"
11205 - *             "h/skqueue.h"
11206 - *             "h/skgehwt.h"
11207 - *             "h/sktimer.h"
11208 - *             "h/ski2c.h"
11209 - *             "h/skgepnmi.h"
11210 - *             "h/skvpd.h"
11211 - *             "h/skgehw.h"
11212 - *             "h/skgeinit.h"
11213 - *             "h/skaddr.h"
11214 - *             "h/skgesirq.h"
11215 - *             "h/skcsum.h"
11216 - *             "h/skrlmt.h"
11217 + *     All source files in this sk98lin directory except of the sk98lin
11218 + *     Linux specific files
11219 + *
11220 + *             - skdim.c
11221 + *             - skethtool.c
11222 + *             - skge.c
11223 + *             - skproc.c
11224 + *             - sky2.c
11225 + *             - Makefile
11226 + *             - h/skdrv1st.h
11227 + *             - h/skdrv2nd.h
11228 + *             - h/sktypes.h
11229 + *             - h/skversion.h
11230 + *
11231 + *     are part of SysKonnect's common modules for the SK-9xxx adapters.
11232 + *
11233 + *     Those common module files which are not Linux specific are used to
11234 + *     build drivers on different OS' (e.g. Windows, MAC OS) so that those
11235 + *     drivers are based on the same set of files
11236 + *
11237 + *     At a first glance, this seems to complicate things unnescessarily on
11238 + *     Linux, but please do not try to 'clean up' them without VERY good
11239 + *     reasons, because this will make it more difficult to keep the sk98lin
11240 + *     driver for Linux in synchronisation with the other drivers running on
11241 + *     other operating systems.
11242   *
11243   ******************************************************************************/
11244
11245 @@ -110,11 +66,19 @@
11246
11247  #include       <linux/module.h>
11248  #include       <linux/init.h>
11249 +#include       <linux/ethtool.h>
11250 +
11251 +#ifdef CONFIG_PROC_FS
11252  #include       <linux/proc_fs.h>
11253 +#endif
11254
11255  #include       "h/skdrv1st.h"
11256  #include       "h/skdrv2nd.h"
11257
11258 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,9)
11259 +#include       <linux/moduleparam.h>
11260 +#endif
11261 +
11262  /*******************************************************************************
11263   *
11264   * Defines
11265 @@ -124,62 +88,14 @@
11266  /* for debuging on x86 only */
11267  /* #define BREAKPOINT() asm(" int $3"); */
11268
11269 -/* use the transmit hw checksum driver functionality */
11270 -#define USE_SK_TX_CHECKSUM
11271 -
11272 -/* use the receive hw checksum driver functionality */
11273 -#define USE_SK_RX_CHECKSUM
11274 -
11275 -/* use the scatter-gather functionality with sendfile() */
11276 -#define SK_ZEROCOPY
11277 -
11278 -/* use of a transmit complete interrupt */
11279 -#define USE_TX_COMPLETE
11280 -
11281 -/*
11282 - * threshold for copying small receive frames
11283 - * set to 0 to avoid copying, set to 9001 to copy all frames
11284 - */
11285 -#define SK_COPY_THRESHOLD      50
11286 -
11287 -/* number of adapters that can be configured via command line params */
11288 -#define SK_MAX_CARD_PARAM      16
11289 -
11290 -
11291 -
11292 -/*
11293 - * use those defines for a compile-in version of the driver instead
11294 - * of command line parameters
11295 - */
11296 -// #define LINK_SPEED_A        {"Auto", }
11297 -// #define LINK_SPEED_B        {"Auto", }
11298 -// #define AUTO_NEG_A  {"Sense", }
11299 -// #define AUTO_NEG_B  {"Sense", }
11300 -// #define DUP_CAP_A   {"Both", }
11301 -// #define DUP_CAP_B   {"Both", }
11302 -// #define FLOW_CTRL_A {"SymOrRem", }
11303 -// #define FLOW_CTRL_B {"SymOrRem", }
11304 -// #define ROLE_A      {"Auto", }
11305 -// #define ROLE_B      {"Auto", }
11306 -// #define PREF_PORT   {"A", }
11307 -// #define CON_TYPE    {"Auto", }
11308 -// #define RLMT_MODE   {"CheckLinkState", }
11309 -
11310 -#define DEV_KFREE_SKB(skb) dev_kfree_skb(skb)
11311 -#define DEV_KFREE_SKB_IRQ(skb) dev_kfree_skb_irq(skb)
11312 -#define DEV_KFREE_SKB_ANY(skb) dev_kfree_skb_any(skb)
11313 -
11314
11315  /* Set blink mode*/
11316  #define OEM_CONFIG_VALUE (     SK_ACT_LED_BLINK | \
11317                                 SK_DUP_LED_NORMAL | \
11318                                 SK_LED_LINK100_ON)
11319
11320 -
11321 -/* Isr return value */
11322 -#define SkIsrRetVar    irqreturn_t
11323 -#define SkIsrRetNone   IRQ_NONE
11324 -#define SkIsrRetHandled        IRQ_HANDLED
11325 +#define CLEAR_AND_START_RX(Port) SK_OUT8(pAC->IoBase, RxQueueAddr[(Port)]+Q_CSR, CSR_START | CSR_IRQ_CL_F)
11326 +#define CLEAR_TX_IRQ(Port,Prio) SK_OUT8(pAC->IoBase, TxQueueAddr[(Port)][(Prio)]+Q_CSR, CSR_IRQ_CL_F)
11327
11328
11329  /*******************************************************************************
11330 @@ -188,12 +104,23 @@
11331   *
11332   ******************************************************************************/
11333
11334 +static int     __devinit sk98lin_init_device(struct pci_dev *pdev, const struct pci_device_id *ent);
11335 +static void    sk98lin_remove_device(struct pci_dev *pdev);
11336 +#ifdef CONFIG_PM
11337 +static int     sk98lin_suspend(struct pci_dev *pdev, u32 state);
11338 +static int     sk98lin_resume(struct pci_dev *pdev);
11339 +static void    SkEnableWOMagicPacket(SK_AC *pAC, SK_IOC IoC, SK_MAC_ADDR MacAddr);
11340 +#endif
11341 +#ifdef Y2_RECOVERY
11342 +static void    SkGeHandleKernelTimer(unsigned long ptr);
11343 +void           SkGeCheckTimer(DEV_NET *pNet);
11344 +#endif
11345  static void    FreeResources(struct SK_NET_DEVICE *dev);
11346  static int     SkGeBoardInit(struct SK_NET_DEVICE *dev, SK_AC *pAC);
11347  static SK_BOOL BoardAllocMem(SK_AC *pAC);
11348  static void    BoardFreeMem(SK_AC *pAC);
11349  static void    BoardInitMem(SK_AC *pAC);
11350 -static void    SetupRing(SK_AC*, void*, uintptr_t, RXD**, RXD**, RXD**, int*, SK_BOOL);
11351 +static void    SetupRing(SK_AC*, void*, uintptr_t, RXD**, RXD**, RXD**, int*, int*, SK_BOOL);
11352  static SkIsrRetVar     SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs);
11353  static SkIsrRetVar     SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs);
11354  static int     SkGeOpen(struct SK_NET_DEVICE *dev);
11355 @@ -209,24 +136,37 @@
11356  static void    FreeTxDescriptors(SK_AC*pAC, TX_PORT*);
11357  static void    FillRxRing(SK_AC*, RX_PORT*);
11358  static SK_BOOL FillRxDescriptor(SK_AC*, RX_PORT*);
11359 +#ifdef CONFIG_SK98LIN_NAPI
11360 +static int     SkGePoll(struct net_device *dev, int *budget);
11361 +static void    ReceiveIrq(SK_AC*, RX_PORT*, SK_BOOL, int*, int);
11362 +#else
11363  static void    ReceiveIrq(SK_AC*, RX_PORT*, SK_BOOL);
11364 -static void    ClearAndStartRx(SK_AC*, int);
11365 -static void    ClearTxIrq(SK_AC*, int, int);
11366 +#endif
11367 +#ifdef SK_POLL_CONTROLLER
11368 +static void    SkGeNetPoll(struct SK_NET_DEVICE *dev);
11369 +#endif
11370  static void    ClearRxRing(SK_AC*, RX_PORT*);
11371  static void    ClearTxRing(SK_AC*, TX_PORT*);
11372  static int     SkGeChangeMtu(struct SK_NET_DEVICE *dev, int new_mtu);
11373  static void    PortReInitBmu(SK_AC*, int);
11374  static int     SkGeIocMib(DEV_NET*, unsigned int, int);
11375  static int     SkGeInitPCI(SK_AC *pAC);
11376 -static void    StartDrvCleanupTimer(SK_AC *pAC);
11377 -static void    StopDrvCleanupTimer(SK_AC *pAC);
11378 -static int     XmitFrameSG(SK_AC*, TX_PORT*, struct sk_buff*);
11379 -
11380 -#ifdef SK_DIAG_SUPPORT
11381  static SK_U32   ParseDeviceNbrFromSlotName(const char *SlotName);
11382  static int      SkDrvInitAdapter(SK_AC *pAC, int devNbr);
11383  static int      SkDrvDeInitAdapter(SK_AC *pAC, int devNbr);
11384 -#endif
11385 +extern void    SkLocalEventQueue(      SK_AC *pAC,
11386 +                                       SK_U32 Class,
11387 +                                       SK_U32 Event,
11388 +                                       SK_U32 Param1,
11389 +                                       SK_U32 Param2,
11390 +                                       SK_BOOL Flag);
11391 +extern void    SkLocalEventQueue64(    SK_AC *pAC,
11392 +                                       SK_U32 Class,
11393 +                                       SK_U32 Event,
11394 +                                       SK_U64 Param,
11395 +                                       SK_BOOL Flag);
11396 +
11397 +static int     XmitFrameSG(SK_AC*, TX_PORT*, struct sk_buff*);
11398
11399  /*******************************************************************************
11400   *
11401 @@ -234,17 +174,33 @@
11402   *
11403   ******************************************************************************/
11404
11405 -#ifdef CONFIG_PROC_FS
11406 -static const char      SK_Root_Dir_entry[] = "sk98lin";
11407 -static struct          proc_dir_entry *pSkRootDir;
11408 -extern struct  file_operations sk_proc_fops;
11409 +extern SK_BOOL SkY2AllocateResources(SK_AC *pAC);
11410 +extern void SkY2FreeResources(SK_AC *pAC);
11411 +extern void SkY2AllocateRxBuffers(SK_AC *pAC,SK_IOC IoC,int Port);
11412 +extern void SkY2FreeRxBuffers(SK_AC *pAC,SK_IOC IoC,int Port);
11413 +extern void SkY2FreeTxBuffers(SK_AC *pAC,SK_IOC IoC,int Port);
11414 +extern SkIsrRetVar SkY2Isr(int irq,void *dev_id,struct pt_regs *ptregs);
11415 +extern int SkY2Xmit(struct sk_buff *skb,struct SK_NET_DEVICE *dev);
11416 +extern void SkY2PortStop(SK_AC *pAC,SK_IOC IoC,int Port,int Dir,int RstMode);
11417 +extern void SkY2PortStart(SK_AC *pAC,SK_IOC IoC,int Port);
11418 +extern int SkY2RlmtSend(SK_AC *pAC,int PortNr,struct sk_buff *pMessage);
11419 +extern void SkY2RestartStatusUnit(SK_AC *pAC);
11420 +#ifdef CONFIG_SK98LIN_NAPI
11421 +extern int SkY2Poll(struct net_device *dev, int *budget);
11422  #endif
11423
11424  extern void SkDimEnableModerationIfNeeded(SK_AC *pAC);
11425 -extern void SkDimDisplayModerationSettings(SK_AC *pAC);
11426  extern void SkDimStartModerationTimer(SK_AC *pAC);
11427  extern void SkDimModerate(SK_AC *pAC);
11428
11429 +extern int SkEthIoctl(struct net_device *netdev, struct ifreq *ifr);
11430 +
11431 +#ifdef CONFIG_PROC_FS
11432 +static const char      SK_Root_Dir_entry[] = "sk98lin";
11433 +static struct          proc_dir_entry *pSkRootDir;
11434 +extern struct  file_operations sk_proc_fops;
11435 +#endif
11436 +
11437  #ifdef DEBUG
11438  static void    DumpMsg(struct sk_buff*, char*);
11439  static void    DumpData(char*, int);
11440 @@ -252,12 +208,424 @@
11441  #endif
11442
11443  /* global variables *********************************************************/
11444 +static const char *BootString = BOOT_STRING;
11445  struct SK_NET_DEVICE *SkGeRootDev = NULL;
11446  static SK_BOOL DoPrintInterfaceChange = SK_TRUE;
11447
11448  /* local variables **********************************************************/
11449  static uintptr_t TxQueueAddr[SK_MAX_MACS][2] = {{0x680, 0x600},{0x780, 0x700}};
11450  static uintptr_t RxQueueAddr[SK_MAX_MACS] = {0x400, 0x480};
11451 +static int sk98lin_max_boards_found = 0;
11452 +
11453 +#ifdef CONFIG_PROC_FS
11454 +static struct proc_dir_entry   *pSkRootDir;
11455 +#endif
11456 +
11457 +
11458 +
11459 +static struct pci_device_id sk98lin_pci_tbl[] __devinitdata = {
11460 +/*     { pci_vendor_id, pci_device_id, * SAMPLE ENTRY! *
11461 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, */
11462 +       { 0x10b7, 0x1700, /* 3Com (10b7), Gigabit Ethernet Adapter */
11463 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11464 +       { 0x10b7, 0x80eb, /* 3Com (10b7), 3Com 3C940B Gigabit LOM Ethernet Adapter */
11465 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11466 +       { 0x1148, 0x4300, /* SysKonnect (1148), SK-98xx Gigabit Ethernet Server Adapter */
11467 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11468 +       { 0x1148, 0x4320, /* SysKonnect (1148), SK-98xx V2.0 Gigabit Ethernet Adapter */
11469 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11470 +       { 0x1148, 0x9000, /* SysKonnect (1148), SK-9Sxx 10/100/1000Base-T Server Adapter  */
11471 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11472 +       { 0x1148, 0x9E00, /* SysKonnect (1148), SK-9Exx 10/100/1000Base-T Adapter */
11473 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11474 +       { 0x1186, 0x4b00, /* D-Link (1186), Gigabit Ethernet Adapter */
11475 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11476 +       { 0x1186, 0x4b01, /* D-Link (1186), Gigabit Ethernet Adapter */
11477 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11478 +       { 0x1186, 0x4c00, /* D-Link (1186), Gigabit Ethernet Adapter */
11479 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11480 +       { 0x11ab, 0x4320, /* Marvell (11ab), Gigabit Ethernet Controller */
11481 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11482 +       { 0x11ab, 0x4340, /* Marvell (11ab), Gigabit Ethernet Controller  */
11483 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11484 +       { 0x11ab, 0x4341, /* Marvell (11ab), Gigabit Ethernet Controller  */
11485 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11486 +       { 0x11ab, 0x4342, /* Marvell (11ab), Gigabit Ethernet Controller  */
11487 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11488 +       { 0x11ab, 0x4343, /* Marvell (11ab), Gigabit Ethernet Controller  */
11489 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11490 +       { 0x11ab, 0x4344, /* Marvell (11ab), Gigabit Ethernet Controller  */
11491 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11492 +       { 0x11ab, 0x4345, /* Marvell (11ab), Gigabit Ethernet Controller  */
11493 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11494 +       { 0x11ab, 0x4346, /* Marvell (11ab), Gigabit Ethernet Controller  */
11495 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11496 +       { 0x11ab, 0x4347, /* Marvell (11ab), Gigabit Ethernet Controller  */
11497 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11498 +       { 0x11ab, 0x4350, /* Marvell (11ab), Fast Ethernet Controller */
11499 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11500 +       { 0x11ab, 0x4351, /* Marvell (11ab), Fast Ethernet Controller */
11501 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11502 +       { 0x11ab, 0x4360, /* Marvell (11ab), Gigabit Ethernet Controller */
11503 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11504 +       { 0x11ab, 0x4361, /* Marvell (11ab), Gigabit Ethernet Controller */
11505 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11506 +       { 0x11ab, 0x4362, /* Marvell (11ab), Gigabit Ethernet Controller */
11507 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11508 +       { 0x11ab, 0x5005, /* Marvell (11ab), Belkin */
11509 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11510 +       { 0x1371, 0x434e, /* CNet (1371), GigaCard Network Adapter */
11511 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11512 +       { 0x1737, 0x1032, /* Linksys (1737), Gigabit Network Adapter */
11513 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11514 +       { 0x1737, 0x1064, /* Linksys (1737), Gigabit Network Adapter */
11515 +         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
11516 +       { 0, }
11517 +};
11518 +
11519 +MODULE_DEVICE_TABLE(pci, sk98lin_pci_tbl);
11520 +
11521 +static struct pci_driver sk98lin_driver = {
11522 +       .name           = DRIVER_FILE_NAME,
11523 +       .id_table       = sk98lin_pci_tbl,
11524 +       .probe          = sk98lin_init_device,
11525 +       .remove         = __devexit_p(sk98lin_remove_device),
11526 +#ifdef CONFIG_PM
11527 +       .suspend        = sk98lin_suspend,
11528 +       .resume         = sk98lin_resume
11529 +#endif
11530 +};
11531 +
11532 +
11533 +/*****************************************************************************
11534 + *
11535 + *     sk98lin_init_device - initialize the adapter
11536 + *
11537 + * Description:
11538 + *     This function initializes the adapter. Resources for
11539 + *     the adapter are allocated and the adapter is brought into Init 1
11540 + *     state.
11541 + *
11542 + * Returns:
11543 + *     0, if everything is ok
11544 + *     !=0, on error
11545 + */
11546 +static int __devinit sk98lin_init_device(struct pci_dev *pdev,
11547 +                                 const struct pci_device_id *ent)
11548 +
11549 +{
11550 +       static SK_BOOL          sk98lin_boot_string = SK_FALSE;
11551 +       static SK_BOOL          sk98lin_proc_entry = SK_FALSE;
11552 +       static int              sk98lin_boards_found = 0;
11553 +       SK_AC                   *pAC;
11554 +       DEV_NET                 *pNet = NULL;
11555 +       struct SK_NET_DEVICE *dev = NULL;
11556 +       int                     retval;
11557 +#ifdef CONFIG_PROC_FS
11558 +       struct proc_dir_entry   *pProcFile;
11559 +#endif
11560 +
11561 +       retval = pci_enable_device(pdev);
11562 +       if (retval) {
11563 +               printk(KERN_ERR "Cannot enable PCI device, "
11564 +                       "aborting.\n");
11565 +               return retval;
11566 +       }
11567 +
11568 +       dev = NULL;
11569 +       pNet = NULL;
11570 +
11571 +
11572 +       /* INSERT * We have to find the power-management capabilities */
11573 +       /* Find power-management capability. */
11574 +
11575 +
11576 +
11577 +       /* Configure DMA attributes. */
11578 +       retval = pci_set_dma_mask(pdev, (u64) 0xffffffffffffffffULL);
11579 +       if (!retval) {
11580 +               retval = pci_set_dma_mask(pdev, (u64) 0xffffffff);
11581 +               if (retval)
11582 +                       return retval;
11583 +       } else {
11584 +               return retval;
11585 +       }
11586 +
11587 +
11588 +       if ((dev = alloc_etherdev(sizeof(DEV_NET))) == NULL) {
11589 +               printk(KERN_ERR "Unable to allocate etherdev "
11590 +                       "structure!\n");
11591 +               return -ENODEV;
11592 +       }
11593 +
11594 +       pNet = dev->priv;
11595 +       pNet->pAC = kmalloc(sizeof(SK_AC), GFP_KERNEL);
11596 +       if (pNet->pAC == NULL){
11597 +               free_netdev(dev);
11598 +               printk(KERN_ERR "Unable to allocate adapter "
11599 +                       "structure!\n");
11600 +               return -ENODEV;
11601 +       }
11602 +
11603 +
11604 +       /* Print message */
11605 +       if (!sk98lin_boot_string) {
11606 +               /* set display flag to TRUE so that */
11607 +               /* we only display this string ONCE */
11608 +               sk98lin_boot_string = SK_TRUE;
11609 +               printk("%s\n", BootString);
11610 +       }
11611 +
11612 +       memset(pNet->pAC, 0, sizeof(SK_AC));
11613 +       pAC = pNet->pAC;
11614 +       pAC->PciDev = pdev;
11615 +       pAC->PciDevId = pdev->device;
11616 +       pAC->dev[0] = dev;
11617 +       pAC->dev[1] = dev;
11618 +       sprintf(pAC->Name, "SysKonnect SK-98xx");
11619 +       pAC->CheckQueue = SK_FALSE;
11620 +
11621 +       dev->irq = pdev->irq;
11622 +       retval = SkGeInitPCI(pAC);
11623 +       if (retval) {
11624 +               printk("SKGE: PCI setup failed: %i\n", retval);
11625 +               free_netdev(dev);
11626 +               return -ENODEV;
11627 +       }
11628 +
11629 +       SET_MODULE_OWNER(dev);
11630 +
11631 +       dev->open               =  &SkGeOpen;
11632 +       dev->stop               =  &SkGeClose;
11633 +       dev->get_stats          =  &SkGeStats;
11634 +       dev->set_multicast_list =  &SkGeSetRxMode;
11635 +       dev->set_mac_address    =  &SkGeSetMacAddr;
11636 +       dev->do_ioctl           =  &SkGeIoctl;
11637 +       dev->change_mtu         =  &SkGeChangeMtu;
11638 +       dev->flags              &= ~IFF_RUNNING;
11639 +#ifdef SK_POLL_CONTROLLER
11640 +       dev->poll_controller    =  SkGeNetPoll;
11641 +#endif
11642 +       SET_NETDEV_DEV(dev, &pdev->dev);
11643 +
11644 +       pAC->Index = sk98lin_boards_found;
11645 +
11646 +       if (SkGeBoardInit(dev, pAC)) {
11647 +               free_netdev(dev);
11648 +               return -ENODEV;
11649 +       } else {
11650 +               ProductStr(pAC);
11651 +       }
11652 +
11653 +       /* shifter to later moment in time... */
11654 +       if (CHIP_ID_YUKON_2(pAC)) {
11655 +               dev->hard_start_xmit =  &SkY2Xmit;
11656 +#ifdef CONFIG_SK98LIN_NAPI
11657 +               dev->poll =  &SkY2Poll;
11658 +               dev->weight = 64;
11659 +#endif
11660 +       } else {
11661 +               dev->hard_start_xmit =  &SkGeXmit;
11662 +#ifdef CONFIG_SK98LIN_NAPI
11663 +               dev->poll =  &SkGePoll;
11664 +               dev->weight = 64;
11665 +#endif
11666 +       }
11667 +
11668 +#ifdef NETIF_F_TSO
11669 +#ifdef USE_SK_TSO_FEATURE
11670 +       if (CHIP_ID_YUKON_2(pAC)) {
11671 +               dev->features |= NETIF_F_TSO;
11672 +       }
11673 +#endif
11674 +#endif
11675 +#ifdef CONFIG_SK98LIN_ZEROCOPY
11676 +       if (pAC->GIni.GIChipId != CHIP_ID_GENESIS)
11677 +               dev->features |= NETIF_F_SG;
11678 +#endif
11679 +#ifdef USE_SK_TX_CHECKSUM
11680 +       if (pAC->GIni.GIChipId != CHIP_ID_GENESIS)
11681 +               dev->features |= NETIF_F_IP_CSUM;
11682 +#endif
11683 +#ifdef USE_SK_RX_CHECKSUM
11684 +       pAC->RxPort[0].UseRxCsum = SK_TRUE;
11685 +       if (pAC->GIni.GIMacsFound == 2 ) {
11686 +               pAC->RxPort[1].UseRxCsum = SK_TRUE;
11687 +       }
11688 +#endif
11689 +
11690 +       /* Save the hardware revision */
11691 +       pAC->HWRevision = (((pAC->GIni.GIPciHwRev >> 4) & 0x0F)*10) +
11692 +               (pAC->GIni.GIPciHwRev & 0x0F);
11693 +
11694 +       /* Set driver globals */
11695 +       pAC->Pnmi.pDriverFileName    = DRIVER_FILE_NAME;
11696 +       pAC->Pnmi.pDriverReleaseDate = DRIVER_REL_DATE;
11697 +
11698 +       SK_MEMSET(&(pAC->PnmiBackup), 0, sizeof(SK_PNMI_STRUCT_DATA));
11699 +       SK_MEMCPY(&(pAC->PnmiBackup), &(pAC->PnmiStruct),
11700 +                       sizeof(SK_PNMI_STRUCT_DATA));
11701 +
11702 +       /* Register net device */
11703 +       retval = register_netdev(dev);
11704 +       if (retval) {
11705 +               printk(KERN_ERR "SKGE: Could not register device.\n");
11706 +               FreeResources(dev);
11707 +               free_netdev(dev);
11708 +               return retval;
11709 +       }
11710 +
11711 +       /* Save initial device name */
11712 +       strcpy(pNet->InitialDevName, dev->name);
11713 +
11714 +       /* Set network to off */
11715 +       netif_stop_queue(dev);
11716 +       netif_carrier_off(dev);
11717 +
11718 +       /* Print adapter specific string from vpd and config settings */
11719 +       printk("%s: %s\n", pNet->InitialDevName, pAC->DeviceStr);
11720 +       printk("      PrefPort:%c  RlmtMode:%s\n",
11721 +               'A' + pAC->Rlmt.Net[0].Port[pAC->Rlmt.Net[0].PrefPort]->PortNumber,
11722 +               (pAC->RlmtMode==0)  ? "Check Link State" :
11723 +               ((pAC->RlmtMode==1) ? "Check Link State" :
11724 +               ((pAC->RlmtMode==3) ? "Check Local Port" :
11725 +               ((pAC->RlmtMode==7) ? "Check Segmentation" :
11726 +               ((pAC->RlmtMode==17) ? "Dual Check Link State" :"Error")))));
11727 +
11728 +       SkGeYellowLED(pAC, pAC->IoBase, 1);
11729 +
11730 +       memcpy((caddr_t) &dev->dev_addr,
11731 +               (caddr_t) &pAC->Addr.Net[0].CurrentMacAddress, 6);
11732 +
11733 +       /* First adapter... Create proc and print message */
11734 +#ifdef CONFIG_PROC_FS
11735 +       if (!sk98lin_proc_entry) {
11736 +               sk98lin_proc_entry = SK_TRUE;
11737 +               SK_MEMCPY(&SK_Root_Dir_entry, BootString,
11738 +                       sizeof(SK_Root_Dir_entry) - 1);
11739 +
11740 +               /*Create proc (directory)*/
11741 +               if(!pSkRootDir) {
11742 +                       pSkRootDir = proc_mkdir(SK_Root_Dir_entry, proc_net);
11743 +                       if (!pSkRootDir) {
11744 +                               printk(KERN_WARNING "%s: Unable to create /proc/net/%s",
11745 +                                       dev->name, SK_Root_Dir_entry);
11746 +                       } else {
11747 +                               pSkRootDir->owner = THIS_MODULE;
11748 +                       }
11749 +               }
11750 +       }
11751 +
11752 +       /* Create proc file */
11753 +       if (pSkRootDir &&
11754 +               (pProcFile = create_proc_entry(pNet->InitialDevName, S_IRUGO,
11755 +                       pSkRootDir))) {
11756 +               pProcFile->proc_fops = &sk_proc_fops;
11757 +               pProcFile->data      = dev;
11758 +       }
11759 +
11760 +#endif
11761 +
11762 +       pNet->PortNr = 0;
11763 +       pNet->NetNr  = 0;
11764 +
11765 +       sk98lin_boards_found++;
11766 +       pci_set_drvdata(pdev, dev);
11767 +
11768 +       /* More then one port found */
11769 +       if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
11770 +               if ((dev = alloc_etherdev(sizeof(DEV_NET))) == 0) {
11771 +                       printk(KERN_ERR "Unable to allocate etherdev "
11772 +                               "structure!\n");
11773 +                       return -ENODEV;
11774 +               }
11775 +
11776 +               pAC->dev[1]   = dev;
11777 +               pNet          = dev->priv;
11778 +               pNet->PortNr  = 1;
11779 +               pNet->NetNr   = 1;
11780 +               pNet->pAC     = pAC;
11781 +
11782 +               if (CHIP_ID_YUKON_2(pAC)) {
11783 +                       dev->hard_start_xmit = &SkY2Xmit;
11784 +#ifdef CONFIG_SK98LIN_NAPI
11785 +                       dev->poll =  &SkY2Poll;
11786 +                       dev->weight = 64;
11787 +#endif
11788 +               } else {
11789 +                       dev->hard_start_xmit = &SkGeXmit;
11790 +#ifdef CONFIG_SK98LIN_NAPI
11791 +                       dev->poll =  &SkGePoll;
11792 +                       dev->weight = 64;
11793 +#endif
11794 +               }
11795 +               dev->open               = &SkGeOpen;
11796 +               dev->stop               = &SkGeClose;
11797 +               dev->get_stats          = &SkGeStats;
11798 +               dev->set_multicast_list = &SkGeSetRxMode;
11799 +               dev->set_mac_address    = &SkGeSetMacAddr;
11800 +               dev->do_ioctl           = &SkGeIoctl;
11801 +               dev->change_mtu         = &SkGeChangeMtu;
11802 +               dev->flags             &= ~IFF_RUNNING;
11803 +#ifdef SK_POLL_CONTROLLER
11804 +               dev->poll_controller    = SkGeNetPoll;
11805 +#endif
11806 +
11807 +#ifdef NETIF_F_TSO
11808 +#ifdef USE_SK_TSO_FEATURE
11809 +               if (CHIP_ID_YUKON_2(pAC)) {
11810 +                       dev->features |= NETIF_F_TSO;
11811 +               }
11812 +#endif
11813 +#endif
11814 +#ifdef CONFIG_SK98LIN_ZEROCOPY
11815 +               /* Don't handle if Genesis chipset */
11816 +               if (pAC->GIni.GIChipId != CHIP_ID_GENESIS)
11817 +                       dev->features |= NETIF_F_SG;
11818 +#endif
11819 +#ifdef USE_SK_TX_CHECKSUM
11820 +               /* Don't handle if Genesis chipset */
11821 +               if (pAC->GIni.GIChipId != CHIP_ID_GENESIS)
11822 +                       dev->features |= NETIF_F_IP_CSUM;
11823 +#endif
11824 +
11825 +               if (register_netdev(dev)) {
11826 +                       printk(KERN_ERR "SKGE: Could not register device.\n");
11827 +                       free_netdev(dev);
11828 +                       pAC->dev[1] = pAC->dev[0];
11829 +               } else {
11830 +
11831 +               /* Save initial device name */
11832 +               strcpy(pNet->InitialDevName, dev->name);
11833 +
11834 +               /* Set network to off */
11835 +               netif_stop_queue(dev);
11836 +               netif_carrier_off(dev);
11837 +
11838 +
11839 +#ifdef CONFIG_PROC_FS
11840 +               if (pSkRootDir
11841 +                   && (pProcFile = create_proc_entry(pNet->InitialDevName,
11842 +                                               S_IRUGO, pSkRootDir))) {
11843 +                       pProcFile->proc_fops = &sk_proc_fops;
11844 +                       pProcFile->data      = dev;
11845 +               }
11846 +#endif
11847 +
11848 +               memcpy((caddr_t) &dev->dev_addr,
11849 +               (caddr_t) &pAC->Addr.Net[1].CurrentMacAddress, 6);
11850 +
11851 +               printk("%s: %s\n", pNet->InitialDevName, pAC->DeviceStr);
11852 +               printk("      PrefPort:B  RlmtMode:Dual Check Link State\n");
11853 +               }
11854 +       }
11855 +
11856 +       pAC->Index = sk98lin_boards_found;
11857 +       sk98lin_max_boards_found = sk98lin_boards_found;
11858 +       return 0;
11859 +}
11860 +
11861 +
11862
11863  /*****************************************************************************
11864   *
11865 @@ -282,7 +650,7 @@
11866         dev->mem_start = pci_resource_start (pdev, 0);
11867         pci_set_master(pdev);
11868
11869 -       if (pci_request_regions(pdev, pAC->Name) != 0) {
11870 +       if (pci_request_regions(pdev, DRIVER_FILE_NAME) != 0) {
11871                 retval = 2;
11872                 goto out_disable;
11873         }
11874 @@ -298,26 +666,406 @@
11875                 our2 |= PCI_REV_DESC;
11876                 SkPciWriteCfgDWord(pAC, PCI_OUR_REG_2, our2);
11877         }
11878 -#endif
11879 +#endif
11880 +
11881 +       /*
11882 +        * Remap the regs into kernel space.
11883 +        */
11884 +       pAC->IoBase = (char*)ioremap_nocache(dev->mem_start, 0x4000);
11885 +
11886 +       if (!pAC->IoBase){
11887 +               retval = 3;
11888 +               goto out_release;
11889 +       }
11890 +
11891 +       return 0;
11892 +
11893 + out_release:
11894 +       pci_release_regions(pdev);
11895 + out_disable:
11896 +       pci_disable_device(pdev);
11897 +       return retval;
11898 +}
11899 +
11900 +#ifdef Y2_RECOVERY
11901 +/*****************************************************************************
11902 + *
11903 + *     SkGeHandleKernelTimer - Handle the kernel timer requests
11904 + *
11905 + * Description:
11906 + *     If the requested time interval for the timer has elapsed,
11907 + *     this function checks the link state.
11908 + *
11909 + * Returns:    N/A
11910 + *
11911 + */
11912 +static void SkGeHandleKernelTimer(
11913 +unsigned long ptr)  /* holds the pointer to adapter control context */
11914 +{
11915 +       DEV_NET         *pNet = (DEV_NET*) ptr;
11916 +
11917 +       pNet->TimerExpired = SK_TRUE;
11918 +}
11919 +
11920 +/*****************************************************************************
11921 + *
11922 + *     sk98lin_check_timer - Resume the the card
11923 + *
11924 + * Description:
11925 + *     This function checks the kernel timer
11926 + *
11927 + * Returns: N/A
11928 + *
11929 + */
11930 +void SkGeCheckTimer(
11931 +DEV_NET *pNet)  /* holds the pointer to adapter control context */
11932 +{
11933 +       SK_AC           *pAC = pNet->pAC;
11934 +       SK_BOOL         StartTimer = SK_TRUE;
11935 +#ifdef Y2_RX_CHECK
11936 +       SK_BOOL         ZeroRegister = SK_FALSE;
11937 +       SK_U8           FifoReadPointer;
11938 +       SK_U8           FifoReadLevel;
11939 +       SK_U32          BmuStateMachine;
11940 +#endif
11941 +
11942 +       if (pNet->InRecover)
11943 +               return;
11944 +
11945 +#define TXPORT pAC->TxPort[pNet->PortNr][TX_PRIO_LOW]
11946 +#define RXPORT pAC->RxPort[pNet->PortNr]
11947 +
11948 +       if (    (CHIP_ID_YUKON_2(pAC)) &&
11949 +               (netif_running(pAC->dev[pNet->PortNr]))) {
11950 +
11951 +#ifdef Y2_RX_CHECK
11952 +               /* Check the receiver only if link is up*/
11953 +               if (    (netif_carrier_ok(pAC->dev[pNet->PortNr])) &&
11954 +                       (pNet->LastJiffies == pAC->dev[pNet->PortNr]->last_rx)) {
11955 +
11956 +                       /* Nothing received */
11957 +                       /* Get the register values */
11958 +                       SK_IN8(pAC->IoBase, 0x0448, &FifoReadPointer);
11959 +                       SK_IN8(pAC->IoBase, 0x044a, &FifoReadLevel);
11960 +                       SK_IN32(pAC->IoBase, 0x043c, &BmuStateMachine);
11961 +
11962 +                       /* Check the register values */
11963 +                       if      ((pNet->FifoReadPointer != FifoReadPointer) ||
11964 +                               (pNet->FifoReadLevel != FifoReadLevel)      ||
11965 +                               (pNet->BmuStateMachine != BmuStateMachine)) {
11966 +
11967 +                               /* Check the values */
11968 +                               if      ((pNet->FifoReadPointer) ||
11969 +                                       (pNet->FifoReadLevel)   ||
11970 +                                       (pNet->BmuStateMachine)) {
11971 +
11972 +                                       /* Check the jiffies again */
11973 +                                       if (pNet->LastJiffies ==
11974 +                                               pAC->dev[pNet->PortNr]->last_rx) {
11975 +                                               /* Still nothing received */
11976 +                                               SkLocalEventQueue(pAC, SKGE_DRV,
11977 +                                                       SK_DRV_RECOVER,pNet->PortNr,-1,SK_FALSE);
11978 +                                       } else {
11979 +                                               ZeroRegister = SK_TRUE;
11980 +                                       }
11981 +                               } else {
11982 +                                       pNet->FifoReadPointer = FifoReadPointer;
11983 +                                       pNet->FifoReadLevel = FifoReadLevel;
11984 +                                       pNet->BmuStateMachine = BmuStateMachine;
11985 +
11986 +                               }
11987 +                       } else {
11988 +                               if ((FifoReadLevel != 0) &&
11989 +                                       (FifoReadPointer > 0)) {
11990 +                                       /* Check the jiffies again */
11991 +                                       if (pNet->LastJiffies ==
11992 +                                               pAC->dev[pNet->PortNr]->last_rx) {
11993 +                                               /* Still nothing received */
11994 +                                               SkLocalEventQueue(pAC, SKGE_DRV,
11995 +                                                       SK_DRV_RECOVER,pNet->PortNr,-1,SK_FALSE);
11996 +                                       } else {
11997 +                                               ZeroRegister = SK_TRUE;
11998 +                                       }
11999 +                               } else {
12000 +                                       ZeroRegister = SK_TRUE;
12001 +                               }
12002 +                       }
12003 +               } else {
12004 +                       /* Clear the values */
12005 +                       if      ((pNet->FifoReadPointer) ||
12006 +                               (pNet->FifoReadLevel)   ||
12007 +                               (pNet->BmuStateMachine)) {
12008 +                                       ZeroRegister = SK_TRUE;
12009 +                       }
12010 +                       pNet->LastJiffies =
12011 +                               pAC->dev[pNet->PortNr]->last_rx;
12012 +               }
12013 +
12014 +               /* Clear the register values */
12015 +               if (ZeroRegister) {
12016 +                       pNet->FifoReadPointer = 0;
12017 +                       pNet->FifoReadLevel   = 0;
12018 +                       pNet->BmuStateMachine = 0;
12019 +               }
12020 +#endif
12021 +
12022 +               /* Checkthe transmitter */
12023 +               if (!(IS_Q_EMPTY(&TXPORT.TxAQ_working))) {
12024 +                       if (TXPORT.LastDone != TXPORT.TxALET.Done) {
12025 +                               TXPORT.LastDone = TXPORT.TxALET.Done;
12026 +                               pNet->TransmitTimeoutTimer = 0;
12027 +                       } else {
12028 +                               pNet->TransmitTimeoutTimer++;
12029 +                               if (pNet->TransmitTimeoutTimer >= 10) {
12030 +                                       pNet->TransmitTimeoutTimer = 0;
12031 +#ifdef CHECK_TRANSMIT_TIMEOUT
12032 +                                       StartTimer =  SK_FALSE;
12033 +                                       SkLocalEventQueue(pAC, SKGE_DRV,
12034 +                                               SK_DRV_RECOVER,pNet->PortNr,-1,SK_FALSE);
12035 +#endif
12036 +                               }
12037 +                       }
12038 +               }
12039 +
12040 +#ifdef CHECK_TRANSMIT_TIMEOUT
12041 +//             if (!timer_pending(&pNet->KernelTimer)) {
12042 +                       pNet->KernelTimer.expires = jiffies + (HZ/4); /* 250ms */
12043 +                       add_timer(&pNet->KernelTimer);
12044 +                       pNet->TimerExpired = SK_FALSE;
12045 +//             }
12046 +#endif
12047 +       }
12048 +}
12049 +#endif
12050 +
12051 +
12052 +#ifdef CONFIG_PM
12053 +/*****************************************************************************
12054 + *
12055 + *     sk98lin_resume - Resume the the card
12056 + *
12057 + * Description:
12058 + *     This function resumes the card into the D0 state
12059 + *
12060 + * Returns: N/A
12061 + *
12062 + */
12063 +static int sk98lin_resume(
12064 +struct pci_dev *pdev)   /* the device that is to resume */
12065 +{
12066 +       struct net_device   *dev  = pci_get_drvdata(pdev);
12067 +       DEV_NET             *pNet = (DEV_NET*) dev->priv;
12068 +       SK_AC               *pAC  = pNet->pAC;
12069 +       SK_U16               PmCtlSts;
12070 +
12071 +       /* Set the power state to D0 */
12072 +       pci_set_power_state(pdev, 0);
12073 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,9)
12074 +       pci_restore_state(pdev);
12075 +#else
12076 +       pci_restore_state(pdev, pAC->PciState);
12077 +#endif
12078 +
12079 +       /* Set the adapter power state to D0 */
12080 +       SkPciReadCfgWord(pAC, PCI_PM_CTL_STS, &PmCtlSts);
12081 +       PmCtlSts &= ~(PCI_PM_STATE_D3); /* reset all DState bits */
12082 +       PmCtlSts |= PCI_PM_STATE_D0;
12083 +       SkPciWriteCfgWord(pAC, PCI_PM_CTL_STS, PmCtlSts);
12084 +
12085 +       /* Reinit the adapter and start the port again */
12086 +       pAC->BoardLevel = SK_INIT_DATA;
12087 +       SkDrvLeaveDiagMode(pAC);
12088 +
12089 +       netif_device_attach(dev);
12090 +       netif_start_queue(dev);
12091 +       return 0;
12092 +}
12093 +
12094 +/*****************************************************************************
12095 + *
12096 + *     sk98lin_suspend - Suspend the card
12097 + *
12098 + * Description:
12099 + *     This function suspends the card into a defined state
12100 + *
12101 + * Returns: N/A
12102 + *
12103 + */
12104 +static int sk98lin_suspend(
12105 +struct pci_dev *pdev,   /* pointer to the device that is to suspend */
12106 +u32            state)  /* what power state is desired by Linux?    */
12107 +{
12108 +       struct net_device   *dev  = pci_get_drvdata(pdev);
12109 +       DEV_NET             *pNet = (DEV_NET*) dev->priv;
12110 +       SK_AC               *pAC  = pNet->pAC;
12111 +       SK_U16               PciPMControlStatus;
12112 +       SK_U16               PciPMCapabilities;
12113 +       SK_MAC_ADDR          MacAddr;
12114 +       int                  i;
12115 +
12116 +       /* GEnesis and first yukon revs do not support power management */
12117 +       if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
12118 +               if (pAC->GIni.GIChipRev == 0) {
12119 +                       return 0; /* power management not supported */
12120 +               }
12121 +       }
12122 +
12123 +       if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
12124 +               return 0; /* not supported for this chipset */
12125 +       }
12126 +
12127 +       if (pAC->WolInfo.ConfiguredWolOptions == 0) {
12128 +               return 0; /* WOL possible, but disabled via ethtool */
12129 +       }
12130 +
12131 +       if(netif_running(dev)) {
12132 +               netif_stop_queue(dev); /* stop device if running */
12133 +       }
12134 +
12135 +       netif_device_detach(dev);
12136 +
12137 +       /* read the PM control/status register from the PCI config space */
12138 +       SK_IN16(pAC->IoBase, PCI_C(pAC, PCI_PM_CTL_STS), &PciPMControlStatus);
12139 +
12140 +       /* read the power management capabilities from the config space */
12141 +       SK_IN16(pAC->IoBase, PCI_C(pAC, PCI_PM_CAP_REG), &PciPMCapabilities);
12142 +
12143 +       /* Enable WakeUp with Magic Packet - get MAC address from adapter */
12144 +       for (i = 0; i < SK_MAC_ADDR_LEN; i++) {
12145 +               /* virtual address: will be used for data */
12146 +               SK_IN8(pAC->IoBase, (B2_MAC_1 + i), &MacAddr.a[i]);
12147 +       }
12148 +
12149 +       SkDrvEnterDiagMode(pAC);
12150 +       SkEnableWOMagicPacket(pAC, pAC->IoBase, MacAddr);
12151 +
12152 +       pci_enable_wake(pdev, 3, 1);
12153 +       pci_enable_wake(pdev, 4, 1);    /* 4 == D3 cold */
12154 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,9)
12155 +       pci_save_state(pdev);
12156 +#else
12157 +       pci_save_state(pdev, pAC->PciState);
12158 +#endif
12159 +       pci_set_power_state(pdev, state); /* set the state */
12160 +
12161 +       return 0;
12162 +}
12163 +
12164 +
12165 +/******************************************************************************
12166 + *
12167 + *     SkEnableWOMagicPacket - Enable Wake on Magic Packet on the adapter
12168 + *
12169 + * Context:
12170 + *     init, pageable
12171 + *     the adapter should be de-initialized before calling this function
12172 + *
12173 + * Returns:
12174 + *     nothing
12175 + */
12176 +
12177 +static void SkEnableWOMagicPacket(
12178 +SK_AC         *pAC,      /* Adapter Control Context          */
12179 +SK_IOC         IoC,      /* I/O control context              */
12180 +SK_MAC_ADDR    MacAddr)  /* MacAddr expected in magic packet */
12181 +{
12182 +       SK_U16  Word;
12183 +       SK_U32  DWord;
12184 +       int     i;
12185 +       int     HwPortIndex;
12186 +       int     Port = 0;
12187 +
12188 +       /* use Port 0 as long as we do not have any dual port cards which support WOL */
12189 +       HwPortIndex = 0;
12190 +       DWord = 0;
12191 +
12192 +       SK_OUT16(IoC, 0x0004, 0x0002);  /* clear S/W Reset */
12193 +       SK_OUT16(IoC, 0x0f10, 0x0002);  /* clear Link Reset */
12194 +
12195 +       /*
12196 +        * PHY Configuration:
12197 +        * Autonegotioation is enalbed, advertise 10 HD, 10 FD,
12198 +        * 100 HD, and 100 FD.
12199 +        */
12200 +       if ((pAC->GIni.GIChipId == CHIP_ID_YUKON_EC) ||
12201 +               (pAC->GIni.GIChipId == CHIP_ID_YUKON) ||
12202 +               (pAC->GIni.GIChipId == CHIP_ID_YUKON_LITE)) {
12203 +
12204 +               SK_OUT16(IoC, 0x0004, 0x0800);                  /* enable CLK_RUN */
12205 +               SK_OUT8(IoC, 0x0007, 0xa9);                     /* enable VAUX */
12206 +
12207 +               /* WA code for COMA mode */
12208 +               /* Only for yukon plus based chipsets rev A3 */
12209 +               if (pAC->GIni.GIChipRev == CHIP_REV_YU_LITE_A3) {
12210 +                       SK_IN32(IoC, B2_GP_IO, &DWord);
12211 +                       DWord |= GP_DIR_9;                      /* set to output */
12212 +                       DWord &= ~GP_IO_9;                      /* clear PHY reset (active high) */
12213 +                       SK_OUT32(IoC, B2_GP_IO, DWord);         /* clear PHY reset */
12214 +               }
12215 +
12216 +               if ((pAC->GIni.GIChipId == CHIP_ID_YUKON_LITE) ||
12217 +                       (pAC->GIni.GIChipId == CHIP_ID_YUKON)) {
12218 +                       SK_OUT32(IoC, 0x0f04, 0x01f04001);      /* set PHY reset */
12219 +                       SK_OUT32(IoC, 0x0f04, 0x01f04002);      /* clear PHY reset */
12220 +               } else {
12221 +                       SK_OUT8(IoC, 0x0f04, 0x02);             /* clear PHY reset */
12222 +               }
12223 +
12224 +               SK_OUT8(IoC, 0x0f00, 0x02);                     /* clear MAC reset */
12225 +               SkGmPhyWrite(pAC, IoC, Port, 4, 0x01e1);        /* advertise 10/100 HD/FD */
12226 +               SkGmPhyWrite(pAC, IoC, Port, 9, 0x0000);        /* do not advertise 1000 HD/FD */
12227 +               SkGmPhyWrite(pAC, IoC, Port, 00, 0xB300);       /* 100 MBit, disable Autoneg */
12228 +       } else if (pAC->GIni.GIChipId == CHIP_ID_YUKON_FE) {
12229 +               SK_OUT8(IoC, 0x0007, 0xa9);                     /* enable VAUX */
12230 +               SK_OUT8(IoC, 0x0f04, 0x02);                     /* clear PHY reset */
12231 +               SK_OUT8(IoC, 0x0f00, 0x02);                     /* clear MAC reset */
12232 +               SkGmPhyWrite(pAC, IoC, Port, 16, 0x0130);       /* Enable Automatic Crossover */
12233 +               SkGmPhyWrite(pAC, IoC, Port, 00, 0xB300);       /* 100 MBit, disable Autoneg */
12234 +       }
12235 +
12236
12237         /*
12238 -        * Remap the regs into kernel space.
12239 +        * MAC Configuration:
12240 +        * Set the MAC to 100 HD and enable the auto update features
12241 +        * for Speed, Flow Control and Duplex Mode.
12242 +        * If autonegotiation completes successfully the
12243 +        * MAC takes the link parameters from the PHY.
12244 +        * If the link partner doesn't support autonegotiation
12245 +        * the MAC can receive magic packets if the link partner
12246 +        * uses 100 HD.
12247          */
12248 -       pAC->IoBase = (char*)ioremap_nocache(dev->mem_start, 0x4000);
12249 +       SK_OUT16(IoC, 0x2804, 0x3832);
12250 +
12251
12252 -       if (!pAC->IoBase){
12253 -               retval = 3;
12254 -               goto out_release;
12255 +       /*
12256 +        * Set Up Magic Packet parameters
12257 +        */
12258 +       for (i = 0; i < 6; i+=2) {              /* set up magic packet MAC address */
12259 +               SK_IN16(IoC, 0x100 + i, &Word);
12260 +               SK_OUT16(IoC, 0xf24 + i, Word);
12261         }
12262
12263 -       return 0;
12264 +       SK_OUT16(IoC, 0x0f20, 0x0208);          /* enable PME on magic packet */
12265 +                                               /* and on wake up frame */
12266
12267 - out_release:
12268 -       pci_release_regions(pdev);
12269 - out_disable:
12270 -       pci_disable_device(pdev);
12271 -       return retval;
12272 -}
12273 +       /*
12274 +        * Set up PME generation
12275 +        */
12276 +       /* set PME legacy mode */
12277 +       /* Only for PCI express based chipsets */
12278 +       if ((pAC->GIni.GIChipId == CHIP_ID_YUKON_EC) ||
12279 +               (pAC->GIni.GIChipId == CHIP_ID_YUKON_FE)) {
12280 +               SkPciReadCfgDWord(pAC, 0x40, &DWord);
12281 +               DWord |= 0x8000;
12282 +               SkPciWriteCfgDWord(pAC, 0x40, DWord);
12283 +       }
12284 +
12285 +       /* clear PME status and switch adapter to DState */
12286 +       SkPciReadCfgWord(pAC, 0x4c, &Word);
12287 +       Word |= 0x103;
12288 +       SkPciWriteCfgWord(pAC, 0x4c, Word);
12289 +}      /* SkEnableWOMagicPacket */
12290 +#endif
12291
12292
12293  /*****************************************************************************
12294 @@ -350,7 +1098,9 @@
12295                 if (pAC->IoBase) {
12296                         iounmap(pAC->IoBase);
12297                 }
12298 -               if (pAC->pDescrMem) {
12299 +               if (CHIP_ID_YUKON_2(pAC)) {
12300 +                       SkY2FreeResources(pAC);
12301 +               } else {
12302                         BoardFreeMem(pAC);
12303                 }
12304         }
12305 @@ -360,25 +1110,6 @@
12306  MODULE_AUTHOR("Mirko Lindner <mlindner@syskonnect.de>");
12307  MODULE_DESCRIPTION("SysKonnect SK-NET Gigabit Ethernet SK-98xx driver");
12308  MODULE_LICENSE("GPL");
12309 -MODULE_PARM(Speed_A,    "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12310 -MODULE_PARM(Speed_B,    "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12311 -MODULE_PARM(AutoNeg_A,  "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12312 -MODULE_PARM(AutoNeg_B,  "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12313 -MODULE_PARM(DupCap_A,   "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12314 -MODULE_PARM(DupCap_B,   "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12315 -MODULE_PARM(FlowCtrl_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12316 -MODULE_PARM(FlowCtrl_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12317 -MODULE_PARM(Role_A,    "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12318 -MODULE_PARM(Role_B,    "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12319 -MODULE_PARM(ConType,   "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12320 -MODULE_PARM(PrefPort,   "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12321 -MODULE_PARM(RlmtMode,   "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12322 -/* used for interrupt moderation */
12323 -MODULE_PARM(IntsPerSec,     "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "i");
12324 -MODULE_PARM(Moderation,     "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12325 -MODULE_PARM(Stats,          "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12326 -MODULE_PARM(ModerationMask, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12327 -MODULE_PARM(AutoSizing,     "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12328
12329
12330  #ifdef LINK_SPEED_A
12331 @@ -462,8 +1193,137 @@
12332  static int   IntsPerSec[SK_MAX_CARD_PARAM];
12333  static char *Moderation[SK_MAX_CARD_PARAM];
12334  static char *ModerationMask[SK_MAX_CARD_PARAM];
12335 -static char *AutoSizing[SK_MAX_CARD_PARAM];
12336 -static char *Stats[SK_MAX_CARD_PARAM];
12337 +
12338 +static char *LowLatency[SK_MAX_CARD_PARAM];
12339 +
12340 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,9)
12341 +module_param_array(Speed_A, charp, NULL, 0);
12342 +module_param_array(Speed_B, charp, NULL, 0);
12343 +module_param_array(AutoNeg_A, charp, NULL, 0);
12344 +module_param_array(AutoNeg_B, charp, NULL, 0);
12345 +module_param_array(DupCap_A, charp, NULL, 0);
12346 +module_param_array(DupCap_B, charp, NULL, 0);
12347 +module_param_array(FlowCtrl_A, charp, NULL, 0);
12348 +module_param_array(FlowCtrl_B, charp, NULL, 0);
12349 +module_param_array(Role_A, charp, NULL, 0);
12350 +module_param_array(Role_B, charp, NULL, 0);
12351 +module_param_array(ConType, charp, NULL, 0);
12352 +module_param_array(PrefPort, charp, NULL, 0);
12353 +module_param_array(RlmtMode, charp, NULL, 0);
12354 +/* used for interrupt moderation */
12355 +module_param_array(IntsPerSec, int, NULL, 0);
12356 +module_param_array(Moderation, charp, NULL, 0);
12357 +module_param_array(ModerationMask, charp, NULL, 0);
12358 +module_param_array(LowLatency, charp, NULL, 0);
12359 +#else
12360 +MODULE_PARM(Speed_A,    "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12361 +MODULE_PARM(Speed_B,    "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12362 +MODULE_PARM(AutoNeg_A,  "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12363 +MODULE_PARM(AutoNeg_B,  "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12364 +MODULE_PARM(DupCap_A,   "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12365 +MODULE_PARM(DupCap_B,   "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12366 +MODULE_PARM(FlowCtrl_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12367 +MODULE_PARM(FlowCtrl_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12368 +MODULE_PARM(Role_A,    "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12369 +MODULE_PARM(Role_B,    "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12370 +MODULE_PARM(ConType,   "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12371 +MODULE_PARM(PrefPort,   "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12372 +MODULE_PARM(RlmtMode,   "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12373 +MODULE_PARM(IntsPerSec,     "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "i");
12374 +MODULE_PARM(Moderation,     "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12375 +MODULE_PARM(ModerationMask, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12376 +MODULE_PARM(LowLatency, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
12377 +#endif
12378 +
12379 +
12380 +/*****************************************************************************
12381 + *
12382 + *     sk98lin_remove_device - device deinit function
12383 + *
12384 + * Description:
12385 + *     Disable adapter if it is still running, free resources,
12386 + *     free device struct.
12387 + *
12388 + * Returns: N/A
12389 + */
12390 +
12391 +static void sk98lin_remove_device(struct pci_dev *pdev)
12392 +{
12393 +DEV_NET                *pNet;
12394 +SK_AC          *pAC;
12395 +struct SK_NET_DEVICE *next;
12396 +unsigned long Flags;
12397 +struct net_device *dev = pci_get_drvdata(pdev);
12398 +
12399 +
12400 +       /* Device not available. Return. */
12401 +       if (!dev)
12402 +               return;
12403 +
12404 +       pNet = (DEV_NET*) dev->priv;
12405 +       pAC = pNet->pAC;
12406 +       next = pAC->Next;
12407 +
12408 +       netif_stop_queue(dev);
12409 +       SkGeYellowLED(pAC, pAC->IoBase, 0);
12410 +
12411 +       if(pAC->BoardLevel == SK_INIT_RUN) {
12412 +               /* board is still alive */
12413 +               spin_lock_irqsave(&pAC->SlowPathLock, Flags);
12414 +               SkLocalEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP,
12415 +                                       0, -1, SK_FALSE);
12416 +               SkLocalEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP,
12417 +                                       1, -1, SK_TRUE);
12418 +
12419 +               /* disable interrupts */
12420 +               SK_OUT32(pAC->IoBase, B0_IMSK, 0);
12421 +               SkGeDeInit(pAC, pAC->IoBase);
12422 +               spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
12423 +               pAC->BoardLevel = SK_INIT_DATA;
12424 +               /* We do NOT check here, if IRQ was pending, of course*/
12425 +       }
12426 +
12427 +       if(pAC->BoardLevel == SK_INIT_IO) {
12428 +               /* board is still alive */
12429 +               SkGeDeInit(pAC, pAC->IoBase);
12430 +               pAC->BoardLevel = SK_INIT_DATA;
12431 +       }
12432 +
12433 +       if ((pAC->GIni.GIMacsFound == 2) && pAC->RlmtNets == 2){
12434 +               unregister_netdev(pAC->dev[1]);
12435 +               free_netdev(pAC->dev[1]);
12436 +       }
12437 +
12438 +       FreeResources(dev);
12439 +
12440 +#ifdef CONFIG_PROC_FS
12441 +       /* Remove the sk98lin procfs device entries */
12442 +       if ((pAC->GIni.GIMacsFound == 2) && pAC->RlmtNets == 2){
12443 +               remove_proc_entry(pAC->dev[1]->name, pSkRootDir);
12444 +       }
12445 +       remove_proc_entry(pNet->InitialDevName, pSkRootDir);
12446 +#endif
12447 +
12448 +       dev->get_stats = NULL;
12449 +       /*
12450 +        * otherwise unregister_netdev calls get_stats with
12451 +        * invalid IO ...  :-(
12452 +        */
12453 +       unregister_netdev(dev);
12454 +       free_netdev(dev);
12455 +       kfree(pAC);
12456 +       sk98lin_max_boards_found--;
12457 +
12458 +#ifdef CONFIG_PROC_FS
12459 +       /* Remove all Proc entries if last device */
12460 +       if (sk98lin_max_boards_found == 0) {
12461 +               /* clear proc-dir */
12462 +               remove_proc_entry(pSkRootDir->name, proc_net);
12463 +       }
12464 +#endif
12465 +
12466 +}
12467 +
12468
12469  /*****************************************************************************
12470   *
12471 @@ -501,7 +1361,10 @@
12472                 spin_lock_init(&pAC->TxPort[i][0].TxDesRingLock);
12473                 spin_lock_init(&pAC->RxPort[i].RxDesRingLock);
12474         }
12475 +
12476         spin_lock_init(&pAC->SlowPathLock);
12477 +       spin_lock_init(&pAC->TxQueueLock);      /* for Yukon2 chipsets */
12478 +       spin_lock_init(&pAC->SetPutIndexLock);  /* for Yukon2 chipsets */
12479
12480         /* level 0 init common modules here */
12481
12482 @@ -520,15 +1383,13 @@
12483         SkTimerInit(pAC, pAC->IoBase, SK_INIT_DATA);
12484
12485         pAC->BoardLevel = SK_INIT_DATA;
12486 -       pAC->RxBufSize  = ETH_BUF_SIZE;
12487 +       pAC->RxPort[0].RxBufSize = ETH_BUF_SIZE;
12488 +       pAC->RxPort[1].RxBufSize = ETH_BUF_SIZE;
12489
12490         SK_PNMI_SET_DRIVER_DESCR(pAC, DescrString);
12491         SK_PNMI_SET_DRIVER_VER(pAC, VerStr);
12492
12493 -       spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
12494 -
12495         /* level 1 init common modules here (HW init) */
12496 -       spin_lock_irqsave(&pAC->SlowPathLock, Flags);
12497         if (SkGeInit(pAC, pAC->IoBase, SK_INIT_IO) != 0) {
12498                 printk("sk98lin: HWInit (1) failed.\n");
12499                 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
12500 @@ -540,51 +1401,93 @@
12501         SkAddrInit( pAC, pAC->IoBase, SK_INIT_IO);
12502         SkRlmtInit( pAC, pAC->IoBase, SK_INIT_IO);
12503         SkTimerInit(pAC, pAC->IoBase, SK_INIT_IO);
12504 +#ifdef Y2_RECOVERY
12505 +       /* mark entries invalid */
12506 +       pAC->LastPort = 3;
12507 +       pAC->LastOpc = 0xFF;
12508 +#endif
12509
12510         /* Set chipset type support */
12511 -       pAC->ChipsetType = 0;
12512         if ((pAC->GIni.GIChipId == CHIP_ID_YUKON) ||
12513 -               (pAC->GIni.GIChipId == CHIP_ID_YUKON_LITE)) {
12514 -               pAC->ChipsetType = 1;
12515 +               (pAC->GIni.GIChipId == CHIP_ID_YUKON_LITE) ||
12516 +               (pAC->GIni.GIChipId == CHIP_ID_YUKON_LP)) {
12517 +               pAC->ChipsetType = 1;   /* Yukon chipset (descriptor logic) */
12518 +       } else if (CHIP_ID_YUKON_2(pAC)) {
12519 +               pAC->ChipsetType = 2;   /* Yukon2 chipset (list logic) */
12520 +       } else {
12521 +               pAC->ChipsetType = 0;   /* Genesis chipset (descriptor logic) */
12522 +       }
12523 +
12524 +       /* wake on lan support */
12525 +       pAC->WolInfo.SupportedWolOptions = 0;
12526 +#if defined (ETHTOOL_GWOL) && defined (ETHTOOL_SWOL)
12527 +       if (pAC->GIni.GIChipId != CHIP_ID_GENESIS) {
12528 +               pAC->WolInfo.SupportedWolOptions  = WAKE_MAGIC;
12529 +               if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
12530 +                       if (pAC->GIni.GIChipRev == 0) {
12531 +                               pAC->WolInfo.SupportedWolOptions = 0;
12532 +                       }
12533 +               }
12534         }
12535 +#endif
12536 +       pAC->WolInfo.ConfiguredWolOptions = pAC->WolInfo.SupportedWolOptions;
12537
12538         GetConfiguration(pAC);
12539         if (pAC->RlmtNets == 2) {
12540 -               pAC->GIni.GIPortUsage = SK_MUL_LINK;
12541 +               pAC->GIni.GP[0].PPortUsage = SK_MUL_LINK;
12542 +               pAC->GIni.GP[1].PPortUsage = SK_MUL_LINK;
12543         }
12544
12545         pAC->BoardLevel = SK_INIT_IO;
12546         spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
12547
12548 -       if (pAC->GIni.GIMacsFound == 2) {
12549 -                Ret = request_irq(dev->irq, SkGeIsr, SA_SHIRQ, pAC->Name, dev);
12550 -       } else if (pAC->GIni.GIMacsFound == 1) {
12551 -               Ret = request_irq(dev->irq, SkGeIsrOnePort, SA_SHIRQ,
12552 -                       pAC->Name, dev);
12553 -       } else {
12554 -               printk(KERN_WARNING "sk98lin: Illegal number of ports: %d\n",
12555 -                      pAC->GIni.GIMacsFound);
12556 -               return -EAGAIN;
12557 +       if (!CHIP_ID_YUKON_2(pAC)) {
12558 +               if (pAC->GIni.GIMacsFound == 2) {
12559 +                       Ret = request_irq(dev->irq, SkGeIsr, SA_SHIRQ, dev->name, dev);
12560 +               } else if (pAC->GIni.GIMacsFound == 1) {
12561 +                       Ret = request_irq(dev->irq, SkGeIsrOnePort, SA_SHIRQ, dev->name, dev);
12562 +               } else {
12563 +                       printk(KERN_WARNING "sk98lin: Illegal number of ports: %d\n",
12564 +                               pAC->GIni.GIMacsFound);
12565 +                       return -EAGAIN;
12566 +               }
12567 +       }
12568 +       else {
12569 +               Ret = request_irq(dev->irq, SkY2Isr, SA_SHIRQ, dev->name, dev);
12570         }
12571
12572         if (Ret) {
12573                 printk(KERN_WARNING "sk98lin: Requested IRQ %d is busy.\n",
12574 -                      dev->irq);
12575 +                       dev->irq);
12576                 return -EAGAIN;
12577         }
12578         pAC->AllocFlag |= SK_ALLOC_IRQ;
12579
12580 -       /* Alloc memory for this board (Mem for RxD/TxD) : */
12581 -       if(!BoardAllocMem(pAC)) {
12582 -               printk("No memory for descriptor rings.\n");
12583 -                       return(-EAGAIN);
12584 +       /*
12585 +       ** Alloc descriptor/LETable memory for this board (both RxD/TxD)
12586 +       */
12587 +       if (CHIP_ID_YUKON_2(pAC)) {
12588 +               if (!SkY2AllocateResources(pAC)) {
12589 +                       printk("No memory for Yukon2 settings\n");
12590 +                       return(-EAGAIN);
12591 +               }
12592 +       } else {
12593 +               if(!BoardAllocMem(pAC)) {
12594 +                       printk("No memory for descriptor rings.\n");
12595 +                       return(-EAGAIN);
12596 +               }
12597         }
12598
12599 +#ifdef SK_USE_CSUM
12600         SkCsSetReceiveFlags(pAC,
12601                 SKCS_PROTO_IP | SKCS_PROTO_TCP | SKCS_PROTO_UDP,
12602                 &pAC->CsOfs1, &pAC->CsOfs2, 0);
12603         pAC->CsOfs = (pAC->CsOfs2 << 16) | pAC->CsOfs1;
12604 +#endif
12605
12606 +       /*
12607 +       ** Function BoardInitMem() for Yukon dependent settings...
12608 +       */
12609         BoardInitMem(pAC);
12610         /* tschilling: New common function with minimum size check. */
12611         DualNet = SK_FALSE;
12612 @@ -596,7 +1499,12 @@
12613                 pAC,
12614                 pAC->ActivePort,
12615                 DualNet)) {
12616 -               BoardFreeMem(pAC);
12617 +               if (CHIP_ID_YUKON_2(pAC)) {
12618 +                       SkY2FreeResources(pAC);
12619 +               } else {
12620 +                       BoardFreeMem(pAC);
12621 +               }
12622 +
12623                 printk("sk98lin: SkGeInitAssignRamToQueues failed.\n");
12624                 return(-EAGAIN);
12625         }
12626 @@ -696,16 +1604,20 @@
12627
12628         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
12629                 ("BoardFreeMem\n"));
12630 +
12631 +       if (pAC->pDescrMem) {
12632 +
12633  #if (BITS_PER_LONG == 32)
12634 -       AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound + 8;
12635 +               AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound + 8;
12636  #else
12637 -       AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound
12638 -               + RX_RING_SIZE + 8;
12639 +               AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound
12640 +                       + RX_RING_SIZE + 8;
12641  #endif
12642
12643 -       pci_free_consistent(pAC->PciDev, AllocLength,
12644 +               pci_free_consistent(pAC->PciDev, AllocLength,
12645                             pAC->pDescrMem, pAC->pDescrMemDMA);
12646 -       pAC->pDescrMem = NULL;
12647 +               pAC->pDescrMem = NULL;
12648 +       }
12649  } /* BoardFreeMem */
12650
12651
12652 @@ -714,7 +1626,7 @@
12653   *     BoardInitMem - initiate the descriptor rings
12654   *
12655   * Description:
12656 - *     This function sets the descriptor rings up in memory.
12657 + *     This function sets the descriptor rings or LETables up in memory.
12658   *     The adapter is initialized with the descriptor start addresses.
12659   *
12660   * Returns:    N/A
12661 @@ -729,34 +1641,37 @@
12662         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
12663                 ("BoardInitMem\n"));
12664
12665 -       RxDescrSize = (((sizeof(RXD) - 1) / DESCR_ALIGN) + 1) * DESCR_ALIGN;
12666 -       pAC->RxDescrPerRing = RX_RING_SIZE / RxDescrSize;
12667 -       TxDescrSize = (((sizeof(TXD) - 1) / DESCR_ALIGN) + 1) * DESCR_ALIGN;
12668 -       pAC->TxDescrPerRing = TX_RING_SIZE / RxDescrSize;
12669 +       if (!pAC->GIni.GIYukon2) {
12670 +               RxDescrSize = (((sizeof(RXD) - 1) / DESCR_ALIGN) + 1) * DESCR_ALIGN;
12671 +               pAC->RxDescrPerRing = RX_RING_SIZE / RxDescrSize;
12672 +               TxDescrSize = (((sizeof(TXD) - 1) / DESCR_ALIGN) + 1) * DESCR_ALIGN;
12673 +               pAC->TxDescrPerRing = TX_RING_SIZE / RxDescrSize;
12674
12675 -       for (i=0; i<pAC->GIni.GIMacsFound; i++) {
12676 -               SetupRing(
12677 -                       pAC,
12678 -                       pAC->TxPort[i][0].pTxDescrRing,
12679 -                       pAC->TxPort[i][0].VTxDescrRing,
12680 -                       (RXD**)&pAC->TxPort[i][0].pTxdRingHead,
12681 -                       (RXD**)&pAC->TxPort[i][0].pTxdRingTail,
12682 -                       (RXD**)&pAC->TxPort[i][0].pTxdRingPrev,
12683 -                       &pAC->TxPort[i][0].TxdRingFree,
12684 -                       SK_TRUE);
12685 -               SetupRing(
12686 -                       pAC,
12687 -                       pAC->RxPort[i].pRxDescrRing,
12688 -                       pAC->RxPort[i].VRxDescrRing,
12689 -                       &pAC->RxPort[i].pRxdRingHead,
12690 -                       &pAC->RxPort[i].pRxdRingTail,
12691 -                       &pAC->RxPort[i].pRxdRingPrev,
12692 -                       &pAC->RxPort[i].RxdRingFree,
12693 -                       SK_FALSE);
12694 +               for (i=0; i<pAC->GIni.GIMacsFound; i++) {
12695 +                       SetupRing(
12696 +                               pAC,
12697 +                               pAC->TxPort[i][0].pTxDescrRing,
12698 +                               pAC->TxPort[i][0].VTxDescrRing,
12699 +                               (RXD**)&pAC->TxPort[i][0].pTxdRingHead,
12700 +                               (RXD**)&pAC->TxPort[i][0].pTxdRingTail,
12701 +                               (RXD**)&pAC->TxPort[i][0].pTxdRingPrev,
12702 +                               &pAC->TxPort[i][0].TxdRingFree,
12703 +                               &pAC->TxPort[i][0].TxdRingPrevFree,
12704 +                               SK_TRUE);
12705 +                       SetupRing(
12706 +                               pAC,
12707 +                               pAC->RxPort[i].pRxDescrRing,
12708 +                               pAC->RxPort[i].VRxDescrRing,
12709 +                               &pAC->RxPort[i].pRxdRingHead,
12710 +                               &pAC->RxPort[i].pRxdRingTail,
12711 +                               &pAC->RxPort[i].pRxdRingPrev,
12712 +                               &pAC->RxPort[i].RxdRingFree,
12713 +                               &pAC->RxPort[i].RxdRingFree,
12714 +                               SK_FALSE);
12715 +               }
12716         }
12717  } /* BoardInitMem */
12718
12719 -
12720  /*****************************************************************************
12721   *
12722   *     SetupRing - create one descriptor ring
12723 @@ -776,6 +1691,7 @@
12724  RXD            **ppRingTail,   /* address where the tail should be written */
12725  RXD            **ppRingPrev,   /* address where the tail should be written */
12726  int            *pRingFree,     /* address where the # of free descr. goes */
12727 +int            *pRingPrevFree, /* address where the # of free descr. goes */
12728  SK_BOOL                IsTx)           /* flag: is this a tx ring */
12729  {
12730  int    i;              /* loop counter */
12731 @@ -818,11 +1734,12 @@
12732         }
12733         pPrevDescr->pNextRxd = (RXD*) pMemArea;
12734         pPrevDescr->VNextRxd = VMemArea;
12735 -       pDescr = (RXD*) pMemArea;
12736 -       *ppRingHead = (RXD*) pMemArea;
12737 -       *ppRingTail = *ppRingHead;
12738 -       *ppRingPrev = pPrevDescr;
12739 -       *pRingFree = DescrNum;
12740 +       pDescr               = (RXD*) pMemArea;
12741 +       *ppRingHead          = (RXD*) pMemArea;
12742 +       *ppRingTail          = *ppRingHead;
12743 +       *ppRingPrev          = pPrevDescr;
12744 +       *pRingFree           = DescrNum;
12745 +       *pRingPrevFree       = DescrNum;
12746  } /* SetupRing */
12747
12748
12749 @@ -894,10 +1811,28 @@
12750          * Check and process if its our interrupt
12751          */
12752         SK_IN32(pAC->IoBase, B0_SP_ISRC, &IntSrc);
12753 -       if (IntSrc == 0) {
12754 +       if ((IntSrc == 0) && (!pNet->NetConsoleMode)) {
12755                 return SkIsrRetNone;
12756         }
12757
12758 +#ifdef CONFIG_SK98LIN_NAPI
12759 +       if (netif_rx_schedule_prep(dev)) {
12760 +               pAC->GIni.GIValIrqMask &= ~(NAPI_DRV_IRQS);
12761 +               SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
12762 +               __netif_rx_schedule(dev);
12763 +       }
12764 +
12765 +#ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
12766 +       if (IntSrc & IS_XA1_F) {
12767 +               CLEAR_TX_IRQ(0, TX_PRIO_LOW);
12768 +       }
12769 +       if (IntSrc & IS_XA2_F) {
12770 +               CLEAR_TX_IRQ(1, TX_PRIO_LOW);
12771 +       }
12772 +#endif
12773 +
12774 +
12775 +#else
12776         while (((IntSrc & IRQ_MASK) & ~SPECIAL_IRQS) != 0) {
12777  #if 0 /* software irq currently not used */
12778                 if (IntSrc & IS_IRQ_SW) {
12779 @@ -911,6 +1846,7 @@
12780                                 SK_DBGCAT_DRV_INT_SRC,
12781                                 ("EOF RX1 IRQ\n"));
12782                         ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
12783 +                       CLEAR_AND_START_RX(0);
12784                         SK_PNMI_CNT_RX_INTR(pAC, 0);
12785                 }
12786                 if (IntSrc & IS_R2_F) {
12787 @@ -918,6 +1854,7 @@
12788                                 SK_DBGCAT_DRV_INT_SRC,
12789                                 ("EOF RX2 IRQ\n"));
12790                         ReceiveIrq(pAC, &pAC->RxPort[1], SK_TRUE);
12791 +                       CLEAR_AND_START_RX(1);
12792                         SK_PNMI_CNT_RX_INTR(pAC, 1);
12793                 }
12794  #ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
12795 @@ -925,6 +1862,7 @@
12796                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
12797                                 SK_DBGCAT_DRV_INT_SRC,
12798                                 ("EOF AS TX1 IRQ\n"));
12799 +                       CLEAR_TX_IRQ(0, TX_PRIO_LOW);
12800                         SK_PNMI_CNT_TX_INTR(pAC, 0);
12801                         spin_lock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
12802                         FreeTxDescriptors(pAC, &pAC->TxPort[0][TX_PRIO_LOW]);
12803 @@ -934,6 +1872,7 @@
12804                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
12805                                 SK_DBGCAT_DRV_INT_SRC,
12806                                 ("EOF AS TX2 IRQ\n"));
12807 +                       CLEAR_TX_IRQ(1, TX_PRIO_LOW);
12808                         SK_PNMI_CNT_TX_INTR(pAC, 1);
12809                         spin_lock(&pAC->TxPort[1][TX_PRIO_LOW].TxDesRingLock);
12810                         FreeTxDescriptors(pAC, &pAC->TxPort[1][TX_PRIO_LOW]);
12811 @@ -944,38 +1883,28 @@
12812                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
12813                                 SK_DBGCAT_DRV_INT_SRC,
12814                                 ("EOF SY TX1 IRQ\n"));
12815 +                       CLEAR_TX_IRQ(0, TX_PRIO_HIGH);
12816                         SK_PNMI_CNT_TX_INTR(pAC, 1);
12817                         spin_lock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
12818                         FreeTxDescriptors(pAC, 0, TX_PRIO_HIGH);
12819                         spin_unlock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
12820 -                       ClearTxIrq(pAC, 0, TX_PRIO_HIGH);
12821                 }
12822                 if (IntSrc & IS_XS2_F) {
12823                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
12824                                 SK_DBGCAT_DRV_INT_SRC,
12825                                 ("EOF SY TX2 IRQ\n"));
12826 +                       CLEAR_TX_IRQ(1, TX_PRIO_HIGH);
12827                         SK_PNMI_CNT_TX_INTR(pAC, 1);
12828                         spin_lock(&pAC->TxPort[1][TX_PRIO_HIGH].TxDesRingLock);
12829                         FreeTxDescriptors(pAC, 1, TX_PRIO_HIGH);
12830                         spin_unlock(&pAC->TxPort[1][TX_PRIO_HIGH].TxDesRingLock);
12831 -                       ClearTxIrq(pAC, 1, TX_PRIO_HIGH);
12832                 }
12833  #endif
12834  #endif
12835
12836 -               /* do all IO at once */
12837 -               if (IntSrc & IS_R1_F)
12838 -                       ClearAndStartRx(pAC, 0);
12839 -               if (IntSrc & IS_R2_F)
12840 -                       ClearAndStartRx(pAC, 1);
12841 -#ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
12842 -               if (IntSrc & IS_XA1_F)
12843 -                       ClearTxIrq(pAC, 0, TX_PRIO_LOW);
12844 -               if (IntSrc & IS_XA2_F)
12845 -                       ClearTxIrq(pAC, 1, TX_PRIO_LOW);
12846 -#endif
12847                 SK_IN32(pAC->IoBase, B0_ISRC, &IntSrc);
12848         } /* while (IntSrc & IRQ_MASK != 0) */
12849 +#endif
12850
12851         IntSrc &= pAC->GIni.GIValIrqMask;
12852         if ((IntSrc & SPECIAL_IRQS) || pAC->CheckQueue) {
12853 @@ -989,18 +1918,12 @@
12854                 SkEventDispatcher(pAC, pAC->IoBase);
12855                 spin_unlock(&pAC->SlowPathLock);
12856         }
12857 -       /*
12858 -        * do it all again is case we cleared an interrupt that
12859 -        * came in after handling the ring (OUTs may be delayed
12860 -        * in hardware buffers, but are through after IN)
12861 -        *
12862 -        * rroesler: has been commented out and shifted to
12863 -        *           SkGeDrvEvent(), because it is timer
12864 -        *           guarded now
12865 -        *
12866 +
12867 +#ifndef CONFIG_SK98LIN_NAPI
12868 +       /* Handle interrupts */
12869         ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
12870         ReceiveIrq(pAC, &pAC->RxPort[1], SK_TRUE);
12871 -        */
12872 +#endif
12873
12874         if (pAC->CheckQueue) {
12875                 pAC->CheckQueue = SK_FALSE;
12876 @@ -1043,10 +1966,25 @@
12877          * Check and process if its our interrupt
12878          */
12879         SK_IN32(pAC->IoBase, B0_SP_ISRC, &IntSrc);
12880 -       if (IntSrc == 0) {
12881 +       if ((IntSrc == 0) && (!pNet->NetConsoleMode)) {
12882                 return SkIsrRetNone;
12883         }
12884
12885 +#ifdef CONFIG_SK98LIN_NAPI
12886 +       if (netif_rx_schedule_prep(dev)) {
12887 +               // CLEAR_AND_START_RX(0);
12888 +               // CLEAR_TX_IRQ(0, TX_PRIO_LOW);
12889 +               pAC->GIni.GIValIrqMask &= ~(NAPI_DRV_IRQS);
12890 +               SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
12891 +               __netif_rx_schedule(dev);
12892 +       }
12893 +
12894 +#ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
12895 +       if (IntSrc & IS_XA1_F) {
12896 +               CLEAR_TX_IRQ(0, TX_PRIO_LOW);
12897 +       }
12898 +#endif
12899 +#else
12900         while (((IntSrc & IRQ_MASK) & ~SPECIAL_IRQS) != 0) {
12901  #if 0 /* software irq currently not used */
12902                 if (IntSrc & IS_IRQ_SW) {
12903 @@ -1060,6 +1998,7 @@
12904                                 SK_DBGCAT_DRV_INT_SRC,
12905                                 ("EOF RX1 IRQ\n"));
12906                         ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
12907 +                       CLEAR_AND_START_RX(0);
12908                         SK_PNMI_CNT_RX_INTR(pAC, 0);
12909                 }
12910  #ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
12911 @@ -1067,6 +2006,7 @@
12912                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
12913                                 SK_DBGCAT_DRV_INT_SRC,
12914                                 ("EOF AS TX1 IRQ\n"));
12915 +                       CLEAR_TX_IRQ(0, TX_PRIO_LOW);
12916                         SK_PNMI_CNT_TX_INTR(pAC, 0);
12917                         spin_lock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
12918                         FreeTxDescriptors(pAC, &pAC->TxPort[0][TX_PRIO_LOW]);
12919 @@ -1077,24 +2017,18 @@
12920                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
12921                                 SK_DBGCAT_DRV_INT_SRC,
12922                                 ("EOF SY TX1 IRQ\n"));
12923 +                       CLEAR_TX_IRQ(0, TX_PRIO_HIGH);
12924                         SK_PNMI_CNT_TX_INTR(pAC, 0);
12925                         spin_lock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
12926                         FreeTxDescriptors(pAC, 0, TX_PRIO_HIGH);
12927                         spin_unlock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
12928 -                       ClearTxIrq(pAC, 0, TX_PRIO_HIGH);
12929                 }
12930  #endif
12931  #endif
12932
12933 -               /* do all IO at once */
12934 -               if (IntSrc & IS_R1_F)
12935 -                       ClearAndStartRx(pAC, 0);
12936 -#ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
12937 -               if (IntSrc & IS_XA1_F)
12938 -                       ClearTxIrq(pAC, 0, TX_PRIO_LOW);
12939 -#endif
12940                 SK_IN32(pAC->IoBase, B0_ISRC, &IntSrc);
12941         } /* while (IntSrc & IRQ_MASK != 0) */
12942 +#endif
12943
12944         IntSrc &= pAC->GIni.GIValIrqMask;
12945         if ((IntSrc & SPECIAL_IRQS) || pAC->CheckQueue) {
12946 @@ -1108,17 +2042,10 @@
12947                 SkEventDispatcher(pAC, pAC->IoBase);
12948                 spin_unlock(&pAC->SlowPathLock);
12949         }
12950 -       /*
12951 -        * do it all again is case we cleared an interrupt that
12952 -        * came in after handling the ring (OUTs may be delayed
12953 -        * in hardware buffers, but are through after IN)
12954 -        *
12955 -        * rroesler: has been commented out and shifted to
12956 -        *           SkGeDrvEvent(), because it is timer
12957 -        *           guarded now
12958 -        *
12959 +
12960 +#ifndef CONFIG_SK98LIN_NAPI
12961         ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
12962 -        */
12963 +#endif
12964
12965         /* IRQ is processed - Enable IRQs again*/
12966         SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
12967 @@ -1126,7 +2053,6 @@
12968                 return SkIsrRetHandled;
12969  } /* SkGeIsrOnePort */
12970
12971 -
12972  /****************************************************************************
12973   *
12974   *     SkGeOpen - handle start of initialized adapter
12975 @@ -1144,27 +2070,21 @@
12976   *     != 0 on error
12977   */
12978  static int SkGeOpen(
12979 -struct SK_NET_DEVICE   *dev)
12980 +struct SK_NET_DEVICE *dev)  /* the device that is to be opened */
12981  {
12982 -       DEV_NET                 *pNet;
12983 -       SK_AC                   *pAC;
12984 -       unsigned long   Flags;          /* for spin lock */
12985 -       int                             i;
12986 -       SK_EVPARA               EvPara;         /* an event parameter union */
12987 +       DEV_NET        *pNet = (DEV_NET*) dev->priv;
12988 +       SK_AC          *pAC  = pNet->pAC;
12989 +       unsigned long   Flags;    /* for the spin locks    */
12990 +       int             CurrMac;  /* loop ctr for ports    */
12991
12992 -       pNet = (DEV_NET*) dev->priv;
12993 -       pAC = pNet->pAC;
12994 -
12995         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
12996                 ("SkGeOpen: pAC=0x%lX:\n", (unsigned long)pAC));
12997
12998 -#ifdef SK_DIAG_SUPPORT
12999         if (pAC->DiagModeActive == DIAG_ACTIVE) {
13000                 if (pAC->Pnmi.DiagAttached == SK_DIAG_RUNNING) {
13001                         return (-1);   /* still in use by diag; deny actions */
13002                 }
13003         }
13004 -#endif
13005
13006         if (!try_module_get(THIS_MODULE)) {
13007                 return (-1);    /* increase of usage count not possible */
13008 @@ -1188,6 +2108,11 @@
13009                 SkRlmtInit      (pAC, pAC->IoBase, SK_INIT_IO);
13010                 SkTimerInit     (pAC, pAC->IoBase, SK_INIT_IO);
13011                 pAC->BoardLevel = SK_INIT_IO;
13012 +#ifdef Y2_RECOVERY
13013 +               /* mark entries invalid */
13014 +               pAC->LastPort = 3;
13015 +               pAC->LastOpc = 0xFF;
13016 +#endif
13017         }
13018
13019         if (pAC->BoardLevel != SK_INIT_RUN) {
13020 @@ -1206,45 +2131,61 @@
13021                 pAC->BoardLevel = SK_INIT_RUN;
13022         }
13023
13024 -       for (i=0; i<pAC->GIni.GIMacsFound; i++) {
13025 -               /* Enable transmit descriptor polling. */
13026 -               SkGePollTxD(pAC, pAC->IoBase, i, SK_TRUE);
13027 -               FillRxRing(pAC, &pAC->RxPort[i]);
13028 +       for (CurrMac=0; CurrMac<pAC->GIni.GIMacsFound; CurrMac++) {
13029 +               if (!CHIP_ID_YUKON_2(pAC)) {
13030 +                       /* Enable transmit descriptor polling. */
13031 +                       SkGePollTxD(pAC, pAC->IoBase, CurrMac, SK_TRUE);
13032 +                       FillRxRing(pAC, &pAC->RxPort[CurrMac]);
13033 +                       SkMacRxTxEnable(pAC, pAC->IoBase, pNet->PortNr);
13034 +               }
13035         }
13036 -       SkGeYellowLED(pAC, pAC->IoBase, 1);
13037
13038 -       StartDrvCleanupTimer(pAC);
13039 +       SkGeYellowLED(pAC, pAC->IoBase, 1);
13040         SkDimEnableModerationIfNeeded(pAC);
13041 -       SkDimDisplayModerationSettings(pAC);
13042 -
13043 -       pAC->GIni.GIValIrqMask &= IRQ_MASK;
13044
13045 -       /* enable Interrupts */
13046 -       SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
13047 -       SK_OUT32(pAC->IoBase, B0_HWE_IMSK, IRQ_HWE_MASK);
13048 +       if (!CHIP_ID_YUKON_2(pAC)) {
13049 +               /*
13050 +               ** Has been setup already at SkGeInit(SK_INIT_IO),
13051 +               ** but additional masking added for Genesis & Yukon
13052 +               ** chipsets -> modify it...
13053 +               */
13054 +               pAC->GIni.GIValIrqMask &= IRQ_MASK;
13055 +#ifndef USE_TX_COMPLETE
13056 +               pAC->GIni.GIValIrqMask &= ~(TX_COMPL_IRQS);
13057 +#endif
13058 +       }
13059
13060         spin_lock_irqsave(&pAC->SlowPathLock, Flags);
13061
13062         if ((pAC->RlmtMode != 0) && (pAC->MaxPorts == 0)) {
13063 -               EvPara.Para32[0] = pAC->RlmtNets;
13064 -               EvPara.Para32[1] = -1;
13065 -               SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_SET_NETS,
13066 -                       EvPara);
13067 -               EvPara.Para32[0] = pAC->RlmtMode;
13068 -               EvPara.Para32[1] = 0;
13069 -               SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_MODE_CHANGE,
13070 -                       EvPara);
13071 +               SkLocalEventQueue(pAC, SKGE_RLMT, SK_RLMT_SET_NETS,
13072 +                                       pAC->RlmtNets, -1, SK_FALSE);
13073 +               SkLocalEventQueue(pAC, SKGE_RLMT, SK_RLMT_MODE_CHANGE,
13074 +                                       pAC->RlmtMode, 0, SK_FALSE);
13075         }
13076
13077 -       EvPara.Para32[0] = pNet->NetNr;
13078 -       EvPara.Para32[1] = -1;
13079 -       SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
13080 -       SkEventDispatcher(pAC, pAC->IoBase);
13081 +       SkLocalEventQueue(pAC, SKGE_RLMT, SK_RLMT_START,
13082 +                               pNet->NetNr, -1, SK_TRUE);
13083         spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
13084
13085 -       pAC->MaxPorts++;
13086 -       pNet->Up = 1;
13087 +#ifdef Y2_RECOVERY
13088 +       pNet->TimerExpired = SK_FALSE;
13089 +       pNet->InRecover = SK_FALSE;
13090 +       pNet->NetConsoleMode = SK_FALSE;
13091 +
13092 +       /* Initialize the kernel timer */
13093 +       init_timer(&pNet->KernelTimer);
13094 +       pNet->KernelTimer.function      = SkGeHandleKernelTimer;
13095 +       pNet->KernelTimer.data          = (unsigned long) pNet;
13096 +       pNet->KernelTimer.expires       = jiffies + (HZ/4); /* initially 250ms */
13097 +       add_timer(&pNet->KernelTimer);
13098 +#endif
13099 +
13100 +       /* enable Interrupts */
13101 +       SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
13102 +       SK_OUT32(pAC->IoBase, B0_HWE_IMSK, IRQ_HWE_MASK);
13103
13104 +       pAC->MaxPorts++;
13105
13106         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
13107                 ("SkGeOpen suceeded\n"));
13108 @@ -1265,24 +2206,26 @@
13109   *     error code - on error
13110   */
13111  static int SkGeClose(
13112 -struct SK_NET_DEVICE   *dev)
13113 +struct SK_NET_DEVICE *dev)  /* the device that is to be closed */
13114  {
13115 -       DEV_NET         *pNet;
13116 -       DEV_NET         *newPtrNet;
13117 -       SK_AC           *pAC;
13118 -
13119 -       unsigned long   Flags;          /* for spin lock */
13120 -       int             i;
13121 -       int             PortIdx;
13122 -       SK_EVPARA       EvPara;
13123 -
13124 +       DEV_NET         *pNet = (DEV_NET*) dev->priv;
13125 +       SK_AC           *pAC  = pNet->pAC;
13126 +       DEV_NET         *newPtrNet;
13127 +       unsigned long    Flags;        /* for the spin locks           */
13128 +       int              CurrMac;      /* loop ctr for the current MAC */
13129 +       int              PortIdx;
13130 +#ifdef CONFIG_SK98LIN_NAPI
13131 +       int              WorkToDo = 1; /* min(*budget, dev->quota);    */
13132 +       int              WorkDone = 0;
13133 +#endif
13134         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
13135                 ("SkGeClose: pAC=0x%lX ", (unsigned long)pAC));
13136
13137 -       pNet = (DEV_NET*) dev->priv;
13138 -       pAC = pNet->pAC;
13139 +#ifdef Y2_RECOVERY
13140 +       pNet->InRecover = SK_TRUE;
13141 +       del_timer(&pNet->KernelTimer);
13142 +#endif
13143
13144 -#ifdef SK_DIAG_SUPPORT
13145         if (pAC->DiagModeActive == DIAG_ACTIVE) {
13146                 if (pAC->DiagFlowCtrl == SK_FALSE) {
13147                         module_put(THIS_MODULE);
13148 @@ -1302,7 +2245,6 @@
13149                         pAC->DiagFlowCtrl = SK_FALSE;
13150                 }
13151         }
13152 -#endif
13153
13154         netif_stop_queue(dev);
13155
13156 @@ -1311,8 +2253,6 @@
13157         else
13158                 PortIdx = pNet->NetNr;
13159
13160 -        StopDrvCleanupTimer(pAC);
13161 -
13162         /*
13163          * Clear multicast table, promiscuous mode ....
13164          */
13165 @@ -1324,46 +2264,101 @@
13166                 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
13167                 /* disable interrupts */
13168                 SK_OUT32(pAC->IoBase, B0_IMSK, 0);
13169 -               EvPara.Para32[0] = pNet->NetNr;
13170 -               EvPara.Para32[1] = -1;
13171 -               SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
13172 -               SkEventDispatcher(pAC, pAC->IoBase);
13173 +               SkLocalEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP,
13174 +                                       pNet->NetNr, -1, SK_TRUE);
13175                 SK_OUT32(pAC->IoBase, B0_IMSK, 0);
13176                 /* stop the hardware */
13177 -               SkGeDeInit(pAC, pAC->IoBase);
13178 -               pAC->BoardLevel = SK_INIT_DATA;
13179 +
13180 +
13181 +               if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 1)) {
13182 +               /* RLMT check link state mode */
13183 +                       for (CurrMac=0; CurrMac<pAC->GIni.GIMacsFound; CurrMac++) {
13184 +                               if (CHIP_ID_YUKON_2(pAC))
13185 +                                       SkY2PortStop(   pAC,
13186 +                                                       pAC->IoBase,
13187 +                                                       CurrMac,
13188 +                                                       SK_STOP_ALL,
13189 +                                                       SK_HARD_RST);
13190 +                               else
13191 +                                       SkGeStopPort(   pAC,
13192 +                                                       pAC->IoBase,
13193 +                                                       CurrMac,
13194 +                                                       SK_STOP_ALL,
13195 +                                                       SK_HARD_RST);
13196 +                       } /* for */
13197 +               } else {
13198 +               /* Single link or single port */
13199 +                       if (CHIP_ID_YUKON_2(pAC))
13200 +                               SkY2PortStop(   pAC,
13201 +                                               pAC->IoBase,
13202 +                                               PortIdx,
13203 +                                               SK_STOP_ALL,
13204 +                                               SK_HARD_RST);
13205 +                       else
13206 +                               SkGeStopPort(   pAC,
13207 +                                               pAC->IoBase,
13208 +                                               PortIdx,
13209 +                                               SK_STOP_ALL,
13210 +                                               SK_HARD_RST);
13211 +               }
13212                 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
13213         } else {
13214 -
13215                 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
13216 -               EvPara.Para32[0] = pNet->NetNr;
13217 -               EvPara.Para32[1] = -1;
13218 -               SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
13219 -               SkPnmiEvent(pAC, pAC->IoBase, SK_PNMI_EVT_XMAC_RESET, EvPara);
13220 -               SkEventDispatcher(pAC, pAC->IoBase);
13221 +               SkLocalEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP,
13222 +                                       pNet->NetNr, -1, SK_FALSE);
13223 +               SkLocalEventQueue(pAC, SKGE_PNMI, SK_PNMI_EVT_XMAC_RESET,
13224 +                                       pNet->NetNr, -1, SK_TRUE);
13225                 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
13226
13227                 /* Stop port */
13228                 spin_lock_irqsave(&pAC->TxPort[pNet->PortNr]
13229                         [TX_PRIO_LOW].TxDesRingLock, Flags);
13230 -               SkGeStopPort(pAC, pAC->IoBase, pNet->PortNr,
13231 -                       SK_STOP_ALL, SK_HARD_RST);
13232 +               if (CHIP_ID_YUKON_2(pAC)) {
13233 +                       SkY2PortStop(pAC, pAC->IoBase, pNet->PortNr,
13234 +                               SK_STOP_ALL, SK_HARD_RST);
13235 +               }
13236 +               else {
13237 +                       SkGeStopPort(pAC, pAC->IoBase, pNet->PortNr,
13238 +                               SK_STOP_ALL, SK_HARD_RST);
13239 +               }
13240                 spin_unlock_irqrestore(&pAC->TxPort[pNet->PortNr]
13241                         [TX_PRIO_LOW].TxDesRingLock, Flags);
13242         }
13243
13244         if (pAC->RlmtNets == 1) {
13245                 /* clear all descriptor rings */
13246 -               for (i=0; i<pAC->GIni.GIMacsFound; i++) {
13247 -                       ReceiveIrq(pAC, &pAC->RxPort[i], SK_TRUE);
13248 -                       ClearRxRing(pAC, &pAC->RxPort[i]);
13249 -                       ClearTxRing(pAC, &pAC->TxPort[i][TX_PRIO_LOW]);
13250 +               for (CurrMac=0; CurrMac<pAC->GIni.GIMacsFound; CurrMac++) {
13251 +                       if (!CHIP_ID_YUKON_2(pAC)) {
13252 +#ifdef CONFIG_SK98LIN_NAPI
13253 +                               WorkToDo = 1;
13254 +                               ReceiveIrq(pAC,&pAC->RxPort[CurrMac],
13255 +                                               SK_TRUE,&WorkDone,WorkToDo);
13256 +#else
13257 +                               ReceiveIrq(pAC,&pAC->RxPort[CurrMac],SK_TRUE);
13258 +#endif
13259 +                               ClearRxRing(pAC, &pAC->RxPort[CurrMac]);
13260 +                               ClearTxRing(pAC, &pAC->TxPort[CurrMac][TX_PRIO_LOW]);
13261 +                       } else {
13262 +                               SkY2FreeRxBuffers(pAC, pAC->IoBase, CurrMac);
13263 +                               SkY2FreeTxBuffers(pAC, pAC->IoBase, CurrMac);
13264 +                       }
13265 +               }
13266 +       } else {
13267 +               /* clear port descriptor rings */
13268 +               if (!CHIP_ID_YUKON_2(pAC)) {
13269 +#ifdef CONFIG_SK98LIN_NAPI
13270 +                       WorkToDo = 1;
13271 +                       ReceiveIrq(pAC, &pAC->RxPort[pNet->PortNr], SK_TRUE, &WorkDone, WorkToDo);
13272 +#else
13273 +                       ReceiveIrq(pAC, &pAC->RxPort[pNet->PortNr], SK_TRUE);
13274 +#endif
13275 +                       ClearRxRing(pAC, &pAC->RxPort[pNet->PortNr]);
13276 +                       ClearTxRing(pAC, &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW]);
13277 +               }
13278 +               else {
13279 +                       SkY2FreeRxBuffers(pAC, pAC->IoBase, pNet->PortNr);
13280 +                       SkY2FreeTxBuffers(pAC, pAC->IoBase, pNet->PortNr);
13281                 }
13282 -       } else {
13283 -               /* clear port descriptor rings */
13284 -               ReceiveIrq(pAC, &pAC->RxPort[pNet->PortNr], SK_TRUE);
13285 -               ClearRxRing(pAC, &pAC->RxPort[pNet->PortNr]);
13286 -               ClearTxRing(pAC, &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW]);
13287         }
13288
13289         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
13290 @@ -1374,9 +2369,12 @@
13291                         sizeof(SK_PNMI_STRUCT_DATA));
13292
13293         pAC->MaxPorts--;
13294 -       pNet->Up = 0;
13295 -
13296         module_put(THIS_MODULE);
13297 +
13298 +#ifdef Y2_RECOVERY
13299 +       pNet->InRecover = SK_FALSE;
13300 +#endif
13301 +
13302         return (0);
13303  } /* SkGeClose */
13304
13305 @@ -1434,9 +2432,11 @@
13306         }
13307
13308         /* Transmitter out of resources? */
13309 +#ifdef USE_TX_COMPLETE
13310         if (Rc <= 0) {
13311                 netif_stop_queue(dev);
13312         }
13313 +#endif
13314
13315         /* If not taken, give buffer ownership back to the
13316          * queueing layer.
13317 @@ -1448,6 +2448,94 @@
13318         return (0);
13319  } /* SkGeXmit */
13320
13321 +#ifdef CONFIG_SK98LIN_NAPI
13322 +/*****************************************************************************
13323 + *
13324 + *     SkGePoll - NAPI Rx polling callback for GEnesis and Yukon chipsets
13325 + *
13326 + * Description:
13327 + *     Called by the Linux system in case NAPI polling is activated
13328 + *
13329 + * Returns:
13330 + *     The number of work data still to be handled
13331 + */
13332 +static int SkGePoll(struct net_device *dev, int *budget)
13333 +{
13334 +SK_AC  *pAC = ((DEV_NET*)(dev->priv))->pAC; /* pointer to adapter context */
13335 +int    WorkToDo = min(*budget, dev->quota);
13336 +int    WorkDone = 0;
13337 +
13338 +       if (pAC->dev[0] != pAC->dev[1]) {
13339 +#ifdef USE_TX_COMPLETE
13340 +               spin_lock(&pAC->TxPort[1][TX_PRIO_LOW].TxDesRingLock);
13341 +               FreeTxDescriptors(pAC, &pAC->TxPort[1][TX_PRIO_LOW]);
13342 +               spin_unlock(&pAC->TxPort[1][TX_PRIO_LOW].TxDesRingLock);
13343 +#endif
13344 +               ReceiveIrq(pAC, &pAC->RxPort[1], SK_TRUE, &WorkDone, WorkToDo);
13345 +               CLEAR_AND_START_RX(1);
13346 +       }
13347 +#ifdef USE_TX_COMPLETE
13348 +       spin_lock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
13349 +       FreeTxDescriptors(pAC, &pAC->TxPort[0][TX_PRIO_LOW]);
13350 +       spin_unlock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
13351 +#endif
13352 +       ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE, &WorkDone, WorkToDo);
13353 +       CLEAR_AND_START_RX(0);
13354 +
13355 +       *budget -= WorkDone;
13356 +       dev->quota -= WorkDone;
13357 +
13358 +       if(WorkDone < WorkToDo) {
13359 +               netif_rx_complete(dev);
13360 +               /* enable interrupts again */
13361 +               pAC->GIni.GIValIrqMask |= (NAPI_DRV_IRQS);
13362 +#ifndef USE_TX_COMPLETE
13363 +               pAC->GIni.GIValIrqMask &= ~(TX_COMPL_IRQS);
13364 +#endif
13365 +               SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
13366 +       }
13367 +       return (WorkDone >= WorkToDo);
13368 +} /* SkGePoll */
13369 +#endif
13370 +
13371 +#ifdef SK_POLL_CONTROLLER
13372 +/*****************************************************************************
13373 + *
13374 + *     SkGeNetPoll - Polling "interrupt"
13375 + *
13376 + * Description:
13377 + *     Polling 'interrupt' - used by things like netconsole and netdump
13378 + *     to send skbs without having to re-enable interrupts.
13379 + *     It's not called while the interrupt routine is executing.
13380 + */
13381 +static void SkGeNetPoll(
13382 +struct SK_NET_DEVICE *dev)
13383 +{
13384 +DEV_NET                *pNet;
13385 +SK_AC          *pAC;
13386 +
13387 +       pNet = (DEV_NET*) dev->priv;
13388 +       pAC = pNet->pAC;
13389 +       pNet->NetConsoleMode = SK_TRUE;
13390 +
13391 +               /*  Prevent any reconfiguration while handling
13392 +                   the 'interrupt' */
13393 +               SK_OUT32(pAC->IoBase, B0_IMSK, 0);
13394 +
13395 +               if (!CHIP_ID_YUKON_2(pAC)) {
13396 +               /* Handle the GENESIS Isr */
13397 +                       if (pAC->GIni.GIMacsFound == 2)
13398 +                               SkGeIsr(dev->irq, dev, NULL);
13399 +                       else
13400 +                               SkGeIsrOnePort(dev->irq, dev, NULL);
13401 +               } else {
13402 +               /* Handle the Yukon2 Isr */
13403 +                       SkY2Isr(dev->irq, dev, NULL);
13404 +               }
13405 +
13406 +}
13407 +#endif
13408 +
13409
13410  /*****************************************************************************
13411   *
13412 @@ -1472,7 +2560,7 @@
13413   *     < 0 - on failure: other problems ( -> return failure to upper layers)
13414   */
13415  static int XmitFrame(
13416 -SK_AC          *pAC,           /* pointer to adapter context           */
13417 +SK_AC          *pAC,           /* pointer to adapter context           */
13418  TX_PORT                *pTxPort,       /* pointer to struct of port to send to */
13419  struct sk_buff *pMessage)      /* pointer to send-message              */
13420  {
13421 @@ -1488,11 +2576,14 @@
13422
13423         spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
13424  #ifndef USE_TX_COMPLETE
13425 -       FreeTxDescriptors(pAC, pTxPort);
13426 +       if ((pTxPort->TxdRingPrevFree - pTxPort->TxdRingFree) > 6)  {
13427 +               FreeTxDescriptors(pAC, pTxPort);
13428 +               pTxPort->TxdRingPrevFree = pTxPort->TxdRingFree;
13429 +       }
13430  #endif
13431         if (pTxPort->TxdRingFree == 0) {
13432                 /*
13433 -               ** no enough free descriptors in ring at the moment.
13434 +               ** not enough free descriptors in ring at the moment.
13435                 ** Maybe free'ing some old one help?
13436                 */
13437                 FreeTxDescriptors(pAC, pTxPort);
13438 @@ -1578,7 +2669,7 @@
13439                                    BMU_IRQ_EOF |
13440  #endif
13441                                    pMessage->len;
13442 -        } else {
13443 +       } else {
13444                 pTxd->TBControl = BMU_OWN | BMU_STF | BMU_CHECK |
13445                                   BMU_SW  | BMU_EOF |
13446  #ifdef USE_TX_COMPLETE
13447 @@ -1914,7 +3005,7 @@
13448  SK_U16         Length;         /* data fragment length */
13449  SK_U64         PhysAddr;       /* physical address of a rx buffer */
13450
13451 -       pMsgBlock = alloc_skb(pAC->RxBufSize, GFP_ATOMIC);
13452 +       pMsgBlock = alloc_skb(pRxPort->RxBufSize, GFP_ATOMIC);
13453         if (pMsgBlock == NULL) {
13454                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
13455                         SK_DBGCAT_DRV_ENTRY,
13456 @@ -1928,12 +3019,12 @@
13457         pRxd = pRxPort->pRxdRingTail;
13458         pRxPort->pRxdRingTail = pRxd->pNextRxd;
13459         pRxPort->RxdRingFree--;
13460 -       Length = pAC->RxBufSize;
13461 +       Length = pRxPort->RxBufSize;
13462         PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
13463                 virt_to_page(pMsgBlock->data),
13464                 ((unsigned long) pMsgBlock->data &
13465                 ~PAGE_MASK),
13466 -               pAC->RxBufSize - 2,
13467 +               pRxPort->RxBufSize - 2,
13468                 PCI_DMA_FROMDEVICE);
13469
13470         pRxd->VDataLow  = (SK_U32) (PhysAddr & 0xffffffff);
13471 @@ -1973,7 +3064,7 @@
13472         pRxd = pRxPort->pRxdRingTail;
13473         pRxPort->pRxdRingTail = pRxd->pNextRxd;
13474         pRxPort->RxdRingFree--;
13475 -       Length = pAC->RxBufSize;
13476 +       Length = pRxPort->RxBufSize;
13477
13478         pRxd->VDataLow  = PhysLow;
13479         pRxd->VDataHigh = PhysHigh;
13480 @@ -1998,33 +3089,40 @@
13481   * Returns:    N/A
13482   */
13483  static void ReceiveIrq(
13484 -       SK_AC           *pAC,                   /* pointer to adapter context */
13485 -       RX_PORT         *pRxPort,               /* pointer to receive port struct */
13486 -       SK_BOOL         SlowPathLock)   /* indicates if SlowPathLock is needed */
13487 -{
13488 -RXD                            *pRxd;                  /* pointer to receive descriptors */
13489 -SK_U32                 Control;                /* control field of descriptor */
13490 -struct sk_buff *pMsg;                  /* pointer to message holding frame */
13491 -struct sk_buff *pNewMsg;               /* pointer to a new message for copying frame */
13492 -int                            FrameLength;    /* total length of received frame */
13493 -int                            IpFrameLength;
13494 -SK_MBUF                        *pRlmtMbuf;             /* ptr to a buffer for giving a frame to rlmt */
13495 -SK_EVPARA              EvPara;                 /* an event parameter union */
13496 -unsigned long  Flags;                  /* for spin lock */
13497 -int                            PortIndex = pRxPort->PortIndex;
13498 -unsigned int   Offset;
13499 -unsigned int   NumBytes;
13500 -unsigned int   ForRlmt;
13501 -SK_BOOL                        IsBc;
13502 -SK_BOOL                        IsMc;
13503 -SK_BOOL  IsBadFrame;                   /* Bad frame */
13504 -
13505 -SK_U32                 FrameStat;
13506 -unsigned short Csum1;
13507 -unsigned short Csum2;
13508 -unsigned short Type;
13509 -int                            Result;
13510 -SK_U64                 PhysAddr;
13511 +#ifdef CONFIG_SK98LIN_NAPI
13512 +SK_AC    *pAC,          /* pointer to adapter context          */
13513 +RX_PORT  *pRxPort,      /* pointer to receive port struct      */
13514 +SK_BOOL   SlowPathLock, /* indicates if SlowPathLock is needed */
13515 +int      *WorkDone,
13516 +int       WorkToDo)
13517 +#else
13518 +SK_AC    *pAC,          /* pointer to adapter context          */
13519 +RX_PORT  *pRxPort,      /* pointer to receive port struct      */
13520 +SK_BOOL   SlowPathLock) /* indicates if SlowPathLock is needed */
13521 +#endif
13522 +{
13523 +       RXD             *pRxd;          /* pointer to receive descriptors         */
13524 +       struct sk_buff  *pMsg;          /* pointer to message holding frame       */
13525 +       struct sk_buff  *pNewMsg;       /* pointer to new message for frame copy  */
13526 +       SK_MBUF         *pRlmtMbuf;     /* ptr to buffer for giving frame to RLMT */
13527 +       SK_EVPARA        EvPara;        /* an event parameter union        */
13528 +       SK_U32           Control;       /* control field of descriptor     */
13529 +       unsigned long    Flags;         /* for spin lock handling          */
13530 +       int              PortIndex = pRxPort->PortIndex;
13531 +       int              FrameLength;   /* total length of received frame  */
13532 +       int              IpFrameLength; /* IP length of the received frame */
13533 +       unsigned int     Offset;
13534 +       unsigned int     NumBytes;
13535 +       unsigned int     RlmtNotifier;
13536 +       SK_BOOL          IsBc;          /* we received a broadcast packet  */
13537 +       SK_BOOL          IsMc;          /* we received a multicast packet  */
13538 +       SK_BOOL          IsBadFrame;    /* the frame received is bad!      */
13539 +       SK_U32           FrameStat;
13540 +       unsigned short   Csum1;
13541 +       unsigned short   Csum2;
13542 +       unsigned short   Type;
13543 +       int              Result;
13544 +       SK_U64           PhysAddr;
13545
13546  rx_start:
13547         /* do forever; exit if BMU_OWN found */
13548 @@ -2046,6 +3144,13 @@
13549
13550                 Control = pRxd->RBControl;
13551
13552 +#ifdef CONFIG_SK98LIN_NAPI
13553 +               if (*WorkDone >= WorkToDo) {
13554 +                       break;
13555 +               }
13556 +               (*WorkDone)++;
13557 +#endif
13558 +
13559                 /* check if this descriptor is ready */
13560                 if ((Control & BMU_OWN) != 0) {
13561                         /* this descriptor is not yet ready */
13562 @@ -2054,11 +3159,10 @@
13563                         FillRxRing(pAC, pRxPort);
13564                         return;
13565                 }
13566 -                pAC->DynIrqModInfo.NbrProcessedDescr++;
13567
13568                 /* get length of frame and check it */
13569                 FrameLength = Control & BMU_BBC;
13570 -               if (FrameLength > pAC->RxBufSize) {
13571 +               if (FrameLength > pRxPort->RxBufSize) {
13572                         goto rx_failed;
13573                 }
13574
13575 @@ -2073,8 +3177,8 @@
13576                 FrameStat = pRxd->FrameStat;
13577
13578                 /* check for frame length mismatch */
13579 -#define XMR_FS_LEN_SHIFT        18
13580 -#define GMR_FS_LEN_SHIFT        16
13581 +#define XMR_FS_LEN_SHIFT       18
13582 +#define GMR_FS_LEN_SHIFT       16
13583                 if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
13584                         if (FrameLength != (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)) {
13585                                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
13586 @@ -2084,8 +3188,7 @@
13587                                         (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)));
13588                                 goto rx_failed;
13589                         }
13590 -               }
13591 -               else {
13592 +               } else {
13593                         if (FrameLength != (SK_U32) (FrameStat >> GMR_FS_LEN_SHIFT)) {
13594                                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
13595                                         SK_DBGCAT_DRV_RX_PROGRESS,
13596 @@ -2118,9 +3221,6 @@
13597  /* DumpMsg(pMsg, "Rx");        */
13598
13599                 if ((Control & BMU_STAT_VAL) != BMU_STAT_VAL || (IsBadFrame)) {
13600 -#if 0
13601 -                       (FrameStat & (XMR_FS_ANY_ERR | XMR_FS_2L_VLAN)) != 0) {
13602 -#endif
13603                         /* there is a receive error in this frame */
13604                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
13605                                 SK_DBGCAT_DRV_RX_PROGRESS,
13606 @@ -2128,6 +3228,20 @@
13607                                 "Control: %x\nRxStat: %x\n",
13608                                 Control, FrameStat));
13609
13610 +                       PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
13611 +                       PhysAddr |= (SK_U64) pRxd->VDataLow;
13612 +
13613 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5)
13614 +                       pci_dma_sync_single(pAC->PciDev,
13615 +                                               (dma_addr_t) PhysAddr,
13616 +                                               FrameLength,
13617 +                                               PCI_DMA_FROMDEVICE);
13618 +#else
13619 +                       pci_dma_sync_single_for_cpu(pAC->PciDev,
13620 +                                               (dma_addr_t) PhysAddr,
13621 +                                               FrameLength,
13622 +                                               PCI_DMA_FROMDEVICE);
13623 +#endif
13624                         ReQueueRxBuffer(pAC, pRxPort, pMsg,
13625                                 pRxd->VDataHigh, pRxd->VDataLow);
13626
13627 @@ -2147,150 +3261,107 @@
13628                         skb_put(pNewMsg, FrameLength);
13629                         PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
13630                         PhysAddr |= (SK_U64) pRxd->VDataLow;
13631 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5)
13632 +                       pci_dma_sync_single(pAC->PciDev,
13633 +                                               (dma_addr_t) PhysAddr,
13634 +                                               FrameLength,
13635 +                                               PCI_DMA_FROMDEVICE);
13636 +#else
13637 +                       pci_dma_sync_single_for_device(pAC->PciDev,
13638 +                                               (dma_addr_t) PhysAddr,
13639 +                                               FrameLength,
13640 +                                               PCI_DMA_FROMDEVICE);
13641 +#endif
13642
13643 -                       pci_dma_sync_single_for_cpu(pAC->PciDev,
13644 -                                                   (dma_addr_t) PhysAddr,
13645 -                                                   FrameLength,
13646 -                                                   PCI_DMA_FROMDEVICE);
13647                         eth_copy_and_sum(pNewMsg, pMsg->data,
13648                                 FrameLength, 0);
13649 -                       pci_dma_sync_single_for_device(pAC->PciDev,
13650 -                                                      (dma_addr_t) PhysAddr,
13651 -                                                      FrameLength,
13652 -                                                      PCI_DMA_FROMDEVICE);
13653                         ReQueueRxBuffer(pAC, pRxPort, pMsg,
13654                                 pRxd->VDataHigh, pRxd->VDataLow);
13655
13656                         pMsg = pNewMsg;
13657
13658 -               }
13659 -               else {
13660 +               } else {
13661                         /*
13662                          * if large frame, or SKB allocation failed, pass
13663                          * the SKB directly to the networking
13664                          */
13665 -
13666                         PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
13667                         PhysAddr |= (SK_U64) pRxd->VDataLow;
13668
13669                         /* release the DMA mapping */
13670                         pci_unmap_single(pAC->PciDev,
13671                                          PhysAddr,
13672 -                                        pAC->RxBufSize - 2,
13673 +                                        pRxPort->RxBufSize - 2,
13674                                          PCI_DMA_FROMDEVICE);
13675 +                       skb_put(pMsg, FrameLength); /* set message len */
13676 +                       pMsg->ip_summed = CHECKSUM_NONE; /* initial default */
13677
13678 -                       /* set length in message */
13679 -                       skb_put(pMsg, FrameLength);
13680 -                       /* hardware checksum */
13681 -                       Type = ntohs(*((short*)&pMsg->data[12]));
13682 -
13683 -#ifdef USE_SK_RX_CHECKSUM
13684 -                       if (Type == 0x800) {
13685 -                               Csum1=le16_to_cpu(pRxd->TcpSums & 0xffff);
13686 -                               Csum2=le16_to_cpu((pRxd->TcpSums >> 16) & 0xffff);
13687 -                               IpFrameLength = (int) ntohs((unsigned short)
13688 -                                                               ((unsigned short *) pMsg->data)[8]);
13689 -
13690 -                               /*
13691 -                                * Test: If frame is padded, a check is not possible!
13692 -                                * Frame not padded? Length difference must be 14 (0xe)!
13693 -                                */
13694 -                               if ((FrameLength - IpFrameLength) != 0xe) {
13695 -                               /* Frame padded => TCP offload not possible! */
13696 -                                       pMsg->ip_summed = CHECKSUM_NONE;
13697 -                               } else {
13698 -                               /* Frame not padded => TCP offload! */
13699 -                                       if ((((Csum1 & 0xfffe) && (Csum2 & 0xfffe)) &&
13700 -                                               (pAC->GIni.GIChipId == CHIP_ID_GENESIS)) ||
13701 -                                               (pAC->ChipsetType)) {
13702 -                                               Result = SkCsGetReceiveInfo(pAC,
13703 -                                                       &pMsg->data[14],
13704 -                                                       Csum1, Csum2, pRxPort->PortIndex);
13705 -                                               if (Result ==
13706 -                                                       SKCS_STATUS_IP_FRAGMENT ||
13707 -                                                       Result ==
13708 -                                                       SKCS_STATUS_IP_CSUM_OK ||
13709 -                                                       Result ==
13710 -                                                       SKCS_STATUS_TCP_CSUM_OK ||
13711 -                                                       Result ==
13712 -                                                       SKCS_STATUS_UDP_CSUM_OK) {
13713 -                                                               pMsg->ip_summed =
13714 -                                                               CHECKSUM_UNNECESSARY;
13715 -                                               }
13716 -                                               else if (Result ==
13717 -                                                       SKCS_STATUS_TCP_CSUM_ERROR ||
13718 -                                                       Result ==
13719 -                                                       SKCS_STATUS_UDP_CSUM_ERROR ||
13720 -                                                       Result ==
13721 -                                                       SKCS_STATUS_IP_CSUM_ERROR_UDP ||
13722 -                                                       Result ==
13723 -                                                       SKCS_STATUS_IP_CSUM_ERROR_TCP ||
13724 -                                                       Result ==
13725 -                                                       SKCS_STATUS_IP_CSUM_ERROR ) {
13726 -                                                       /* HW Checksum error */
13727 -                                                       SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
13728 -                                                       SK_DBGCAT_DRV_RX_PROGRESS,
13729 -                                                       ("skge: CRC error. Frame dropped!\n"));
13730 -                                                       goto rx_failed;
13731 -                                               } else {
13732 -                                                               pMsg->ip_summed =
13733 -                                                               CHECKSUM_NONE;
13734 -                                               }
13735 -                                       }/* checksumControl calculation valid */
13736 -                               } /* Frame length check */
13737 -                       } /* IP frame */
13738 -#else
13739 -                       pMsg->ip_summed = CHECKSUM_NONE;
13740 -#endif
13741 +                       if (pRxPort->UseRxCsum) {
13742 +                               Type = ntohs(*((short*)&pMsg->data[12]));
13743 +                               if (Type == 0x800) {
13744 +                                       IpFrameLength = (int) ntohs((unsigned short)
13745 +                                                       ((unsigned short *) pMsg->data)[8]);
13746 +                                       if ((FrameLength - IpFrameLength) == 0xe) {
13747 +                                               Csum1=le16_to_cpu(pRxd->TcpSums & 0xffff);
13748 +                                               Csum2=le16_to_cpu((pRxd->TcpSums >> 16) & 0xffff);
13749 +                                               if ((((Csum1 & 0xfffe) && (Csum2 & 0xfffe)) &&
13750 +                                                       (pAC->GIni.GIChipId == CHIP_ID_GENESIS)) ||
13751 +                                                       (pAC->ChipsetType)) {
13752 +                                                       Result = SkCsGetReceiveInfo(pAC, &pMsg->data[14],
13753 +                                                               Csum1, Csum2, PortIndex);
13754 +                                                       if ((Result == SKCS_STATUS_IP_FRAGMENT) ||
13755 +                                                           (Result == SKCS_STATUS_IP_CSUM_OK)  ||
13756 +                                                           (Result == SKCS_STATUS_TCP_CSUM_OK) ||
13757 +                                                           (Result == SKCS_STATUS_UDP_CSUM_OK)) {
13758 +                                                               pMsg->ip_summed = CHECKSUM_UNNECESSARY;
13759 +                                                       } else if ((Result == SKCS_STATUS_TCP_CSUM_ERROR)    ||
13760 +                                                                  (Result == SKCS_STATUS_UDP_CSUM_ERROR)    ||
13761 +                                                                  (Result == SKCS_STATUS_IP_CSUM_ERROR_UDP) ||
13762 +                                                                  (Result == SKCS_STATUS_IP_CSUM_ERROR_TCP) ||
13763 +                                                                  (Result == SKCS_STATUS_IP_CSUM_ERROR)) {
13764 +                                                               /* HW Checksum error */
13765 +                                                               SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
13766 +                                                               SK_DBGCAT_DRV_RX_PROGRESS,
13767 +                                                               ("skge: CRC error. Frame dropped!\n"));
13768 +                                                               goto rx_failed;
13769 +                                                       } else {
13770 +                                                               pMsg->ip_summed = CHECKSUM_NONE;
13771 +                                                       }
13772 +                                               }/* checksumControl calculation valid */
13773 +                                       } /* Frame length check */
13774 +                               } /* IP frame */
13775 +                       } /* pRxPort->UseRxCsum */
13776                 } /* frame > SK_COPY_TRESHOLD */
13777
13778                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("V"));
13779 -               ForRlmt = SK_RLMT_RX_PROTOCOL;
13780 -#if 0
13781 -               IsBc = (FrameStat & XMR_FS_BC)==XMR_FS_BC;
13782 -#endif
13783 +               RlmtNotifier = SK_RLMT_RX_PROTOCOL;
13784                 SK_RLMT_PRE_LOOKAHEAD(pAC, PortIndex, FrameLength,
13785 -                       IsBc, &Offset, &NumBytes);
13786 +                                       IsBc, &Offset, &NumBytes);
13787                 if (NumBytes != 0) {
13788 -#if 0
13789 -                       IsMc = (FrameStat & XMR_FS_MC)==XMR_FS_MC;
13790 -#endif
13791 -                       SK_RLMT_LOOKAHEAD(pAC, PortIndex,
13792 -                               &pMsg->data[Offset],
13793 -                               IsBc, IsMc, &ForRlmt);
13794 +                       SK_RLMT_LOOKAHEAD(pAC,PortIndex,&pMsg->data[Offset],
13795 +                                               IsBc,IsMc,&RlmtNotifier);
13796                 }
13797 -               if (ForRlmt == SK_RLMT_RX_PROTOCOL) {
13798 -                                       SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("W"));
13799 +               if (RlmtNotifier == SK_RLMT_RX_PROTOCOL) {
13800 +                       SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("W"));
13801                         /* send up only frames from active port */
13802 -                       if ((PortIndex == pAC->ActivePort) ||
13803 -                               (pAC->RlmtNets == 2)) {
13804 -                               /* frame for upper layer */
13805 +                       if ((PortIndex == pAC->ActivePort)||(pAC->RlmtNets == 2)) {
13806                                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("U"));
13807  #ifdef xDEBUG
13808                                 DumpMsg(pMsg, "Rx");
13809  #endif
13810 -                               SK_PNMI_CNT_RX_OCTETS_DELIVERED(pAC,
13811 -                                       FrameLength, pRxPort->PortIndex);
13812 -
13813 -                               pMsg->dev = pAC->dev[pRxPort->PortIndex];
13814 -                               pMsg->protocol = eth_type_trans(pMsg,
13815 -                                       pAC->dev[pRxPort->PortIndex]);
13816 -                               netif_rx(pMsg);
13817 -                               pAC->dev[pRxPort->PortIndex]->last_rx = jiffies;
13818 -                       }
13819 -                       else {
13820 -                               /* drop frame */
13821 +                               SK_PNMI_CNT_RX_OCTETS_DELIVERED(pAC,FrameLength,PortIndex);
13822 +                               pMsg->dev = pAC->dev[PortIndex];
13823 +                               pMsg->protocol = eth_type_trans(pMsg,pAC->dev[PortIndex]);
13824 +                               netif_rx(pMsg); /* frame for upper layer */
13825 +                               pAC->dev[PortIndex]->last_rx = jiffies;
13826 +                       } else {
13827                                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
13828 -                                       SK_DBGCAT_DRV_RX_PROGRESS,
13829 -                                       ("D"));
13830 -                               DEV_KFREE_SKB(pMsg);
13831 +                                       SK_DBGCAT_DRV_RX_PROGRESS,("D"));
13832 +                               DEV_KFREE_SKB(pMsg); /* drop frame */
13833                         }
13834 -
13835 -               } /* if not for rlmt */
13836 -               else {
13837 -                       /* packet for rlmt */
13838 +               } else { /* packet for RLMT stack */
13839                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
13840 -                               SK_DBGCAT_DRV_RX_PROGRESS, ("R"));
13841 +                               SK_DBGCAT_DRV_RX_PROGRESS,("R"));
13842                         pRlmtMbuf = SkDrvAllocRlmtMbuf(pAC,
13843                                 pAC->IoBase, FrameLength);
13844                         if (pRlmtMbuf != NULL) {
13845 @@ -2318,32 +3389,22 @@
13846                                 }
13847
13848                                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
13849 -                                       SK_DBGCAT_DRV_RX_PROGRESS,
13850 -                                       ("Q"));
13851 +                                       SK_DBGCAT_DRV_RX_PROGRESS,("Q"));
13852                         }
13853 -                       if ((pAC->dev[pRxPort->PortIndex]->flags &
13854 -                               (IFF_PROMISC | IFF_ALLMULTI)) != 0 ||
13855 -                               (ForRlmt & SK_RLMT_RX_PROTOCOL) ==
13856 -                               SK_RLMT_RX_PROTOCOL) {
13857 -                               pMsg->dev = pAC->dev[pRxPort->PortIndex];
13858 -                               pMsg->protocol = eth_type_trans(pMsg,
13859 -                                       pAC->dev[pRxPort->PortIndex]);
13860 +                       if ((pAC->dev[PortIndex]->flags & (IFF_PROMISC | IFF_ALLMULTI)) ||
13861 +                           (RlmtNotifier & SK_RLMT_RX_PROTOCOL)) {
13862 +                               pMsg->dev = pAC->dev[PortIndex];
13863 +                               pMsg->protocol = eth_type_trans(pMsg,pAC->dev[PortIndex]);
13864                                 netif_rx(pMsg);
13865 -                               pAC->dev[pRxPort->PortIndex]->last_rx = jiffies;
13866 -                       }
13867 -                       else {
13868 +                               pAC->dev[PortIndex]->last_rx = jiffies;
13869 +                       } else {
13870                                 DEV_KFREE_SKB(pMsg);
13871                         }
13872 -
13873 -               } /* if packet for rlmt */
13874 +               } /* if packet for RLMT stack */
13875         } /* for ... scanning the RXD ring */
13876
13877         /* RXD ring is empty -> fill and restart */
13878         FillRxRing(pAC, pRxPort);
13879 -       /* do not start if called from Close */
13880 -       if (pAC->BoardLevel > SK_INIT_DATA) {
13881 -               ClearAndStartRx(pAC, PortIndex);
13882 -       }
13883         return;
13884
13885  rx_failed:
13886 @@ -2357,7 +3418,7 @@
13887         PhysAddr |= (SK_U64) pRxd->VDataLow;
13888         pci_unmap_page(pAC->PciDev,
13889                          PhysAddr,
13890 -                        pAC->RxBufSize - 2,
13891 +                        pRxPort->RxBufSize - 2,
13892                          PCI_DMA_FROMDEVICE);
13893         DEV_KFREE_SKB_IRQ(pRxd->pMBuf);
13894         pRxd->pMBuf = NULL;
13895 @@ -2367,49 +3428,6 @@
13896
13897  } /* ReceiveIrq */
13898
13899 -
13900 -/*****************************************************************************
13901 - *
13902 - *     ClearAndStartRx - give a start receive command to BMU, clear IRQ
13903 - *
13904 - * Description:
13905 - *     This function sends a start command and a clear interrupt
13906 - *     command for one receive queue to the BMU.
13907 - *
13908 - * Returns: N/A
13909 - *     none
13910 - */
13911 -static void ClearAndStartRx(
13912 -SK_AC  *pAC,           /* pointer to the adapter context */
13913 -int    PortIndex)      /* index of the receive port (XMAC) */
13914 -{
13915 -       SK_OUT8(pAC->IoBase,
13916 -               RxQueueAddr[PortIndex]+Q_CSR,
13917 -               CSR_START | CSR_IRQ_CL_F);
13918 -} /* ClearAndStartRx */
13919 -
13920 -
13921 -/*****************************************************************************
13922 - *
13923 - *     ClearTxIrq - give a clear transmit IRQ command to BMU
13924 - *
13925 - * Description:
13926 - *     This function sends a clear tx IRQ command for one
13927 - *     transmit queue to the BMU.
13928 - *
13929 - * Returns: N/A
13930 - */
13931 -static void ClearTxIrq(
13932 -SK_AC  *pAC,           /* pointer to the adapter context */
13933 -int    PortIndex,      /* index of the transmit port (XMAC) */
13934 -int    Prio)           /* priority or normal queue */
13935 -{
13936 -       SK_OUT8(pAC->IoBase,
13937 -               TxQueueAddr[PortIndex][Prio]+Q_CSR,
13938 -               CSR_IRQ_CL_F);
13939 -} /* ClearTxIrq */
13940 -
13941 -
13942  /*****************************************************************************
13943   *
13944   *     ClearRxRing - remove all buffers from the receive ring
13945 @@ -2440,7 +3458,7 @@
13946                         PhysAddr |= (SK_U64) pRxd->VDataLow;
13947                         pci_unmap_page(pAC->PciDev,
13948                                          PhysAddr,
13949 -                                        pAC->RxBufSize - 2,
13950 +                                        pRxPort->RxBufSize - 2,
13951                                          PCI_DMA_FROMDEVICE);
13952                         DEV_KFREE_SKB(pRxd->pMBuf);
13953                         pRxd->pMBuf = NULL;
13954 @@ -2500,29 +3518,30 @@
13955
13956  DEV_NET *pNet = (DEV_NET*) dev->priv;
13957  SK_AC  *pAC = pNet->pAC;
13958 +int    Ret;
13959
13960  struct sockaddr        *addr = p;
13961  unsigned long  Flags;
13962
13963         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
13964                 ("SkGeSetMacAddr starts now...\n"));
13965 -       if(netif_running(dev))
13966 -               return -EBUSY;
13967
13968         memcpy(dev->dev_addr, addr->sa_data,dev->addr_len);
13969
13970         spin_lock_irqsave(&pAC->SlowPathLock, Flags);
13971
13972         if (pAC->RlmtNets == 2)
13973 -               SkAddrOverride(pAC, pAC->IoBase, pNet->NetNr,
13974 +               Ret = SkAddrOverride(pAC, pAC->IoBase, pNet->NetNr,
13975                         (SK_MAC_ADDR*)dev->dev_addr, SK_ADDR_VIRTUAL_ADDRESS);
13976         else
13977 -               SkAddrOverride(pAC, pAC->IoBase, pAC->ActivePort,
13978 +               Ret = SkAddrOverride(pAC, pAC->IoBase, pAC->ActivePort,
13979                         (SK_MAC_ADDR*)dev->dev_addr, SK_ADDR_VIRTUAL_ADDRESS);
13980 -
13981 -
13982
13983         spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
13984 +
13985 +       if (Ret != SK_ADDR_OVERRIDE_SUCCESS)
13986 +               return -EBUSY;
13987 +
13988         return 0;
13989  } /* SkGeSetMacAddr */
13990
13991 @@ -2604,6 +3623,45 @@
13992
13993  /*****************************************************************************
13994   *
13995 + *     SkSetMtuBufferSize - set the MTU buffer to another value
13996 + *
13997 + * Description:
13998 + *     This function sets the new buffers and is called whenever the MTU
13999 + *      size is changed
14000 + *
14001 + * Returns:
14002 + *     N/A
14003 + */
14004 +
14005 +static void SkSetMtuBufferSize(
14006 +SK_AC  *pAC,           /* pointer to adapter context */
14007 +int    PortNr,         /* Port number */
14008 +int    Mtu)            /* pointer to tx prt struct */
14009 +{
14010 +       pAC->RxPort[PortNr].RxBufSize = Mtu + 32;
14011 +
14012 +       /* RxBufSize must be a multiple of 8 */
14013 +       while (pAC->RxPort[PortNr].RxBufSize % 8) {
14014 +               pAC->RxPort[PortNr].RxBufSize =
14015 +                       pAC->RxPort[PortNr].RxBufSize + 1;
14016 +       }
14017 +
14018 +       if (Mtu > 1500) {
14019 +               pAC->GIni.GP[PortNr].PPortUsage = SK_JUMBO_LINK;
14020 +       } else {
14021 +               if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
14022 +                       pAC->GIni.GP[PortNr].PPortUsage = SK_MUL_LINK;
14023 +               } else {
14024 +                       pAC->GIni.GP[PortNr].PPortUsage = SK_RED_LINK;
14025 +               }
14026 +       }
14027 +
14028 +       return;
14029 +}
14030 +
14031 +
14032 +/*****************************************************************************
14033 + *
14034   *     SkGeChangeMtu - set the MTU to another value
14035   *
14036   * Description:
14037 @@ -2617,12 +3675,13 @@
14038   */
14039  static int SkGeChangeMtu(struct SK_NET_DEVICE *dev, int NewMtu)
14040  {
14041 -DEV_NET                *pNet;
14042 -DEV_NET                *pOtherNet;
14043 -SK_AC          *pAC;
14044 -unsigned long  Flags;
14045 -int            i;
14046 -SK_EVPARA      EvPara;
14047 +DEV_NET                        *pNet;
14048 +SK_AC                  *pAC;
14049 +unsigned long          Flags;
14050 +#ifdef CONFIG_SK98LIN_NAPI
14051 +int                    WorkToDo = 1; // min(*budget, dev->quota);
14052 +int                    WorkDone = 0;
14053 +#endif
14054
14055         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
14056                 ("SkGeChangeMtu starts now...\n"));
14057 @@ -2630,15 +3689,12 @@
14058         pNet = (DEV_NET*) dev->priv;
14059         pAC  = pNet->pAC;
14060
14061 +       /* MTU size outside the spec */
14062         if ((NewMtu < 68) || (NewMtu > SK_JUMBO_MTU)) {
14063                 return -EINVAL;
14064         }
14065
14066 -       if(pAC->BoardLevel != SK_INIT_RUN) {
14067 -               return -EINVAL;
14068 -       }
14069 -
14070 -#ifdef SK_DIAG_SUPPORT
14071 +       /* Diag access active */
14072         if (pAC->DiagModeActive == DIAG_ACTIVE) {
14073                 if (pAC->DiagFlowCtrl == SK_FALSE) {
14074                         return -1; /* still in use, deny any actions of MTU */
14075 @@ -2646,200 +3702,74 @@
14076                         pAC->DiagFlowCtrl = SK_FALSE;
14077                 }
14078         }
14079 -#endif
14080 -
14081 -       pNet->Mtu = NewMtu;
14082 -       pOtherNet = (DEV_NET*)pAC->dev[1 - pNet->NetNr]->priv;
14083 -       if ((pOtherNet->Mtu>1500) && (NewMtu<=1500) && (pOtherNet->Up==1)) {
14084 -               return(0);
14085 -       }
14086
14087 -       pAC->RxBufSize = NewMtu + 32;
14088         dev->mtu = NewMtu;
14089 +       SkSetMtuBufferSize(pAC, pNet->PortNr, NewMtu);
14090
14091 -       SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
14092 -               ("New MTU: %d\n", NewMtu));
14093 +       if(!netif_running(dev)) {
14094 +       /* Preset MTU size if device not ready/running */
14095 +               return 0;
14096 +       }
14097
14098 -       /*
14099 -       ** Prevent any reconfiguration while changing the MTU
14100 -       ** by disabling any interrupts
14101 -       */
14102 +       /*  Prevent any reconfiguration while changing the MTU
14103 +           by disabling any interrupts */
14104         SK_OUT32(pAC->IoBase, B0_IMSK, 0);
14105         spin_lock_irqsave(&pAC->SlowPathLock, Flags);
14106
14107 -       /*
14108 -       ** Notify RLMT that any ports are to be stopped
14109 -       */
14110 -       EvPara.Para32[0] =  0;
14111 -       EvPara.Para32[1] = -1;
14112 -       if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
14113 -               SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
14114 -               EvPara.Para32[0] =  1;
14115 -               SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
14116 -       } else {
14117 -               SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
14118 -       }
14119 -
14120 -       /*
14121 -       ** After calling the SkEventDispatcher(), RLMT is aware about
14122 -       ** the stopped ports -> configuration can take place!
14123 -       */
14124 -       SkEventDispatcher(pAC, pAC->IoBase);
14125 -
14126 -       for (i=0; i<pAC->GIni.GIMacsFound; i++) {
14127 -               spin_lock(&pAC->TxPort[i][TX_PRIO_LOW].TxDesRingLock);
14128 -               netif_stop_queue(pAC->dev[i]);
14129 +       /* Notify RLMT that the port has to be stopped */
14130 +       netif_stop_queue(dev);
14131 +       SkLocalEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP,
14132 +                               pNet->PortNr, -1, SK_TRUE);
14133 +       spin_lock(&pAC->TxPort[pNet->PortNr][TX_PRIO_LOW].TxDesRingLock);
14134
14135 -       }
14136
14137 -       /*
14138 -       ** Depending on the desired MTU size change, a different number of
14139 -       ** RX buffers need to be allocated
14140 -       */
14141 -       if (NewMtu > 1500) {
14142 -           /*
14143 -           ** Use less rx buffers
14144 -           */
14145 -           for (i=0; i<pAC->GIni.GIMacsFound; i++) {
14146 -               if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
14147 -                   pAC->RxPort[i].RxFillLimit =  pAC->RxDescrPerRing -
14148 -                                                (pAC->RxDescrPerRing / 4);
14149 -               } else {
14150 -                   if (i == pAC->ActivePort) {
14151 -                       pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing -
14152 -                                                   (pAC->RxDescrPerRing / 4);
14153 -                   } else {
14154 -                       pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing -
14155 -                                                   (pAC->RxDescrPerRing / 10);
14156 -                   }
14157 -               }
14158 -           }
14159 +       /* Change RxFillLimit to 1 */
14160 +       if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
14161 +               pAC->RxPort[pNet->PortNr].RxFillLimit = 1;
14162         } else {
14163 -           /*
14164 -           ** Use the normal amount of rx buffers
14165 -           */
14166 -           for (i=0; i<pAC->GIni.GIMacsFound; i++) {
14167 -               if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
14168 -                   pAC->RxPort[i].RxFillLimit = 1;
14169 -               } else {
14170 -                   if (i == pAC->ActivePort) {
14171 -                       pAC->RxPort[i].RxFillLimit = 1;
14172 -                   } else {
14173 -                       pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing -
14174 -                                                   (pAC->RxDescrPerRing / 4);
14175 -                   }
14176 -               }
14177 -           }
14178 +               pAC->RxPort[1 - pNet->PortNr].RxFillLimit = 1;
14179 +               pAC->RxPort[pNet->PortNr].RxFillLimit = pAC->RxDescrPerRing -
14180 +                                       (pAC->RxDescrPerRing / 4);
14181         }
14182 -
14183 -       SkGeDeInit(pAC, pAC->IoBase);
14184
14185 -       /*
14186 -       ** enable/disable hardware support for long frames
14187 -       */
14188 -       if (NewMtu > 1500) {
14189 -// pAC->JumboActivated = SK_TRUE; /* is never set back !!! */
14190 -               pAC->GIni.GIPortUsage = SK_JUMBO_LINK;
14191 +       /* clear and reinit the rx rings here, because of new MTU size */
14192 +       if (CHIP_ID_YUKON_2(pAC)) {
14193 +               SkY2PortStop(pAC, pAC->IoBase, pNet->PortNr, SK_STOP_ALL, SK_SOFT_RST);
14194 +               SkY2AllocateRxBuffers(pAC, pAC->IoBase, pNet->PortNr);
14195 +               SkY2PortStart(pAC, pAC->IoBase, pNet->PortNr);
14196         } else {
14197 -           if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
14198 -               pAC->GIni.GIPortUsage = SK_MUL_LINK;
14199 -           } else {
14200 -               pAC->GIni.GIPortUsage = SK_RED_LINK;
14201 -           }
14202 -       }
14203 +//             SkGeStopPort(pAC, pAC->IoBase, pNet->PortNr, SK_STOP_ALL, SK_SOFT_RST);
14204 +#ifdef CONFIG_SK98LIN_NAPI
14205 +               WorkToDo = 1;
14206 +               ReceiveIrq(pAC, &pAC->RxPort[pNet->PortNr], SK_TRUE, &WorkDone, WorkToDo);
14207 +#else
14208 +               ReceiveIrq(pAC, &pAC->RxPort[pNet->PortNr], SK_TRUE);
14209 +#endif
14210 +               ClearRxRing(pAC, &pAC->RxPort[pNet->PortNr]);
14211 +               FillRxRing(pAC, &pAC->RxPort[pNet->PortNr]);
14212
14213 -       SkGeInit(   pAC, pAC->IoBase, SK_INIT_IO);
14214 -       SkI2cInit(  pAC, pAC->IoBase, SK_INIT_IO);
14215 -       SkEventInit(pAC, pAC->IoBase, SK_INIT_IO);
14216 -       SkPnmiInit( pAC, pAC->IoBase, SK_INIT_IO);
14217 -       SkAddrInit( pAC, pAC->IoBase, SK_INIT_IO);
14218 -       SkRlmtInit( pAC, pAC->IoBase, SK_INIT_IO);
14219 -       SkTimerInit(pAC, pAC->IoBase, SK_INIT_IO);
14220 -
14221 -       /*
14222 -       ** tschilling:
14223 -       ** Speed and others are set back to default in level 1 init!
14224 -       */
14225 -       GetConfiguration(pAC);
14226 -
14227 -       SkGeInit(   pAC, pAC->IoBase, SK_INIT_RUN);
14228 -       SkI2cInit(  pAC, pAC->IoBase, SK_INIT_RUN);
14229 -       SkEventInit(pAC, pAC->IoBase, SK_INIT_RUN);
14230 -       SkPnmiInit( pAC, pAC->IoBase, SK_INIT_RUN);
14231 -       SkAddrInit( pAC, pAC->IoBase, SK_INIT_RUN);
14232 -       SkRlmtInit( pAC, pAC->IoBase, SK_INIT_RUN);
14233 -       SkTimerInit(pAC, pAC->IoBase, SK_INIT_RUN);
14234 +               /* Enable transmit descriptor polling */
14235 +               SkGePollTxD(pAC, pAC->IoBase, pNet->PortNr, SK_TRUE);
14236 +               FillRxRing(pAC, &pAC->RxPort[pNet->PortNr]);
14237 +       }
14238
14239 -       /*
14240 -       ** clear and reinit the rx rings here
14241 -       */
14242 -       for (i=0; i<pAC->GIni.GIMacsFound; i++) {
14243 -               ReceiveIrq(pAC, &pAC->RxPort[i], SK_TRUE);
14244 -               ClearRxRing(pAC, &pAC->RxPort[i]);
14245 -               FillRxRing(pAC, &pAC->RxPort[i]);
14246 +       netif_start_queue(pAC->dev[pNet->PortNr]);
14247
14248 -               /*
14249 -               ** Enable transmit descriptor polling
14250 -               */
14251 -               SkGePollTxD(pAC, pAC->IoBase, i, SK_TRUE);
14252 -               FillRxRing(pAC, &pAC->RxPort[i]);
14253 -       };
14254 +       spin_unlock(&pAC->TxPort[pNet->PortNr][TX_PRIO_LOW].TxDesRingLock);
14255
14256 -       SkGeYellowLED(pAC, pAC->IoBase, 1);
14257 -       SkDimEnableModerationIfNeeded(pAC);
14258 -       SkDimDisplayModerationSettings(pAC);
14259
14260 -       netif_start_queue(pAC->dev[pNet->PortNr]);
14261 -       for (i=pAC->GIni.GIMacsFound-1; i>=0; i--) {
14262 -               spin_unlock(&pAC->TxPort[i][TX_PRIO_LOW].TxDesRingLock);
14263 -       }
14264 +       /* Notify RLMT about the changing and restarting one (or more) ports */
14265 +       SkLocalEventQueue(pAC, SKGE_RLMT, SK_RLMT_START,
14266 +                                       pNet->PortNr, -1, SK_TRUE);
14267
14268 -       /*
14269 -       ** Enable Interrupts again
14270 -       */
14271 +       /* Enable Interrupts again */
14272         SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
14273         SK_OUT32(pAC->IoBase, B0_HWE_IMSK, IRQ_HWE_MASK);
14274
14275 -       SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
14276 -       SkEventDispatcher(pAC, pAC->IoBase);
14277 -
14278 -       /*
14279 -       ** Notify RLMT about the changing and restarting one (or more) ports
14280 -       */
14281 -       if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
14282 -               EvPara.Para32[0] = pAC->RlmtNets;
14283 -               EvPara.Para32[1] = -1;
14284 -               SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_SET_NETS, EvPara);
14285 -               EvPara.Para32[0] = pNet->PortNr;
14286 -               EvPara.Para32[1] = -1;
14287 -               SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
14288 -
14289 -               if (pOtherNet->Up) {
14290 -                       EvPara.Para32[0] = pOtherNet->PortNr;
14291 -                       SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
14292 -               }
14293 -       } else {
14294 -               SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
14295 -       }
14296 -
14297 -       SkEventDispatcher(pAC, pAC->IoBase);
14298         spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
14299 -
14300 -       /*
14301 -       ** While testing this driver with latest kernel 2.5 (2.5.70), it
14302 -       ** seems as if upper layers have a problem to handle a successful
14303 -       ** return value of '0'. If such a zero is returned, the complete
14304 -       ** system hangs for several minutes (!), which is in acceptable.
14305 -       **
14306 -       ** Currently it is not clear, what the exact reason for this problem
14307 -       ** is. The implemented workaround for 2.5 is to return the desired
14308 -       ** new MTU size if all needed changes for the new MTU size where
14309 -       ** performed. In kernels 2.2 and 2.4, a zero value is returned,
14310 -       ** which indicates the successful change of the mtu-size.
14311 -       */
14312 -       return NewMtu;
14313 +       return 0;
14314
14315 -} /* SkGeChangeMtu */
14316 +}
14317
14318
14319  /*****************************************************************************
14320 @@ -2857,42 +3787,38 @@
14321  {
14322  DEV_NET *pNet = (DEV_NET*) dev->priv;
14323  SK_AC  *pAC = pNet->pAC;
14324 -SK_PNMI_STRUCT_DATA *pPnmiStruct;       /* structure for all Pnmi-Data */
14325 -SK_PNMI_STAT    *pPnmiStat;             /* pointer to virtual XMAC stat. data */
14326 -SK_PNMI_CONF    *pPnmiConf;             /* pointer to virtual link config. */
14327 -unsigned int    Size;                   /* size of pnmi struct */
14328 +SK_PNMI_STRUCT_DATA *pPnmiStruct;      /* structure for all Pnmi-Data */
14329 +SK_PNMI_STAT    *pPnmiStat;            /* pointer to virtual XMAC stat. data */
14330 +SK_PNMI_CONF    *pPnmiConf;            /* pointer to virtual link config. */
14331 +unsigned int    Size;                  /* size of pnmi struct */
14332  unsigned long  Flags;                  /* for spin lock */
14333
14334         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
14335                 ("SkGeStats starts now...\n"));
14336         pPnmiStruct = &pAC->PnmiStruct;
14337
14338 -#ifdef SK_DIAG_SUPPORT
14339 -        if ((pAC->DiagModeActive == DIAG_NOTACTIVE) &&
14340 -                (pAC->BoardLevel == SK_INIT_RUN)) {
14341 -#endif
14342 -        SK_MEMSET(pPnmiStruct, 0, sizeof(SK_PNMI_STRUCT_DATA));
14343 -        spin_lock_irqsave(&pAC->SlowPathLock, Flags);
14344 -        Size = SK_PNMI_STRUCT_SIZE;
14345 -               SkPnmiGetStruct(pAC, pAC->IoBase, pPnmiStruct, &Size, pNet->NetNr);
14346 -        spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
14347 -#ifdef SK_DIAG_SUPPORT
14348 +       if ((pAC->DiagModeActive == DIAG_NOTACTIVE) &&
14349 +               (pAC->BoardLevel == SK_INIT_RUN)) {
14350 +               SK_MEMSET(pPnmiStruct, 0, sizeof(SK_PNMI_STRUCT_DATA));
14351 +               spin_lock_irqsave(&pAC->SlowPathLock, Flags);
14352 +               Size = SK_PNMI_STRUCT_SIZE;
14353 +                       SkPnmiGetStruct(pAC, pAC->IoBase, pPnmiStruct, &Size, pNet->NetNr);
14354 +               spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
14355         }
14356 -#endif
14357
14358 -        pPnmiStat = &pPnmiStruct->Stat[0];
14359 -        pPnmiConf = &pPnmiStruct->Conf[0];
14360 +       pPnmiStat = &pPnmiStruct->Stat[0];
14361 +       pPnmiConf = &pPnmiStruct->Conf[0];
14362
14363         pAC->stats.rx_packets = (SK_U32) pPnmiStruct->RxDeliveredCts & 0xFFFFFFFF;
14364         pAC->stats.tx_packets = (SK_U32) pPnmiStat->StatTxOkCts & 0xFFFFFFFF;
14365         pAC->stats.rx_bytes = (SK_U32) pPnmiStruct->RxOctetsDeliveredCts;
14366         pAC->stats.tx_bytes = (SK_U32) pPnmiStat->StatTxOctetsOkCts;
14367
14368 -        if (pNet->Mtu <= 1500) {
14369 -                pAC->stats.rx_errors = (SK_U32) pPnmiStruct->InErrorsCts & 0xFFFFFFFF;
14370 -        } else {
14371 -                pAC->stats.rx_errors = (SK_U32) ((pPnmiStruct->InErrorsCts -
14372 -                        pPnmiStat->StatRxTooLongCts) & 0xFFFFFFFF);
14373 +       if (dev->mtu <= 1500) {
14374 +               pAC->stats.rx_errors = (SK_U32) pPnmiStruct->InErrorsCts & 0xFFFFFFFF;
14375 +       } else {
14376 +               pAC->stats.rx_errors = (SK_U32) ((pPnmiStruct->InErrorsCts -
14377 +                       pPnmiStat->StatRxTooLongCts) & 0xFFFFFFFF);
14378         }
14379
14380
14381 @@ -2937,32 +3863,35 @@
14382   *     0, if everything is ok
14383   *     !=0, on error
14384   */
14385 -static int SkGeIoctl(struct SK_NET_DEVICE *dev, struct ifreq *rq, int cmd)
14386 -{
14387 -DEV_NET                *pNet;
14388 -SK_AC          *pAC;
14389 -void           *pMemBuf;
14390 -struct pci_dev  *pdev = NULL;
14391 -SK_GE_IOCTL    Ioctl;
14392 -unsigned int   Err = 0;
14393 -int            Size = 0;
14394 -int             Ret = 0;
14395 -unsigned int   Length = 0;
14396 -int            HeaderLength = sizeof(SK_U32) + sizeof(SK_U32);
14397 +static int SkGeIoctl(
14398 +struct SK_NET_DEVICE *dev,  /* the device the IOCTL is to be performed on   */
14399 +struct ifreq         *rq,   /* additional request structure containing data */
14400 +int                   cmd)  /* requested IOCTL command number               */
14401 +{
14402 +       DEV_NET          *pNet = (DEV_NET*) dev->priv;
14403 +       SK_AC            *pAC  = pNet->pAC;
14404 +       struct pci_dev   *pdev = NULL;
14405 +       void             *pMemBuf;
14406 +       SK_GE_IOCTL       Ioctl;
14407 +       unsigned long     Flags; /* for spin lock */
14408 +       unsigned int      Err = 0;
14409 +       unsigned int      Length = 0;
14410 +       int               HeaderLength = sizeof(SK_U32) + sizeof(SK_U32);
14411 +       int               Size = 0;
14412 +       int               Ret = 0;
14413
14414         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
14415                 ("SkGeIoctl starts now...\n"));
14416
14417 -       pNet = (DEV_NET*) dev->priv;
14418 -       pAC = pNet->pAC;
14419 -
14420         if(copy_from_user(&Ioctl, rq->ifr_data, sizeof(SK_GE_IOCTL))) {
14421                 return -EFAULT;
14422         }
14423
14424         switch(cmd) {
14425 -       case SK_IOCTL_SETMIB:
14426 -       case SK_IOCTL_PRESETMIB:
14427 +       case SIOCETHTOOL:
14428 +               return SkEthIoctl(dev, rq);
14429 +       case SK_IOCTL_SETMIB:     /* FALL THRU */
14430 +       case SK_IOCTL_PRESETMIB:  /* FALL THRU (if capable!) */
14431                 if (!capable(CAP_NET_ADMIN)) return -EPERM;
14432         case SK_IOCTL_GETMIB:
14433                 if(copy_from_user(&pAC->PnmiStruct, Ioctl.pData,
14434 @@ -2989,6 +3918,7 @@
14435                 if (NULL == (pMemBuf = kmalloc(Length, GFP_KERNEL))) {
14436                         return -ENOMEM;
14437                 }
14438 +               spin_lock_irqsave(&pAC->SlowPathLock, Flags);
14439                 if(copy_from_user(pMemBuf, Ioctl.pData, Length)) {
14440                         Err = -EFAULT;
14441                         goto fault_gen;
14442 @@ -3007,10 +3937,10 @@
14443                         goto fault_gen;
14444                 }
14445  fault_gen:
14446 +               spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
14447                 kfree(pMemBuf); /* cleanup everything */
14448                 break;
14449 -#ifdef SK_DIAG_SUPPORT
14450 -       case SK_IOCTL_DIAG:
14451 +       case SK_IOCTL_DIAG:
14452                 if (!capable(CAP_NET_ADMIN)) return -EPERM;
14453                 if (Ioctl.Len < (sizeof(pAC->PnmiStruct) + HeaderLength)) {
14454                         Length = Ioctl.Len;
14455 @@ -3034,7 +3964,7 @@
14456                 */
14457                 * ((SK_U32 *)pMemBuf) = 0;
14458                 * ((SK_U32 *)pMemBuf + 1) = pdev->bus->number;
14459 -               * ((SK_U32 *)pMemBuf + 2) = ParseDeviceNbrFromSlotName(pdev->slot_name);
14460 +               * ((SK_U32 *)pMemBuf + 2) = ParseDeviceNbrFromSlotName(pci_name(pdev));
14461                 if(copy_to_user(Ioctl.pData, pMemBuf, Length) ) {
14462                         Err = -EFAULT;
14463                         goto fault_diag;
14464 @@ -3047,7 +3977,6 @@
14465  fault_diag:
14466                 kfree(pMemBuf); /* cleanup everything */
14467                 break;
14468 -#endif
14469         default:
14470                 Err = -EOPNOTSUPP;
14471         }
14472 @@ -3079,12 +4008,12 @@
14473  unsigned int   Size,   /* length of ioctl data */
14474  int            mode)   /* flag for set/preset */
14475  {
14476 -unsigned long  Flags;  /* for spin lock */
14477 -SK_AC          *pAC;
14478 +       SK_AC           *pAC = pNet->pAC;
14479 +       unsigned long   Flags;  /* for spin lock */
14480
14481         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
14482                 ("SkGeIocMib starts now...\n"));
14483 -       pAC = pNet->pAC;
14484 +
14485         /* access MIB */
14486         spin_lock_irqsave(&pAC->SlowPathLock, Flags);
14487         switch(mode) {
14488 @@ -3127,17 +4056,18 @@
14489  SK_I32 Port;           /* preferred port */
14490  SK_BOOL        AutoSet;
14491  SK_BOOL DupSet;
14492 -int    LinkSpeed          = SK_LSPEED_AUTO;    /* Link speed */
14493 -int    AutoNeg            = 1;                 /* autoneg off (0) or on (1) */
14494 -int    DuplexCap          = 0;                 /* 0=both,1=full,2=half */
14495 -int    FlowCtrl           = SK_FLOW_MODE_SYM_OR_REM;   /* FlowControl  */
14496 -int    MSMode             = SK_MS_MODE_AUTO;   /* master/slave mode    */
14497 -
14498 -SK_BOOL IsConTypeDefined   = SK_TRUE;
14499 -SK_BOOL IsLinkSpeedDefined = SK_TRUE;
14500 -SK_BOOL IsFlowCtrlDefined  = SK_TRUE;
14501 -SK_BOOL IsRoleDefined      = SK_TRUE;
14502 -SK_BOOL IsModeDefined      = SK_TRUE;
14503 +int    LinkSpeed               = SK_LSPEED_AUTO;       /* Link speed */
14504 +int    AutoNeg                 = 1;                    /* autoneg off (0) or on (1) */
14505 +int    DuplexCap               = 0;                    /* 0=both,1=full,2=half */
14506 +int    FlowCtrl                = SK_FLOW_MODE_SYM_OR_REM;      /* FlowControl  */
14507 +int    MSMode                  = SK_MS_MODE_AUTO;      /* master/slave mode    */
14508 +int    IrqModMaskOffset        = 6;                    /* all ints moderated=default */
14509 +
14510 +SK_BOOL IsConTypeDefined       = SK_TRUE;
14511 +SK_BOOL IsLinkSpeedDefined     = SK_TRUE;
14512 +SK_BOOL IsFlowCtrlDefined      = SK_TRUE;
14513 +SK_BOOL IsRoleDefined          = SK_TRUE;
14514 +SK_BOOL IsModeDefined          = SK_TRUE;
14515  /*
14516   *     The two parameters AutoNeg. and DuplexCap. map to one configuration
14517   *     parameter. The mapping is described by this table:
14518 @@ -3155,6 +4085,15 @@
14519                   {SK_LMODE_AUTOBOTH , SK_LMODE_AUTOFULL , SK_LMODE_AUTOHALF },
14520                   {SK_LMODE_AUTOSENSE, SK_LMODE_AUTOSENSE, SK_LMODE_AUTOSENSE} };
14521
14522 +SK_U32 IrqModMask[7][2] =
14523 +               { { IRQ_MASK_RX_ONLY , Y2_DRIVER_IRQS  },
14524 +                 { IRQ_MASK_TX_ONLY , Y2_DRIVER_IRQS  },
14525 +                 { IRQ_MASK_SP_ONLY , Y2_SPECIAL_IRQS },
14526 +                 { IRQ_MASK_SP_RX   , Y2_IRQ_MASK     },
14527 +                 { IRQ_MASK_TX_RX   , Y2_DRIVER_IRQS  },
14528 +                 { IRQ_MASK_SP_TX   , Y2_IRQ_MASK     },
14529 +                 { IRQ_MASK_RX_TX_SP, Y2_IRQ_MASK     } };
14530 +
14531  #define DC_BOTH        0
14532  #define DC_FULL 1
14533  #define DC_HALF 2
14534 @@ -3194,7 +4133,7 @@
14535         **
14536         ** This ConType parameter is used for all ports of the adapter!
14537         */
14538 -        if ( (ConType != NULL)                &&
14539 +       if ( (ConType != NULL)                &&
14540              (pAC->Index < SK_MAX_CARD_PARAM) &&
14541              (ConType[pAC->Index] != NULL) ) {
14542
14543 @@ -3220,40 +4159,40 @@
14544                         M_CurrPort.PMSMode       = SK_MS_MODE_AUTO;
14545                         M_CurrPort.PLinkSpeed    = SK_LSPEED_AUTO;
14546                     }
14547 -                } else if (strcmp(ConType[pAC->Index],"100FD")==0) {
14548 +               } else if (strcmp(ConType[pAC->Index],"100FD")==0) {
14549                     for (Port = 0; Port < SK_MAX_MACS; Port++) {
14550                         M_CurrPort.PLinkModeConf = Capabilities[AN_OFF][DC_FULL];
14551                         M_CurrPort.PFlowCtrlMode = SK_FLOW_MODE_NONE;
14552                         M_CurrPort.PMSMode       = SK_MS_MODE_AUTO;
14553                         M_CurrPort.PLinkSpeed    = SK_LSPEED_100MBPS;
14554                     }
14555 -                } else if (strcmp(ConType[pAC->Index],"100HD")==0) {
14556 +               } else if (strcmp(ConType[pAC->Index],"100HD")==0) {
14557                     for (Port = 0; Port < SK_MAX_MACS; Port++) {
14558                         M_CurrPort.PLinkModeConf = Capabilities[AN_OFF][DC_HALF];
14559                         M_CurrPort.PFlowCtrlMode = SK_FLOW_MODE_NONE;
14560                         M_CurrPort.PMSMode       = SK_MS_MODE_AUTO;
14561                         M_CurrPort.PLinkSpeed    = SK_LSPEED_100MBPS;
14562                     }
14563 -                } else if (strcmp(ConType[pAC->Index],"10FD")==0) {
14564 +               } else if (strcmp(ConType[pAC->Index],"10FD")==0) {
14565                     for (Port = 0; Port < SK_MAX_MACS; Port++) {
14566                         M_CurrPort.PLinkModeConf = Capabilities[AN_OFF][DC_FULL];
14567                         M_CurrPort.PFlowCtrlMode = SK_FLOW_MODE_NONE;
14568                         M_CurrPort.PMSMode       = SK_MS_MODE_AUTO;
14569                         M_CurrPort.PLinkSpeed    = SK_LSPEED_10MBPS;
14570                     }
14571 -                } else if (strcmp(ConType[pAC->Index],"10HD")==0) {
14572 +               } else if (strcmp(ConType[pAC->Index],"10HD")==0) {
14573                     for (Port = 0; Port < SK_MAX_MACS; Port++) {
14574                         M_CurrPort.PLinkModeConf = Capabilities[AN_OFF][DC_HALF];
14575                         M_CurrPort.PFlowCtrlMode = SK_FLOW_MODE_NONE;
14576                         M_CurrPort.PMSMode       = SK_MS_MODE_AUTO;
14577                         M_CurrPort.PLinkSpeed    = SK_LSPEED_10MBPS;
14578                     }
14579 -                } else {
14580 +               } else {
14581                     printk("sk98lin: Illegal value \"%s\" for ConType\n",
14582                         ConType[pAC->Index]);
14583                     IsConTypeDefined = SK_FALSE; /* Wrong ConType defined */
14584                 }
14585 -        } else {
14586 +       } else {
14587             IsConTypeDefined = SK_FALSE; /* No ConType defined */
14588         }
14589
14590 @@ -3272,14 +4211,30 @@
14591                 } else if (strcmp(Speed_A[pAC->Index],"100")==0) {
14592                     LinkSpeed = SK_LSPEED_100MBPS;
14593                 } else if (strcmp(Speed_A[pAC->Index],"1000")==0) {
14594 -                   LinkSpeed = SK_LSPEED_1000MBPS;
14595 +                   if ((pAC->PciDev->vendor == 0x11ab ) &&
14596 +                       (pAC->PciDev->device == 0x4350)) {
14597 +                               LinkSpeed = SK_LSPEED_100MBPS;
14598 +                               printk("sk98lin: Illegal value \"%s\" for Speed_A.\n"
14599 +                                       "Gigabit speed not possible with this chip revision!",
14600 +                                       Speed_A[pAC->Index]);
14601 +                       } else {
14602 +                               LinkSpeed = SK_LSPEED_1000MBPS;
14603 +                   }
14604                 } else {
14605                     printk("sk98lin: Illegal value \"%s\" for Speed_A\n",
14606                         Speed_A[pAC->Index]);
14607                     IsLinkSpeedDefined = SK_FALSE;
14608                 }
14609         } else {
14610 -           IsLinkSpeedDefined = SK_FALSE;
14611 +               if ((pAC->PciDev->vendor == 0x11ab ) &&
14612 +                       (pAC->PciDev->device == 0x4350)) {
14613 +                       /* Gigabit speed not supported
14614 +                        * Swith to speed 100
14615 +                        */
14616 +                       LinkSpeed = SK_LSPEED_100MBPS;
14617 +               } else {
14618 +                       IsLinkSpeedDefined = SK_FALSE;
14619 +               }
14620         }
14621
14622         /*
14623 @@ -3374,9 +4329,6 @@
14624         }
14625
14626         if (!AutoSet && DupSet) {
14627 -               printk("sk98lin: Port A: Duplex setting not"
14628 -                       " possible in\n    default AutoNegotiation mode"
14629 -                       " (Sense).\n    Using AutoNegotiation On\n");
14630                 AutoNeg = AN_ON;
14631         }
14632
14633 @@ -3404,7 +4356,7 @@
14634                     FlowCtrl = SK_FLOW_MODE_NONE;
14635                 } else {
14636                     printk("sk98lin: Illegal value \"%s\" for FlowCtrl_A\n",
14637 -                        FlowCtrl_A[pAC->Index]);
14638 +                       FlowCtrl_A[pAC->Index]);
14639                     IsFlowCtrlDefined = SK_FALSE;
14640                 }
14641         } else {
14642 @@ -3496,7 +4448,7 @@
14643         ** Decide whether to set new config value if somethig valid has
14644         ** been received.
14645         */
14646 -        if (IsLinkSpeedDefined) {
14647 +       if (IsLinkSpeedDefined) {
14648             pAC->GIni.GP[1].PLinkSpeed = LinkSpeed;
14649         }
14650
14651 @@ -3572,9 +4524,6 @@
14652         }
14653
14654         if (!AutoSet && DupSet) {
14655 -               printk("sk98lin: Port B: Duplex setting not"
14656 -                       " possible in\n    default AutoNegotiation mode"
14657 -                       " (Sense).\n    Using AutoNegotiation On\n");
14658                 AutoNeg = AN_ON;
14659         }
14660
14661 @@ -3687,11 +4636,15 @@
14662         }
14663
14664         pAC->RlmtNets = 1;
14665 +       pAC->RlmtMode = 0;
14666
14667         if (RlmtMode != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
14668                 RlmtMode[pAC->Index] != NULL) {
14669                 if (strcmp(RlmtMode[pAC->Index], "") == 0) {
14670 -                       pAC->RlmtMode = 0;
14671 +                       if (pAC->GIni.GIMacsFound == 2) {
14672 +                               pAC->RlmtMode = SK_RLMT_CHECK_LINK;
14673 +                               pAC->RlmtNets = 2;
14674 +                       }
14675                 } else if (strcmp(RlmtMode[pAC->Index], "CheckLinkState") == 0) {
14676                         pAC->RlmtMode = SK_RLMT_CHECK_LINK;
14677                 } else if (strcmp(RlmtMode[pAC->Index], "CheckLocalPort") == 0) {
14678 @@ -3712,12 +4665,37 @@
14679                         pAC->RlmtMode = 0;
14680                 }
14681         } else {
14682 -               pAC->RlmtMode = 0;
14683 +               if (pAC->GIni.GIMacsFound == 2) {
14684 +                       pAC->RlmtMode = SK_RLMT_CHECK_LINK;
14685 +                       pAC->RlmtNets = 2;
14686 +               }
14687         }
14688 -
14689 +
14690 +#ifdef SK_YUKON2
14691 +       /*
14692 +       ** use dualnet config per default
14693 +       *
14694 +       pAC->RlmtMode = SK_RLMT_CHECK_LINK;
14695 +       pAC->RlmtNets = 2;
14696 +       */
14697 +#endif
14698 +
14699 +
14700 +       /*
14701 +       ** Check the LowLatance parameters
14702 +       */
14703 +       pAC->LowLatency = SK_FALSE;
14704 +       if (LowLatency[pAC->Index] != NULL) {
14705 +               if (strcmp(LowLatency[pAC->Index], "On") == 0) {
14706 +                       pAC->LowLatency = SK_TRUE;
14707 +               }
14708 +       }
14709 +
14710 +
14711         /*
14712         ** Check the interrupt moderation parameters
14713         */
14714 +       pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_NONE;
14715         if (Moderation[pAC->Index] != NULL) {
14716                 if (strcmp(Moderation[pAC->Index], "") == 0) {
14717                         pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_NONE;
14718 @@ -3731,70 +4709,49 @@
14719                         printk("sk98lin: Illegal value \"%s\" for Moderation.\n"
14720                                 "      Disable interrupt moderation.\n",
14721                                 Moderation[pAC->Index]);
14722 -                       pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_NONE;
14723 -               }
14724 -       } else {
14725 -               pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_NONE;
14726 -       }
14727 -
14728 -       if (Stats[pAC->Index] != NULL) {
14729 -               if (strcmp(Stats[pAC->Index], "Yes") == 0) {
14730 -                       pAC->DynIrqModInfo.DisplayStats = SK_TRUE;
14731 -               } else {
14732 -                       pAC->DynIrqModInfo.DisplayStats = SK_FALSE;
14733                 }
14734         } else {
14735 -               pAC->DynIrqModInfo.DisplayStats = SK_FALSE;
14736 +/* Set interrupt moderation if wished */
14737 +#ifdef CONFIG_SK98LIN_STATINT
14738 +               pAC->DynIrqModInfo.IntModTypeSelect = C_INT_MOD_STATIC;
14739 +#endif
14740         }
14741
14742         if (ModerationMask[pAC->Index] != NULL) {
14743                 if (strcmp(ModerationMask[pAC->Index], "Rx") == 0) {
14744 -                       pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_ONLY;
14745 +                       IrqModMaskOffset = 0;
14746                 } else if (strcmp(ModerationMask[pAC->Index], "Tx") == 0) {
14747 -                       pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_TX_ONLY;
14748 +                       IrqModMaskOffset = 1;
14749                 } else if (strcmp(ModerationMask[pAC->Index], "Sp") == 0) {
14750 -                       pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_ONLY;
14751 +                       IrqModMaskOffset = 2;
14752                 } else if (strcmp(ModerationMask[pAC->Index], "RxSp") == 0) {
14753 -                       pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_RX;
14754 +                       IrqModMaskOffset = 3;
14755                 } else if (strcmp(ModerationMask[pAC->Index], "SpRx") == 0) {
14756 -                       pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_RX;
14757 +                       IrqModMaskOffset = 3;
14758                 } else if (strcmp(ModerationMask[pAC->Index], "RxTx") == 0) {
14759 -                       pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_TX_RX;
14760 +                       IrqModMaskOffset = 4;
14761                 } else if (strcmp(ModerationMask[pAC->Index], "TxRx") == 0) {
14762 -                       pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_TX_RX;
14763 +                       IrqModMaskOffset = 4;
14764                 } else if (strcmp(ModerationMask[pAC->Index], "TxSp") == 0) {
14765 -                       pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_TX;
14766 +                       IrqModMaskOffset = 5;
14767                 } else if (strcmp(ModerationMask[pAC->Index], "SpTx") == 0) {
14768 -                       pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_SP_TX;
14769 -               } else if (strcmp(ModerationMask[pAC->Index], "RxTxSp") == 0) {
14770 -                       pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
14771 -               } else if (strcmp(ModerationMask[pAC->Index], "RxSpTx") == 0) {
14772 -                       pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
14773 -               } else if (strcmp(ModerationMask[pAC->Index], "TxRxSp") == 0) {
14774 -                       pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
14775 -               } else if (strcmp(ModerationMask[pAC->Index], "TxSpRx") == 0) {
14776 -                       pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
14777 -               } else if (strcmp(ModerationMask[pAC->Index], "SpTxRx") == 0) {
14778 -                       pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
14779 -               } else if (strcmp(ModerationMask[pAC->Index], "SpRxTx") == 0) {
14780 -                       pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_TX_SP;
14781 -               } else { /* some rubbish */
14782 -                       pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_RX_ONLY;
14783 -               }
14784 -       } else {  /* operator has stated nothing */
14785 -               pAC->DynIrqModInfo.MaskIrqModeration = IRQ_MASK_TX_RX;
14786 -       }
14787 -
14788 -       if (AutoSizing[pAC->Index] != NULL) {
14789 -               if (strcmp(AutoSizing[pAC->Index], "On") == 0) {
14790 -                       pAC->DynIrqModInfo.AutoSizing = SK_FALSE;
14791 -               } else {
14792 -                       pAC->DynIrqModInfo.AutoSizing = SK_FALSE;
14793 +                       IrqModMaskOffset = 5;
14794 +               } else { /* some rubbish stated */
14795 +                       // IrqModMaskOffset = 6; ->has been initialized
14796 +                       // already at the begin of this function...
14797                 }
14798 -       } else {  /* operator has stated nothing */
14799 -               pAC->DynIrqModInfo.AutoSizing = SK_FALSE;
14800 +       }
14801 +       if (!CHIP_ID_YUKON_2(pAC)) {
14802 +               pAC->DynIrqModInfo.MaskIrqModeration = IrqModMask[IrqModMaskOffset][0];
14803 +       } else {
14804 +               pAC->DynIrqModInfo.MaskIrqModeration = IrqModMask[IrqModMaskOffset][1];
14805         }
14806
14807 +       if (!CHIP_ID_YUKON_2(pAC)) {
14808 +               pAC->DynIrqModInfo.MaxModIntsPerSec = C_INTS_PER_SEC_DEFAULT;
14809 +       } else {
14810 +               pAC->DynIrqModInfo.MaxModIntsPerSec = C_Y2_INTS_PER_SEC_DEFAULT;
14811 +       }
14812         if (IntsPerSec[pAC->Index] != 0) {
14813                 if ((IntsPerSec[pAC->Index]< C_INT_MOD_IPS_LOWER_RANGE) ||
14814                         (IntsPerSec[pAC->Index] > C_INT_MOD_IPS_UPPER_RANGE)) {
14815 @@ -3803,28 +4760,25 @@
14816                                 IntsPerSec[pAC->Index],
14817                                 C_INT_MOD_IPS_LOWER_RANGE,
14818                                 C_INT_MOD_IPS_UPPER_RANGE,
14819 -                               C_INTS_PER_SEC_DEFAULT);
14820 -                       pAC->DynIrqModInfo.MaxModIntsPerSec = C_INTS_PER_SEC_DEFAULT;
14821 +                               pAC->DynIrqModInfo.MaxModIntsPerSec);
14822                 } else {
14823                         pAC->DynIrqModInfo.MaxModIntsPerSec = IntsPerSec[pAC->Index];
14824                 }
14825 -       } else {
14826 -               pAC->DynIrqModInfo.MaxModIntsPerSec = C_INTS_PER_SEC_DEFAULT;
14827 -       }
14828 +       }
14829
14830         /*
14831         ** Evaluate upper and lower moderation threshold
14832         */
14833         pAC->DynIrqModInfo.MaxModIntsPerSecUpperLimit =
14834                 pAC->DynIrqModInfo.MaxModIntsPerSec +
14835 -               (pAC->DynIrqModInfo.MaxModIntsPerSec / 2);
14836 +               (pAC->DynIrqModInfo.MaxModIntsPerSec / 5);
14837
14838         pAC->DynIrqModInfo.MaxModIntsPerSecLowerLimit =
14839                 pAC->DynIrqModInfo.MaxModIntsPerSec -
14840 -               (pAC->DynIrqModInfo.MaxModIntsPerSec / 2);
14841 -
14842 -       pAC->DynIrqModInfo.PrevTimeVal = jiffies;  /* initial value */
14843 +               (pAC->DynIrqModInfo.MaxModIntsPerSec / 5);
14844
14845 +       pAC->DynIrqModInfo.DynIrqModSampleInterval =
14846 +               SK_DRV_MODERATION_TIMER_LENGTH;
14847
14848  } /* GetConfiguration */
14849
14850 @@ -3860,45 +4814,6 @@
14851         }
14852  } /* ProductStr */
14853
14854 -/*****************************************************************************
14855 - *
14856 - *      StartDrvCleanupTimer - Start timer to check for descriptors which
14857 - *                             might be placed in descriptor ring, but
14858 - *                             havent been handled up to now
14859 - *
14860 - * Description:
14861 - *      This function requests a HW-timer fo the Yukon card. The actions to
14862 - *      perform when this timer expires, are located in the SkDrvEvent().
14863 - *
14864 - * Returns: N/A
14865 - */
14866 -static void
14867 -StartDrvCleanupTimer(SK_AC *pAC) {
14868 -    SK_EVPARA    EventParam;   /* Event struct for timer event */
14869 -
14870 -    SK_MEMSET((char *) &EventParam, 0, sizeof(EventParam));
14871 -    EventParam.Para32[0] = SK_DRV_RX_CLEANUP_TIMER;
14872 -    SkTimerStart(pAC, pAC->IoBase, &pAC->DrvCleanupTimer,
14873 -                 SK_DRV_RX_CLEANUP_TIMER_LENGTH,
14874 -                 SKGE_DRV, SK_DRV_TIMER, EventParam);
14875 -}
14876 -
14877 -/*****************************************************************************
14878 - *
14879 - *      StopDrvCleanupTimer - Stop timer to check for descriptors
14880 - *
14881 - * Description:
14882 - *      This function requests a HW-timer fo the Yukon card. The actions to
14883 - *      perform when this timer expires, are located in the SkDrvEvent().
14884 - *
14885 - * Returns: N/A
14886 - */
14887 -static void
14888 -StopDrvCleanupTimer(SK_AC *pAC) {
14889 -    SkTimerStop(pAC, pAC->IoBase, &pAC->DrvCleanupTimer);
14890 -    SK_MEMSET((char *) &pAC->DrvCleanupTimer, 0, sizeof(SK_TIMER));
14891 -}
14892 -
14893  /****************************************************************************/
14894  /* functions for common modules *********************************************/
14895  /****************************************************************************/
14896 @@ -3987,7 +4902,9 @@
14897  SK_U64 SkOsGetTime(SK_AC *pAC)
14898  {
14899         SK_U64  PrivateJiffies;
14900 +
14901         SkOsGetTimeCurrent(pAC, &PrivateJiffies);
14902 +
14903         return PrivateJiffies;
14904  } /* SkOsGetTime */
14905
14906 @@ -4142,29 +5059,26 @@
14907   *
14908   */
14909  int SkDrvEvent(
14910 -SK_AC *pAC,            /* pointer to adapter context */
14911 -SK_IOC IoC,            /* io-context */
14912 -SK_U32 Event,          /* event-id */
14913 -SK_EVPARA Param)       /* event-parameter */
14914 -{
14915 -SK_MBUF                *pRlmtMbuf;     /* pointer to a rlmt-mbuf structure */
14916 -struct sk_buff *pMsg;          /* pointer to a message block */
14917 -int            FromPort;       /* the port from which we switch away */
14918 -int            ToPort;         /* the port we switch to */
14919 -SK_EVPARA      NewPara;        /* parameter for further events */
14920 -int            Stat;
14921 -unsigned long  Flags;
14922 -SK_BOOL                DualNet;
14923 +SK_AC     *pAC,    /* pointer to adapter context */
14924 +SK_IOC     IoC,    /* IO control context         */
14925 +SK_U32     Event,  /* event-id                   */
14926 +SK_EVPARA  Param)  /* event-parameter            */
14927 +{
14928 +       SK_MBUF         *pRlmtMbuf;   /* pointer to a rlmt-mbuf structure   */
14929 +       struct sk_buff  *pMsg;        /* pointer to a message block         */
14930 +       SK_BOOL          DualNet;
14931 +       SK_U32           Reason;
14932 +       unsigned long    Flags;
14933 +       int              FromPort;    /* the port from which we switch away */
14934 +       int              ToPort;      /* the port we switch to              */
14935 +       int              Stat;
14936 +       DEV_NET         *pNet = NULL;
14937 +#ifdef CONFIG_SK98LIN_NAPI
14938 +       int              WorkToDo = 1; /* min(*budget, dev->quota); */
14939 +       int              WorkDone = 0;
14940 +#endif
14941
14942         switch (Event) {
14943 -       case SK_DRV_ADAP_FAIL:
14944 -               SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
14945 -                       ("ADAPTER FAIL EVENT\n"));
14946 -               printk("%s: Adapter failed.\n", pAC->dev[0]->name);
14947 -               /* disable interrupts */
14948 -               SK_OUT32(pAC->IoBase, B0_IMSK, 0);
14949 -               /* cgoos */
14950 -               break;
14951         case SK_DRV_PORT_FAIL:
14952                 FromPort = Param.Para32[0];
14953                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
14954 @@ -4174,219 +5088,294 @@
14955                 } else {
14956                         printk("%s: Port B failed.\n", pAC->dev[1]->name);
14957                 }
14958 -               /* cgoos */
14959                 break;
14960 -       case SK_DRV_PORT_RESET:  /* SK_U32 PortIdx */
14961 -               /* action list 4 */
14962 +       case SK_DRV_PORT_RESET:
14963                 FromPort = Param.Para32[0];
14964                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
14965                         ("PORT RESET EVENT, Port: %d ", FromPort));
14966 -               NewPara.Para64 = FromPort;
14967 -               SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_XMAC_RESET, NewPara);
14968 +               SkLocalEventQueue64(pAC, SKGE_PNMI, SK_PNMI_EVT_XMAC_RESET,
14969 +                                       FromPort, SK_FALSE);
14970                 spin_lock_irqsave(
14971                         &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
14972                         Flags);
14973 -
14974 -               SkGeStopPort(pAC, IoC, FromPort, SK_STOP_ALL, SK_HARD_RST);
14975 +               if (CHIP_ID_YUKON_2(pAC)) {
14976 +                       SkY2PortStop(pAC, IoC, FromPort, SK_STOP_ALL, SK_HARD_RST);
14977 +               } else {
14978 +                       SkGeStopPort(pAC, IoC, FromPort, SK_STOP_ALL, SK_HARD_RST);
14979 +               }
14980                 pAC->dev[Param.Para32[0]]->flags &= ~IFF_RUNNING;
14981                 spin_unlock_irqrestore(
14982                         &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
14983                         Flags);
14984
14985 -               /* clear rx ring from received frames */
14986 -               ReceiveIrq(pAC, &pAC->RxPort[FromPort], SK_FALSE);
14987 -
14988 -               ClearTxRing(pAC, &pAC->TxPort[FromPort][TX_PRIO_LOW]);
14989 +               if (!CHIP_ID_YUKON_2(pAC)) {
14990 +#ifdef CONFIG_SK98LIN_NAPI
14991 +                       WorkToDo = 1;
14992 +                       ReceiveIrq(pAC, &pAC->RxPort[FromPort], SK_FALSE, &WorkDone, WorkToDo);
14993 +#else
14994 +                       ReceiveIrq(pAC, &pAC->RxPort[FromPort], SK_FALSE);
14995 +#endif
14996 +                       ClearTxRing(pAC, &pAC->TxPort[FromPort][TX_PRIO_LOW]);
14997 +               }
14998                 spin_lock_irqsave(
14999                         &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
15000                         Flags);
15001 -
15002 -               /* tschilling: Handling of return value inserted. */
15003 -               if (SkGeInitPort(pAC, IoC, FromPort)) {
15004 -                       if (FromPort == 0) {
15005 -                               printk("%s: SkGeInitPort A failed.\n", pAC->dev[0]->name);
15006 +
15007 +#ifdef USE_TIST_FOR_RESET
15008 +                if (pAC->GIni.GIYukon2) {
15009 +#ifdef Y2_RECOVERY
15010 +                       /* for Yukon II we want to have tist enabled all the time */
15011 +                       if (!SK_ADAPTER_WAITING_FOR_TIST(pAC)) {
15012 +                               Y2_ENABLE_TIST(pAC->IoBase);
15013 +                       }
15014 +#else
15015 +                       /* make sure that we do not accept any status LEs from now on */
15016 +                       if (SK_ADAPTER_WAITING_FOR_TIST(pAC)) {
15017 +#endif
15018 +                               /* port already waiting for tist */
15019 +                               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DUMP,
15020 +                                       ("Port %c is now waiting for specific Tist\n",
15021 +                                       'A' +  FromPort));
15022 +                               SK_SET_WAIT_BIT_FOR_PORT(
15023 +                                       pAC,
15024 +                                       SK_PSTATE_WAITING_FOR_SPECIFIC_TIST,
15025 +                                       FromPort);
15026 +                               /* get current timestamp */
15027 +                               Y2_GET_TIST_LOW_VAL(pAC->IoBase, &pAC->MinTistLo);
15028 +                               pAC->MinTistHi = pAC->GIni.GITimeStampCnt;
15029 +#ifndef Y2_RECOVERY
15030                         } else {
15031 -                               printk("%s: SkGeInitPort B failed.\n", pAC->dev[1]->name);
15032 +                               /* nobody is waiting yet */
15033 +                               SK_SET_WAIT_BIT_FOR_PORT(
15034 +                                       pAC,
15035 +                                       SK_PSTATE_WAITING_FOR_ANY_TIST,
15036 +                                       FromPort);
15037 +                               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DUMP,
15038 +                                       ("Port %c is now waiting for any Tist (0x%X)\n",
15039 +                                       'A' +  FromPort, pAC->AdapterResetState));
15040 +                               /* start tist */
15041 +                               Y2_ENABLE_TIST(pAC-IoBase);
15042 +                       }
15043 +#endif
15044 +               }
15045 +#endif
15046 +
15047 +#ifdef Y2_LE_CHECK
15048 +               /* mark entries invalid */
15049 +               pAC->LastPort = 3;
15050 +               pAC->LastOpc = 0xFF;
15051 +#endif
15052 +               if (CHIP_ID_YUKON_2(pAC)) {
15053 +                       SkY2PortStart(pAC, IoC, FromPort);
15054 +               } else {
15055 +                       /* tschilling: Handling of return value inserted. */
15056 +                       if (SkGeInitPort(pAC, IoC, FromPort)) {
15057 +                               if (FromPort == 0) {
15058 +                                       printk("%s: SkGeInitPort A failed.\n", pAC->dev[0]->name);
15059 +                               } else {
15060 +                                       printk("%s: SkGeInitPort B failed.\n", pAC->dev[1]->name);
15061 +                               }
15062                         }
15063 +                       SkAddrMcUpdate(pAC,IoC, FromPort);
15064 +                       PortReInitBmu(pAC, FromPort);
15065 +                       SkGePollTxD(pAC, IoC, FromPort, SK_TRUE);
15066 +                       CLEAR_AND_START_RX(FromPort);
15067                 }
15068 -               SkAddrMcUpdate(pAC,IoC, FromPort);
15069 -               PortReInitBmu(pAC, FromPort);
15070 -               SkGePollTxD(pAC, IoC, FromPort, SK_TRUE);
15071 -               ClearAndStartRx(pAC, FromPort);
15072                 spin_unlock_irqrestore(
15073                         &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
15074                         Flags);
15075                 break;
15076 -       case SK_DRV_NET_UP:      /* SK_U32 PortIdx */
15077 -               /* action list 5 */
15078 +       case SK_DRV_NET_UP:
15079                 FromPort = Param.Para32[0];
15080                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
15081 -                       ("NET UP EVENT, Port: %d ", Param.Para32[0]));
15082 -               /* Mac update */
15083 -               SkAddrMcUpdate(pAC,IoC, FromPort);
15084 -
15085 +                       ("NET UP EVENT, Port: %d ", FromPort));
15086 +               SkAddrMcUpdate(pAC,IoC, FromPort); /* Mac update */
15087                 if (DoPrintInterfaceChange) {
15088 -               printk("%s: network connection up using"
15089 -                       " port %c\n", pAC->dev[Param.Para32[0]]->name, 'A'+Param.Para32[0]);
15090 +                       printk("%s: network connection up using port %c\n",
15091 +                               pAC->dev[FromPort]->name, 'A'+FromPort);
15092
15093 -               /* tschilling: Values changed according to LinkSpeedUsed. */
15094 -               Stat = pAC->GIni.GP[FromPort].PLinkSpeedUsed;
15095 -               if (Stat == SK_LSPEED_STAT_10MBPS) {
15096 -                       printk("    speed:           10\n");
15097 -               } else if (Stat == SK_LSPEED_STAT_100MBPS) {
15098 -                       printk("    speed:           100\n");
15099 -               } else if (Stat == SK_LSPEED_STAT_1000MBPS) {
15100 -                       printk("    speed:           1000\n");
15101 -               } else {
15102 -                       printk("    speed:           unknown\n");
15103 -               }
15104 +                       /* tschilling: Values changed according to LinkSpeedUsed. */
15105 +                       Stat = pAC->GIni.GP[FromPort].PLinkSpeedUsed;
15106 +                       if (Stat == SK_LSPEED_STAT_10MBPS) {
15107 +                               printk("    speed:           10\n");
15108 +                       } else if (Stat == SK_LSPEED_STAT_100MBPS) {
15109 +                               printk("    speed:           100\n");
15110 +                       } else if (Stat == SK_LSPEED_STAT_1000MBPS) {
15111 +                               printk("    speed:           1000\n");
15112 +                       } else {
15113 +                               printk("    speed:           unknown\n");
15114 +                       }
15115
15116 +                       Stat = pAC->GIni.GP[FromPort].PLinkModeStatus;
15117 +                       if ((Stat == SK_LMODE_STAT_AUTOHALF) ||
15118 +                           (Stat == SK_LMODE_STAT_AUTOFULL)) {
15119 +                               printk("    autonegotiation: yes\n");
15120 +                       } else {
15121 +                               printk("    autonegotiation: no\n");
15122 +                       }
15123
15124 -               Stat = pAC->GIni.GP[FromPort].PLinkModeStatus;
15125 -               if (Stat == SK_LMODE_STAT_AUTOHALF ||
15126 -                       Stat == SK_LMODE_STAT_AUTOFULL) {
15127 -                       printk("    autonegotiation: yes\n");
15128 -               }
15129 -               else {
15130 -                       printk("    autonegotiation: no\n");
15131 -               }
15132 -               if (Stat == SK_LMODE_STAT_AUTOHALF ||
15133 -                       Stat == SK_LMODE_STAT_HALF) {
15134 -                       printk("    duplex mode:     half\n");
15135 -               }
15136 -               else {
15137 -                       printk("    duplex mode:     full\n");
15138 -               }
15139 -               Stat = pAC->GIni.GP[FromPort].PFlowCtrlStatus;
15140 -               if (Stat == SK_FLOW_STAT_REM_SEND ) {
15141 -                       printk("    flowctrl:        remote send\n");
15142 -               }
15143 -               else if (Stat == SK_FLOW_STAT_LOC_SEND ){
15144 -                       printk("    flowctrl:        local send\n");
15145 -               }
15146 -               else if (Stat == SK_FLOW_STAT_SYMMETRIC ){
15147 -                       printk("    flowctrl:        symmetric\n");
15148 -               }
15149 -               else {
15150 -                       printk("    flowctrl:        none\n");
15151 -               }
15152 -
15153 -               /* tschilling: Check against CopperType now. */
15154 -               if ((pAC->GIni.GICopperType == SK_TRUE) &&
15155 -                       (pAC->GIni.GP[FromPort].PLinkSpeedUsed ==
15156 -                       SK_LSPEED_STAT_1000MBPS)) {
15157 -                       Stat = pAC->GIni.GP[FromPort].PMSStatus;
15158 -                       if (Stat == SK_MS_STAT_MASTER ) {
15159 -                               printk("    role:            master\n");
15160 +                       if ((Stat == SK_LMODE_STAT_AUTOHALF) ||
15161 +                           (Stat == SK_LMODE_STAT_HALF)) {
15162 +                               printk("    duplex mode:     half\n");
15163 +                       } else {
15164 +                               printk("    duplex mode:     full\n");
15165                         }
15166 -                       else if (Stat == SK_MS_STAT_SLAVE ) {
15167 -                               printk("    role:            slave\n");
15168 +
15169 +                       Stat = pAC->GIni.GP[FromPort].PFlowCtrlStatus;
15170 +                       if (Stat == SK_FLOW_STAT_REM_SEND ) {
15171 +                               printk("    flowctrl:        remote send\n");
15172 +                       } else if (Stat == SK_FLOW_STAT_LOC_SEND ) {
15173 +                               printk("    flowctrl:        local send\n");
15174 +                       } else if (Stat == SK_FLOW_STAT_SYMMETRIC ) {
15175 +                               printk("    flowctrl:        symmetric\n");
15176 +                       } else {
15177 +                               printk("    flowctrl:        none\n");
15178                         }
15179 -                       else {
15180 -                               printk("    role:            ???\n");
15181 +
15182 +                       /* tschilling: Check against CopperType now. */
15183 +                       if ((pAC->GIni.GICopperType == SK_TRUE) &&
15184 +                               (pAC->GIni.GP[FromPort].PLinkSpeedUsed ==
15185 +                               SK_LSPEED_STAT_1000MBPS)) {
15186 +                               Stat = pAC->GIni.GP[FromPort].PMSStatus;
15187 +                               if (Stat == SK_MS_STAT_MASTER ) {
15188 +                                       printk("    role:            master\n");
15189 +                               } else if (Stat == SK_MS_STAT_SLAVE ) {
15190 +                                       printk("    role:            slave\n");
15191 +                               } else {
15192 +                                       printk("    role:            ???\n");
15193 +                               }
15194                         }
15195 -               }
15196
15197 -               /*
15198 -                  Display dim (dynamic interrupt moderation)
15199 -                  informations
15200 -                */
15201 -               if (pAC->DynIrqModInfo.IntModTypeSelect == C_INT_MOD_STATIC)
15202 -                       printk("    irq moderation:  static (%d ints/sec)\n",
15203 +                       /* Display interrupt moderation informations */
15204 +                       if (pAC->DynIrqModInfo.IntModTypeSelect == C_INT_MOD_STATIC) {
15205 +                               printk("    irq moderation:  static (%d ints/sec)\n",
15206                                         pAC->DynIrqModInfo.MaxModIntsPerSec);
15207 -               else if (pAC->DynIrqModInfo.IntModTypeSelect == C_INT_MOD_DYNAMIC)
15208 -                       printk("    irq moderation:  dynamic (%d ints/sec)\n",
15209 +                       } else if (pAC->DynIrqModInfo.IntModTypeSelect == C_INT_MOD_DYNAMIC) {
15210 +                               printk("    irq moderation:  dynamic (%d ints/sec)\n",
15211                                         pAC->DynIrqModInfo.MaxModIntsPerSec);
15212 -               else
15213 -                       printk("    irq moderation:  disabled\n");
15214 +                       } else {
15215 +                               printk("    irq moderation:  disabled\n");
15216 +                       }
15217 +
15218 +#ifdef NETIF_F_TSO
15219 +                       if (CHIP_ID_YUKON_2(pAC)) {
15220 +                               if (pAC->dev[FromPort]->features & NETIF_F_TSO) {
15221 +                                       printk("    tcp offload:     enabled\n");
15222 +                               } else {
15223 +                                       printk("    tcp offload:     disabled\n");
15224 +                               }
15225 +                       }
15226 +#endif
15227
15228 +                       if (pAC->dev[FromPort]->features & NETIF_F_SG) {
15229 +                               printk("    scatter-gather:  enabled\n");
15230 +                       } else {
15231 +                               printk("    scatter-gather:  disabled\n");
15232 +                       }
15233
15234 -#ifdef SK_ZEROCOPY
15235 -               if (pAC->ChipsetType)
15236 -#ifdef USE_SK_TX_CHECKSUM
15237 -                       printk("    scatter-gather:  enabled\n");
15238 -#else
15239 -                       printk("    tx-checksum:     disabled\n");
15240 -#endif
15241 -               else
15242 -                       printk("    scatter-gather:  disabled\n");
15243 -#else
15244 -                       printk("    scatter-gather:  disabled\n");
15245 -#endif
15246 +                       if (pAC->dev[FromPort]->features & NETIF_F_IP_CSUM) {
15247 +                               printk("    tx-checksum:     enabled\n");
15248 +                       } else {
15249 +                               printk("    tx-checksum:     disabled\n");
15250 +                       }
15251
15252 -#ifndef USE_SK_RX_CHECKSUM
15253 -                       printk("    rx-checksum:     disabled\n");
15254 +                       if (pAC->RxPort[FromPort].UseRxCsum) {
15255 +                               printk("    rx-checksum:     enabled\n");
15256 +                       } else {
15257 +                               printk("    rx-checksum:     disabled\n");
15258 +                       }
15259 +#ifdef CONFIG_SK98LIN_NAPI
15260 +                       printk("    rx-polling:      enabled\n");
15261  #endif
15262 -
15263 +                       if (pAC->LowLatency) {
15264 +                               printk("    low latency:     enabled\n");
15265 +                       }
15266                 } else {
15267 -                        DoPrintInterfaceChange = SK_TRUE;
15268 -                }
15269 +                       DoPrintInterfaceChange = SK_TRUE;
15270 +               }
15271
15272 -               if ((Param.Para32[0] != pAC->ActivePort) &&
15273 -                       (pAC->RlmtNets == 1)) {
15274 -                       NewPara.Para32[0] = pAC->ActivePort;
15275 -                       NewPara.Para32[1] = Param.Para32[0];
15276 -                       SkEventQueue(pAC, SKGE_DRV, SK_DRV_SWITCH_INTERN,
15277 -                               NewPara);
15278 +               if ((FromPort != pAC->ActivePort)&&(pAC->RlmtNets == 1)) {
15279 +                       SkLocalEventQueue(pAC, SKGE_DRV, SK_DRV_SWITCH_INTERN,
15280 +                                               pAC->ActivePort, FromPort, SK_FALSE);
15281                 }
15282
15283                 /* Inform the world that link protocol is up. */
15284 -               pAC->dev[Param.Para32[0]]->flags |= IFF_RUNNING;
15285 -
15286 +               netif_wake_queue(pAC->dev[FromPort]);
15287 +               netif_carrier_on(pAC->dev[FromPort]);
15288 +               pAC->dev[FromPort]->flags |= IFF_RUNNING;
15289                 break;
15290 -       case SK_DRV_NET_DOWN:    /* SK_U32 Reason */
15291 -               /* action list 7 */
15292 +       case SK_DRV_NET_DOWN:
15293 +               Reason   = Param.Para32[0];
15294 +               FromPort = Param.Para32[1];
15295                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
15296                         ("NET DOWN EVENT "));
15297 +
15298 +               /* Stop queue and carrier */
15299 +               netif_stop_queue(pAC->dev[FromPort]);
15300 +               netif_carrier_off(pAC->dev[FromPort]);
15301 +
15302 +               /* Print link change */
15303                 if (DoPrintInterfaceChange) {
15304 -                       printk("%s: network connection down\n",
15305 -                               pAC->dev[Param.Para32[1]]->name);
15306 +                       if (pAC->dev[FromPort]->flags & IFF_RUNNING) {
15307 +                               printk("%s: network connection down\n",
15308 +                                       pAC->dev[FromPort]->name);
15309 +                       }
15310                 } else {
15311                         DoPrintInterfaceChange = SK_TRUE;
15312                 }
15313 -               pAC->dev[Param.Para32[1]]->flags &= ~IFF_RUNNING;
15314 +               pAC->dev[FromPort]->flags &= ~IFF_RUNNING;
15315                 break;
15316 -       case SK_DRV_SWITCH_HARD: /* SK_U32 FromPortIdx SK_U32 ToPortIdx */
15317 -               SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
15318 -                       ("PORT SWITCH HARD "));
15319 -       case SK_DRV_SWITCH_SOFT: /* SK_U32 FromPortIdx SK_U32 ToPortIdx */
15320 -       /* action list 6 */
15321 -               printk("%s: switching to port %c\n", pAC->dev[0]->name,
15322 -                       'A'+Param.Para32[1]);
15323 -       case SK_DRV_SWITCH_INTERN: /* SK_U32 FromPortIdx SK_U32 ToPortIdx */
15324 +       case SK_DRV_SWITCH_HARD:   /* FALL THRU */
15325 +       case SK_DRV_SWITCH_SOFT:   /* FALL THRU */
15326 +       case SK_DRV_SWITCH_INTERN:
15327                 FromPort = Param.Para32[0];
15328 -               ToPort = Param.Para32[1];
15329 +               ToPort   = Param.Para32[1];
15330 +               printk("%s: switching from port %c to port %c\n",
15331 +                       pAC->dev[0]->name, 'A'+FromPort, 'A'+ToPort);
15332                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
15333                         ("PORT SWITCH EVENT, From: %d  To: %d (Pref %d) ",
15334                         FromPort, ToPort, pAC->Rlmt.Net[0].PrefPort));
15335 -               NewPara.Para64 = FromPort;
15336 -               SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_XMAC_RESET, NewPara);
15337 -               NewPara.Para64 = ToPort;
15338 -               SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_XMAC_RESET, NewPara);
15339 +               SkLocalEventQueue64(pAC, SKGE_PNMI, SK_PNMI_EVT_XMAC_RESET,
15340 +                                       FromPort, SK_FALSE);
15341 +               SkLocalEventQueue64(pAC, SKGE_PNMI, SK_PNMI_EVT_XMAC_RESET,
15342 +                                       ToPort, SK_FALSE);
15343                 spin_lock_irqsave(
15344                         &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
15345                         Flags);
15346                 spin_lock(&pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock);
15347 -               SkGeStopPort(pAC, IoC, FromPort, SK_STOP_ALL, SK_SOFT_RST);
15348 -               SkGeStopPort(pAC, IoC, ToPort, SK_STOP_ALL, SK_SOFT_RST);
15349 +               if (CHIP_ID_YUKON_2(pAC)) {
15350 +                       SkY2PortStop(pAC, IoC, FromPort, SK_STOP_ALL, SK_SOFT_RST);
15351 +                       SkY2PortStop(pAC, IoC, ToPort, SK_STOP_ALL, SK_SOFT_RST);
15352 +               }
15353 +               else {
15354 +                       SkGeStopPort(pAC, IoC, FromPort, SK_STOP_ALL, SK_SOFT_RST);
15355 +                       SkGeStopPort(pAC, IoC, ToPort, SK_STOP_ALL, SK_SOFT_RST);
15356 +               }
15357                 spin_unlock(&pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock);
15358                 spin_unlock_irqrestore(
15359                         &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
15360                         Flags);
15361
15362 -               ReceiveIrq(pAC, &pAC->RxPort[FromPort], SK_FALSE); /* clears rx ring */
15363 -               ReceiveIrq(pAC, &pAC->RxPort[ToPort], SK_FALSE); /* clears rx ring */
15364
15365 -               ClearTxRing(pAC, &pAC->TxPort[FromPort][TX_PRIO_LOW]);
15366 -               ClearTxRing(pAC, &pAC->TxPort[ToPort][TX_PRIO_LOW]);
15367 +               if (!CHIP_ID_YUKON_2(pAC)) {
15368 +#ifdef CONFIG_SK98LIN_NAPI
15369 +                       WorkToDo = 1;
15370 +                       ReceiveIrq(pAC, &pAC->RxPort[FromPort], SK_FALSE, &WorkDone, WorkToDo);
15371 +                       ReceiveIrq(pAC, &pAC->RxPort[ToPort], SK_FALSE, &WorkDone, WorkToDo);
15372 +#else
15373 +                       ReceiveIrq(pAC, &pAC->RxPort[FromPort], SK_FALSE); /* clears rx ring */
15374 +                       ReceiveIrq(pAC, &pAC->RxPort[ToPort], SK_FALSE); /* clears rx ring */
15375 +#endif
15376 +                       ClearTxRing(pAC, &pAC->TxPort[FromPort][TX_PRIO_LOW]);
15377 +                       ClearTxRing(pAC, &pAC->TxPort[ToPort][TX_PRIO_LOW]);
15378 +               }
15379 +
15380                 spin_lock_irqsave(
15381                         &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
15382                         Flags);
15383                 spin_lock(&pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock);
15384                 pAC->ActivePort = ToPort;
15385 -#if 0
15386 -               SetQueueSizes(pAC);
15387 -#else
15388 +
15389                 /* tschilling: New common function with minimum size check. */
15390                 DualNet = SK_FALSE;
15391                 if (pAC->RlmtNets == 2) {
15392 @@ -4404,76 +5393,340 @@
15393                         printk("SkGeInitAssignRamToQueues failed.\n");
15394                         break;
15395                 }
15396 -#endif
15397 -               /* tschilling: Handling of return values inserted. */
15398 -               if (SkGeInitPort(pAC, IoC, FromPort) ||
15399 -                       SkGeInitPort(pAC, IoC, ToPort)) {
15400 -                       printk("%s: SkGeInitPort failed.\n", pAC->dev[0]->name);
15401 +
15402 +               if (!CHIP_ID_YUKON_2(pAC)) {
15403 +                       /* tschilling: Handling of return values inserted. */
15404 +                       if (SkGeInitPort(pAC, IoC, FromPort) ||
15405 +                               SkGeInitPort(pAC, IoC, ToPort)) {
15406 +                               printk("%s: SkGeInitPort failed.\n", pAC->dev[0]->name);
15407 +                       }
15408                 }
15409 -               if (Event == SK_DRV_SWITCH_SOFT) {
15410 -                       SkMacRxTxEnable(pAC, IoC, FromPort);
15411 +               if (!CHIP_ID_YUKON_2(pAC)) {
15412 +                       if (Event == SK_DRV_SWITCH_SOFT) {
15413 +                               SkMacRxTxEnable(pAC, IoC, FromPort);
15414 +                       }
15415 +                       SkMacRxTxEnable(pAC, IoC, ToPort);
15416                 }
15417 -               SkMacRxTxEnable(pAC, IoC, ToPort);
15418 +
15419                 SkAddrSwap(pAC, IoC, FromPort, ToPort);
15420                 SkAddrMcUpdate(pAC, IoC, FromPort);
15421                 SkAddrMcUpdate(pAC, IoC, ToPort);
15422 -               PortReInitBmu(pAC, FromPort);
15423 -               PortReInitBmu(pAC, ToPort);
15424 -               SkGePollTxD(pAC, IoC, FromPort, SK_TRUE);
15425 -               SkGePollTxD(pAC, IoC, ToPort, SK_TRUE);
15426 -               ClearAndStartRx(pAC, FromPort);
15427 -               ClearAndStartRx(pAC, ToPort);
15428 +
15429 +#ifdef USE_TIST_FOR_RESET
15430 +                if (pAC->GIni.GIYukon2) {
15431 +                       /* make sure that we do not accept any status LEs from now on */
15432 +                       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DUMP,
15433 +                               ("both Ports now waiting for specific Tist\n"));
15434 +                       SK_SET_WAIT_BIT_FOR_PORT(
15435 +                               pAC,
15436 +                               SK_PSTATE_WAITING_FOR_ANY_TIST,
15437 +                               0);
15438 +                       SK_SET_WAIT_BIT_FOR_PORT(
15439 +                               pAC,
15440 +                               SK_PSTATE_WAITING_FOR_ANY_TIST,
15441 +                               1);
15442 +
15443 +                       /* start tist */
15444 +                       Y2_ENABLE_TIST(pAC->IoBase);
15445 +               }
15446 +#endif
15447 +               if (!CHIP_ID_YUKON_2(pAC)) {
15448 +                       PortReInitBmu(pAC, FromPort);
15449 +                       PortReInitBmu(pAC, ToPort);
15450 +                       SkGePollTxD(pAC, IoC, FromPort, SK_TRUE);
15451 +                       SkGePollTxD(pAC, IoC, ToPort, SK_TRUE);
15452 +                       CLEAR_AND_START_RX(FromPort);
15453 +                       CLEAR_AND_START_RX(ToPort);
15454 +               } else {
15455 +                       SkY2PortStart(pAC, IoC, FromPort);
15456 +                       SkY2PortStart(pAC, IoC, ToPort);
15457 +#ifdef SK_YUKON2
15458 +                       /* in yukon-II always port 0 has to be started first */
15459 +                       // SkY2PortStart(pAC, IoC, 0);
15460 +                       // SkY2PortStart(pAC, IoC, 1);
15461 +#endif
15462 +               }
15463                 spin_unlock(&pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock);
15464                 spin_unlock_irqrestore(
15465                         &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
15466                         Flags);
15467                 break;
15468         case SK_DRV_RLMT_SEND:   /* SK_MBUF *pMb */
15469 -               SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
15470 -                       ("RLS "));
15471 +               SK_DBG_MSG(NULL,SK_DBGMOD_DRV,SK_DBGCAT_DRV_EVENT,("RLS "));
15472                 pRlmtMbuf = (SK_MBUF*) Param.pParaPtr;
15473                 pMsg = (struct sk_buff*) pRlmtMbuf->pOs;
15474                 skb_put(pMsg, pRlmtMbuf->Length);
15475 -               if (XmitFrame(pAC, &pAC->TxPort[pRlmtMbuf->PortIdx][TX_PRIO_LOW],
15476 -                       pMsg) < 0)
15477 -
15478 -                       DEV_KFREE_SKB_ANY(pMsg);
15479 +               if (!CHIP_ID_YUKON_2(pAC)) {
15480 +                       if (XmitFrame(pAC, &pAC->TxPort[pRlmtMbuf->PortIdx][TX_PRIO_LOW],
15481 +                               pMsg) < 0) {
15482 +                               DEV_KFREE_SKB_ANY(pMsg);
15483 +                       }
15484 +               } else {
15485 +                       if (SkY2RlmtSend(pAC, pRlmtMbuf->PortIdx, pMsg) < 0) {
15486 +                               DEV_KFREE_SKB_ANY(pMsg);
15487 +                       }
15488 +               }
15489                 break;
15490         case SK_DRV_TIMER:
15491                 if (Param.Para32[0] == SK_DRV_MODERATION_TIMER) {
15492 -                       /*
15493 -                       ** expiration of the moderation timer implies that
15494 -                       ** dynamic moderation is to be applied
15495 -                       */
15496 +                       /* check what IRQs are to be moderated */
15497                         SkDimStartModerationTimer(pAC);
15498                         SkDimModerate(pAC);
15499 -                        if (pAC->DynIrqModInfo.DisplayStats) {
15500 -                           SkDimDisplayModerationSettings(pAC);
15501 -                        }
15502 -                } else if (Param.Para32[0] == SK_DRV_RX_CLEANUP_TIMER) {
15503 -                       /*
15504 -                       ** check if we need to check for descriptors which
15505 -                       ** haven't been handled the last millisecs
15506 -                       */
15507 -                       StartDrvCleanupTimer(pAC);
15508 -                       if (pAC->GIni.GIMacsFound == 2) {
15509 -                               ReceiveIrq(pAC, &pAC->RxPort[1], SK_FALSE);
15510 -                       }
15511 -                       ReceiveIrq(pAC, &pAC->RxPort[0], SK_FALSE);
15512                 } else {
15513                         printk("Expiration of unknown timer\n");
15514                 }
15515                 break;
15516 +       case SK_DRV_ADAP_FAIL:
15517 +#if (!defined (Y2_RECOVERY) && !defined (Y2_LE_CHECK))
15518 +               SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
15519 +                       ("ADAPTER FAIL EVENT\n"));
15520 +               printk("%s: Adapter failed.\n", pAC->dev[0]->name);
15521 +               SK_OUT32(pAC->IoBase, B0_IMSK, 0); /* disable interrupts */
15522 +               break;
15523 +#endif
15524 +
15525 +#if (defined (Y2_RECOVERY) || defined (Y2_LE_CHECK))
15526 +       case SK_DRV_RECOVER:
15527 +               pNet = (DEV_NET *) pAC->dev[0]->priv;
15528 +
15529 +               /* Recover already in progress */
15530 +               if (pNet->InRecover) {
15531 +                       break;
15532 +               }
15533 +
15534 +               netif_stop_queue(pAC->dev[0]); /* stop device if running */
15535 +               pNet->InRecover = SK_TRUE;
15536 +
15537 +               FromPort = Param.Para32[0];
15538 +               SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
15539 +                       ("PORT RESET EVENT, Port: %d ", FromPort));
15540 +
15541 +               /* Disable interrupts */
15542 +               SK_OUT32(pAC->IoBase, B0_IMSK, 0);
15543 +               SK_OUT32(pAC->IoBase, B0_HWE_IMSK, 0);
15544 +
15545 +               SkLocalEventQueue64(pAC, SKGE_PNMI, SK_PNMI_EVT_XMAC_RESET,
15546 +                                       FromPort, SK_FALSE);
15547 +               spin_lock_irqsave(
15548 +                       &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
15549 +                       Flags);
15550 +               if (CHIP_ID_YUKON_2(pAC)) {
15551 +                       if (pAC->GIni.GIMacsFound > 1) {
15552 +                               SkY2PortStop(pAC, IoC, 0, SK_STOP_ALL, SK_SOFT_RST);
15553 +                               SkY2PortStop(pAC, IoC, 1, SK_STOP_ALL, SK_SOFT_RST);
15554 +                       } else {
15555 +                               SkY2PortStop(pAC, IoC, FromPort, SK_STOP_ALL, SK_SOFT_RST);
15556 +                       }
15557 +               } else {
15558 +                       SkGeStopPort(pAC, IoC, FromPort, SK_STOP_ALL, SK_SOFT_RST);
15559 +               }
15560 +               pAC->dev[Param.Para32[0]]->flags &= ~IFF_RUNNING;
15561 +               spin_unlock_irqrestore(
15562 +                       &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
15563 +                       Flags);
15564 +
15565 +               if (!CHIP_ID_YUKON_2(pAC)) {
15566 +#ifdef CONFIG_SK98LIN_NAPI
15567 +                       WorkToDo = 1;
15568 +                       ReceiveIrq(pAC, &pAC->RxPort[FromPort], SK_FALSE, &WorkDone, WorkToDo);
15569 +#else
15570 +                       ReceiveIrq(pAC, &pAC->RxPort[FromPort], SK_FALSE);
15571 +#endif
15572 +                       ClearTxRing(pAC, &pAC->TxPort[FromPort][TX_PRIO_LOW]);
15573 +               }
15574 +               spin_lock_irqsave(
15575 +                       &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
15576 +                       Flags);
15577 +
15578 +#ifdef USE_TIST_FOR_RESET
15579 +               if (pAC->GIni.GIYukon2) {
15580 +#if 0
15581 +                       /* make sure that we do not accept any status LEs from now on */
15582 +                       Y2_ENABLE_TIST(pAC->IoBase);
15583 +
15584 +                       /* get current timestamp */
15585 +                       Y2_GET_TIST_LOW_VAL(pAC->IoBase, &pAC->MinTistLo);
15586 +                       pAC->MinTistHi = pAC->GIni.GITimeStampCnt;
15587 +
15588 +                       SK_SET_WAIT_BIT_FOR_PORT(
15589 +                               pAC,
15590 +                               SK_PSTATE_WAITING_FOR_SPECIFIC_TIST,
15591 +                               FromPort);
15592 +#endif
15593 +                       if (pAC->GIni.GIMacsFound > 1) {
15594 +                               SK_SET_WAIT_BIT_FOR_PORT(
15595 +                                       pAC,
15596 +                                       SK_PSTATE_WAITING_FOR_ANY_TIST,
15597 +                                       0);
15598 +                               SK_SET_WAIT_BIT_FOR_PORT(
15599 +                                       pAC,
15600 +                                       SK_PSTATE_WAITING_FOR_ANY_TIST,
15601 +                                       1);
15602 +                       } else {
15603 +                               SK_SET_WAIT_BIT_FOR_PORT(
15604 +                                       pAC,
15605 +                                       SK_PSTATE_WAITING_FOR_ANY_TIST,
15606 +                                       FromPort);
15607 +                       }
15608 +
15609 +                       /* start tist */
15610 +                        Y2_ENABLE_TIST(pAC->IoBase);
15611 +               }
15612 +#endif
15613 +
15614 +
15615 +
15616 +#ifdef Y2_LE_CHECK
15617 +               /* mark entries invalid */
15618 +               pAC->LastPort = 3;
15619 +               pAC->LastOpc = 0xFF;
15620 +#endif
15621 +
15622 +#endif
15623 +               /* Restart ports but do not initialize PHY. */
15624 +               if (CHIP_ID_YUKON_2(pAC)) {
15625 +                       if (pAC->GIni.GIMacsFound > 1) {
15626 +                               SkY2PortStart(pAC, IoC, 0);
15627 +                               SkY2PortStart(pAC, IoC, 1);
15628 +                       } else {
15629 +                               SkY2PortStart(pAC, IoC, FromPort);
15630 +                       }
15631 +               } else {
15632 +                       /* tschilling: Handling of return value inserted. */
15633 +                       if (SkGeInitPort(pAC, IoC, FromPort)) {
15634 +                               if (FromPort == 0) {
15635 +                                       printk("%s: SkGeInitPort A failed.\n", pAC->dev[0]->name);
15636 +                               } else {
15637 +                                       printk("%s: SkGeInitPort B failed.\n", pAC->dev[1]->name);
15638 +                               }
15639 +                       }
15640 +                       SkAddrMcUpdate(pAC,IoC, FromPort);
15641 +                       PortReInitBmu(pAC, FromPort);
15642 +                       SkGePollTxD(pAC, IoC, FromPort, SK_TRUE);
15643 +                       CLEAR_AND_START_RX(FromPort);
15644 +               }
15645 +               spin_unlock_irqrestore(
15646 +                       &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
15647 +                       Flags);
15648 +
15649 +#if 0
15650 +               /* restart the kernel timer */
15651 +               pNet = (DEV_NET *) pAC->dev[FromPort]->priv;
15652 +               if (!timer_pending(&pNet->KernelTimer)) {
15653 +                       pNet->KernelTimer.expires =
15654 +                               jiffies + (HZ/4);       /* 250ms */
15655 +                       add_timer(&pNet->KernelTimer);
15656 +               }
15657 +#endif
15658 +               pNet->InRecover = SK_FALSE;
15659 +               /* enable Interrupts */
15660 +               SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
15661 +               SK_OUT32(pAC->IoBase, B0_HWE_IMSK, IRQ_HWE_MASK);
15662 +               netif_wake_queue(pAC->dev[0]);
15663 +               break;
15664         default:
15665                 break;
15666         }
15667         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
15668                 ("END EVENT "));
15669 -
15670 +
15671         return (0);
15672  } /* SkDrvEvent */
15673
15674
15675 +/******************************************************************************
15676 + *
15677 + *     SkLocalEventQueue()     -       add event to queue
15678 + *
15679 + * Description:
15680 + *     This function adds an event to the event queue and run the
15681 + *     SkEventDispatcher. At least Init Level 1 is required to queue events,
15682 + *     but will be scheduled add Init Level 2.
15683 + *
15684 + * returns:
15685 + *     nothing
15686 + */
15687 +void SkLocalEventQueue(
15688 +SK_AC *pAC,            /* Adapters context */
15689 +SK_U32 Class,          /* Event Class */
15690 +SK_U32 Event,          /* Event to be queued */
15691 +SK_U32 Param1,         /* Event parameter 1 */
15692 +SK_U32 Param2,         /* Event parameter 2 */
15693 +SK_BOOL Dispatcher)    /* Dispatcher flag:
15694 +                        *      TRUE == Call SkEventDispatcher
15695 +                        *      FALSE == Don't execute SkEventDispatcher
15696 +                        */
15697 +{
15698 +       SK_EVPARA       EvPara;
15699 +       EvPara.Para32[0] = Param1;
15700 +       EvPara.Para32[1] = Param2;
15701 +
15702 +
15703 +       if (Class == SKGE_PNMI) {
15704 +               SkPnmiEvent(    pAC,
15705 +                               pAC->IoBase,
15706 +                               Event,
15707 +                               EvPara);
15708 +       } else {
15709 +               SkEventQueue(   pAC,
15710 +                               Class,
15711 +                               Event,
15712 +                               EvPara);
15713 +       }
15714 +
15715 +       /* Run the dispatcher */
15716 +       if (Dispatcher) {
15717 +               SkEventDispatcher(pAC, pAC->IoBase);
15718 +       }
15719 +
15720 +}
15721 +
15722 +/******************************************************************************
15723 + *
15724 + *     SkLocalEventQueue64()   -       add event to queue (64bit version)
15725 + *
15726 + * Description:
15727 + *     This function adds an event to the event queue and run the
15728 + *     SkEventDispatcher. At least Init Level 1 is required to queue events,
15729 + *     but will be scheduled add Init Level 2.
15730 + *
15731 + * returns:
15732 + *     nothing
15733 + */
15734 +void SkLocalEventQueue64(
15735 +SK_AC *pAC,            /* Adapters context */
15736 +SK_U32 Class,          /* Event Class */
15737 +SK_U32 Event,          /* Event to be queued */
15738 +SK_U64 Param,          /* Event parameter */
15739 +SK_BOOL Dispatcher)    /* Dispatcher flag:
15740 +                        *      TRUE == Call SkEventDispatcher
15741 +                        *      FALSE == Don't execute SkEventDispatcher
15742 +                        */
15743 +{
15744 +       SK_EVPARA       EvPara;
15745 +       EvPara.Para64 = Param;
15746 +
15747 +
15748 +       if (Class == SKGE_PNMI) {
15749 +               SkPnmiEvent(    pAC,
15750 +                               pAC->IoBase,
15751 +                               Event,
15752 +                               EvPara);
15753 +       } else {
15754 +               SkEventQueue(   pAC,
15755 +                               Class,
15756 +                               Event,
15757 +                               EvPara);
15758 +       }
15759 +
15760 +       /* Run the dispatcher */
15761 +       if (Dispatcher) {
15762 +               SkEventDispatcher(pAC, pAC->IoBase);
15763 +       }
15764 +
15765 +}
15766 +
15767 +
15768  /*****************************************************************************
15769   *
15770   *     SkErrorLog - log errors
15771 @@ -4523,8 +5776,6 @@
15772
15773  } /* SkErrorLog */
15774
15775 -#ifdef SK_DIAG_SUPPORT
15776 -
15777  /*****************************************************************************
15778   *
15779   *     SkDrvEnterDiagMode - handles DIAG attach request
15780 @@ -4550,7 +5801,7 @@
15781
15782         pAC->DiagModeActive = DIAG_ACTIVE;
15783         if (pAC->BoardLevel > SK_INIT_DATA) {
15784 -               if (pNet->Up) {
15785 +               if (netif_running(pAC->dev[0])) {
15786                         pAC->WasIfUp[0] = SK_TRUE;
15787                         pAC->DiagFlowCtrl = SK_TRUE; /* for SkGeClose      */
15788                         DoPrintInterfaceChange = SK_FALSE;
15789 @@ -4558,9 +5809,10 @@
15790                 } else {
15791                         pAC->WasIfUp[0] = SK_FALSE;
15792                 }
15793 +
15794                 if (pNet != (DEV_NET *) pAc->dev[1]->priv) {
15795                         pNet = (DEV_NET *) pAc->dev[1]->priv;
15796 -                       if (pNet->Up) {
15797 +                       if (netif_running(pAC->dev[1])) {
15798                                 pAC->WasIfUp[1] = SK_TRUE;
15799                                 pAC->DiagFlowCtrl = SK_TRUE; /* for SkGeClose */
15800                                 DoPrintInterfaceChange = SK_FALSE;
15801 @@ -4592,16 +5844,16 @@
15802                         sizeof(SK_PNMI_STRUCT_DATA));
15803         pAc->DiagModeActive    = DIAG_NOTACTIVE;
15804         pAc->Pnmi.DiagAttached = SK_DIAG_IDLE;
15805 -        if (pAc->WasIfUp[0] == SK_TRUE) {
15806 -                pAc->DiagFlowCtrl = SK_TRUE; /* for SkGeClose */
15807 +       if (pAc->WasIfUp[0] == SK_TRUE) {
15808 +               pAc->DiagFlowCtrl = SK_TRUE; /* for SkGeClose */
15809                 DoPrintInterfaceChange = SK_FALSE;
15810 -                SkDrvInitAdapter(pAc, 0);    /* first device  */
15811 -        }
15812 -        if (pAc->WasIfUp[1] == SK_TRUE) {
15813 -                pAc->DiagFlowCtrl = SK_TRUE; /* for SkGeClose */
15814 +               SkDrvInitAdapter(pAc, 0);    /* first device  */
15815 +       }
15816 +       if (pAc->WasIfUp[1] == SK_TRUE) {
15817 +               pAc->DiagFlowCtrl = SK_TRUE; /* for SkGeClose */
15818                 DoPrintInterfaceChange = SK_FALSE;
15819 -                SkDrvInitAdapter(pAc, 1);    /* second device */
15820 -        }
15821 +               SkDrvInitAdapter(pAc, 1);    /* second device */
15822 +       }
15823         return(0);
15824  }
15825
15826 @@ -4746,14 +5998,25 @@
15827
15828  } /* SkDrvInitAdapter */
15829
15830 -#endif
15831 +static int __init sk98lin_init(void)
15832 +{
15833 +       return pci_module_init(&sk98lin_driver);
15834 +}
15835 +
15836 +static void __exit sk98lin_cleanup(void)
15837 +{
15838 +       pci_unregister_driver(&sk98lin_driver);
15839 +}
15840 +
15841 +module_init(sk98lin_init);
15842 +module_exit(sk98lin_cleanup);
15843 +
15844
15845  #ifdef DEBUG
15846  /****************************************************************************/
15847  /* "debug only" section *****************************************************/
15848  /****************************************************************************/
15849
15850 -
15851  /*****************************************************************************
15852   *
15853   *     DumpMsg - print a frame
15854 @@ -4764,9 +6027,11 @@
15855   * Returns: N/A
15856   *
15857   */
15858 -static void DumpMsg(struct sk_buff *skb, char *str)
15859 +static void DumpMsg(
15860 +struct sk_buff *skb,  /* linux' socket buffer  */
15861 +char           *str)  /* additional msg string */
15862  {
15863 -       int     msglen;
15864 +       int msglen = (skb->len > 64) ? 64 : skb->len;
15865
15866         if (skb == NULL) {
15867                 printk("DumpMsg(): NULL-Message\n");
15868 @@ -4778,19 +6043,14 @@
15869                 return;
15870         }
15871
15872 -       msglen = skb->len;
15873 -       if (msglen > 64)
15874 -               msglen = 64;
15875 -
15876 -       printk("--- Begin of message from %s , len %d (from %d) ----\n", str, msglen, skb->len);
15877 -
15878 +       printk("DumpMsg: PhysPage: %p\n",
15879 +               page_address(virt_to_page(skb->data)));
15880 +       printk("--- Begin of message from %s , len %d (from %d) ----\n",
15881 +               str, msglen, skb->len);
15882         DumpData((char *)skb->data, msglen);
15883 -
15884         printk("------- End of message ---------\n");
15885  } /* DumpMsg */
15886
15887 -
15888 -
15889  /*****************************************************************************
15890   *
15891   *     DumpData - print a data area
15892 @@ -4802,23 +6062,22 @@
15893   * Returns: N/A
15894   *
15895   */
15896 -static void DumpData(char *p, int size)
15897 -{
15898 -register int    i;
15899 -int    haddr, addr;
15900 -char   hex_buffer[180];
15901 -char   asc_buffer[180];
15902 -char   HEXCHAR[] = "0123456789ABCDEF";
15903 -
15904 -       addr = 0;
15905 -       haddr = 0;
15906 -       hex_buffer[0] = 0;
15907 -       asc_buffer[0] = 0;
15908 +static void DumpData(
15909 +char  *p,     /* pointer to area containing the data */
15910 +int    size)  /* the size of that data area in bytes */
15911 +{
15912 +       register int  i;
15913 +       int           haddr = 0, addr = 0;
15914 +       char          hex_buffer[180] = { '\0' };
15915 +       char          asc_buffer[180] = { '\0' };
15916 +       char          HEXCHAR[] = "0123456789ABCDEF";
15917 +
15918         for (i=0; i < size; ) {
15919 -               if (*p >= '0' && *p <='z')
15920 +               if (*p >= '0' && *p <='z') {
15921                         asc_buffer[addr] = *p;
15922 -               else
15923 +               } else {
15924                         asc_buffer[addr] = '.';
15925 +               }
15926                 addr++;
15927                 asc_buffer[addr] = 0;
15928                 hex_buffer[haddr] = HEXCHAR[(*p & 0xf0) >> 4];
15929 @@ -4844,27 +6103,24 @@
15930   *     DumpLong - print a data area as long values
15931   *
15932   * Description:
15933 - *     This function prints a area of data to the system logfile/to the
15934 + *     This function prints a long variable to the system logfile/to the
15935   *     console.
15936   *
15937   * Returns: N/A
15938   *
15939   */
15940 -static void DumpLong(char *pc, int size)
15941 -{
15942 -register int    i;
15943 -int    haddr, addr;
15944 -char   hex_buffer[180];
15945 -char   asc_buffer[180];
15946 -char   HEXCHAR[] = "0123456789ABCDEF";
15947 -long   *p;
15948 -int    l;
15949 -
15950 -       addr = 0;
15951 -       haddr = 0;
15952 -       hex_buffer[0] = 0;
15953 -       asc_buffer[0] = 0;
15954 -       p = (long*) pc;
15955 +static void DumpLong(
15956 +char  *pc,    /* location of the variable to print */
15957 +int    size)  /* how large is the variable?        */
15958 +{
15959 +       register int   i;
15960 +       int            haddr = 0, addr = 0;
15961 +       char           hex_buffer[180] = { '\0' };
15962 +       char           asc_buffer[180] = { '\0' };
15963 +       char           HEXCHAR[] = "0123456789ABCDEF";
15964 +       long          *p = (long*) pc;
15965 +       int            l;
15966 +
15967         for (i=0; i < size; ) {
15968                 l = (long) *p;
15969                 hex_buffer[haddr] = HEXCHAR[(l >> 28) & 0xf];
15970 @@ -4898,330 +6154,9 @@
15971
15972  #endif
15973
15974 -static int __devinit skge_probe_one(struct pci_dev *pdev,
15975 -               const struct pci_device_id *ent)
15976 -{
15977 -       SK_AC                   *pAC;
15978 -       DEV_NET                 *pNet = NULL;
15979 -       struct net_device       *dev = NULL;
15980 -#ifdef CONFIG_PROC_FS
15981 -       struct proc_dir_entry   *pProcFile;
15982 -#endif
15983 -       static int boards_found = 0;
15984 -       int error = -ENODEV;
15985 -
15986 -       if (pci_enable_device(pdev))
15987 -               goto out;
15988 -
15989 -       /* Configure DMA attributes. */
15990 -       if (pci_set_dma_mask(pdev, (u64) 0xffffffffffffffffULL) &&
15991 -           pci_set_dma_mask(pdev, (u64) 0xffffffff))
15992 -               goto out_disable_device;
15993 -
15994 -
15995 -       if ((dev = alloc_etherdev(sizeof(DEV_NET))) == NULL) {
15996 -               printk(KERN_ERR "Unable to allocate etherdev "
15997 -                      "structure!\n");
15998 -               goto out_disable_device;
15999 -       }
16000 -
16001 -       pNet = dev->priv;
16002 -       pNet->pAC = kmalloc(sizeof(SK_AC), GFP_KERNEL);
16003 -       if (!pNet->pAC) {
16004 -               printk(KERN_ERR "Unable to allocate adapter "
16005 -                      "structure!\n");
16006 -               goto out_free_netdev;
16007 -       }
16008 -
16009 -       memset(pNet->pAC, 0, sizeof(SK_AC));
16010 -       pAC = pNet->pAC;
16011 -       pAC->PciDev = pdev;
16012 -       pAC->PciDevId = pdev->device;
16013 -       pAC->dev[0] = dev;
16014 -       pAC->dev[1] = dev;
16015 -       sprintf(pAC->Name, "SysKonnect SK-98xx");
16016 -       pAC->CheckQueue = SK_FALSE;
16017 -
16018 -       pNet->Mtu = 1500;
16019 -       pNet->Up = 0;
16020 -       dev->irq = pdev->irq;
16021 -       error = SkGeInitPCI(pAC);
16022 -       if (error) {
16023 -               printk("SKGE: PCI setup failed: %i\n", error);
16024 -               goto out_free_netdev;
16025 -       }
16026 -
16027 -       SET_MODULE_OWNER(dev);
16028 -       dev->open =             &SkGeOpen;
16029 -       dev->stop =             &SkGeClose;
16030 -       dev->hard_start_xmit =  &SkGeXmit;
16031 -       dev->get_stats =        &SkGeStats;
16032 -       dev->set_multicast_list = &SkGeSetRxMode;
16033 -       dev->set_mac_address =  &SkGeSetMacAddr;
16034 -       dev->do_ioctl =         &SkGeIoctl;
16035 -       dev->change_mtu =       &SkGeChangeMtu;
16036 -       dev->flags &=           ~IFF_RUNNING;
16037 -       SET_NETDEV_DEV(dev, &pdev->dev);
16038 -
16039 -#ifdef SK_ZEROCOPY
16040 -#ifdef USE_SK_TX_CHECKSUM
16041 -       if (pAC->ChipsetType) {
16042 -               /* Use only if yukon hardware */
16043 -               /* SK and ZEROCOPY - fly baby... */
16044 -               dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
16045 -       }
16046 -#endif
16047 -#endif
16048 -
16049 -       pAC->Index = boards_found++;
16050 -
16051 -       if (SkGeBoardInit(dev, pAC))
16052 -               goto out_free_netdev;
16053 -
16054 -       /* Register net device */
16055 -       if (register_netdev(dev)) {
16056 -               printk(KERN_ERR "SKGE: Could not register device.\n");
16057 -               goto out_free_resources;
16058 -       }
16059 -
16060 -       /* Print adapter specific string from vpd */
16061 -       ProductStr(pAC);
16062 -       printk("%s: %s\n", dev->name, pAC->DeviceStr);
16063 -
16064 -       /* Print configuration settings */
16065 -       printk("      PrefPort:%c  RlmtMode:%s\n",
16066 -               'A' + pAC->Rlmt.Net[0].Port[pAC->Rlmt.Net[0].PrefPort]->PortNumber,
16067 -               (pAC->RlmtMode==0)  ? "Check Link State" :
16068 -               ((pAC->RlmtMode==1) ? "Check Link State" :
16069 -               ((pAC->RlmtMode==3) ? "Check Local Port" :
16070 -               ((pAC->RlmtMode==7) ? "Check Segmentation" :
16071 -               ((pAC->RlmtMode==17) ? "Dual Check Link State" :"Error")))));
16072 -
16073 -       SkGeYellowLED(pAC, pAC->IoBase, 1);
16074 -
16075 -
16076 -       memcpy(&dev->dev_addr, &pAC->Addr.Net[0].CurrentMacAddress, 6);
16077 -
16078 -#ifdef CONFIG_PROC_FS
16079 -       pProcFile = create_proc_entry(dev->name, S_IRUGO, pSkRootDir);
16080 -       if (pProcFile) {
16081 -               pProcFile->proc_fops = &sk_proc_fops;
16082 -               pProcFile->data = dev;
16083 -               pProcFile->owner = THIS_MODULE;
16084 -       }
16085 -#endif
16086 -
16087 -       pNet->PortNr = 0;
16088 -       pNet->NetNr  = 0;
16089 -
16090 -       boards_found++;
16091 -
16092 -       /* More then one port found */
16093 -       if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
16094 -               if ((dev = alloc_etherdev(sizeof(DEV_NET))) == 0) {
16095 -                       printk(KERN_ERR "Unable to allocate etherdev "
16096 -                               "structure!\n");
16097 -                       goto out;
16098 -               }
16099 -
16100 -               pAC->dev[1]   = dev;
16101 -               pNet          = dev->priv;
16102 -               pNet->PortNr  = 1;
16103 -               pNet->NetNr   = 1;
16104 -               pNet->pAC     = pAC;
16105 -               pNet->Mtu     = 1500;
16106 -               pNet->Up      = 0;
16107 -
16108 -               dev->open               = &SkGeOpen;
16109 -               dev->stop               = &SkGeClose;
16110 -               dev->hard_start_xmit    = &SkGeXmit;
16111 -               dev->get_stats          = &SkGeStats;
16112 -               dev->set_multicast_list = &SkGeSetRxMode;
16113 -               dev->set_mac_address    = &SkGeSetMacAddr;
16114 -               dev->do_ioctl           = &SkGeIoctl;
16115 -               dev->change_mtu         = &SkGeChangeMtu;
16116 -               dev->flags             &= ~IFF_RUNNING;
16117 -
16118 -#ifdef SK_ZEROCOPY
16119 -#ifdef USE_SK_TX_CHECKSUM
16120 -               if (pAC->ChipsetType) {
16121 -                       /* SG and ZEROCOPY - fly baby... */
16122 -                       dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
16123 -               }
16124 -#endif
16125 -#endif
16126 -
16127 -               if (register_netdev(dev)) {
16128 -                       printk(KERN_ERR "SKGE: Could not register device.\n");
16129 -                       free_netdev(dev);
16130 -                       pAC->dev[1] = pAC->dev[0];
16131 -               } else {
16132 -#ifdef CONFIG_PROC_FS
16133 -                       pProcFile = create_proc_entry(dev->name, S_IRUGO,
16134 -                                       pSkRootDir);
16135 -                       if (pProcFile) {
16136 -                               pProcFile->proc_fops = &sk_proc_fops;
16137 -                               pProcFile->data = dev;
16138 -                               pProcFile->owner = THIS_MODULE;
16139 -                       }
16140 -#endif
16141 -
16142 -                       memcpy(&dev->dev_addr,
16143 -                                       &pAC->Addr.Net[1].CurrentMacAddress, 6);
16144 -
16145 -                       printk("%s: %s\n", dev->name, pAC->DeviceStr);
16146 -                       printk("      PrefPort:B  RlmtMode:Dual Check Link State\n");
16147 -               }
16148 -       }
16149 -
16150 -       /* Save the hardware revision */
16151 -       pAC->HWRevision = (((pAC->GIni.GIPciHwRev >> 4) & 0x0F)*10) +
16152 -               (pAC->GIni.GIPciHwRev & 0x0F);
16153 -
16154 -       /* Set driver globals */
16155 -       pAC->Pnmi.pDriverFileName    = DRIVER_FILE_NAME;
16156 -       pAC->Pnmi.pDriverReleaseDate = DRIVER_REL_DATE;
16157 -
16158 -       memset(&pAC->PnmiBackup, 0, sizeof(SK_PNMI_STRUCT_DATA));
16159 -       memcpy(&pAC->PnmiBackup, &pAC->PnmiStruct, sizeof(SK_PNMI_STRUCT_DATA));
16160 -
16161 -       pci_set_drvdata(pdev, dev);
16162 -       return 0;
16163 -
16164 - out_free_resources:
16165 -       FreeResources(dev);
16166 - out_free_netdev:
16167 -       free_netdev(dev);
16168 - out_disable_device:
16169 -       pci_disable_device(pdev);
16170 - out:
16171 -       return error;
16172 -}
16173 -
16174 -static void __devexit skge_remove_one(struct pci_dev *pdev)
16175 -{
16176 -       struct net_device *dev = pci_get_drvdata(pdev);
16177 -       DEV_NET *pNet = (DEV_NET *) dev->priv;
16178 -       SK_AC *pAC = pNet->pAC;
16179 -       int have_second_mac = 0;
16180 -
16181 -       if ((pAC->GIni.GIMacsFound == 2) && pAC->RlmtNets == 2)
16182 -               have_second_mac = 1;
16183 -
16184 -       remove_proc_entry(dev->name, pSkRootDir);
16185 -       unregister_netdev(dev);
16186 -       if (have_second_mac) {
16187 -               remove_proc_entry(pAC->dev[1]->name, pSkRootDir);
16188 -               unregister_netdev(pAC->dev[1]);
16189 -       }
16190 -
16191 -       SkGeYellowLED(pAC, pAC->IoBase, 0);
16192 -
16193 -       if (pAC->BoardLevel == SK_INIT_RUN) {
16194 -               SK_EVPARA EvPara;
16195 -               unsigned long Flags;
16196 -
16197 -               /* board is still alive */
16198 -               spin_lock_irqsave(&pAC->SlowPathLock, Flags);
16199 -               EvPara.Para32[0] = 0;
16200 -               EvPara.Para32[1] = -1;
16201 -               SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
16202 -               EvPara.Para32[0] = 1;
16203 -               EvPara.Para32[1] = -1;
16204 -               SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
16205 -               SkEventDispatcher(pAC, pAC->IoBase);
16206 -               /* disable interrupts */
16207 -               SK_OUT32(pAC->IoBase, B0_IMSK, 0);
16208 -               SkGeDeInit(pAC, pAC->IoBase);
16209 -               spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
16210 -               pAC->BoardLevel = SK_INIT_DATA;
16211 -               /* We do NOT check here, if IRQ was pending, of course*/
16212 -       }
16213 -
16214 -       if (pAC->BoardLevel == SK_INIT_IO) {
16215 -               /* board is still alive */
16216 -               SkGeDeInit(pAC, pAC->IoBase);
16217 -               pAC->BoardLevel = SK_INIT_DATA;
16218 -       }
16219 -
16220 -       FreeResources(dev);
16221 -       free_netdev(dev);
16222 -       if (have_second_mac)
16223 -               free_netdev(pAC->dev[1]);
16224 -       kfree(pAC);
16225 -}
16226 -
16227 -static struct pci_device_id skge_pci_tbl[] = {
16228 -       { PCI_VENDOR_ID_3COM, 0x1700, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
16229 -       { PCI_VENDOR_ID_3COM, 0x80eb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
16230 -       { PCI_VENDOR_ID_SYSKONNECT, 0x4300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
16231 -       { PCI_VENDOR_ID_SYSKONNECT, 0x4320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
16232 -       { PCI_VENDOR_ID_DLINK, 0x4c00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
16233 -       { PCI_VENDOR_ID_MARVELL, 0x4320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
16234 -#if 0  /* don't handle Yukon2 cards at the moment -- mlindner@syskonnect.de */
16235 -       { PCI_VENDOR_ID_MARVELL, 0x4360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
16236 -       { PCI_VENDOR_ID_MARVELL, 0x4361, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
16237 -#endif
16238 -       { PCI_VENDOR_ID_MARVELL, 0x5005, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
16239 -       { PCI_VENDOR_ID_CNET, 0x434e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
16240 -       { PCI_VENDOR_ID_LINKSYS, 0x1032, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
16241 -       { PCI_VENDOR_ID_LINKSYS, 0x1064, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
16242 -       { 0, }
16243 -};
16244 -
16245 -/*****************************************************************************
16246 +/*******************************************************************************
16247   *
16248 - * Avoid PCI ID confusion w/ skge by limiting advertised IDs so we don't
16249 - * needlessly overlap...
16250 + * End of file
16251   *
16252 - */
16253 -static struct pci_device_id advertised_skge_pci_tbl[] = {
16254 -       { PCI_VENDOR_ID_LINKSYS, 0x1032, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
16255 -       { 0, }
16256 -};
16257 -
16258 -MODULE_DEVICE_TABLE(pci, advertised_skge_pci_tbl);
16259 -
16260 -static struct pci_driver skge_driver = {
16261 -       .name           = "skge",
16262 -       .id_table       = skge_pci_tbl,
16263 -       .probe          = skge_probe_one,
16264 -       .remove         = __devexit_p(skge_remove_one),
16265 -};
16266 -
16267 -static int __init skge_init(void)
16268 -{
16269 -       int error;
16270 -
16271 -#ifdef CONFIG_PROC_FS
16272 -       memcpy(&SK_Root_Dir_entry, BOOT_STRING, sizeof(SK_Root_Dir_entry) - 1);
16273 -
16274 -       pSkRootDir = proc_mkdir(SK_Root_Dir_entry, proc_net);
16275 -       if (!pSkRootDir) {
16276 -               printk(KERN_WARNING "Unable to create /proc/net/%s",
16277 -                               SK_Root_Dir_entry);
16278 -               return -ENOMEM;
16279 -       }
16280 -       pSkRootDir->owner = THIS_MODULE;
16281 -#endif
16282 -
16283 -       error = pci_module_init(&skge_driver);
16284 -       if (error) {
16285 -#ifdef CONFIG_PROC_FS
16286 -               remove_proc_entry(pSkRootDir->name, proc_net);
16287 -#endif
16288 -       }
16289 -
16290 -       return error;
16291 -}
16292 -
16293 -static void __exit skge_exit(void)
16294 -{
16295 -        pci_unregister_driver(&skge_driver);
16296 -#ifdef CONFIG_PROC_FS
16297 -       remove_proc_entry(pSkRootDir->name, proc_net);
16298 -#endif
16299 -}
16300 + ******************************************************************************/
16301
16302 -module_init(skge_init);
16303 -module_exit(skge_exit);
16304 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/skgehwt.c linux-2.6.9.new/drivers/net/sk98lin/skgehwt.c
16305 --- linux-2.6.9.old/drivers/net/sk98lin/skgehwt.c       2004-10-19 05:55:07.000000000 +0800
16306 +++ linux-2.6.9.new/drivers/net/sk98lin/skgehwt.c       2006-12-07 14:35:03.000000000 +0800
16307 @@ -2,8 +2,8 @@
16308   *
16309   * Name:       skgehwt.c
16310   * Project:    Gigabit Ethernet Adapters, Event Scheduler Module
16311 - * Version:    $Revision: 1.15 $
16312 - * Date:       $Date: 2003/09/16 13:41:23 $
16313 + * Version:    $Revision: 2.2 $
16314 + * Date:       $Date: 2004/05/28 13:39:04 $
16315   * Purpose:    Hardware Timer
16316   *
16317   ******************************************************************************/
16318 @@ -11,7 +11,7 @@
16319  /******************************************************************************
16320   *
16321   *     (C)Copyright 1998-2002 SysKonnect GmbH.
16322 - *     (C)Copyright 2002-2003 Marvell.
16323 + *     (C)Copyright 2002-2004 Marvell.
16324   *
16325   *     This program is free software; you can redistribute it and/or modify
16326   *     it under the terms of the GNU General Public License as published by
16327 @@ -27,7 +27,7 @@
16328   */
16329  #if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
16330  static const char SysKonnectFileId[] =
16331 -       "@(#) $Id: skgehwt.c,v 1.15 2003/09/16 13:41:23 rschmidt Exp $ (C) Marvell.";
16332 +       "@(#) $Id: skgehwt.c,v 2.2 2004/05/28 13:39:04 rschmidt Exp $ (C) Marvell.";
16333  #endif
16334
16335  #include "h/skdrv1st.h"                /* Driver Specific Definitions */
16336 @@ -44,10 +44,10 @@
16337  /*
16338   * Prototypes of local functions.
16339   */
16340 -#define        SK_HWT_MAX      (65000)
16341 +#define        SK_HWT_MAX      65000UL * 160           /* ca. 10 sec. */
16342
16343  /* correction factor */
16344 -#define        SK_HWT_FAC      (1000 * (SK_U32)pAC->GIni.GIHstClkFact / 100)
16345 +#define        SK_HWT_FAC      (10 * (SK_U32)pAC->GIni.GIHstClkFact / 16)
16346
16347  /*
16348   * Initialize hardware timer.
16349 @@ -73,29 +73,21 @@
16350  void   SkHwtStart(
16351  SK_AC  *pAC,   /* Adapters context */
16352  SK_IOC Ioc,    /* IoContext */
16353 -SK_U32 Time)   /* Time in units of 16us to load the timer with. */
16354 +SK_U32 Time)   /* Time in usec to load the timer */
16355  {
16356 -       SK_U32  Cnt;
16357 -
16358         if (Time > SK_HWT_MAX)
16359                 Time = SK_HWT_MAX;
16360
16361         pAC->Hwt.TStart = Time;
16362         pAC->Hwt.TStop = 0L;
16363
16364 -       Cnt = Time;
16365 -
16366 -       /*
16367 -        * if time < 16 us
16368 -        *      time = 16 us
16369 -        */
16370 -       if (!Cnt) {
16371 -               Cnt++;
16372 +       if (!Time) {
16373 +               Time = 1L;
16374         }
16375
16376 -       SK_OUT32(Ioc, B2_TI_INI, Cnt * SK_HWT_FAC);
16377 -
16378 -       SK_OUT16(Ioc, B2_TI_CTRL, TIM_START);   /* Start timer. */
16379 +       SK_OUT32(Ioc, B2_TI_INI, Time * SK_HWT_FAC);
16380 +
16381 +       SK_OUT16(Ioc, B2_TI_CTRL, TIM_START);   /* Start timer */
16382
16383         pAC->Hwt.TActive = SK_TRUE;
16384  }
16385 @@ -109,13 +101,12 @@
16386  SK_IOC Ioc)    /* IoContext */
16387  {
16388         SK_OUT16(Ioc, B2_TI_CTRL, TIM_STOP);
16389 -
16390 +
16391         SK_OUT16(Ioc, B2_TI_CTRL, TIM_CLR_IRQ);
16392
16393         pAC->Hwt.TActive = SK_FALSE;
16394  }
16395
16396 -
16397  /*
16398   *     Stop hardware timer and read time elapsed since last start.
16399   *
16400 @@ -129,6 +120,9 @@
16401  {
16402         SK_U32  TRead;
16403         SK_U32  IStatus;
16404 +       SK_U32  TimerInt;
16405 +
16406 +       TimerInt = CHIP_ID_YUKON_2(pAC) ? Y2_IS_TIMINT : IS_TIMINT;
16407
16408         if (pAC->Hwt.TActive) {
16409
16410 @@ -139,15 +133,15 @@
16411
16412                 SK_IN32(Ioc, B0_ISRC, &IStatus);
16413
16414 -               /* Check if timer expired (or wraped around) */
16415 -               if ((TRead > pAC->Hwt.TStart) || (IStatus & IS_TIMINT)) {
16416 -
16417 +               /* Check if timer expired (or wrapped around) */
16418 +               if ((TRead > pAC->Hwt.TStart) || ((IStatus & TimerInt) != 0)) {
16419 +
16420                         SkHwtStop(pAC, Ioc);
16421 -
16422 +
16423                         pAC->Hwt.TStop = pAC->Hwt.TStart;
16424                 }
16425                 else {
16426 -
16427 +
16428                         pAC->Hwt.TStop = pAC->Hwt.TStart - TRead;
16429                 }
16430         }
16431 @@ -162,9 +156,9 @@
16432  SK_IOC Ioc)    /* IoContext */
16433  {
16434         SkHwtStop(pAC, Ioc);
16435 -
16436 +
16437         pAC->Hwt.TStop = pAC->Hwt.TStart;
16438 -
16439 +
16440         SkTimerDone(pAC, Ioc);
16441  }
16442
16443 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/skgeinit.c linux-2.6.9.new/drivers/net/sk98lin/skgeinit.c
16444 --- linux-2.6.9.old/drivers/net/sk98lin/skgeinit.c      2004-10-19 05:54:30.000000000 +0800
16445 +++ linux-2.6.9.new/drivers/net/sk98lin/skgeinit.c      2006-12-07 14:35:03.000000000 +0800
16446 @@ -2,8 +2,8 @@
16447   *
16448   * Name:       skgeinit.c
16449   * Project:    Gigabit Ethernet Adapters, Common Modules
16450 - * Version:    $Revision: 1.97 $
16451 - * Date:       $Date: 2003/10/02 16:45:31 $
16452 + * Version:    $Revision: 2.73 $
16453 + * Date:       $Date: 2005/05/24 08:05:45 $
16454   * Purpose:    Contains functions to initialize the adapter
16455   *
16456   ******************************************************************************/
16457 @@ -11,13 +11,12 @@
16458  /******************************************************************************
16459   *
16460   *     (C)Copyright 1998-2002 SysKonnect.
16461 - *     (C)Copyright 2002-2003 Marvell.
16462 + *     (C)Copyright 2002-2005 Marvell.
16463   *
16464   *     This program is free software; you can redistribute it and/or modify
16465   *     it under the terms of the GNU General Public License as published by
16466   *     the Free Software Foundation; either version 2 of the License, or
16467   *     (at your option) any later version.
16468 - *
16469   *     The information in this file is provided "AS IS" without warranty.
16470   *
16471   ******************************************************************************/
16472 @@ -31,7 +30,7 @@
16473
16474  #if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
16475  static const char SysKonnectFileId[] =
16476 -       "@(#) $Id: skgeinit.c,v 1.97 2003/10/02 16:45:31 rschmidt Exp $ (C) Marvell.";
16477 +       "@(#) $Id: skgeinit.c,v 2.73 2005/05/24 08:05:45 rschmidt Exp $ (C) Marvell.";
16478  #endif
16479
16480  struct s_QOffTab {
16481 @@ -59,6 +58,101 @@
16482
16483  /******************************************************************************
16484   *
16485 + *     SkGePortVlan() -        Enable / Disable VLAN support
16486 + *
16487 + * Description:
16488 + *     Enable or disable the VLAN support of the selected port.
16489 + *     The new configuration is *not* saved over any SkGeStopPort() and
16490 + *     SkGeInitPort() calls.
16491 + *     Currently this function is only supported on Yukon-2/EC adapters.
16492 + *
16493 + * Returns:
16494 + *     nothing
16495 + */
16496 +void SkGePortVlan(
16497 +SK_AC  *pAC,   /* Adapter Context */
16498 +SK_IOC IoC,    /* I/O Context */
16499 +int            Port,   /* Port number */
16500 +SK_BOOL        Enable) /* Flag */
16501 +{
16502 +       if (CHIP_ID_YUKON_2(pAC)) {
16503 +               if (Enable) {
16504 +                       SK_OUT32(IoC, MR_ADDR(Port, RX_GMF_CTRL_T), RX_VLAN_STRIP_ON);
16505 +                       SK_OUT32(IoC, MR_ADDR(Port, TX_GMF_CTRL_T), TX_VLAN_TAG_ON);
16506 +               }
16507 +               else {
16508 +                       SK_OUT32(IoC, MR_ADDR(Port, RX_GMF_CTRL_T), RX_VLAN_STRIP_OFF);
16509 +                       SK_OUT32(IoC, MR_ADDR(Port, TX_GMF_CTRL_T), TX_VLAN_TAG_OFF);
16510 +               }
16511 +       }
16512 +}
16513 +
16514 +
16515 +/******************************************************************************
16516 + *
16517 + *     SkGeRxRss() -   Enable / Disable RSS Hash Calculation
16518 + *
16519 + * Description:
16520 + *     Enable or disable the RSS hash calculation of the selected port.
16521 + *     The new configuration is *not* saved over any SkGeStopPort() and
16522 + *     SkGeInitPort() calls.
16523 + *     Currently this function is only supported on Yukon-2/EC adapters.
16524 + *
16525 + * Returns:
16526 + *     nothing
16527 + */
16528 +void SkGeRxRss(
16529 +SK_AC  *pAC,   /* Adapter Context */
16530 +SK_IOC IoC,    /* I/O Context */
16531 +int            Port,   /* Port number */
16532 +SK_BOOL        Enable) /* Flag */
16533 +{
16534 +       if (CHIP_ID_YUKON_2(pAC)) {
16535 +               if (Enable) {
16536 +                       SK_OUT32(IoC, Q_ADDR(pAC->GIni.GP[Port].PRxQOff, Q_CSR),
16537 +                               BMU_ENA_RX_RSS_HASH);
16538 +               }
16539 +               else {
16540 +                       SK_OUT32(IoC, Q_ADDR(pAC->GIni.GP[Port].PRxQOff, Q_CSR),
16541 +                               BMU_DIS_RX_RSS_HASH);
16542 +               }
16543 +       }
16544 +}
16545 +
16546 +/******************************************************************************
16547 + *
16548 + *     SkGeRxCsum() -  Enable / Disable Receive Checksum
16549 + *
16550 + * Description:
16551 + *     Enable or disable the checksum of the selected port.
16552 + *     The new configuration is *not* saved over any SkGeStopPort() and
16553 + *     SkGeInitPort() calls.
16554 + *     Currently this function is only supported on Yukon-2/EC adapters.
16555 + *
16556 + * Returns:
16557 + *     nothing
16558 + */
16559 +void SkGeRxCsum(
16560 +SK_AC  *pAC,   /* Adapter Context */
16561 +SK_IOC IoC,    /* I/O Context */
16562 +int            Port,   /* Port number */
16563 +SK_BOOL        Enable) /* Flag */
16564 +{
16565 +       if (CHIP_ID_YUKON_2(pAC)) {
16566 +               if (Enable) {
16567 +                       SK_OUT32(IoC, Q_ADDR(pAC->GIni.GP[Port].PRxQOff, Q_CSR),
16568 +                               BMU_ENA_RX_CHKSUM);
16569 +               }
16570 +               else {
16571 +                       SK_OUT32(IoC, Q_ADDR(pAC->GIni.GP[Port].PRxQOff, Q_CSR),
16572 +                               BMU_DIS_RX_CHKSUM);
16573 +               }
16574 +       }
16575 +}
16576 +
16577 +
16578 +/******************************************************************************
16579 + *
16580   *     SkGePollRxD() - Enable / Disable Descriptor Polling of RxD Ring
16581   *
16582   * Description:
16583 @@ -71,8 +165,8 @@
16584   *     nothing
16585   */
16586  void SkGePollRxD(
16587 -SK_AC  *pAC,           /* adapter context */
16588 -SK_IOC IoC,            /* IO context */
16589 +SK_AC  *pAC,           /* Adapter Context */
16590 +SK_IOC IoC,            /* I/O Context */
16591  int            Port,           /* Port Index (MAC_1 + n) */
16592  SK_BOOL PollRxD)       /* SK_TRUE (enable pol.), SK_FALSE (disable pol.) */
16593  {
16594 @@ -80,8 +174,8 @@
16595
16596         pPrt = &pAC->GIni.GP[Port];
16597
16598 -       SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), (PollRxD) ?
16599 -               CSR_ENA_POL : CSR_DIS_POL);
16600 +       SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), (SK_U32)((PollRxD) ?
16601 +               CSR_ENA_POL : CSR_DIS_POL));
16602  }      /* SkGePollRxD */
16603
16604
16605 @@ -99,8 +193,8 @@
16606   *     nothing
16607   */
16608  void SkGePollTxD(
16609 -SK_AC  *pAC,           /* adapter context */
16610 -SK_IOC IoC,            /* IO context */
16611 +SK_AC  *pAC,           /* Adapter Context */
16612 +SK_IOC IoC,            /* I/O Context */
16613  int            Port,           /* Port Index (MAC_1 + n) */
16614  SK_BOOL PollTxD)       /* SK_TRUE (enable pol.), SK_FALSE (disable pol.) */
16615  {
16616 @@ -114,7 +208,7 @@
16617         if (pPrt->PXSQSize != 0) {
16618                 SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), DWord);
16619         }
16620 -
16621 +
16622         if (pPrt->PXAQSize != 0) {
16623                 SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR), DWord);
16624         }
16625 @@ -135,17 +229,27 @@
16626   *     nothing
16627   */
16628  void SkGeYellowLED(
16629 -SK_AC  *pAC,           /* adapter context */
16630 -SK_IOC IoC,            /* IO context */
16631 +SK_AC  *pAC,           /* Adapter Context */
16632 +SK_IOC IoC,            /* I/O Context */
16633  int            State)          /* yellow LED state, 0 = OFF, 0 != ON */
16634  {
16635 +       int     LedReg;
16636 +
16637 +       if (CHIP_ID_YUKON_2(pAC)) {
16638 +               /* different mapping on Yukon-2 */
16639 +               LedReg = B0_CTST + 1;
16640 +       }
16641 +       else {
16642 +               LedReg = B0_LED;
16643 +       }
16644 +
16645         if (State == 0) {
16646 -               /* Switch yellow LED OFF */
16647 -               SK_OUT8(IoC, B0_LED, LED_STAT_OFF);
16648 +               /* Switch state LED OFF */
16649 +               SK_OUT8(IoC, LedReg, LED_STAT_OFF);
16650         }
16651         else {
16652 -               /* Switch yellow LED ON */
16653 -               SK_OUT8(IoC, B0_LED, LED_STAT_ON);
16654 +               /* Switch state LED ON */
16655 +               SK_OUT8(IoC, LedReg, LED_STAT_ON);
16656         }
16657  }      /* SkGeYellowLED */
16658
16659 @@ -169,8 +273,8 @@
16660   *     nothing
16661   */
16662  void SkGeXmitLED(
16663 -SK_AC  *pAC,           /* adapter context */
16664 -SK_IOC IoC,            /* IO context */
16665 +SK_AC  *pAC,           /* Adapter Context */
16666 +SK_IOC IoC,            /* I/O Context */
16667  int            Led,            /* offset to the LED Init Value register */
16668  int            Mode)           /* Mode may be SK_LED_DIS, SK_LED_ENA, SK_LED_TST */
16669  {
16670 @@ -197,13 +301,13 @@
16671                 SK_OUT8(IoC, Led + XMIT_LED_TST, LED_T_OFF);
16672                 break;
16673         }
16674 -
16675 +
16676         /*
16677 -        * 1000BT: The Transmit LED is driven by the PHY.
16678 +        * 1000BT: the Transmit LED is driven by the PHY.
16679          * But the default LED configuration is used for
16680          * Level One and Broadcom PHYs.
16681 -        * (Broadcom: It may be that PHY_B_PEC_EN_LTR has to be set.)
16682 -        * (In this case it has to be added here. But we will see. XXX)
16683 +        * (Broadcom: It may be that PHY_B_PEC_EN_LTR has to be set.
16684 +        * In this case it has to be added here.)
16685          */
16686  }      /* SkGeXmitLED */
16687  #endif /* !SK_SLIM || GENESIS */
16688 @@ -227,7 +331,7 @@
16689   *     1:      configuration error
16690   */
16691  static int DoCalcAddr(
16692 -SK_AC          *pAC,                           /* adapter context */
16693 +SK_AC          *pAC,                           /* Adapter Context */
16694  SK_GEPORT      SK_FAR *pPrt,           /* port index */
16695  int                    QuSize,                         /* size of the queue to configure in kB */
16696  SK_U32         SK_FAR *StartVal,       /* start value for address calculation */
16697 @@ -264,12 +368,35 @@
16698
16699  /******************************************************************************
16700   *
16701 + *     SkGeRoundQueueSize() - Round the given queue size to the adpaters QZ units
16702 + *
16703 + * Description:
16704 + *     This function rounds the given queue size in kBs to adapter specific
16705 + *     queue size units (Genesis and Yukon: 8 kB, Yukon-2/EC: 1 kB).
16706 + *
16707 + * Returns:
16708 + *     the rounded queue size in kB
16709 + */
16710 +static int SkGeRoundQueueSize(
16711 +SK_AC  *pAC,           /* Adapter Context */
16712 +int    QueueSizeKB)    /* Queue size in kB */
16713 +{
16714 +       int QueueSizeSteps;
16715 +
16716 +       QueueSizeSteps = (CHIP_ID_YUKON_2(pAC)) ? QZ_STEP_Y2 : QZ_STEP;
16717 +
16718 +       return((QueueSizeKB + QueueSizeSteps - 1) & ~(QueueSizeSteps - 1));
16719 +}      /* SkGeRoundQueueSize */
16720 +
16721 +
16722 +/******************************************************************************
16723 + *
16724   *     SkGeInitAssignRamToQueues() - allocate default queue sizes
16725   *
16726   * Description:
16727   *     This function assigns the memory to the different queues and ports.
16728   *     When DualNet is set to SK_TRUE all ports get the same amount of memory.
16729 - *  Otherwise the first port gets most of the memory and all the
16730 + *     Otherwise the first port gets most of the memory and all the
16731   *     other ports just the required minimum.
16732   *     This function can only be called when pAC->GIni.GIRamSize and
16733   *     pAC->GIni.GIMacsFound have been initialized, usually this happens
16734 @@ -282,102 +409,141 @@
16735   */
16736
16737  int SkGeInitAssignRamToQueues(
16738 -SK_AC  *pAC,                   /* Adapter context */
16739 +SK_AC  *pAC,                   /* Adapter Context */
16740  int            ActivePort,             /* Active Port in RLMT mode */
16741 -SK_BOOL        DualNet)                /* adapter context */
16742 +SK_BOOL        DualNet)                /* Dual Net active */
16743  {
16744         int     i;
16745         int     UsedKilobytes;                  /* memory already assigned */
16746         int     ActivePortKilobytes;    /* memory available for active port */
16747 -       SK_GEPORT *pGePort;
16748 -
16749 -       UsedKilobytes = 0;
16750 +       int     MinQueueSize;                   /* min. memory for queues */
16751 +       int     TotalRamSize;                   /* total memory for queues */
16752 +       SK_BOOL DualPortYukon2;
16753 +       SK_GEPORT *pPrt;
16754
16755         if (ActivePort >= pAC->GIni.GIMacsFound) {
16756 +
16757                 SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
16758                         ("SkGeInitAssignRamToQueues: ActivePort (%d) invalid\n",
16759                         ActivePort));
16760                 return(1);
16761         }
16762 -       if (((pAC->GIni.GIMacsFound * (SK_MIN_RXQ_SIZE + SK_MIN_TXQ_SIZE)) +
16763 -               ((RAM_QUOTA_SYNC == 0) ? 0 : SK_MIN_TXQ_SIZE)) > pAC->GIni.GIRamSize) {
16764 +
16765 +       DualPortYukon2 = (CHIP_ID_YUKON_2(pAC) && pAC->GIni.GIMacsFound == 2);
16766 +
16767 +       TotalRamSize = pAC->GIni.GIRamSize;
16768 +
16769 +       if (DualPortYukon2) {
16770 +               TotalRamSize *= 2;
16771 +       }
16772 +
16773 +       MinQueueSize = SK_MIN_RXQ_SIZE + SK_MIN_TXQ_SIZE;
16774 +
16775 +       if (MinQueueSize > pAC->GIni.GIRamSize) {
16776 +               MinQueueSize = pAC->GIni.GIRamSize;
16777 +       }
16778 +
16779 +       if ((pAC->GIni.GIMacsFound * MinQueueSize +
16780 +                RAM_QUOTA_SYNC * SK_MIN_TXQ_SIZE) > TotalRamSize) {
16781 +
16782                 SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
16783                         ("SkGeInitAssignRamToQueues: Not enough memory (%d)\n",
16784 -                        pAC->GIni.GIRamSize));
16785 +                       TotalRamSize));
16786                 return(2);
16787         }
16788
16789         if (DualNet) {
16790                 /* every port gets the same amount of memory */
16791 -               ActivePortKilobytes = pAC->GIni.GIRamSize / pAC->GIni.GIMacsFound;
16792 +               ActivePortKilobytes = TotalRamSize / pAC->GIni.GIMacsFound;
16793 +
16794                 for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
16795
16796 -                       pGePort = &pAC->GIni.GP[i];
16797 -
16798 +                       pPrt = &pAC->GIni.GP[i];
16799 +
16800 +                       if (DualPortYukon2) {
16801 +                               ActivePortKilobytes = pAC->GIni.GIRamSize;
16802 +                       }
16803                         /* take away the minimum memory for active queues */
16804 -                       ActivePortKilobytes -= (SK_MIN_RXQ_SIZE + SK_MIN_TXQ_SIZE);
16805 +                       ActivePortKilobytes -= MinQueueSize;
16806
16807                         /* receive queue gets the minimum + 80% of the rest */
16808 -                       pGePort->PRxQSize = (int) (ROUND_QUEUE_SIZE_KB((
16809 -                               ActivePortKilobytes * (unsigned long) RAM_QUOTA_RX) / 100))
16810 +                       pPrt->PRxQSize = SkGeRoundQueueSize(pAC,
16811 +                               (int)((long)ActivePortKilobytes * RAM_QUOTA_RX) / 100)
16812                                 + SK_MIN_RXQ_SIZE;
16813
16814 -                       ActivePortKilobytes -= (pGePort->PRxQSize - SK_MIN_RXQ_SIZE);
16815 +                       ActivePortKilobytes -= (pPrt->PRxQSize - SK_MIN_RXQ_SIZE);
16816
16817                         /* synchronous transmit queue */
16818 -                       pGePort->PXSQSize = 0;
16819 +                       pPrt->PXSQSize = 0;
16820
16821                         /* asynchronous transmit queue */
16822 -                       pGePort->PXAQSize = (int) ROUND_QUEUE_SIZE_KB(ActivePortKilobytes +
16823 -                               SK_MIN_TXQ_SIZE);
16824 +                       pPrt->PXAQSize = SkGeRoundQueueSize(pAC,
16825 +                               ActivePortKilobytes + SK_MIN_TXQ_SIZE);
16826                 }
16827         }
16828 -       else {
16829 -               /* Rlmt Mode or single link adapter */
16830 +       else {  /* RLMT Mode or single link adapter */
16831
16832 -               /* Set standby queue size defaults for all standby ports */
16833 +               UsedKilobytes = 0;
16834 +
16835 +               /* set standby queue size defaults for all standby ports */
16836                 for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
16837
16838                         if (i != ActivePort) {
16839 -                               pGePort = &pAC->GIni.GP[i];
16840 +                               pPrt = &pAC->GIni.GP[i];
16841
16842 -                               pGePort->PRxQSize = SK_MIN_RXQ_SIZE;
16843 -                               pGePort->PXAQSize = SK_MIN_TXQ_SIZE;
16844 -                               pGePort->PXSQSize = 0;
16845 +                               if (DualPortYukon2) {
16846 +                                       pPrt->PRxQSize = SkGeRoundQueueSize(pAC,
16847 +                                               (int)((long)pAC->GIni.GIRamSize * RAM_QUOTA_RX) / 100);
16848 +                                       pPrt->PXAQSize = pAC->GIni.GIRamSize - pPrt->PRxQSize;
16849 +                               }
16850 +                               else {
16851 +                                       pPrt->PRxQSize = SK_MIN_RXQ_SIZE;
16852 +                                       pPrt->PXAQSize = SK_MIN_TXQ_SIZE;
16853 +                               }
16854 +                               pPrt->PXSQSize = 0;
16855
16856                                 /* Count used RAM */
16857 -                               UsedKilobytes += pGePort->PRxQSize + pGePort->PXAQSize;
16858 +                               UsedKilobytes += pPrt->PRxQSize + pPrt->PXAQSize;
16859                         }
16860                 }
16861                 /* what's left? */
16862 -               ActivePortKilobytes = pAC->GIni.GIRamSize - UsedKilobytes;
16863 +               ActivePortKilobytes = TotalRamSize - UsedKilobytes;
16864
16865                 /* assign it to the active port */
16866                 /* first take away the minimum memory */
16867 -               ActivePortKilobytes -= (SK_MIN_RXQ_SIZE + SK_MIN_TXQ_SIZE);
16868 -               pGePort = &pAC->GIni.GP[ActivePort];
16869 +               ActivePortKilobytes -= MinQueueSize;
16870 +               pPrt = &pAC->GIni.GP[ActivePort];
16871
16872                 /* receive queue get's the minimum + 80% of the rest */
16873 -               pGePort->PRxQSize = (int) (ROUND_QUEUE_SIZE_KB((ActivePortKilobytes *
16874 -                       (unsigned long) RAM_QUOTA_RX) / 100)) + SK_MIN_RXQ_SIZE;
16875 +               pPrt->PRxQSize = SkGeRoundQueueSize(pAC,
16876 +                       (int)((long)ActivePortKilobytes * RAM_QUOTA_RX) / 100) +
16877 +                       MinQueueSize/2;
16878
16879 -               ActivePortKilobytes -= (pGePort->PRxQSize - SK_MIN_RXQ_SIZE);
16880 +               ActivePortKilobytes -= (pPrt->PRxQSize - MinQueueSize/2);
16881
16882                 /* synchronous transmit queue */
16883 -               pGePort->PXSQSize = 0;
16884 +               pPrt->PXSQSize = 0;
16885
16886                 /* asynchronous transmit queue */
16887 -               pGePort->PXAQSize = (int) ROUND_QUEUE_SIZE_KB(ActivePortKilobytes) +
16888 -                       SK_MIN_TXQ_SIZE;
16889 +               pPrt->PXAQSize = SkGeRoundQueueSize(pAC, ActivePortKilobytes) +
16890 +                       MinQueueSize/2;
16891         }
16892 -#ifdef VCPU
16893 -       VCPUprintf(0, "PRxQSize=%u, PXSQSize=%u, PXAQSize=%u\n",
16894 -               pGePort->PRxQSize, pGePort->PXSQSize, pGePort->PXAQSize);
16895 -#endif /* VCPU */
16896 +
16897 +#ifdef DEBUG
16898 +       for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
16899 +
16900 +               pPrt = &pAC->GIni.GP[i];
16901 +
16902 +               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
16903 +                       ("Port %d: RxQSize=%u, TxAQSize=%u, TxSQSize=%u\n",
16904 +                       i, pPrt->PRxQSize, pPrt->PXAQSize, pPrt->PXSQSize));
16905 +       }
16906 +#endif /* DEBUG */
16907
16908         return(0);
16909  }      /* SkGeInitAssignRamToQueues */
16910
16911 +
16912  /******************************************************************************
16913   *
16914   *     SkGeCheckQSize() - Checks the Adapters Queue Size Configuration
16915 @@ -388,12 +554,12 @@
16916   *     used ports.
16917   *     This requirements must be fullfilled to have a valid configuration:
16918   *             - The size of all queues must not exceed GIRamSize.
16919 - *             - The queue sizes must be specified in units of 8 kB.
16920 + *             - The queue sizes must be specified in units of 8 kB (Genesis & Yukon).
16921   *             - The size of Rx queues of available ports must not be
16922 - *               smaller than 16 kB.
16923 + *               smaller than 16 kB (Genesis & Yukon) resp. 10 kB (Yukon-2).
16924   *             - The size of at least one Tx queue (synch. or asynch.)
16925 - *        of available ports must not be smaller than 16 kB
16926 - *        when Jumbo Frames are used.
16927 + *               of available ports must not be smaller than 16 kB (Genesis & Yukon),
16928 + *               resp. 10 kB (Yukon-2) when Jumbo Frames are used.
16929   *             - The RAM start and end addresses must not be changed
16930   *               for ports which are already initialized.
16931   *     Furthermore SkGeCheckQSize() defines the Start and End Addresses
16932 @@ -404,7 +570,7 @@
16933   *     1:      Queue Size Configuration invalid
16934   */
16935  static int SkGeCheckQSize(
16936 -SK_AC   *pAC,          /* adapter context */
16937 +SK_AC   *pAC,          /* Adapter Context */
16938  int             Port)          /* port index */
16939  {
16940         SK_GEPORT *pPrt;
16941 @@ -414,55 +580,68 @@
16942         SK_U32  StartAddr;
16943  #ifndef SK_SLIM
16944         int     UsedMem;        /* total memory used (max. found ports) */
16945 -#endif
16946 +#endif
16947
16948         Rtv = 0;
16949 -
16950 +
16951  #ifndef SK_SLIM
16952
16953         UsedMem = 0;
16954 +       Rtv = 0;
16955         for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
16956                 pPrt = &pAC->GIni.GP[i];
16957
16958 -               if ((pPrt->PRxQSize & QZ_UNITS) != 0 ||
16959 -                       (pPrt->PXSQSize & QZ_UNITS) != 0 ||
16960 -                       (pPrt->PXAQSize & QZ_UNITS) != 0) {
16961 +               if (CHIP_ID_YUKON_2(pAC)) {
16962 +                       UsedMem = 0;
16963 +               }
16964 +               else if (((pPrt->PRxQSize & QZ_UNITS) != 0 ||
16965 +                                 (pPrt->PXSQSize & QZ_UNITS) != 0 ||
16966 +                                 (pPrt->PXAQSize & QZ_UNITS) != 0)) {
16967
16968                         SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E012, SKERR_HWI_E012MSG);
16969                         return(1);
16970                 }
16971
16972 -               if (i == Port && pPrt->PRxQSize < SK_MIN_RXQ_SIZE) {
16973 +#ifndef SK_DIAG
16974 +               if (i == Port && pAC->GIni.GIRamSize > SK_MIN_RXQ_SIZE &&
16975 +                       pPrt->PRxQSize < SK_MIN_RXQ_SIZE) {
16976                         SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E011, SKERR_HWI_E011MSG);
16977                         return(1);
16978                 }
16979 -
16980 +
16981                 /*
16982                  * the size of at least one Tx queue (synch. or asynch.) has to be > 0.
16983                  * if Jumbo Frames are used, this size has to be >= 16 kB.
16984                  */
16985                 if ((i == Port && pPrt->PXSQSize == 0 && pPrt->PXAQSize == 0) ||
16986 -                       (pAC->GIni.GIPortUsage == SK_JUMBO_LINK &&
16987 -            ((pPrt->PXSQSize > 0 && pPrt->PXSQSize < SK_MIN_TXQ_SIZE) ||
16988 +                       (pPrt->PPortUsage == SK_JUMBO_LINK &&
16989 +                       ((pPrt->PXSQSize > 0 && pPrt->PXSQSize < SK_MIN_TXQ_SIZE) ||
16990                          (pPrt->PXAQSize > 0 && pPrt->PXAQSize < SK_MIN_TXQ_SIZE)))) {
16991                                 SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E023, SKERR_HWI_E023MSG);
16992                                 return(1);
16993                 }
16994 -
16995 +#endif /* !SK_DIAG */
16996 +
16997                 UsedMem += pPrt->PRxQSize + pPrt->PXSQSize + pPrt->PXAQSize;
16998 +
16999 +               if (UsedMem > pAC->GIni.GIRamSize) {
17000 +                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E012, SKERR_HWI_E012MSG);
17001 +                       return(1);
17002 +               }
17003         }
17004 -
17005 -       if (UsedMem > pAC->GIni.GIRamSize) {
17006 -               SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E012, SKERR_HWI_E012MSG);
17007 -               return(1);
17008 -       }
17009 +
17010  #endif /* !SK_SLIM */
17011
17012         /* Now start address calculation */
17013         StartAddr = pAC->GIni.GIRamOffs;
17014         for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
17015 +
17016                 pPrt = &pAC->GIni.GP[i];
17017
17018 +               if (CHIP_ID_YUKON_2(pAC)) {
17019 +                       StartAddr = 0;
17020 +               }
17021 +
17022                 /* Calculate/Check values for the receive queue */
17023                 Rtv2 = DoCalcAddr(pAC, pPrt, pPrt->PRxQSize, &StartAddr,
17024                         &pPrt->PRxQRamStart, &pPrt->PRxQRamEnd);
17025 @@ -502,8 +681,8 @@
17026   *     nothing
17027   */
17028  static void SkGeInitMacArb(
17029 -SK_AC  *pAC,           /* adapter context */
17030 -SK_IOC IoC)            /* IO context */
17031 +SK_AC  *pAC,           /* Adapter Context */
17032 +SK_IOC IoC)            /* I/O Context */
17033  {
17034         /* release local reset */
17035         SK_OUT16(IoC, B3_MA_TO_CTRL, MA_RST_CLR);
17036 @@ -542,8 +721,8 @@
17037   *     nothing
17038   */
17039  static void SkGeInitPktArb(
17040 -SK_AC  *pAC,           /* adapter context */
17041 -SK_IOC IoC)            /* IO context */
17042 +SK_AC  *pAC,           /* Adapter Context */
17043 +SK_IOC IoC)            /* I/O Context */
17044  {
17045         /* release local reset */
17046         SK_OUT16(IoC, B3_PA_CTRL, PA_RST_CLR);
17047 @@ -559,7 +738,8 @@
17048          * NOTE: the packet arbiter timeout interrupt is needed for
17049          * half duplex hangup workaround
17050          */
17051 -       if (pAC->GIni.GIPortUsage != SK_JUMBO_LINK) {
17052 +       if (pAC->GIni.GP[MAC_1].PPortUsage != SK_JUMBO_LINK &&
17053 +               pAC->GIni.GP[MAC_2].PPortUsage != SK_JUMBO_LINK) {
17054                 if (pAC->GIni.GIMacsFound == 1) {
17055                         SK_OUT16(IoC, B3_PA_CTRL, PA_ENA_TO_TX1);
17056                 }
17057 @@ -582,14 +762,11 @@
17058   *     nothing
17059   */
17060  static void SkGeInitMacFifo(
17061 -SK_AC  *pAC,           /* adapter context */
17062 -SK_IOC IoC,            /* IO context */
17063 +SK_AC  *pAC,           /* Adapter Context */
17064 +SK_IOC IoC,            /* I/O Context */
17065  int            Port)           /* Port Index (MAC_1 + n) */
17066  {
17067         SK_U16  Word;
17068 -#ifdef VCPU
17069 -       SK_U32  DWord;
17070 -#endif /* VCPU */
17071         /*
17072          * For each FIFO:
17073          *      - release local reset
17074 @@ -597,31 +774,29 @@
17075          *      - setup defaults for the control register
17076          *      - enable the FIFO
17077          */
17078 -
17079 +
17080  #ifdef GENESIS
17081         if (pAC->GIni.GIGenesis) {
17082 -               /* Configure Rx MAC FIFO */
17083 +               /* configure Rx MAC FIFO */
17084                 SK_OUT8(IoC, MR_ADDR(Port, RX_MFF_CTRL2), MFF_RST_CLR);
17085                 SK_OUT16(IoC, MR_ADDR(Port, RX_MFF_CTRL1), MFF_RX_CTRL_DEF);
17086                 SK_OUT8(IoC, MR_ADDR(Port, RX_MFF_CTRL2), MFF_ENA_OP_MD);
17087 -
17088 +
17089                 /* Configure Tx MAC FIFO */
17090                 SK_OUT8(IoC, MR_ADDR(Port, TX_MFF_CTRL2), MFF_RST_CLR);
17091                 SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), MFF_TX_CTRL_DEF);
17092                 SK_OUT8(IoC, MR_ADDR(Port, TX_MFF_CTRL2), MFF_ENA_OP_MD);
17093 -
17094 -               /* Enable frame flushing if jumbo frames used */
17095 -               if (pAC->GIni.GIPortUsage == SK_JUMBO_LINK) {
17096 +
17097 +               /* enable frame flushing if jumbo frames used */
17098 +               if (pAC->GIni.GP[Port].PPortUsage == SK_JUMBO_LINK) {
17099                         SK_OUT16(IoC, MR_ADDR(Port, RX_MFF_CTRL1), MFF_ENA_FLUSH);
17100                 }
17101         }
17102  #endif /* GENESIS */
17103 -
17104 +
17105  #ifdef YUKON
17106         if (pAC->GIni.GIYukon) {
17107 -               /* set Rx GMAC FIFO Flush Mask */
17108 -               SK_OUT16(IoC, MR_ADDR(Port, RX_GMF_FL_MSK), (SK_U16)RX_FF_FL_DEF_MSK);
17109 -
17110 +
17111                 Word = (SK_U16)GMF_RX_CTRL_DEF;
17112
17113                 /* disable Rx GMAC FIFO Flush for YUKON-Lite Rev. A0 only */
17114 @@ -629,23 +804,52 @@
17115
17116                         Word &= ~GMF_RX_F_FL_ON;
17117                 }
17118 -
17119 -               /* Configure Rx MAC FIFO */
17120 +
17121 +               /* Configure Rx GMAC FIFO */
17122                 SK_OUT8(IoC, MR_ADDR(Port, RX_GMF_CTRL_T), (SK_U8)GMF_RST_CLR);
17123                 SK_OUT16(IoC, MR_ADDR(Port, RX_GMF_CTRL_T), Word);
17124 -
17125 -               /* set Rx GMAC FIFO Flush Threshold (default: 0x0a -> 56 bytes) */
17126 -               SK_OUT16(IoC, MR_ADDR(Port, RX_GMF_FL_THR), RX_GMF_FL_THR_DEF);
17127 -
17128 -               /* Configure Tx MAC FIFO */
17129 +
17130 +               Word = RX_FF_FL_DEF_MSK;
17131 +
17132 +#ifndef SK_DIAG
17133 +               if (HW_FEATURE(pAC, HWF_WA_DEV_4115)) {
17134 +                       /*
17135 +                        * Flushing must be enabled (needed for ASF see dev. #4.29),
17136 +                        * but the flushing mask should be disabled (see dev. #4.115)
17137 +                        */
17138 +                       Word = 0;
17139 +               }
17140 +#endif /* !SK_DIAG */
17141 +
17142 +               /* set Rx GMAC FIFO Flush Mask (after clearing reset) */
17143 +               SK_OUT16(IoC, MR_ADDR(Port, RX_GMF_FL_MSK), Word);
17144 +
17145 +               /* default: 0x0a -> 56 bytes on Yukon-1 and 64 bytes on Yukon-2 */
17146 +               Word = (SK_U16)RX_GMF_FL_THR_DEF;
17147 +
17148 +               if (CHIP_ID_YUKON_2(pAC)) {
17149 +                       if (pAC->GIni.GIChipId == CHIP_ID_YUKON_EC &&
17150 +                               pAC->GIni.GIAsfEnabled) {
17151 +                               /* WA for dev. #4.30 (reduce to 0x08 -> 48 bytes) */
17152 +                               Word -= 2;
17153 +                       }
17154 +               }
17155 +               else {
17156 +                       /*
17157 +                       * because Pause Packet Truncation in GMAC is not working
17158 +                       * we have to increase the Flush Threshold to 64 bytes
17159 +                       * in order to flush pause packets in Rx FIFO on Yukon-1
17160 +                       */
17161 +                       Word++;
17162 +               }
17163 +
17164 +               /* set Rx GMAC FIFO Flush Threshold (after clearing reset) */
17165 +               SK_OUT16(IoC, MR_ADDR(Port, RX_GMF_FL_THR), Word);
17166 +
17167 +               /* Configure Tx GMAC FIFO */
17168                 SK_OUT8(IoC, MR_ADDR(Port, TX_GMF_CTRL_T), (SK_U8)GMF_RST_CLR);
17169                 SK_OUT16(IoC, MR_ADDR(Port, TX_GMF_CTRL_T), (SK_U16)GMF_TX_CTRL_DEF);
17170 -
17171 -#ifdef VCPU
17172 -               SK_IN32(IoC, MR_ADDR(Port, RX_GMF_AF_THR), &DWord);
17173 -               SK_IN32(IoC, MR_ADDR(Port, TX_GMF_AE_THR), &DWord);
17174 -#endif /* VCPU */
17175 -
17176 +
17177                 /* set Tx GMAC FIFO Almost Empty Threshold */
17178  /*             SK_OUT32(IoC, MR_ADDR(Port, TX_GMF_AE_THR), 0); */
17179         }
17180 @@ -653,7 +857,7 @@
17181
17182  }      /* SkGeInitMacFifo */
17183
17184 -#ifdef SK_LNK_SYNC_CNT
17185 +#ifdef SK_LNK_SYNC_CNT
17186  /******************************************************************************
17187   *
17188   *     SkGeLoadLnkSyncCnt() - Load the Link Sync Counter and starts counting
17189 @@ -674,8 +878,8 @@
17190   *     nothing
17191   */
17192  void SkGeLoadLnkSyncCnt(
17193 -SK_AC  *pAC,           /* adapter context */
17194 -SK_IOC IoC,            /* IO context */
17195 +SK_AC  *pAC,           /* Adapter Context */
17196 +SK_IOC IoC,            /* I/O Context */
17197  int            Port,           /* Port Index (MAC_1 + n) */
17198  SK_U32 CntVal)         /* Counter value */
17199  {
17200 @@ -685,7 +889,7 @@
17201         SK_BOOL IrqPend;
17202
17203         /* stop counter */
17204 -       SK_OUT8(IoC, MR_ADDR(Port, LNK_SYNC_CTRL), LED_STOP);
17205 +       SK_OUT8(IoC, MR_ADDR(Port, LNK_SYNC_CTRL), LNK_STOP);
17206
17207         /*
17208          * ASIC problem:
17209 @@ -698,6 +902,7 @@
17210         IrqPend = SK_FALSE;
17211         SK_IN32(IoC, B0_ISRC, &ISrc);
17212         SK_IN32(IoC, B0_IMSK, &OrgIMsk);
17213 +
17214         if (Port == MAC_1) {
17215                 NewIMsk = OrgIMsk & ~IS_LNK_SYNC_M1;
17216                 if ((ISrc & IS_LNK_SYNC_M1) != 0) {
17217 @@ -710,6 +915,7 @@
17218                         IrqPend = SK_TRUE;
17219                 }
17220         }
17221 +
17222         if (!IrqPend) {
17223                 SK_OUT32(IoC, B0_IMSK, NewIMsk);
17224         }
17225 @@ -718,15 +924,17 @@
17226         SK_OUT32(IoC, MR_ADDR(Port, LNK_SYNC_INI), CntVal);
17227
17228         /* start counter */
17229 -       SK_OUT8(IoC, MR_ADDR(Port, LNK_SYNC_CTRL), LED_START);
17230 +       SK_OUT8(IoC, MR_ADDR(Port, LNK_SYNC_CTRL), LNK_START);
17231
17232         if (!IrqPend) {
17233 -               /* clear the unexpected IRQ, and restore the interrupt mask */
17234 -               SK_OUT8(IoC, MR_ADDR(Port, LNK_SYNC_CTRL), LED_CLR_IRQ);
17235 +               /* clear the unexpected IRQ */
17236 +               SK_OUT8(IoC, MR_ADDR(Port, LNK_SYNC_CTRL), LNK_CLR_IRQ);
17237 +
17238 +               /* restore the interrupt mask */
17239                 SK_OUT32(IoC, B0_IMSK, OrgIMsk);
17240         }
17241  }      /* SkGeLoadLnkSyncCnt*/
17242 -#endif /* SK_LNK_SYNC_CNT */
17243 +#endif /* SK_LNK_SYNC_CNT */
17244
17245  #if defined(SK_DIAG) || defined(SK_CFG_SYNC)
17246  /******************************************************************************
17247 @@ -758,8 +966,8 @@
17248   *             synchronous queue is configured
17249   */
17250  int SkGeCfgSync(
17251 -SK_AC  *pAC,           /* adapter context */
17252 -SK_IOC IoC,            /* IO context */
17253 +SK_AC  *pAC,           /* Adapter Context */
17254 +SK_IOC IoC,            /* I/O Context */
17255  int            Port,           /* Port Index (MAC_1 + n) */
17256  SK_U32 IntTime,        /* Interval Timer Value in units of 8ns */
17257  SK_U32 LimCount,       /* Number of bytes to transfer during IntTime */
17258 @@ -777,16 +985,16 @@
17259                 SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E010, SKERR_HWI_E010MSG);
17260                 return(1);
17261         }
17262 -
17263 +
17264         if (pAC->GIni.GP[Port].PXSQSize == 0) {
17265                 SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E009, SKERR_HWI_E009MSG);
17266                 return(2);
17267         }
17268 -
17269 +
17270         /* calculate register values */
17271         IntTime = (IntTime / 2) * pAC->GIni.GIHstClkFact / 100;
17272         LimCount = LimCount / 8;
17273 -
17274 +
17275         if (IntTime > TXA_MAX_VAL || LimCount > TXA_MAX_VAL) {
17276                 SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E010, SKERR_HWI_E010MSG);
17277                 return(1);
17278 @@ -804,13 +1012,13 @@
17279          */
17280         SK_OUT8(IoC, MR_ADDR(Port, TXA_CTRL),
17281                 TXA_ENA_FSYNC | TXA_DIS_ALLOC | TXA_STOP_RC);
17282 -
17283 +
17284         SK_OUT32(IoC, MR_ADDR(Port, TXA_ITI_INI), IntTime);
17285         SK_OUT32(IoC, MR_ADDR(Port, TXA_LIM_INI), LimCount);
17286 -
17287 +
17288         SK_OUT8(IoC, MR_ADDR(Port, TXA_CTRL),
17289                 (SK_U8)(SyncMode & (TXA_ENA_ALLOC | TXA_DIS_ALLOC)));
17290 -
17291 +
17292         if (IntTime != 0 || LimCount != 0) {
17293                 SK_OUT8(IoC, MR_ADDR(Port, TXA_CTRL), TXA_DIS_FSYNC | TXA_START_RC);
17294         }
17295 @@ -831,10 +1039,10 @@
17296   * Returns:
17297   *     nothing
17298   */
17299 -static void DoInitRamQueue(
17300 -SK_AC  *pAC,                   /* adapter context */
17301 -SK_IOC IoC,                    /* IO context */
17302 -int            QuIoOffs,               /* Queue IO Address Offset */
17303 +void DoInitRamQueue(
17304 +SK_AC  *pAC,                   /* Adapter Context */
17305 +SK_IOC IoC,                    /* I/O Context */
17306 +int            QuIoOffs,               /* Queue I/O Address Offset */
17307  SK_U32 QuStartAddr,    /* Queue Start Address */
17308  SK_U32 QuEndAddr,              /* Queue End Address */
17309  int            QuType)                 /* Queue Type (SK_RX_SRAM_Q|SK_RX_BRAM_Q|SK_TX_RAM_Q) */
17310 @@ -867,8 +1075,7 @@
17311
17312                         /* continue with SK_RX_BRAM_Q */
17313                 case SK_RX_BRAM_Q:
17314 -                       /* write threshold for Rx Queue */
17315 -
17316 +                       /* write threshold for Rx Queue (Pause packets) */
17317                         SK_OUT32(IoC, RB_ADDR(QuIoOffs, RB_RX_UTPP), RxUpThresVal);
17318                         SK_OUT32(IoC, RB_ADDR(QuIoOffs, RB_RX_LTPP), RxLoThresVal);
17319
17320 @@ -882,7 +1089,8 @@
17321                          * or YUKON is used ((GMAC Tx FIFO is only 1 kB)
17322                          * we NEED Store & Forward of the RAM buffer.
17323                          */
17324 -                       if (pAC->GIni.GIPortUsage == SK_JUMBO_LINK ||
17325 +                       if (pAC->GIni.GP[MAC_1].PPortUsage == SK_JUMBO_LINK ||
17326 +                               pAC->GIni.GP[MAC_2].PPortUsage == SK_JUMBO_LINK ||
17327                                 pAC->GIni.GIYukon) {
17328                                 /* enable Store & Forward Mode for the Tx Side */
17329                                 SK_OUT8(IoC, RB_ADDR(QuIoOffs, RB_CTRL), RB_ENA_STFWD);
17330 @@ -911,8 +1119,8 @@
17331   *     nothing
17332   */
17333  static void SkGeInitRamBufs(
17334 -SK_AC  *pAC,           /* adapter context */
17335 -SK_IOC IoC,            /* IO context */
17336 +SK_AC  *pAC,           /* Adapter Context */
17337 +SK_IOC IoC,            /* I/O Context */
17338  int            Port)           /* Port Index (MAC_1 + n) */
17339  {
17340         SK_GEPORT *pPrt;
17341 @@ -920,8 +1128,8 @@
17342
17343         pPrt = &pAC->GIni.GP[Port];
17344
17345 -       if (pPrt->PRxQSize == SK_MIN_RXQ_SIZE) {
17346 -               RxQType = SK_RX_SRAM_Q;         /* small Rx Queue */
17347 +       if (pPrt->PRxQSize <= SK_MIN_RXQ_SIZE) {
17348 +               RxQType = SK_RX_SRAM_Q;         /* small Rx Queue */
17349         }
17350         else {
17351                 RxQType = SK_RX_BRAM_Q;         /* big Rx Queue */
17352 @@ -929,10 +1137,10 @@
17353
17354         DoInitRamQueue(pAC, IoC, pPrt->PRxQOff, pPrt->PRxQRamStart,
17355                 pPrt->PRxQRamEnd, RxQType);
17356 -
17357 +
17358         DoInitRamQueue(pAC, IoC, pPrt->PXsQOff, pPrt->PXsQRamStart,
17359                 pPrt->PXsQRamEnd, SK_TX_RAM_Q);
17360 -
17361 +
17362         DoInitRamQueue(pAC, IoC, pPrt->PXaQOff, pPrt->PXaQRamStart,
17363                 pPrt->PXaQRamEnd, SK_TX_RAM_Q);
17364
17365 @@ -953,26 +1161,37 @@
17366   *     nothing
17367   */
17368  void SkGeInitRamIface(
17369 -SK_AC  *pAC,           /* adapter context */
17370 -SK_IOC IoC)            /* IO context */
17371 +SK_AC  *pAC,           /* Adapter Context */
17372 +SK_IOC IoC)            /* I/O Context */
17373  {
17374 -       /* release local reset */
17375 -       SK_OUT16(IoC, B3_RI_CTRL, RI_RST_CLR);
17376 +       int i;
17377 +       int RamBuffers;
17378
17379 -       /* configure timeout values */
17380 -       SK_OUT8(IoC, B3_RI_WTO_R1, SK_RI_TO_53);
17381 -       SK_OUT8(IoC, B3_RI_WTO_XA1, SK_RI_TO_53);
17382 -       SK_OUT8(IoC, B3_RI_WTO_XS1, SK_RI_TO_53);
17383 -       SK_OUT8(IoC, B3_RI_RTO_R1, SK_RI_TO_53);
17384 -       SK_OUT8(IoC, B3_RI_RTO_XA1, SK_RI_TO_53);
17385 -       SK_OUT8(IoC, B3_RI_RTO_XS1, SK_RI_TO_53);
17386 -       SK_OUT8(IoC, B3_RI_WTO_R2, SK_RI_TO_53);
17387 -       SK_OUT8(IoC, B3_RI_WTO_XA2, SK_RI_TO_53);
17388 -       SK_OUT8(IoC, B3_RI_WTO_XS2, SK_RI_TO_53);
17389 -       SK_OUT8(IoC, B3_RI_RTO_R2, SK_RI_TO_53);
17390 -       SK_OUT8(IoC, B3_RI_RTO_XA2, SK_RI_TO_53);
17391 -       SK_OUT8(IoC, B3_RI_RTO_XS2, SK_RI_TO_53);
17392 +       if (CHIP_ID_YUKON_2(pAC)) {
17393 +               RamBuffers = pAC->GIni.GIMacsFound;
17394 +       }
17395 +       else {
17396 +               RamBuffers = 1;
17397 +       }
17398 +
17399 +       for (i = 0; i < RamBuffers; i++) {
17400 +               /* release local reset */
17401 +               SK_OUT8(IoC, SELECT_RAM_BUFFER(i, B3_RI_CTRL), (SK_U8)RI_RST_CLR);
17402
17403 +               /* configure timeout values */
17404 +               SK_OUT8(IoC, SELECT_RAM_BUFFER(i, B3_RI_WTO_R1), SK_RI_TO_53);
17405 +               SK_OUT8(IoC, SELECT_RAM_BUFFER(i, B3_RI_WTO_XA1), SK_RI_TO_53);
17406 +               SK_OUT8(IoC, SELECT_RAM_BUFFER(i, B3_RI_WTO_XS1), SK_RI_TO_53);
17407 +               SK_OUT8(IoC, SELECT_RAM_BUFFER(i, B3_RI_RTO_R1), SK_RI_TO_53);
17408 +               SK_OUT8(IoC, SELECT_RAM_BUFFER(i, B3_RI_RTO_XA1), SK_RI_TO_53);
17409 +               SK_OUT8(IoC, SELECT_RAM_BUFFER(i, B3_RI_RTO_XS1), SK_RI_TO_53);
17410 +               SK_OUT8(IoC, SELECT_RAM_BUFFER(i, B3_RI_WTO_R2), SK_RI_TO_53);
17411 +               SK_OUT8(IoC, SELECT_RAM_BUFFER(i, B3_RI_WTO_XA2), SK_RI_TO_53);
17412 +               SK_OUT8(IoC, SELECT_RAM_BUFFER(i, B3_RI_WTO_XS2), SK_RI_TO_53);
17413 +               SK_OUT8(IoC, SELECT_RAM_BUFFER(i, B3_RI_RTO_R2), SK_RI_TO_53);
17414 +               SK_OUT8(IoC, SELECT_RAM_BUFFER(i, B3_RI_RTO_XA2), SK_RI_TO_53);
17415 +               SK_OUT8(IoC, SELECT_RAM_BUFFER(i, B3_RI_RTO_XS2), SK_RI_TO_53);
17416 +       }
17417  }      /* SkGeInitRamIface */
17418
17419
17420 @@ -987,8 +1206,8 @@
17421   *     nothing
17422   */
17423  static void SkGeInitBmu(
17424 -SK_AC  *pAC,           /* adapter context */
17425 -SK_IOC IoC,            /* IO context */
17426 +SK_AC  *pAC,           /* Adapter Context */
17427 +SK_IOC IoC,            /* I/O Context */
17428  int            Port)           /* Port Index (MAC_1 + n) */
17429  {
17430         SK_GEPORT       *pPrt;
17431 @@ -999,29 +1218,63 @@
17432
17433         RxWm = SK_BMU_RX_WM;
17434         TxWm = SK_BMU_TX_WM;
17435 -
17436 -       if (!pAC->GIni.GIPciSlot64 && !pAC->GIni.GIPciClock66) {
17437 -               /* for better performance */
17438 -               RxWm /= 2;
17439 -               TxWm /= 2;
17440 -       }
17441
17442 -       /* Rx Queue: Release all local resets and set the watermark */
17443 -       SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), CSR_CLR_RESET);
17444 -       SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_F), RxWm);
17445 +       if (CHIP_ID_YUKON_2(pAC)) {
17446
17447 -       /*
17448 -        * Tx Queue: Release all local resets if the queue is used !
17449 -        *              set watermark
17450 -        */
17451 -       if (pPrt->PXSQSize != 0) {
17452 -               SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), CSR_CLR_RESET);
17453 -               SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_F), TxWm);
17454 +               if (pAC->GIni.GIPciBus == SK_PEX_BUS) {
17455 +                       /* for better performance set it to 128 */
17456 +                       RxWm = SK_BMU_RX_WM_PEX;
17457 +               }
17458 +
17459 +               /* Rx Queue: Release all local resets and set the watermark */
17460 +               SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), BMU_CLR_RESET);
17461 +               SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), BMU_OPER_INIT);
17462 +               SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), BMU_FIFO_OP_ON);
17463 +               SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_WM), RxWm);
17464 +
17465 +               /*
17466 +                * Tx Queue: Release all local resets if the queue is used !
17467 +                *              set watermark
17468 +                */
17469 +               if (pPrt->PXSQSize != 0 && HW_SYNC_TX_SUPPORTED(pAC)) {
17470 +                       /* Yukon-EC doesn't have a synchronous Tx queue */
17471 +                       SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), BMU_CLR_RESET);
17472 +                       SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), BMU_OPER_INIT);
17473 +                       SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), BMU_FIFO_OP_ON);
17474 +                       SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_WM), TxWm);
17475 +               }
17476 +
17477 +               if (pPrt->PXAQSize != 0) {
17478 +                       SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR), BMU_CLR_RESET);
17479 +                       SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR), BMU_OPER_INIT);
17480 +                       SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR), BMU_FIFO_OP_ON);
17481 +                       SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_WM), TxWm);
17482 +               }
17483         }
17484 -
17485 -       if (pPrt->PXAQSize != 0) {
17486 -               SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR), CSR_CLR_RESET);
17487 -               SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_F), TxWm);
17488 +       else {
17489 +               if (!pAC->GIni.GIPciSlot64 && !pAC->GIni.GIPciClock66) {
17490 +                       /* for better performance */
17491 +                       RxWm /= 2;
17492 +                       TxWm /= 2;
17493 +               }
17494 +
17495 +               /* Rx Queue: Release all local resets and set the watermark */
17496 +               SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), CSR_CLR_RESET);
17497 +               SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_F), RxWm);
17498 +
17499 +               /*
17500 +                * Tx Queue: Release all local resets if the queue is used !
17501 +                *              set watermark
17502 +                */
17503 +               if (pPrt->PXSQSize != 0) {
17504 +                       SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), CSR_CLR_RESET);
17505 +                       SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_F), TxWm);
17506 +               }
17507 +
17508 +               if (pPrt->PXAQSize != 0) {
17509 +                       SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR), CSR_CLR_RESET);
17510 +                       SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_F), TxWm);
17511 +               }
17512         }
17513         /*
17514          * Do NOT enable the descriptor poll timers here, because
17515 @@ -1045,20 +1298,29 @@
17516   */
17517  static SK_U32 TestStopBit(
17518  SK_AC  *pAC,           /* Adapter Context */
17519 -SK_IOC IoC,            /* IO Context */
17520 -int            QuIoOffs)       /* Queue IO Address Offset */
17521 +SK_IOC IoC,            /* I/O Context */
17522 +int            QuIoOffs)       /* Queue I/O Address Offset */
17523  {
17524         SK_U32  QuCsr;  /* CSR contents */
17525
17526         SK_IN32(IoC, Q_ADDR(QuIoOffs, Q_CSR), &QuCsr);
17527
17528 -       if ((QuCsr & (CSR_STOP | CSR_SV_IDLE)) == 0) {
17529 -               /* Stop Descriptor overridden by start command */
17530 -               SK_OUT32(IoC, Q_ADDR(QuIoOffs, Q_CSR), CSR_STOP);
17531 +       if (CHIP_ID_YUKON_2(pAC)) {
17532 +               if ((QuCsr & (BMU_STOP | BMU_IDLE)) == 0) {
17533 +                       /* Stop Descriptor overridden by start command */
17534 +                       SK_OUT32(IoC, Q_ADDR(QuIoOffs, Q_CSR), BMU_STOP);
17535
17536 -               SK_IN32(IoC, Q_ADDR(QuIoOffs, Q_CSR), &QuCsr);
17537 +                       SK_IN32(IoC, Q_ADDR(QuIoOffs, Q_CSR), &QuCsr);
17538 +               }
17539 +       }
17540 +       else {
17541 +               if ((QuCsr & (CSR_STOP | CSR_SV_IDLE)) == 0) {
17542 +                       /* Stop Descriptor overridden by start command */
17543 +                       SK_OUT32(IoC, Q_ADDR(QuIoOffs, Q_CSR), CSR_STOP);
17544 +
17545 +                       SK_IN32(IoC, Q_ADDR(QuIoOffs, Q_CSR), &QuCsr);
17546 +               }
17547         }
17548 -
17549         return(QuCsr);
17550  }      /* TestStopBit */
17551
17552 @@ -1142,56 +1404,82 @@
17553   *       SWITCH_PORT.
17554   */
17555  void SkGeStopPort(
17556 -SK_AC  *pAC,   /* adapter context */
17557 -SK_IOC IoC,    /* I/O context */
17558 -int            Port,   /* port to stop (MAC_1 + n) */
17559 +SK_AC  *pAC,   /* Adapter Context */
17560 +SK_IOC IoC,    /* I/O Context */
17561 +int            Port,   /* Port to stop (MAC_1 + n) */
17562  int            Dir,    /* Direction to Stop (SK_STOP_RX, SK_STOP_TX, SK_STOP_ALL) */
17563  int            RstMode)/* Reset Mode (SK_SOFT_RST, SK_HARD_RST) */
17564  {
17565 -#ifndef SK_DIAG
17566 -       SK_EVPARA Para;
17567 -#endif /* !SK_DIAG */
17568         SK_GEPORT *pPrt;
17569 -       SK_U32  DWord;
17570 +       SK_U32  RxCsr;
17571         SK_U32  XsCsr;
17572         SK_U32  XaCsr;
17573         SK_U64  ToutStart;
17574 +       SK_U32  CsrStart;
17575 +       SK_U32  CsrStop;
17576 +       SK_U32  CsrIdle;
17577 +       SK_U32  CsrTest;
17578 +       SK_U8   rsl;    /* FIFO read shadow level */
17579 +       SK_U8   rl;             /* FIFO read level */
17580         int             i;
17581         int             ToutCnt;
17582
17583         pPrt = &pAC->GIni.GP[Port];
17584
17585 +       /* set the proper values of Q_CSR register layout depending on the chip */
17586 +       if (CHIP_ID_YUKON_2(pAC)) {
17587 +               CsrStart = BMU_START;
17588 +               CsrStop = BMU_STOP;
17589 +               CsrIdle = BMU_IDLE;
17590 +               CsrTest = BMU_IDLE;
17591 +       }
17592 +       else {
17593 +               CsrStart = CSR_START;
17594 +               CsrStop = CSR_STOP;
17595 +               CsrIdle = CSR_SV_IDLE;
17596 +               CsrTest = CSR_SV_IDLE | CSR_STOP;
17597 +       }
17598 +
17599         if ((Dir & SK_STOP_TX) != 0) {
17600 -               /* disable receiver and transmitter */
17601 -               SkMacRxTxDisable(pAC, IoC, Port);
17602 -
17603 +
17604 +               if (!pAC->GIni.GIAsfEnabled) {
17605 +                       /* disable receiver and transmitter */
17606 +                       SkMacRxTxDisable(pAC, IoC, Port);
17607 +               }
17608 +
17609                 /* stop both transmit queues */
17610 +               SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), CsrStop);
17611 +               SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR), CsrStop);
17612                 /*
17613                  * If the BMU is in the reset state CSR_STOP will terminate
17614                  * immediately.
17615                  */
17616 -               SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), CSR_STOP);
17617 -               SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR), CSR_STOP);
17618
17619                 ToutStart = SkOsGetTime(pAC);
17620                 ToutCnt = 0;
17621                 do {
17622 -                       /*
17623 -                        * Clear packet arbiter timeout to make sure
17624 -                        * this loop will terminate.
17625 -                        */
17626 -                       SK_OUT16(IoC, B3_PA_CTRL, (SK_U16)((Port == MAC_1) ?
17627 -                               PA_CLR_TO_TX1 : PA_CLR_TO_TX2));
17628 -
17629 -                       /*
17630 -                        * If the transfer stucks at the MAC the STOP command will not
17631 -                        * terminate if we don't flush the XMAC's transmit FIFO !
17632 -                        */
17633 -                       SkMacFlushTxFifo(pAC, IoC, Port);
17634 +#ifdef GENESIS
17635 +                       if (pAC->GIni.GIGenesis) {
17636 +                               /* clear Tx packet arbiter timeout IRQ */
17637 +                               SK_OUT16(IoC, B3_PA_CTRL, (SK_U16)((Port == MAC_1) ?
17638 +                                       PA_CLR_TO_TX1 : PA_CLR_TO_TX2));
17639 +                               /*
17640 +                                * If the transfer stucks at the XMAC the STOP command will not
17641 +                                * terminate if we don't flush the XMAC's transmit FIFO !
17642 +                                */
17643 +                               SkMacFlushTxFifo(pAC, IoC, Port);
17644 +                       }
17645 +#endif /* GENESIS */
17646
17647 -                       XsCsr = TestStopBit(pAC, IoC, pPrt->PXsQOff);
17648                         XaCsr = TestStopBit(pAC, IoC, pPrt->PXaQOff);
17649
17650 +                       if (HW_SYNC_TX_SUPPORTED(pAC)) {
17651 +                               XsCsr = TestStopBit(pAC, IoC, pPrt->PXsQOff);
17652 +                       }
17653 +                       else {
17654 +                               XsCsr = XaCsr;
17655 +                       }
17656 +
17657                         if (SkOsGetTime(pAC) - ToutStart > (SK_TICKS_PER_SEC / 18)) {
17658                                 /*
17659                                  * Timeout of 1/18 second reached.
17660 @@ -1199,67 +1487,111 @@
17661                                  */
17662                                 ToutCnt++;
17663                                 if (ToutCnt > 1) {
17664 -                                       /* Might be a problem when the driver event handler
17665 -                                        * calls StopPort again. XXX.
17666 +                                       /*
17667 +                                        * If BMU stop doesn't terminate, we assume that
17668 +                                        * we have a stable state and can reset the BMU,
17669 +                                        * the Prefetch Unit, and RAM buffer now.
17670                                          */
17671 -
17672 -                                       /* Fatal Error, Loop aborted */
17673 -                                       SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_HWI_E018,
17674 -                                               SKERR_HWI_E018MSG);
17675 -#ifndef SK_DIAG
17676 -                                       Para.Para64 = Port;
17677 -                                       SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_FAIL, Para);
17678 -#endif /* !SK_DIAG */
17679 -                                       return;
17680 +                                       break;                  /* ===> leave do/while loop here */
17681                                 }
17682                                 /*
17683 -                                * Cache incoherency workaround: Assume a start command
17684 +                                * Cache incoherency workaround: assume a start command
17685                                  * has been lost while sending the frame.
17686                                  */
17687                                 ToutStart = SkOsGetTime(pAC);
17688
17689 -                               if ((XsCsr & CSR_STOP) != 0) {
17690 -                                       SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), CSR_START);
17691 +                               if ((XsCsr & CsrStop) != 0) {
17692 +                                       SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), CsrStart);
17693                                 }
17694 -                               if ((XaCsr & CSR_STOP) != 0) {
17695 -                                       SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR), CSR_START);
17696 +
17697 +                               if ((XaCsr & CsrStop) != 0) {
17698 +                                       SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR), CsrStart);
17699                                 }
17700 -                       }
17701
17702 +                               /*
17703 +                                * After the previous operations the X(s|a)Csr does no
17704 +                                * longer contain the proper values
17705 +                                */
17706 +                               XaCsr = TestStopBit(pAC, IoC, pPrt->PXaQOff);
17707 +
17708 +                               if (HW_SYNC_TX_SUPPORTED(pAC)) {
17709 +                                       XsCsr = TestStopBit(pAC, IoC, pPrt->PXsQOff);
17710 +                               }
17711 +                               else {
17712 +                                       XsCsr = XaCsr;
17713 +                               }
17714 +                       }
17715                         /*
17716                          * Because of the ASIC problem report entry from 21.08.1998 it is
17717                          * required to wait until CSR_STOP is reset and CSR_SV_IDLE is set.
17718 +                        * (valid for GENESIS only)
17719                          */
17720 -               } while ((XsCsr & (CSR_STOP | CSR_SV_IDLE)) != CSR_SV_IDLE ||
17721 -                                (XaCsr & (CSR_STOP | CSR_SV_IDLE)) != CSR_SV_IDLE);
17722 +               } while (((XsCsr & CsrTest) != CsrIdle ||
17723 +                                 (XaCsr & CsrTest) != CsrIdle));
17724 +
17725 +               if (pAC->GIni.GIAsfEnabled) {
17726
17727 -               /* Reset the MAC depending on the RstMode */
17728 -               if (RstMode == SK_SOFT_RST) {
17729 -                       SkMacSoftRst(pAC, IoC, Port);
17730 +                       pPrt->PState = (RstMode == SK_SOFT_RST) ? SK_PRT_STOP :
17731 +                               SK_PRT_RESET;
17732                 }
17733                 else {
17734 -                       SkMacHardRst(pAC, IoC, Port);
17735 +                       /* Reset the MAC depending on the RstMode */
17736 +                       if (RstMode == SK_SOFT_RST) {
17737 +
17738 +                               SkMacSoftRst(pAC, IoC, Port);
17739 +                       }
17740 +                       else {
17741 +                               if (HW_FEATURE(pAC, HWF_WA_DEV_472) && Port == MAC_1 &&
17742 +                                       pAC->GIni.GP[MAC_2].PState == SK_PRT_RUN) {
17743 +
17744 +                                       pAC->GIni.GP[MAC_1].PState = SK_PRT_RESET;
17745 +
17746 +                                       /* set GPHY Control reset */
17747 +                                       SK_OUT8(IoC, MR_ADDR(MAC_1, GPHY_CTRL), (SK_U8)GPC_RST_SET);
17748 +                               }
17749 +                               else {
17750 +
17751 +                                       SkMacHardRst(pAC, IoC, Port);
17752 +                               }
17753 +                       }
17754                 }
17755 -
17756 -               /* Disable Force Sync bit and Enable Alloc bit */
17757 +
17758 +               /* disable Force Sync bit and Enable Alloc bit */
17759                 SK_OUT8(IoC, MR_ADDR(Port, TXA_CTRL),
17760                         TXA_DIS_FSYNC | TXA_DIS_ALLOC | TXA_STOP_RC);
17761 -
17762 +
17763                 /* Stop Interval Timer and Limit Counter of Tx Arbiter */
17764                 SK_OUT32(IoC, MR_ADDR(Port, TXA_ITI_INI), 0L);
17765                 SK_OUT32(IoC, MR_ADDR(Port, TXA_LIM_INI), 0L);
17766
17767                 /* Perform a local reset of the port's Tx path */
17768 +               if (CHIP_ID_YUKON_2(pAC)) {
17769 +                       /* Reset the PCI FIFO of the async Tx queue */
17770 +                       SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR),
17771 +                               BMU_RST_SET | BMU_FIFO_RST);
17772 +
17773 +                       /* Reset the PCI FIFO of the sync Tx queue */
17774 +                       SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR),
17775 +                               BMU_RST_SET | BMU_FIFO_RST);
17776 +
17777 +                       /* Reset the Tx prefetch units */
17778 +                       SK_OUT32(IoC, Y2_PREF_Q_ADDR(pPrt->PXaQOff, PREF_UNIT_CTRL_REG),
17779 +                               PREF_UNIT_RST_SET);
17780 +                       SK_OUT32(IoC, Y2_PREF_Q_ADDR(pPrt->PXsQOff, PREF_UNIT_CTRL_REG),
17781 +                               PREF_UNIT_RST_SET);
17782 +               }
17783 +               else {
17784 +                       /* Reset the PCI FIFO of the async Tx queue */
17785 +                       SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR), CSR_SET_RESET);
17786 +                       /* Reset the PCI FIFO of the sync Tx queue */
17787 +                       SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), CSR_SET_RESET);
17788 +               }
17789
17790 -               /* Reset the PCI FIFO of the async Tx queue */
17791 -               SK_OUT32(IoC, Q_ADDR(pPrt->PXaQOff, Q_CSR), CSR_SET_RESET);
17792 -               /* Reset the PCI FIFO of the sync Tx queue */
17793 -               SK_OUT32(IoC, Q_ADDR(pPrt->PXsQOff, Q_CSR), CSR_SET_RESET);
17794                 /* Reset the RAM Buffer async Tx queue */
17795                 SK_OUT8(IoC, RB_ADDR(pPrt->PXaQOff, RB_CTRL), RB_RST_SET);
17796                 /* Reset the RAM Buffer sync Tx queue */
17797                 SK_OUT8(IoC, RB_ADDR(pPrt->PXsQOff, RB_CTRL), RB_RST_SET);
17798 -
17799 +
17800                 /* Reset Tx MAC FIFO */
17801  #ifdef GENESIS
17802                 if (pAC->GIni.GIGenesis) {
17803 @@ -1271,71 +1603,116 @@
17804                         SkGeXmitLED(pAC, IoC, MR_ADDR(Port, TX_LED_INI), SK_LED_DIS);
17805                 }
17806  #endif /* GENESIS */
17807 -
17808 +
17809  #ifdef YUKON
17810                 if (pAC->GIni.GIYukon) {
17811 -                       /* Reset TX MAC FIFO */
17812 -                       SK_OUT8(IoC, MR_ADDR(Port, TX_GMF_CTRL_T), (SK_U8)GMF_RST_SET);
17813 +                       /* do the reset only if ASF is not enabled */
17814 +                       if (!pAC->GIni.GIAsfEnabled) {
17815 +                               /* Reset Tx MAC FIFO */
17816 +                               SK_OUT8(IoC, MR_ADDR(Port, TX_GMF_CTRL_T), (SK_U8)GMF_RST_SET);
17817 +                       }
17818 +
17819 +                       /* set Pause Off */
17820 +                       SK_OUT8(IoC, MR_ADDR(Port, GMAC_CTRL), (SK_U8)GMC_PAUSE_OFF);
17821                 }
17822  #endif /* YUKON */
17823         }
17824
17825         if ((Dir & SK_STOP_RX) != 0) {
17826 -               /*
17827 -                * The RX Stop Command will not terminate if no buffers
17828 -                * are queued in the RxD ring. But it will always reach
17829 -                * the Idle state. Therefore we can use this feature to
17830 -                * stop the transfer of received packets.
17831 -                */
17832 -               /* stop the port's receive queue */
17833 -               SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), CSR_STOP);
17834 -
17835 -               i = 100;
17836 -               do {
17837 +
17838 +               if (CHIP_ID_YUKON_2(pAC)) {
17839                         /*
17840 -                        * Clear packet arbiter timeout to make sure
17841 -                        * this loop will terminate
17842 +                        * The RX Stop command will not work for Yukon-2 if the BMU does not
17843 +                        * reach the end of packet and since we can't make sure that we have
17844 +                        * incoming data, we must reset the BMU while it is not during a DMA
17845 +                        * transfer. Since it is possible that the RX path is still active,
17846 +                        * the RX RAM buffer will be stopped first, so any possible incoming
17847 +                        * data will not trigger a DMA. After the RAM buffer is stopped, the
17848 +                        * BMU is polled until any DMA in progress is ended and only then it
17849 +                        * will be reset.
17850                          */
17851 -                       SK_OUT16(IoC, B3_PA_CTRL, (SK_U16)((Port == MAC_1) ?
17852 -                               PA_CLR_TO_RX1 : PA_CLR_TO_RX2));
17853
17854 -                       DWord = TestStopBit(pAC, IoC, pPrt->PRxQOff);
17855 +                       /* disable the RAM Buffer receive queue */
17856 +                       SK_OUT8(IoC, RB_ADDR(pPrt->PRxQOff, RB_CTRL), RB_DIS_OP_MD);
17857
17858 -                       /* timeout if i==0 (bug fix for #10748) */
17859 -                       if (--i == 0) {
17860 -                               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_HWI_E024,
17861 -                                       SKERR_HWI_E024MSG);
17862 -                               break;
17863 +                       i = 0xffff;
17864 +                       while (--i) {
17865 +                               SK_IN8(IoC, RB_ADDR(pPrt->PRxQOff, Q_RSL), &rsl);
17866 +                               SK_IN8(IoC, RB_ADDR(pPrt->PRxQOff, Q_RL), &rl);
17867 +
17868 +                               if (rsl == rl) {
17869 +                                       break;
17870 +                               }
17871                         }
17872 +
17873                         /*
17874 -                        * because of the ASIC problem report entry from 21.08.98
17875 -                        * it is required to wait until CSR_STOP is reset and
17876 -                        * CSR_SV_IDLE is set.
17877 +                        * If the Rx side is blocked, the above loop cannot terminate.
17878 +                        * But, if there was any traffic it should be terminated, now.
17879 +                        * However, stop the Rx BMU and the Prefetch Unit !
17880                          */
17881 -               } while ((DWord & (CSR_STOP | CSR_SV_IDLE)) != CSR_SV_IDLE);
17882 +                       SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR),
17883 +                               BMU_RST_SET | BMU_FIFO_RST);
17884 +                       /* reset the Rx prefetch unit */
17885 +                       SK_OUT32(IoC, Y2_PREF_Q_ADDR(pPrt->PRxQOff, PREF_UNIT_CTRL_REG),
17886 +                               PREF_UNIT_RST_SET);
17887 +               }
17888 +               else {
17889 +                       /*
17890 +                        * The RX Stop Command will not terminate if no buffers
17891 +                        * are queued in the RxD ring. But it will always reach
17892 +                        * the Idle state. Therefore we can use this feature to
17893 +                        * stop the transfer of received packets.
17894 +                        */
17895 +                       /* stop the port's receive queue */
17896 +                       SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), CsrStop);
17897
17898 -               /* The path data transfer activity is fully stopped now */
17899 +                       i = 100;
17900 +                       do {
17901 +#ifdef GENESIS
17902 +                               if (pAC->GIni.GIGenesis) {
17903 +                                       /* clear Rx packet arbiter timeout IRQ */
17904 +                                       SK_OUT16(IoC, B3_PA_CTRL, (SK_U16)((Port == MAC_1) ?
17905 +                                               PA_CLR_TO_RX1 : PA_CLR_TO_RX2));
17906 +                               }
17907 +#endif /* GENESIS */
17908 +
17909 +                               RxCsr = TestStopBit(pAC, IoC, pPrt->PRxQOff);
17910 +
17911 +                               /* timeout if i==0 (bug fix for #10748) */
17912 +                               if (--i == 0) {
17913 +                                       SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_HWI_E024,
17914 +                                               SKERR_HWI_E024MSG);
17915 +                                       break;
17916 +                               }
17917 +                       /*
17918 +                        * Because of the ASIC problem report entry from 21.08.1998 it is
17919 +                        * required to wait until CSR_STOP is reset and CSR_SV_IDLE is set.
17920 +                        * (valid for GENESIS only)
17921 +                        */
17922 +                       } while ((RxCsr & CsrTest) != CsrIdle);
17923 +                       /* The path data transfer activity is fully stopped now */
17924
17925 -               /* Perform a local reset of the port's Rx path */
17926 +                       /* Perform a local reset of the port's Rx path */
17927 +                       /* Reset the PCI FIFO of the Rx queue */
17928 +                       SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), CSR_SET_RESET);
17929 +               }
17930
17931 -                /*     Reset the PCI FIFO of the Rx queue */
17932 -               SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), CSR_SET_RESET);
17933                 /* Reset the RAM Buffer receive queue */
17934                 SK_OUT8(IoC, RB_ADDR(pPrt->PRxQOff, RB_CTRL), RB_RST_SET);
17935
17936                 /* Reset Rx MAC FIFO */
17937  #ifdef GENESIS
17938                 if (pAC->GIni.GIGenesis) {
17939 -
17940 +
17941                         SK_OUT8(IoC, MR_ADDR(Port, RX_MFF_CTRL2), MFF_RST_SET);
17942
17943                         /* switch Rx LED off, stop the LED counter */
17944                         SkGeXmitLED(pAC, IoC, MR_ADDR(Port, RX_LED_INI), SK_LED_DIS);
17945                 }
17946  #endif /* GENESIS */
17947 -
17948 +
17949  #ifdef YUKON
17950 -               if (pAC->GIni.GIYukon) {
17951 +               if (pAC->GIni.GIYukon && !pAC->GIni.GIAsfEnabled) {
17952                         /* Reset Rx MAC FIFO */
17953                         SK_OUT8(IoC, MR_ADDR(Port, RX_GMF_CTRL_T), (SK_U8)GMF_RST_SET);
17954                 }
17955 @@ -1355,8 +1732,8 @@
17956   *     nothing
17957   */
17958  static void SkGeInit0(
17959 -SK_AC  *pAC,           /* adapter context */
17960 -SK_IOC IoC)            /* IO context */
17961 +SK_AC  *pAC,           /* Adapter Context */
17962 +SK_IOC IoC)            /* I/O Context */
17963  {
17964         int i;
17965         SK_GEPORT *pPrt;
17966 @@ -1365,6 +1742,7 @@
17967                 pPrt = &pAC->GIni.GP[i];
17968
17969                 pPrt->PState = SK_PRT_RESET;
17970 +               pPrt->PPortUsage = SK_RED_LINK;
17971                 pPrt->PRxQOff = QOffTab[i].RxQOff;
17972                 pPrt->PXsQOff = QOffTab[i].XsQOff;
17973                 pPrt->PXaQOff = QOffTab[i].XaQOff;
17974 @@ -1393,24 +1771,30 @@
17975                 pPrt->PLipaAutoNeg = (SK_U8)SK_LIPA_UNKNOWN;
17976                 pPrt->PAutoNegFail = SK_FALSE;
17977                 pPrt->PHWLinkUp = SK_FALSE;
17978 -               pPrt->PLinkBroken = SK_TRUE; /* See WA code */
17979 +               pPrt->PLinkBroken = SK_TRUE;    /* See WA code */
17980                 pPrt->PPhyPowerState = PHY_PM_OPERATIONAL_MODE;
17981                 pPrt->PMacColThres = TX_COL_DEF;
17982                 pPrt->PMacJamLen = TX_JAM_LEN_DEF;
17983                 pPrt->PMacJamIpgVal     = TX_JAM_IPG_DEF;
17984                 pPrt->PMacJamIpgData = TX_IPG_JAM_DEF;
17985 +               pPrt->PMacBackOffLim = TX_BOF_LIM_DEF;
17986 +               pPrt->PMacDataBlind = DATA_BLIND_DEF;
17987                 pPrt->PMacIpgData = IPG_DATA_DEF;
17988                 pPrt->PMacLimit4 = SK_FALSE;
17989         }
17990
17991 -       pAC->GIni.GIPortUsage = SK_RED_LINK;
17992         pAC->GIni.GILedBlinkCtrl = (SK_U16)OemConfig.Value;
17993 -       pAC->GIni.GIValIrqMask = IS_ALL_MSK;
17994 +       pAC->GIni.GIChipCap = 0;
17995 +
17996 +       for (i = 0; i < 4; i++) {
17997 +               pAC->GIni.HwF.Features[i]= 0x00000000;
17998 +               pAC->GIni.HwF.OnMask[i]  = 0x00000000;
17999 +               pAC->GIni.HwF.OffMask[i] = 0x00000000;
18000 +       }
18001
18002  }      /* SkGeInit0*/
18003
18004  #ifdef SK_PCI_RESET
18005 -
18006  /******************************************************************************
18007   *
18008   *     SkGePciReset() - Reset PCI interface
18009 @@ -1426,8 +1810,8 @@
18010   *     1:      Power state could not be changed to 3.
18011   */
18012  static int SkGePciReset(
18013 -SK_AC  *pAC,           /* adapter context */
18014 -SK_IOC IoC)            /* IO context */
18015 +SK_AC  *pAC,           /* Adapter Context */
18016 +SK_IOC IoC)            /* I/O Context */
18017  {
18018         int             i;
18019         SK_U16  PmCtlSts;
18020 @@ -1450,7 +1834,7 @@
18021         /* We know the RAM Interface Arbiter is enabled. */
18022         SkPciWriteCfgWord(pAC, PCI_PM_CTL_STS, PCI_PM_STATE_D3);
18023         SkPciReadCfgWord(pAC, PCI_PM_CTL_STS, &PmCtlSts);
18024 -
18025 +
18026         if ((PmCtlSts & PCI_PM_STATE_MSK) != PCI_PM_STATE_D3) {
18027                 return(1);
18028         }
18029 @@ -1460,7 +1844,7 @@
18030
18031         /* Check for D0 state. */
18032         SkPciReadCfgWord(pAC, PCI_PM_CTL_STS, &PmCtlSts);
18033 -
18034 +
18035         if ((PmCtlSts & PCI_PM_STATE_MSK) != PCI_PM_STATE_D0) {
18036                 return(1);
18037         }
18038 @@ -1469,11 +1853,24 @@
18039         SkPciReadCfgWord(pAC, PCI_COMMAND, &PciCmd);
18040         SkPciReadCfgByte(pAC, PCI_CACHE_LSZ, &Cls);
18041         SkPciReadCfgDWord(pAC, PCI_BASE_1ST, &Bp1);
18042 -       SkPciReadCfgDWord(pAC, PCI_BASE_2ND, &Bp2);
18043 +
18044 +       /*
18045 +        * Compute the location in PCI config space of BAR2
18046 +        * relativ to the location of BAR1
18047 +        */
18048 +       if ((Bp1 & PCI_MEM_TYP_MSK) == PCI_MEM64BIT) {
18049 +               /* BAR1 is 64 bits wide */
18050 +               i = 8;
18051 +       }
18052 +       else {
18053 +               i = 4;
18054 +       }
18055 +
18056 +       SkPciReadCfgDWord(pAC, PCI_BASE_1ST + i, &Bp2);
18057         SkPciReadCfgByte(pAC, PCI_LAT_TIM, &Lat);
18058 -
18059 -       if (PciCmd != 0 || Cls != (SK_U8)0 || Lat != (SK_U8)0 ||
18060 -               (Bp1 & 0xfffffff0L) != 0 || Bp2 != 1) {
18061 +
18062 +       if (PciCmd != 0 || Cls != 0 || (Bp1 & 0xfffffff0L) != 0 || Bp2 != 1 ||
18063 +               Lat != 0) {
18064                 return(1);
18065         }
18066
18067 @@ -1484,9 +1881,80 @@
18068
18069         return(0);
18070  }      /* SkGePciReset */
18071 -
18072  #endif /* SK_PCI_RESET */
18073
18074 +
18075 +/******************************************************************************
18076 + *
18077 + *     SkGeSetUpSupFeatures() - Collect Feature List for HW_FEATURE Macro
18078 + *
18079 + * Description:
18080 + *     This function collects the available features and required
18081 + *     deviation services of the Adapter and provides these
18082 + *     information in the GIHwF struct. This information is used as
18083 + *     default value and may be overritten by the driver using the
18084 + *     SET_HW_FEATURE_MASK() macro in its Init0 phase.
18085 + *
18086 + * Notice:
18087 + *     Using the On and Off mask: Never switch on the same bit in both
18088 + *     masks simultaneously. However, if doing the Off mask will win.
18089 + *
18090 + * Returns:
18091 + *     nothing
18092 + */
18093 +static void SkGeSetUpSupFeatures(
18094 +SK_AC  *pAC,           /* Adapter Context */
18095 +SK_IOC IoC)            /* I/O Context */
18096 +{
18097 +       int i;
18098 +
18099 +       switch (pAC->GIni.GIChipId) {
18100 +       case CHIP_ID_YUKON_EC:
18101 +               if (pAC->GIni.GIChipRev == CHIP_REV_YU_EC_A1) {
18102 +                       /* A0/A1 */
18103 +                       pAC->GIni.HwF.Features[HW_DEV_LIST] =
18104 +                               HWF_WA_DEV_42  | HWF_WA_DEV_46 | HWF_WA_DEV_43_418 |
18105 +                               HWF_WA_DEV_420 | HWF_WA_DEV_423 |
18106 +                               HWF_WA_DEV_424 | HWF_WA_DEV_425 | HWF_WA_DEV_427 |
18107 +                               HWF_WA_DEV_428 | HWF_WA_DEV_483 | HWF_WA_DEV_4109;
18108 +               }
18109 +               else {
18110 +                       /* A2/A3 */
18111 +                       pAC->GIni.HwF.Features[HW_DEV_LIST] =
18112 +                               HWF_WA_DEV_424 | HWF_WA_DEV_425 | HWF_WA_DEV_427 |
18113 +                               HWF_WA_DEV_428 | HWF_WA_DEV_483 | HWF_WA_DEV_4109;
18114 +               }
18115 +               break;
18116 +       case CHIP_ID_YUKON_FE:
18117 +               pAC->GIni.HwF.Features[HW_DEV_LIST] = HWF_WA_DEV_427 | HWF_WA_DEV_4109;
18118 +               break;
18119 +       case CHIP_ID_YUKON_XL:
18120 +               /* still needed for Diag */
18121 +               if (pAC->GIni.GIChipRev == 0) {
18122 +                       pAC->GIni.HwF.Features[HW_DEV_LIST] =
18123 +                               HWF_WA_DEV_427 | HWF_WA_DEV_463 | HWF_WA_DEV_472 |
18124 +                               HWF_WA_DEV_479 | HWF_WA_DEV_483 | HWF_WA_DEV_4115;
18125 +               }
18126 +               else if (pAC->GIni.GIChipRev == 1) {
18127 +                       pAC->GIni.HwF.Features[HW_DEV_LIST] =
18128 +                               HWF_WA_DEV_427 | HWF_WA_DEV_483 | HWF_WA_DEV_4109 |
18129 +                               HWF_WA_DEV_4115;
18130 +               }
18131 +               else {
18132 +                       pAC->GIni.HwF.Features[HW_DEV_LIST] =
18133 +                               HWF_WA_DEV_427 | HWF_WA_DEV_483 | HWF_WA_DEV_4109;
18134 +               }
18135 +               break;
18136 +       }
18137 +
18138 +       for (i = 0; i < 4; i++) {
18139 +               pAC->GIni.HwF.Features[i] =
18140 +                       (pAC->GIni.HwF.Features[i] | pAC->GIni.HwF.OnMask[i]) &
18141 +                               ~pAC->GIni.HwF.OffMask[i];
18142 +       }
18143 +}      /* SkGeSetUpSupFeatures */
18144 +
18145 +
18146  /******************************************************************************
18147   *
18148   *     SkGeInit1() - Level 1 Initialization
18149 @@ -1509,73 +1977,216 @@
18150   *     6:      HW self test failed
18151   */
18152  static int SkGeInit1(
18153 -SK_AC  *pAC,           /* adapter context */
18154 -SK_IOC IoC)            /* IO context */
18155 +SK_AC  *pAC,           /* Adapter Context */
18156 +SK_IOC IoC)            /* I/O Context */
18157  {
18158         SK_U8   Byte;
18159         SK_U16  Word;
18160 -       SK_U16  CtrlStat;
18161 +       SK_U32  CtrlStat;
18162 +       SK_U32  VauxAvail;
18163         SK_U32  DWord;
18164 +       SK_U32  PowerDownBit;
18165 +       SK_GEPORT *pPrt;
18166         int     RetVal;
18167         int     i;
18168
18169         RetVal = 0;
18170
18171 -       /* save CLK_RUN bits (YUKON-Lite) */
18172 -       SK_IN16(IoC, B0_CTST, &CtrlStat);
18173 +       /* save CLK_RUN & ASF_ENABLE bits (YUKON-Lite, YUKON-EC) */
18174 +       SK_IN32(IoC, B0_CTST, &CtrlStat);
18175
18176  #ifdef SK_PCI_RESET
18177         (void)SkGePciReset(pAC, IoC);
18178  #endif /* SK_PCI_RESET */
18179
18180 -       /* do the SW-reset */
18181 -       SK_OUT8(IoC, B0_CTST, CS_RST_SET);
18182 -
18183         /* release the SW-reset */
18184 +       /* Important: SW-reset has to be cleared here, to ensure
18185 +        * the CHIP_ID can be read IO-mapped based, too -
18186 +        * remember the RAP register can only be written if
18187 +        * SW-reset is cleared.
18188 +        */
18189         SK_OUT8(IoC, B0_CTST, CS_RST_CLR);
18190
18191 +       /* read Chip Identification Number */
18192 +       SK_IN8(IoC, B2_CHIP_ID, &Byte);
18193 +       pAC->GIni.GIChipId = Byte;
18194 +
18195 +       pAC->GIni.GIAsfEnabled = SK_FALSE;
18196 +
18197 +       /* ASF support only for Yukon-2 */
18198 +       if ((pAC->GIni.GIChipId >= CHIP_ID_YUKON_XL) &&
18199 +               (pAC->GIni.GIChipId <= CHIP_ID_YUKON_EC)) {
18200 +#ifdef SK_ASF
18201 +               if ((CtrlStat & Y2_ASF_ENABLE) != 0) {
18202 +                       /* do the SW-reset only if ASF is not enabled */
18203 +                       pAC->GIni.GIAsfEnabled = SK_TRUE;
18204 +               }
18205 +#else /* !SK_ASF */
18206 +
18207 +               SK_IN8(IoC, B28_Y2_ASF_STAT_CMD, &Byte);
18208 +
18209 +               pAC->GIni.GIAsfRunning = Byte & Y2_ASF_RUNNING;
18210 +
18211 +               /* put ASF system in reset state */
18212 +               SK_OUT8(IoC, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET);
18213 +
18214 +               /* disable ASF Unit */
18215 +               SK_OUT16(IoC, B0_CTST, Y2_ASF_DISABLE);
18216 +#endif /* !SK_ASF */
18217 +       }
18218 +
18219 +       if (!pAC->GIni.GIAsfEnabled) {
18220 +               /* Yukon-2: required for Diag and Power Management */
18221 +               /* set the SW-reset */
18222 +               SK_OUT8(IoC, B0_CTST, CS_RST_SET);
18223 +
18224 +               /* release the SW-reset */
18225 +               SK_OUT8(IoC, B0_CTST, CS_RST_CLR);
18226 +       }
18227 +
18228         /* reset all error bits in the PCI STATUS register */
18229         /*
18230          * Note: PCI Cfg cycles cannot be used, because they are not
18231          *               available on some platforms after 'boot time'.
18232          */
18233 -       SK_IN16(IoC, PCI_C(PCI_STATUS), &Word);
18234 -
18235 +       SK_IN16(IoC, PCI_C(pAC, PCI_STATUS), &Word);
18236 +
18237         SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
18238 -       SK_OUT16(IoC, PCI_C(PCI_STATUS), (SK_U16)(Word | PCI_ERRBITS));
18239 -       SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
18240 +
18241 +       SK_OUT16(IoC, PCI_C(pAC, PCI_STATUS), Word | (SK_U16)PCI_ERRBITS);
18242
18243         /* release Master Reset */
18244         SK_OUT8(IoC, B0_CTST, CS_MRST_CLR);
18245
18246  #ifdef CLK_RUN
18247         CtrlStat |= CS_CLK_RUN_ENA;
18248 -#endif /* CLK_RUN */
18249
18250         /* restore CLK_RUN bits */
18251         SK_OUT16(IoC, B0_CTST, (SK_U16)(CtrlStat &
18252                 (CS_CLK_RUN_HOT | CS_CLK_RUN_RST | CS_CLK_RUN_ENA)));
18253 +#endif /* CLK_RUN */
18254 +
18255 +       if ((pAC->GIni.GIChipId >= CHIP_ID_YUKON_XL) &&
18256 +               (pAC->GIni.GIChipId <= CHIP_ID_YUKON_FE)) {
18257 +
18258 +               pAC->GIni.GIYukon2 = SK_TRUE;
18259 +               pAC->GIni.GIValIrqMask = Y2_IS_ALL_MSK;
18260 +               pAC->GIni.GIValHwIrqMask = Y2_HWE_ALL_MSK;
18261 +
18262 +               VauxAvail = Y2_VAUX_AVAIL;
18263 +
18264 +               SK_IN32(IoC, PCI_C(pAC, PCI_OUR_STATUS), &DWord);
18265 +
18266 +               if ((DWord & PCI_OS_PCI_X) != 0) {
18267 +                       /* this is a PCI / PCI-X bus */
18268 +                       if ((DWord & PCI_OS_PCIX) != 0) {
18269 +                               /* this is a PCI-X bus */
18270 +                               pAC->GIni.GIPciBus = SK_PCIX_BUS;
18271 +
18272 +                               /* PCI-X is always 64-bit wide */
18273 +                               pAC->GIni.GIPciSlot64 = SK_TRUE;
18274 +
18275 +                               pAC->GIni.GIPciMode = (SK_U8)(PCI_OS_SPEED(DWord));
18276 +                       }
18277 +                       else {
18278 +                               /* this is a conventional PCI bus */
18279 +                               pAC->GIni.GIPciBus = SK_PCI_BUS;
18280 +
18281 +                               SK_IN16(IoC, PCI_C(pAC, PCI_OUR_REG_2), &Word);
18282 +
18283 +                               /* check if 64-bit width is used */
18284 +                               pAC->GIni.GIPciSlot64 = (SK_BOOL)
18285 +                                       (((DWord & PCI_OS_PCI64B) != 0) &&
18286 +                                       ((Word & PCI_USEDATA64) != 0));
18287 +
18288 +                               /* check if 66 MHz PCI Clock is active */
18289 +                               pAC->GIni.GIPciClock66 = (SK_BOOL)((DWord & PCI_OS_PCI66M) != 0);
18290 +                       }
18291 +               }
18292 +               else {
18293 +                       /* this is a PEX bus */
18294 +                       pAC->GIni.GIPciBus = SK_PEX_BUS;
18295 +
18296 +                       /* clear any PEX errors */
18297 +                       SK_OUT32(IoC, PCI_C(pAC, PEX_UNC_ERR_STAT), 0xffffffffUL);
18298 +
18299 +                       SK_IN16(IoC, PCI_C(pAC, PEX_LNK_STAT), &Word);
18300 +
18301 +                       pAC->GIni.GIPexWidth = (SK_U8)((Word & PEX_LS_LINK_WI_MSK) >> 4);
18302 +               }
18303 +               /*
18304 +                * Yukon-2 chips family has a different way of providing
18305 +                * the number of MACs available
18306 +                */
18307 +               pAC->GIni.GIMacsFound = 1;
18308 +
18309 +               SK_IN8(IoC, B2_Y2_HW_RES, &Byte);
18310 +
18311 +               if (CHIP_ID_YUKON_2(pAC)) {
18312 +                       /*
18313 +                        * OEM config value is overwritten and should not
18314 +                        * be used for Yukon-2
18315 +                        */
18316 +                       pAC->GIni.GILedBlinkCtrl |= SK_ACT_LED_BLINK;
18317 +
18318 +                       if (CFG_LED_MODE(Byte) == CFG_LED_DUAL_ACT_LNK) {
18319 +
18320 +                               pAC->GIni.GILedBlinkCtrl |= SK_DUAL_LED_ACT_LNK;
18321 +                       }
18322 +               }
18323 +
18324 +               if ((Byte & CFG_DUAL_MAC_MSK) == CFG_DUAL_MAC_MSK) {
18325 +
18326 +                       SK_IN8(IoC, B2_Y2_CLK_GATE, &Byte);
18327 +
18328 +                       if (!(Byte & Y2_STATUS_LNK2_INAC)) {
18329 +                               /* Link 2 activ */
18330 +                               pAC->GIni.GIMacsFound++;
18331 +                       }
18332 +               }
18333 +
18334 +#ifdef VCPU
18335 +               if (pAC->GIni.GIChipId == CHIP_ID_YUKON_XL) {
18336 +                       /* temporary WA for reported number of links */
18337 +                       pAC->GIni.GIMacsFound = 2;
18338 +               }
18339 +#endif /* VCPU */
18340 +
18341 +               /* read Chip Revision */
18342 +               SK_IN8(IoC, B2_MAC_CFG, &Byte);
18343 +
18344 +               pAC->GIni.GIChipCap = Byte & 0x0f;
18345 +       }
18346 +       else {
18347 +               pAC->GIni.GIYukon2 = SK_FALSE;
18348 +               pAC->GIni.GIValIrqMask = IS_ALL_MSK;
18349 +               pAC->GIni.GIValHwIrqMask = 0;   /* not activated */
18350 +
18351 +               VauxAvail = CS_VAUX_AVAIL;
18352 +
18353 +               /* read number of MACs and Chip Revision */
18354 +               SK_IN8(IoC, B2_MAC_CFG, &Byte);
18355 +
18356 +               pAC->GIni.GIMacsFound = (Byte & CFG_SNG_MAC) ? 1 : 2;
18357 +       }
18358
18359 -       /* read Chip Identification Number */
18360 -       SK_IN8(IoC, B2_CHIP_ID, &Byte);
18361 -       pAC->GIni.GIChipId = Byte;
18362 -
18363 -       /* read number of MACs */
18364 -       SK_IN8(IoC, B2_MAC_CFG, &Byte);
18365 -       pAC->GIni.GIMacsFound = (Byte & CFG_SNG_MAC) ? 1 : 2;
18366 -
18367         /* get Chip Revision Number */
18368         pAC->GIni.GIChipRev = (SK_U8)((Byte & CFG_CHIP_R_MSK) >> 4);
18369
18370 -       /* get diff. PCI parameters */
18371 -       SK_IN16(IoC, B0_CTST, &CtrlStat);
18372 -
18373 +#ifndef SK_DIAG
18374 +       if (pAC->GIni.GIChipId == CHIP_ID_YUKON_XL && pAC->GIni.GIChipRev == 0) {
18375 +               /* Yukon-2 Chip Rev. A0 */
18376 +               return(6);
18377 +       }
18378 +#endif /* !SK_DIAG */
18379 +
18380         /* read the adapters RAM size */
18381         SK_IN8(IoC, B2_E_0, &Byte);
18382 -
18383 +
18384         pAC->GIni.GIGenesis = SK_FALSE;
18385         pAC->GIni.GIYukon = SK_FALSE;
18386         pAC->GIni.GIYukonLite = SK_FALSE;
18387 +       pAC->GIni.GIVauxAvail = SK_FALSE;
18388
18389  #ifdef GENESIS
18390         if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
18391 @@ -1591,57 +2202,77 @@
18392                         pAC->GIni.GIRamSize = (int)Byte * 512;
18393                         pAC->GIni.GIRamOffs = 0;
18394                 }
18395 -               /* all GE adapters work with 53.125 MHz host clock */
18396 +               /* all GENESIS adapters work with 53.125 MHz host clock */
18397                 pAC->GIni.GIHstClkFact = SK_FACT_53;
18398 -
18399 +
18400                 /* set Descr. Poll Timer Init Value to 250 ms */
18401                 pAC->GIni.GIPollTimerVal =
18402                         SK_DPOLL_DEF * (SK_U32)pAC->GIni.GIHstClkFact / 100;
18403         }
18404  #endif /* GENESIS */
18405 -
18406 +
18407  #ifdef YUKON
18408         if (pAC->GIni.GIChipId != CHIP_ID_GENESIS) {
18409 -
18410 +
18411                 pAC->GIni.GIYukon = SK_TRUE;
18412 -
18413 +
18414                 pAC->GIni.GIRamSize = (Byte == (SK_U8)0) ? 128 : (int)Byte * 4;
18415 -
18416 +
18417                 pAC->GIni.GIRamOffs = 0;
18418 -
18419 -               /* WA for chip Rev. A */
18420 +
18421 +               /* WA for Yukon chip Rev. A */
18422                 pAC->GIni.GIWolOffs = (pAC->GIni.GIChipId == CHIP_ID_YUKON &&
18423                         pAC->GIni.GIChipRev == 0) ? WOL_REG_OFFS : 0;
18424 -
18425 +
18426                 /* get PM Capabilities of PCI config space */
18427 -               SK_IN16(IoC, PCI_C(PCI_PM_CAP_REG), &Word);
18428 +               SK_IN16(IoC, PCI_C(pAC, PCI_PM_CAP_REG), &Word);
18429
18430                 /* check if VAUX is available */
18431 -               if (((CtrlStat & CS_VAUX_AVAIL) != 0) &&
18432 +               if (((CtrlStat & VauxAvail) != 0) &&
18433                         /* check also if PME from D3cold is set */
18434                         ((Word & PCI_PME_D3C_SUP) != 0)) {
18435                         /* set entry in GE init struct */
18436                         pAC->GIni.GIVauxAvail = SK_TRUE;
18437                 }
18438 -
18439 -               if (pAC->GIni.GIChipId == CHIP_ID_YUKON_LITE) {
18440 -                       /* this is Rev. A1 */
18441 -                       pAC->GIni.GIYukonLite = SK_TRUE;
18442 -               }
18443 -               else {
18444 -                       /* save Flash-Address Register */
18445 -                       SK_IN32(IoC, B2_FAR, &DWord);
18446
18447 -                       /* test Flash-Address Register */
18448 -                       SK_OUT8(IoC, B2_FAR + 3, 0xff);
18449 -                       SK_IN8(IoC, B2_FAR + 3, &Byte);
18450 +               if (!CHIP_ID_YUKON_2(pAC)) {
18451
18452 -                       if (Byte != 0) {
18453 -                               /* this is Rev. A0 */
18454 +                       if (pAC->GIni.GIChipId == CHIP_ID_YUKON_LITE) {
18455 +                               /* this is Rev. A1 */
18456                                 pAC->GIni.GIYukonLite = SK_TRUE;
18457 +                       }
18458 +                       else {
18459 +                               /* save Flash-Address Register */
18460 +                               SK_IN32(IoC, B2_FAR, &DWord);
18461
18462 -                               /* restore Flash-Address Register */
18463 -                               SK_OUT32(IoC, B2_FAR, DWord);
18464 +                               /* test Flash-Address Register */
18465 +                               SK_OUT8(IoC, B2_FAR + 3, 0xff);
18466 +                               SK_IN8(IoC, B2_FAR + 3, &Byte);
18467 +
18468 +                               if (Byte != 0) {
18469 +                                       /* this is Rev. A0 */
18470 +                                       pAC->GIni.GIYukonLite = SK_TRUE;
18471 +
18472 +                                       /* restore Flash-Address Register */
18473 +                                       SK_OUT32(IoC, B2_FAR, DWord);
18474 +                               }
18475 +                       }
18476 +               }
18477 +               else {
18478 +                       /* Check for CLS = 0 (dev. #4.55) */
18479 +                       if (pAC->GIni.GIPciBus != SK_PEX_BUS) {
18480 +                               /* PCI and PCI-X */
18481 +                               SK_IN8(IoC, PCI_C(pAC, PCI_CACHE_LSZ), &Byte);
18482 +                               if (Byte == 0) {
18483 +                                       /* set CLS to 2 if configured to 0 */
18484 +                                       SK_OUT8(IoC, PCI_C(pAC, PCI_CACHE_LSZ), 2);
18485 +                               }
18486 +                               if (pAC->GIni.GIPciBus == SK_PCIX_BUS) {
18487 +                                       /* set Cache Line Size opt. */
18488 +                                       SK_IN32(IoC, PCI_C(pAC, PCI_OUR_REG_1), &DWord);
18489 +                                       DWord |= PCI_CLS_OPT;
18490 +                                       SK_OUT32(IoC, PCI_C(pAC, PCI_OUR_REG_1), DWord);
18491 +                               }
18492                         }
18493                 }
18494
18495 @@ -1649,70 +2280,147 @@
18496                 SK_OUT8(IoC, B0_POWER_CTRL, (SK_U8)(PC_VAUX_ENA | PC_VCC_ENA |
18497                         PC_VAUX_OFF | PC_VCC_ON));
18498
18499 -               /* read the Interrupt source */
18500 -               SK_IN32(IoC, B0_ISRC, &DWord);
18501 -
18502 -               if ((DWord & IS_HW_ERR) != 0) {
18503 -                       /* read the HW Error Interrupt source */
18504 -                       SK_IN32(IoC, B0_HWE_ISRC, &DWord);
18505 -
18506 -                       if ((DWord & IS_IRQ_SENSOR) != 0) {
18507 -                               /* disable HW Error IRQ */
18508 -                               pAC->GIni.GIValIrqMask &= ~IS_HW_ERR;
18509 +               Byte = 0;
18510 +
18511 +               if (CHIP_ID_YUKON_2(pAC)) {
18512 +                       /* PEX adapters work with different host clock */
18513 +                       if (pAC->GIni.GIChipId == CHIP_ID_YUKON_EC) {
18514 +                               /* Yukon-EC works with 125 MHz host clock */
18515 +                               pAC->GIni.GIHstClkFact = SK_FACT_125;
18516 +                       }
18517 +                       else if (pAC->GIni.GIChipId == CHIP_ID_YUKON_FE) {
18518 +                               /* Yukon-FE works with 100 MHz host clock */
18519 +                               pAC->GIni.GIHstClkFact = SK_FACT_100;
18520 +                       }
18521 +                       else {          /* CHIP_ID_YUKON_XL */
18522 +                               /* all Yukon-2 adapters work with 156 MHz host clock */
18523 +                               pAC->GIni.GIHstClkFact = 2 * SK_FACT_78;
18524 +
18525 +                               if (pAC->GIni.GIChipRev > 1) {
18526 +                                       /* enable bits are inverted */
18527 +                                       Byte = (SK_U8)(Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
18528 +                                               Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
18529 +                                               Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
18530 +                               }
18531                         }
18532 +
18533 +                       pAC->GIni.GIPollTimerVal =
18534 +                               SK_DPOLL_DEF_Y2 * (SK_U32)pAC->GIni.GIHstClkFact / 100;
18535 +
18536 +                       /* set power down bit */
18537 +                       PowerDownBit = PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD;
18538 +
18539 +                       /* disable Core Clock Division, set Clock Select to 0 (Yukon-2) */
18540 +                       SK_OUT32(IoC, B2_Y2_CLK_CTRL, Y2_CLK_DIV_DIS);
18541 +
18542 +                       /* enable PCI & Core Clock, enable clock gating for both Links */
18543 +                       SK_OUT8(IoC, B2_Y2_CLK_GATE, Byte);
18544                 }
18545 -
18546 -               for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
18547 -                       /* set GMAC Link Control reset */
18548 -                       SK_OUT16(IoC, MR_ADDR(i, GMAC_LINK_CTRL), GMLC_RST_SET);
18549 +               else {
18550 +                       /* YUKON adapters work with 78 MHz host clock */
18551 +                       pAC->GIni.GIHstClkFact = SK_FACT_78;
18552 +
18553 +                       pAC->GIni.GIPollTimerVal = SK_DPOLL_MAX;        /* 215 ms */
18554 +
18555 +                       /* read the Interrupt source */
18556 +                       SK_IN32(IoC, B0_ISRC, &DWord);
18557 +
18558 +                       if ((DWord & IS_HW_ERR) != 0) {
18559 +                               /* read the HW Error Interrupt source */
18560 +                               SK_IN32(IoC, B0_HWE_ISRC, &DWord);
18561 +
18562 +                               if ((DWord & IS_IRQ_SENSOR) != 0) {
18563 +                                       /* disable HW Error IRQ */
18564 +                                       pAC->GIni.GIValIrqMask &= ~IS_HW_ERR;
18565 +                               }
18566 +                       }
18567 +                       /* set power down bit */
18568 +                       PowerDownBit = PCI_PHY_COMA;
18569 +               }
18570 +
18571 +               SK_IN32(IoC, PCI_C(pAC, PCI_OUR_REG_1), &DWord);
18572 +
18573 +               DWord &= ~PowerDownBit;
18574 +
18575 +               if (pAC->GIni.GIChipId == CHIP_ID_YUKON_XL && pAC->GIni.GIChipRev > 1) {
18576 +                       /* deassert Low Power for 1st PHY */
18577 +                       DWord |= PCI_Y2_PHY1_COMA;
18578
18579 -                       /* clear GMAC Link Control reset */
18580 -                       SK_OUT16(IoC, MR_ADDR(i, GMAC_LINK_CTRL), GMLC_RST_CLR);
18581 +                       if (pAC->GIni.GIMacsFound > 1) {
18582 +                               /* deassert Low Power for 2nd PHY */
18583 +                               DWord |= PCI_Y2_PHY2_COMA;
18584 +                       }
18585 +               }
18586 +
18587 +               /* Release PHY from PowerDown/COMA Mode */
18588 +               SK_OUT32(IoC, PCI_C(pAC, PCI_OUR_REG_1), DWord);
18589 +
18590 +               if (!pAC->GIni.GIAsfEnabled) {
18591 +
18592 +                       for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
18593 +                               /* set GMAC Link Control reset */
18594 +                               SK_OUT8(IoC, MR_ADDR(i, GMAC_LINK_CTRL), (SK_U8)GMLC_RST_SET);
18595 +
18596 +                               /* clear GMAC Link Control reset */
18597 +                               SK_OUT8(IoC, MR_ADDR(i, GMAC_LINK_CTRL), (SK_U8)GMLC_RST_CLR);
18598 +                       }
18599                 }
18600 -               /* all YU chips work with 78.125 MHz host clock */
18601 -               pAC->GIni.GIHstClkFact = SK_FACT_78;
18602 -
18603 -               pAC->GIni.GIPollTimerVal = SK_DPOLL_MAX;        /* 215 ms */
18604         }
18605  #endif /* YUKON */
18606
18607 -       /* check if 64-bit PCI Slot is present */
18608 -       pAC->GIni.GIPciSlot64 = (SK_BOOL)((CtrlStat & CS_BUS_SLOT_SZ) != 0);
18609 -
18610 -       /* check if 66 MHz PCI Clock is active */
18611 -       pAC->GIni.GIPciClock66 = (SK_BOOL)((CtrlStat & CS_BUS_CLOCK) != 0);
18612 +       SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
18613 +
18614 +       if (!CHIP_ID_YUKON_2(pAC)) {
18615 +               /* this is a conventional PCI bus */
18616 +               pAC->GIni.GIPciBus = SK_PCI_BUS;
18617 +
18618 +               /* check if 64-bit PCI Slot is present */
18619 +               pAC->GIni.GIPciSlot64 = (SK_BOOL)((CtrlStat & CS_BUS_SLOT_SZ) != 0);
18620 +
18621 +               /* check if 66 MHz PCI Clock is active */
18622 +               pAC->GIni.GIPciClock66 = (SK_BOOL)((CtrlStat & CS_BUS_CLOCK) != 0);
18623 +       }
18624
18625         /* read PCI HW Revision Id. */
18626 -       SK_IN8(IoC, PCI_C(PCI_REV_ID), &Byte);
18627 +       SK_IN8(IoC, PCI_C(pAC, PCI_REV_ID), &Byte);
18628         pAC->GIni.GIPciHwRev = Byte;
18629
18630 +       /* read connector type */
18631 +       SK_IN8(IoC, B2_CONN_TYP, &pAC->GIni.GIConTyp);
18632 +
18633         /* read the PMD type */
18634         SK_IN8(IoC, B2_PMD_TYP, &Byte);
18635 -       pAC->GIni.GICopperType = (SK_U8)(Byte == 'T');
18636
18637 -       /* read the PHY type */
18638 +       pAC->GIni.GIPmdTyp = Byte;
18639 +
18640 +       pAC->GIni.GICopperType = (SK_BOOL)(Byte == 'T' || Byte == '1' ||
18641 +               (pAC->GIni.GIYukon2 && !(Byte == 'L' || Byte == 'S')));
18642 +
18643 +       /* read the PHY type (Yukon and Genesis) */
18644         SK_IN8(IoC, B2_E_1, &Byte);
18645
18646         Byte &= 0x0f;   /* the PHY type is stored in the lower nibble */
18647         for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
18648 -
18649 +
18650 +               pPrt = &pAC->GIni.GP[i];
18651 +
18652  #ifdef GENESIS
18653                 if (pAC->GIni.GIGenesis) {
18654                         switch (Byte) {
18655                         case SK_PHY_XMAC:
18656 -                               pAC->GIni.GP[i].PhyAddr = PHY_ADDR_XMAC;
18657 +                               pPrt->PhyAddr = PHY_ADDR_XMAC;
18658                                 break;
18659                         case SK_PHY_BCOM:
18660 -                               pAC->GIni.GP[i].PhyAddr = PHY_ADDR_BCOM;
18661 -                               pAC->GIni.GP[i].PMSCap = (SK_U8)(SK_MS_CAP_AUTO |
18662 +                               pPrt->PhyAddr = PHY_ADDR_BCOM;
18663 +                               pPrt->PMSCap = (SK_U8)(SK_MS_CAP_AUTO |
18664                                         SK_MS_CAP_MASTER | SK_MS_CAP_SLAVE);
18665                                 break;
18666  #ifdef OTHER_PHY
18667                         case SK_PHY_LONE:
18668 -                               pAC->GIni.GP[i].PhyAddr = PHY_ADDR_LONE;
18669 +                               pPrt->PhyAddr = PHY_ADDR_LONE;
18670                                 break;
18671                         case SK_PHY_NAT:
18672 -                               pAC->GIni.GP[i].PhyAddr = PHY_ADDR_NAT;
18673 +                               pPrt->PhyAddr = PHY_ADDR_NAT;
18674                                 break;
18675  #endif /* OTHER_PHY */
18676                         default:
18677 @@ -1722,65 +2430,98 @@
18678                         }
18679                 }
18680  #endif /* GENESIS */
18681 -
18682 +
18683  #ifdef YUKON
18684                 if (pAC->GIni.GIYukon) {
18685 -
18686 -                       if (Byte < (SK_U8)SK_PHY_MARV_COPPER) {
18687 +
18688 +                       if ((Byte < (SK_U8)SK_PHY_MARV_COPPER) &&
18689 +                               pAC->GIni.GIPmdTyp != 'L' && pAC->GIni.GIPmdTyp != 'S') {
18690                                 /* if this field is not initialized */
18691                                 Byte = (SK_U8)SK_PHY_MARV_COPPER;
18692 -
18693 +
18694                                 pAC->GIni.GICopperType = SK_TRUE;
18695                         }
18696 -
18697 -                       pAC->GIni.GP[i].PhyAddr = PHY_ADDR_MARV;
18698 -
18699 +
18700 +                       pPrt->PhyAddr = PHY_ADDR_MARV;
18701 +
18702                         if (pAC->GIni.GICopperType) {
18703
18704 -                               pAC->GIni.GP[i].PLinkSpeedCap = (SK_U8)(SK_LSPEED_CAP_AUTO |
18705 -                                       SK_LSPEED_CAP_10MBPS | SK_LSPEED_CAP_100MBPS |
18706 -                                       SK_LSPEED_CAP_1000MBPS);
18707 -
18708 -                               pAC->GIni.GP[i].PLinkSpeed = (SK_U8)SK_LSPEED_AUTO;
18709 -
18710 -                               pAC->GIni.GP[i].PMSCap = (SK_U8)(SK_MS_CAP_AUTO |
18711 +                               if (pAC->GIni.GIChipId == CHIP_ID_YUKON_FE ||
18712 +                                       (pAC->GIni.GIChipId == CHIP_ID_YUKON_EC &&
18713 +                                       pAC->GIni.GIChipCap == 2)) {
18714 +
18715 +                                       pPrt->PLinkSpeedCap = (SK_U8)(SK_LSPEED_CAP_100MBPS |
18716 +                                               SK_LSPEED_CAP_10MBPS);
18717 +
18718 +                                       pAC->GIni.GIRamSize = 4;
18719 +                               }
18720 +                               else {
18721 +                                       pPrt->PLinkSpeedCap = (SK_U8)(SK_LSPEED_CAP_1000MBPS |
18722 +                                               SK_LSPEED_CAP_100MBPS | SK_LSPEED_CAP_10MBPS |
18723 +                                               SK_LSPEED_CAP_AUTO);
18724 +                               }
18725 +
18726 +                               pPrt->PLinkSpeed = (SK_U8)SK_LSPEED_AUTO;
18727 +
18728 +                               pPrt->PMSCap = (SK_U8)(SK_MS_CAP_AUTO |
18729                                         SK_MS_CAP_MASTER | SK_MS_CAP_SLAVE);
18730                         }
18731                         else {
18732                                 Byte = (SK_U8)SK_PHY_MARV_FIBER;
18733                         }
18734                 }
18735 +
18736 +               /* clear TWSI IRQ */
18737 +               SK_OUT32(IoC, B2_I2C_IRQ, I2C_CLR_IRQ);
18738 +
18739  #endif /* YUKON */
18740 -
18741 -               pAC->GIni.GP[i].PhyType = (int)Byte;
18742 -
18743 +
18744 +               pPrt->PhyType = (int)Byte;
18745 +
18746                 SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
18747 -                       ("PHY type: %d  PHY addr: %04x\n", Byte,
18748 -                       pAC->GIni.GP[i].PhyAddr));
18749 +                       ("PHY type: %d  PHY addr: %04x\n",
18750 +                       Byte, pPrt->PhyAddr));
18751         }
18752 -
18753 +
18754         /* get MAC Type & set function pointers dependent on */
18755  #ifdef GENESIS
18756         if (pAC->GIni.GIGenesis) {
18757 -
18758 +
18759                 pAC->GIni.GIMacType = SK_MAC_XMAC;
18760
18761                 pAC->GIni.GIFunc.pFnMacUpdateStats      = SkXmUpdateStats;
18762                 pAC->GIni.GIFunc.pFnMacStatistic        = SkXmMacStatistic;
18763                 pAC->GIni.GIFunc.pFnMacResetCounter     = SkXmResetCounter;
18764                 pAC->GIni.GIFunc.pFnMacOverflow         = SkXmOverflowStatus;
18765 +#ifdef SK_DIAG
18766 +               pAC->GIni.GIFunc.pFnMacPhyRead          = SkXmPhyRead;
18767 +               pAC->GIni.GIFunc.pFnMacPhyWrite         = SkXmPhyWrite;
18768 +#else  /* SK_DIAG */
18769 +               pAC->GIni.GIFunc.pSkGeSirqIsr           = SkGeYuSirqIsr;
18770 +#endif /* !SK_DIAG */
18771         }
18772  #endif /* GENESIS */
18773 -
18774 +
18775  #ifdef YUKON
18776         if (pAC->GIni.GIYukon) {
18777 -
18778 +
18779                 pAC->GIni.GIMacType = SK_MAC_GMAC;
18780
18781                 pAC->GIni.GIFunc.pFnMacUpdateStats      = SkGmUpdateStats;
18782                 pAC->GIni.GIFunc.pFnMacStatistic        = SkGmMacStatistic;
18783                 pAC->GIni.GIFunc.pFnMacResetCounter     = SkGmResetCounter;
18784                 pAC->GIni.GIFunc.pFnMacOverflow         = SkGmOverflowStatus;
18785 +#ifdef SK_DIAG
18786 +               pAC->GIni.GIFunc.pFnMacPhyRead          = SkGmPhyRead;
18787 +               pAC->GIni.GIFunc.pFnMacPhyWrite         = SkGmPhyWrite;
18788 +#else  /* SK_DIAG */
18789 +               if (CHIP_ID_YUKON_2(pAC)) {
18790 +                       pAC->GIni.GIFunc.pSkGeSirqIsr   = SkYuk2SirqIsr;
18791 +               }
18792 +               else {
18793 +                       pAC->GIni.GIFunc.pSkGeSirqIsr   = SkGeYuSirqIsr;
18794 +               }
18795 +#endif /* !SK_DIAG */
18796
18797  #ifdef SPECIAL_HANDLING
18798                 if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
18799 @@ -1793,7 +2534,9 @@
18800  #endif
18801         }
18802  #endif /* YUKON */
18803 -
18804 +
18805 +       SkGeSetUpSupFeatures(pAC, IoC);
18806 +
18807         return(RetVal);
18808  }      /* SkGeInit1 */
18809
18810 @@ -1814,9 +2557,12 @@
18811   *     nothing
18812   */
18813  static void SkGeInit2(
18814 -SK_AC  *pAC,           /* adapter context */
18815 -SK_IOC IoC)            /* IO context */
18816 +SK_AC  *pAC,           /* Adapter Context */
18817 +SK_IOC IoC)            /* I/O Context */
18818  {
18819 +#ifdef YUKON
18820 +       SK_U16  Word;
18821 +#endif /* YUKON */
18822  #ifdef GENESIS
18823         SK_U32  DWord;
18824  #endif /* GENESIS */
18825 @@ -1850,13 +2596,13 @@
18826                 SkGeInitPktArb(pAC, IoC);
18827         }
18828  #endif /* GENESIS */
18829 -
18830 -#ifdef YUKON
18831 +
18832 +#ifdef xSK_DIAG
18833         if (pAC->GIni.GIYukon) {
18834                 /* start Time Stamp Timer */
18835                 SK_OUT8(IoC, GMAC_TI_ST_CTRL, (SK_U8)GMT_ST_START);
18836         }
18837 -#endif /* YUKON */
18838 +#endif /* SK_DIAG */
18839
18840         /* enable the Tx Arbiters */
18841         for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
18842 @@ -1866,8 +2612,34 @@
18843         /* enable the RAM Interface Arbiter */
18844         SkGeInitRamIface(pAC, IoC);
18845
18846 +#ifdef YUKON
18847 +       if (CHIP_ID_YUKON_2(pAC)) {
18848 +
18849 +               if (pAC->GIni.GIPciBus == SK_PEX_BUS) {
18850 +
18851 +                       SK_IN16(IoC, PCI_C(pAC, PEX_DEV_CTRL), &Word);
18852 +
18853 +                       /* change Max. Read Request Size to 2048 bytes */
18854 +                       Word &= ~PEX_DC_MAX_RRS_MSK;
18855 +                       Word |= PEX_DC_MAX_RD_RQ_SIZE(4);
18856 +
18857 +                       SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
18858 +
18859 +                       SK_OUT16(IoC, PCI_C(pAC, PEX_DEV_CTRL), Word);
18860 +
18861 +                       SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
18862 +               }
18863 +
18864 +               /*
18865 +                * Writing the HW Error Mask Reg. will not generate an IRQ
18866 +                * as long as the B0_IMSK is not set by the driver.
18867 +                */
18868 +               SK_OUT32(IoC, B0_HWE_IMSK, pAC->GIni.GIValHwIrqMask);
18869 +       }
18870 +#endif /* YUKON */
18871  }      /* SkGeInit2 */
18872
18873 +
18874  /******************************************************************************
18875   *
18876   *     SkGeInit() - Initialize the GE Adapter with the specified level.
18877 @@ -1889,7 +2661,7 @@
18878   *                             if Number of MACs > SK_MAX_MACS
18879   *
18880   *                     After returning from Level 0 the adapter
18881 - *                     may be accessed with IO operations.
18882 + *                     may be accessed with I/O operations.
18883   *
18884   *     Level   2:      start the Blink Source Counter
18885   *
18886 @@ -1898,14 +2670,14 @@
18887   *     1:      Number of MACs exceeds SK_MAX_MACS      (after level 1)
18888   *     2:      Adapter not present or not accessible
18889   *     3:      Illegal initialization level
18890 - *     4:      Initialization Level 1 Call missing
18891 + *     4:      Initialization level 1 call missing
18892   *     5:      Unexpected PHY type detected
18893   *     6:      HW self test failed
18894   */
18895  int    SkGeInit(
18896 -SK_AC  *pAC,           /* adapter context */
18897 -SK_IOC IoC,            /* IO context */
18898 -int            Level)          /* initialization level */
18899 +SK_AC  *pAC,           /* Adapter Context */
18900 +SK_IOC IoC,            /* I/O Context */
18901 +int            Level)          /* Initialization Level */
18902  {
18903         int             RetVal;         /* return value */
18904         SK_U32  DWord;
18905 @@ -1920,7 +2692,7 @@
18906                 SkGeInit0(pAC, IoC);
18907                 pAC->GIni.GILevel = SK_INIT_DATA;
18908                 break;
18909 -
18910 +
18911         case SK_INIT_IO:
18912                 /* Initialization Level 1 */
18913                 RetVal = SkGeInit1(pAC, IoC);
18914 @@ -1932,22 +2704,24 @@
18915                 SK_OUT32(IoC, B2_IRQM_INI, SK_TEST_VAL);
18916                 SK_IN32(IoC, B2_IRQM_INI, &DWord);
18917                 SK_OUT32(IoC, B2_IRQM_INI, 0L);
18918 -
18919 +
18920                 if (DWord != SK_TEST_VAL) {
18921                         RetVal = 2;
18922                         break;
18923                 }
18924
18925 +#ifdef DEBUG
18926                 /* check if the number of GIMacsFound matches SK_MAX_MACS */
18927                 if (pAC->GIni.GIMacsFound > SK_MAX_MACS) {
18928                         RetVal = 1;
18929                         break;
18930                 }
18931 +#endif /* DEBUG */
18932
18933                 /* Level 1 successfully passed */
18934                 pAC->GIni.GILevel = SK_INIT_IO;
18935                 break;
18936 -
18937 +
18938         case SK_INIT_RUN:
18939                 /* Initialization Level 2 */
18940                 if (pAC->GIni.GILevel != SK_INIT_IO) {
18941 @@ -1957,12 +2731,13 @@
18942                         RetVal = 4;
18943                         break;
18944                 }
18945 +
18946                 SkGeInit2(pAC, IoC);
18947
18948                 /* Level 2 successfully passed */
18949                 pAC->GIni.GILevel = SK_INIT_RUN;
18950                 break;
18951 -
18952 +
18953         default:
18954                 SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E003, SKERR_HWI_E003MSG);
18955                 RetVal = 3;
18956 @@ -1985,77 +2760,79 @@
18957   *     nothing
18958   */
18959  void SkGeDeInit(
18960 -SK_AC  *pAC,           /* adapter context */
18961 -SK_IOC IoC)            /* IO context */
18962 +SK_AC  *pAC,           /* Adapter Context */
18963 +SK_IOC IoC)            /* I/O Context */
18964  {
18965         int     i;
18966         SK_U16  Word;
18967
18968 -#ifdef SK_PHY_LP_MODE
18969 -       SK_U8   Byte;
18970 +#ifdef SK_PHY_LP_MODE_DEEP_SLEEP
18971         SK_U16  PmCtlSts;
18972 -#endif /* SK_PHY_LP_MODE */
18973 +#endif
18974
18975  #if (!defined(SK_SLIM) && !defined(VCPU))
18976         /* ensure I2C is ready */
18977         SkI2cWaitIrq(pAC, IoC);
18978 -#endif
18979 -
18980 -       /* stop all current transfer activity */
18981 -       for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
18982 -               if (pAC->GIni.GP[i].PState != SK_PRT_STOP &&
18983 -                       pAC->GIni.GP[i].PState != SK_PRT_RESET) {
18984 -
18985 -                       SkGeStopPort(pAC, IoC, i, SK_STOP_ALL, SK_HARD_RST);
18986 -               }
18987 -       }
18988 +#endif
18989
18990 -#ifdef SK_PHY_LP_MODE
18991 -    /*
18992 +#ifdef SK_PHY_LP_MODE_DEEP_SLEEP
18993 +       /*
18994          * for power saving purposes within mobile environments
18995 -        * we set the PHY to coma mode and switch to D3 power state.
18996 +        * we set the PHY to coma mode.
18997          */
18998 -       if (pAC->GIni.GIYukonLite &&
18999 -               pAC->GIni.GIChipRev == CHIP_REV_YU_LITE_A3) {
19000 +#ifdef XXX
19001 +       if (pAC->GIni.GIVauxAvail) {
19002 +               /* switch power to VAUX */
19003 +               SK_OUT8(IoC, B0_POWER_CTRL, (SK_U8)(PC_VAUX_ENA | PC_VCC_ENA |
19004 +                       PC_VAUX_ON | PC_VCC_OFF));
19005 +       }
19006 +#endif /* XXX */
19007 +
19008 +       if (CHIP_ID_YUKON_2(pAC) && /* pAC->GIni.GIMacsFound == 1 && */
19009 +               !pAC->GIni.GIAsfEnabled
19010 +#ifdef XXX
19011 +               || (pAC->GIni.GIYukonLite && pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3)
19012 +#endif /* XXX */
19013 +               ) {
19014
19015                 /* for all ports switch PHY to coma mode */
19016                 for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
19017 -
19018 -                       SkGmEnterLowPowerMode(pAC, IoC, i, PHY_PM_DEEP_SLEEP);
19019 -               }
19020
19021 -               if (pAC->GIni.GIVauxAvail) {
19022 -                       /* switch power to VAUX */
19023 -                       Byte = PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_ON | PC_VCC_OFF;
19024 -
19025 -                       SK_OUT8(IoC, B0_POWER_CTRL, Byte);
19026 +                       (void)SkGmEnterLowPowerMode(pAC, IoC, i, PHY_PM_DEEP_SLEEP);
19027                 }
19028 -
19029 -               /* switch to D3 state */
19030 -               SK_IN16(IoC, PCI_C(PCI_PM_CTL_STS), &PmCtlSts);
19031 -
19032 -               PmCtlSts |= PCI_PM_STATE_D3;
19033 +       }
19034 +#else /* !SK_PHY_LP_MODE_DEEP_SLEEP */
19035
19036 -               SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
19037 +       if (!pAC->GIni.GIAsfEnabled) {
19038 +               /* stop all current transfer activity */
19039 +               for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
19040 +                       if (pAC->GIni.GP[i].PState != SK_PRT_STOP &&
19041 +                               pAC->GIni.GP[i].PState != SK_PRT_RESET) {
19042
19043 -               SK_OUT16(IoC, PCI_C(PCI_PM_CTL_STS), PmCtlSts);
19044 +                               SkGeStopPort(pAC, IoC, i, SK_STOP_ALL, SK_HARD_RST);
19045 +                       }
19046 +               }
19047         }
19048 -#endif /* SK_PHY_LP_MODE */
19049
19050 -       /* Reset all bits in the PCI STATUS register */
19051 +       /* reset all bits in the PCI STATUS register */
19052         /*
19053          * Note: PCI Cfg cycles cannot be used, because they are not
19054          *       available on some platforms after 'boot time'.
19055          */
19056 -       SK_IN16(IoC, PCI_C(PCI_STATUS), &Word);
19057 -
19058 +       SK_IN16(IoC, PCI_C(pAC, PCI_STATUS), &Word);
19059 +
19060         SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
19061 -       SK_OUT16(IoC, PCI_C(PCI_STATUS), (SK_U16)(Word | PCI_ERRBITS));
19062 +
19063 +       SK_OUT16(IoC, PCI_C(pAC, PCI_STATUS), Word | (SK_U16)PCI_ERRBITS);
19064 +
19065         SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
19066
19067 -       /* do the reset, all LEDs are switched off now */
19068 -       SK_OUT8(IoC, B0_CTST, CS_RST_SET);
19069 -
19070 +       if (!pAC->GIni.GIAsfEnabled) {
19071 +               /* set the SW-reset */
19072 +               SK_OUT8(IoC, B0_CTST, CS_RST_SET);
19073 +       }
19074 +#endif /* !SK_PHY_LP_MODE_DEEP_SLEEP */
19075 +
19076         pAC->GIni.GILevel = SK_INIT_DATA;
19077  }      /* SkGeDeInit */
19078
19079 @@ -2089,8 +2866,8 @@
19080   *     2:      The port has to be stopped before it can be initialized again.
19081   */
19082  int SkGeInitPort(
19083 -SK_AC  *pAC,           /* adapter context */
19084 -SK_IOC IoC,            /* IO context */
19085 +SK_AC  *pAC,           /* Adapter Context */
19086 +SK_IOC IoC,            /* I/O Context */
19087  int            Port)           /* Port to configure */
19088  {
19089         SK_GEPORT *pPrt;
19090 @@ -2101,8 +2878,8 @@
19091                 SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E004, SKERR_HWI_E004MSG);
19092                 return(1);
19093         }
19094 -
19095 -       if (pPrt->PState == SK_PRT_INIT || pPrt->PState == SK_PRT_RUN) {
19096 +
19097 +       if (pPrt->PState >= SK_PRT_INIT) {
19098                 SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E005, SKERR_HWI_E005MSG);
19099                 return(2);
19100         }
19101 @@ -2119,29 +2896,29 @@
19102                 SkGeXmitLED(pAC, IoC, MR_ADDR(Port, TX_LED_INI), SK_LED_ENA);
19103                 SkGeXmitLED(pAC, IoC, MR_ADDR(Port, RX_LED_INI), SK_LED_ENA);
19104                 /* The Link LED is initialized by RLMT or Diagnostics itself */
19105 -
19106 +
19107                 SkXmInitMac(pAC, IoC, Port);
19108         }
19109  #endif /* GENESIS */
19110 -
19111 +
19112  #ifdef YUKON
19113         if (pAC->GIni.GIYukon) {
19114
19115                 SkGmInitMac(pAC, IoC, Port);
19116         }
19117  #endif /* YUKON */
19118 -
19119 +
19120         /* do NOT initialize the Link Sync Counter */
19121
19122         SkGeInitMacFifo(pAC, IoC, Port);
19123 -
19124 +
19125         SkGeInitRamBufs(pAC, IoC, Port);
19126 -
19127 +
19128         if (pPrt->PXSQSize != 0) {
19129                 /* enable Force Sync bit if synchronous queue available */
19130                 SK_OUT8(IoC, MR_ADDR(Port, TXA_CTRL), TXA_ENA_FSYNC);
19131         }
19132 -
19133 +
19134         SkGeInitBmu(pAC, IoC, Port);
19135
19136         /* mark port as initialized */
19137 @@ -2149,3 +2926,4 @@
19138
19139         return(0);
19140  }      /* SkGeInitPort */
19141 +
19142 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/skgemib.c linux-2.6.9.new/drivers/net/sk98lin/skgemib.c
19143 --- linux-2.6.9.old/drivers/net/sk98lin/skgemib.c       2004-10-19 05:53:06.000000000 +0800
19144 +++ linux-2.6.9.new/drivers/net/sk98lin/skgemib.c       2006-12-07 14:35:03.000000000 +0800
19145 @@ -2,8 +2,8 @@
19146   *
19147   * Name:       skgemib.c
19148   * Project:    GEnesis, PCI Gigabit Ethernet Adapter
19149 - * Version:    $Revision: 1.11 $
19150 - * Date:       $Date: 2003/09/15 13:38:12 $
19151 + * Version:    $Revision: 2.7 $
19152 + * Date:       $Date: 2004/10/26 12:42:18 $
19153   * Purpose:    Private Network Management Interface Management Database
19154   *
19155   ****************************************************************************/
19156 @@ -251,6 +251,183 @@
19157                 0,
19158                 SK_PNMI_RW, DiagActions, 0},
19159  #endif /* SK_DIAG_SUPPORT */
19160 +#ifdef SK_ASF
19161 +    {OID_SKGE_ASF,
19162 +        0,
19163 +        0,
19164 +        0,
19165 +        SK_PNMI_RW, Asf, 0},
19166 +    {OID_SKGE_ASF_STORE_CONFIG,
19167 +        0,
19168 +        0,
19169 +        0,
19170 +        SK_PNMI_RW, Asf, 0},
19171 +    {OID_SKGE_ASF_ENA,
19172 +        0,
19173 +        0,
19174 +        0,
19175 +        SK_PNMI_RW, Asf, 0},
19176 +    {OID_SKGE_ASF_RETRANS,
19177 +        0,
19178 +        0,
19179 +        0,
19180 +        SK_PNMI_RW, Asf, 0},
19181 +    {OID_SKGE_ASF_RETRANS_INT,
19182 +        0,
19183 +        0,
19184 +        0,
19185 +        SK_PNMI_RW, Asf, 0},
19186 +    {OID_SKGE_ASF_HB_ENA,
19187 +        0,
19188 +        0,
19189 +        0,
19190 +        SK_PNMI_RW, Asf, 0},
19191 +    {OID_SKGE_ASF_HB_INT,
19192 +        0,
19193 +        0,
19194 +        0,
19195 +        SK_PNMI_RW, Asf, 0},
19196 +    {OID_SKGE_ASF_WD_ENA,
19197 +        0,
19198 +        0,
19199 +        0,
19200 +        SK_PNMI_RW, Asf, 0},
19201 +    {OID_SKGE_ASF_WD_TIME,
19202 +        0,
19203 +        0,
19204 +        0,
19205 +        SK_PNMI_RW, Asf, 0},
19206 +    {OID_SKGE_ASF_IP_SOURCE,
19207 +        0,
19208 +        0,
19209 +        0,
19210 +        SK_PNMI_RW, Asf, 0},
19211 +    {OID_SKGE_ASF_MAC_SOURCE,
19212 +        0,
19213 +        0,
19214 +        0,
19215 +        SK_PNMI_RW, Asf, 0},
19216 +    {OID_SKGE_ASF_IP_DEST,
19217 +        0,
19218 +        0,
19219 +        0,
19220 +        SK_PNMI_RW, Asf, 0},
19221 +    {OID_SKGE_ASF_MAC_DEST,
19222 +        0,
19223 +        0,
19224 +        0,
19225 +        SK_PNMI_RW, Asf, 0},
19226 +    {OID_SKGE_ASF_COMMUNITY_NAME,
19227 +        0,
19228 +        0,
19229 +        0,
19230 +        SK_PNMI_RW, Asf, 0},
19231 +    {OID_SKGE_ASF_RSP_ENA,
19232 +        0,
19233 +        0,
19234 +        0,
19235 +        SK_PNMI_RW, Asf, 0},
19236 +    {OID_SKGE_ASF_RETRANS_COUNT_MIN,
19237 +        0,
19238 +        0,
19239 +        0,
19240 +        SK_PNMI_RW, Asf, 0},
19241 +    {OID_SKGE_ASF_RETRANS_COUNT_MAX,
19242 +        0,
19243 +        0,
19244 +        0,
19245 +        SK_PNMI_RW, Asf, 0},
19246 +    {OID_SKGE_ASF_RETRANS_INT_MIN,
19247 +        0,
19248 +        0,
19249 +        0,
19250 +        SK_PNMI_RW, Asf, 0},
19251 +    {OID_SKGE_ASF_RETRANS_INT_MAX,
19252 +        0,
19253 +        0,
19254 +        0,
19255 +        SK_PNMI_RW, Asf, 0},
19256 +    {OID_SKGE_ASF_HB_INT_MIN,
19257 +        0,
19258 +        0,
19259 +        0,
19260 +        SK_PNMI_RW, Asf, 0},
19261 +    {OID_SKGE_ASF_HB_INT_MAX,
19262 +        0,
19263 +        0,
19264 +        0,
19265 +        SK_PNMI_RW, Asf, 0},
19266 +    {OID_SKGE_ASF_WD_TIME_MIN,
19267 +        0,
19268 +        0,
19269 +        0,
19270 +        SK_PNMI_RW, Asf, 0},
19271 +    {OID_SKGE_ASF_WD_TIME_MAX,
19272 +        0,
19273 +        0,
19274 +        0,
19275 +        SK_PNMI_RW, Asf, 0},
19276 +    {OID_SKGE_ASF_HB_CAP,
19277 +        0,
19278 +        0,
19279 +        0,
19280 +        SK_PNMI_RW, Asf, 0},
19281 +    {OID_SKGE_ASF_WD_TIMER_RES,
19282 +        0,
19283 +        0,
19284 +        0,
19285 +        SK_PNMI_RW, Asf, 0},
19286 +    {OID_SKGE_ASF_GUID,
19287 +        0,
19288 +        0,
19289 +        0,
19290 +        SK_PNMI_RW, Asf, 0},
19291 +    {OID_SKGE_ASF_KEY_OP,
19292 +        0,
19293 +        0,
19294 +        0,
19295 +        SK_PNMI_RW, Asf, 0},
19296 +    {OID_SKGE_ASF_KEY_ADM,
19297 +        0,
19298 +        0,
19299 +        0,
19300 +        SK_PNMI_RW, Asf, 0},
19301 +    {OID_SKGE_ASF_KEY_GEN,
19302 +        0,
19303 +        0,
19304 +        0,
19305 +        SK_PNMI_RW, Asf, 0},
19306 +    {OID_SKGE_ASF_CAP,
19307 +        0,
19308 +        0,
19309 +        0,
19310 +        SK_PNMI_RW, Asf, 0},
19311 +    {OID_SKGE_ASF_PAR_1,
19312 +        0,
19313 +        0,
19314 +        0,
19315 +        SK_PNMI_RW, Asf, 0},
19316 +    {OID_SKGE_ASF_OVERALL_OID,
19317 +        0,
19318 +        0,
19319 +        0,
19320 +        SK_PNMI_RW, Asf, 0},
19321 +    {OID_SKGE_ASF_FWVER_OID,
19322 +        0,
19323 +        0,
19324 +        0,
19325 +        SK_PNMI_RO, Asf, 0},
19326 +    {OID_SKGE_ASF_ACPI_OID,
19327 +        0,
19328 +        0,
19329 +        0,
19330 +        SK_PNMI_RO, Asf, 0},
19331 +    {OID_SKGE_ASF_SMBUS_OID,
19332 +        0,
19333 +        0,
19334 +        0,
19335 +        SK_PNMI_RO, Asf, 0},
19336 +#endif /* SK_ASF */
19337         {OID_SKGE_MDB_VERSION,
19338                 1,
19339                 0,
19340 @@ -1073,6 +1250,11 @@
19341                 0,
19342                 0,
19343                 SK_PNMI_RO, Vct, 0},
19344 +       {OID_SKGE_VCT_CAPABILITIES,
19345 +               0,
19346 +               0,
19347 +               0,
19348 +               SK_PNMI_RO, Vct, 0},
19349         {OID_SKGE_BOARDLEVEL,
19350                 0,
19351                 0,
19352 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/skgepnmi.c linux-2.6.9.new/drivers/net/sk98lin/skgepnmi.c
19353 --- linux-2.6.9.old/drivers/net/sk98lin/skgepnmi.c      2004-10-19 05:54:40.000000000 +0800
19354 +++ linux-2.6.9.new/drivers/net/sk98lin/skgepnmi.c      2006-12-07 14:35:03.000000000 +0800
19355 @@ -1,9 +1,9 @@
19356  /*****************************************************************************
19357   *
19358   * Name:       skgepnmi.c
19359 - * Project:    GEnesis, PCI Gigabit Ethernet Adapter
19360 - * Version:    $Revision: 1.111 $
19361 - * Date:       $Date: 2003/09/15 13:35:35 $
19362 + * Project:    Gigabit Ethernet Adapters, PNMI-Module
19363 + * Version:    $Revision: 2.21 $
19364 + * Date:       $Date: 2005/05/11 11:50:12 $
19365   * Purpose:    Private Network Management Interface
19366   *
19367   ****************************************************************************/
19368 @@ -22,11 +22,10 @@
19369   *
19370   ******************************************************************************/
19371
19372 -
19373 -#ifndef _lint
19374 +#if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
19375  static const char SysKonnectFileId[] =
19376 -       "@(#) $Id: skgepnmi.c,v 1.111 2003/09/15 13:35:35 tschilli Exp $ (C) Marvell.";
19377 -#endif /* !_lint */
19378 +       "@(#) $Id: skgepnmi.c,v 2.21 2005/05/11 11:50:12 tschilli Exp $ (C) Marvell.";
19379 +#endif
19380
19381  #include "h/skdrv1st.h"
19382  #include "h/sktypes.h"
19383 @@ -38,12 +37,14 @@
19384  #include "h/skcsum.h"
19385  #include "h/skvpd.h"
19386  #include "h/skgehw.h"
19387 +#include "h/sky2le.h"
19388  #include "h/skgeinit.h"
19389  #include "h/skdrv2nd.h"
19390  #include "h/skgepnm2.h"
19391  #ifdef SK_POWER_MGMT
19392  #include "h/skgepmgt.h"
19393 -#endif
19394 +#endif /* SK_POWER_MGMT */
19395 +
19396  /* defines *******************************************************************/
19397
19398  #ifndef DEBUG
19399 @@ -72,7 +73,6 @@
19400  int SkPnmiGenIoctl(SK_AC *pAC, SK_IOC IoC, void * pBuf,
19401         unsigned int * pLen, SK_U32 NetIndex);
19402
19403 -
19404  /*
19405   * Private Function prototypes
19406   */
19407 @@ -112,6 +112,12 @@
19408  PNMI_STATIC int Vct(SK_AC *pAC, SK_IOC IoC, int Action, SK_U32 Id, char *pBuf,
19409         unsigned int *pLen, SK_U32 Instance, unsigned int TableIndex, SK_U32 NetIndex);
19410  PNMI_STATIC void CheckVctStatus(SK_AC *, SK_IOC, char *, SK_U32, SK_U32);
19411 +PNMI_STATIC void VctGetResults(SK_AC *, SK_IOC, SK_U32);
19412 +#ifdef SK_ASF
19413 +PNMI_STATIC int Asf(SK_AC *pAC, SK_IOC IoC, int action, SK_U32 Id,
19414 +    char *pBuf, unsigned int *pLen, SK_U32 Instance,
19415 +    unsigned int TableIndex, SK_U32 NetIndex);
19416 +#endif /* SK_ASF */
19417
19418  /*
19419   * Table to correlate OID with handler function and index to
19420 @@ -353,17 +359,13 @@
19421   *     Always 0
19422   */
19423  int SkPnmiInit(
19424 -SK_AC *pAC,            /* Pointer to adapter context */
19425 -SK_IOC IoC,            /* IO context handle */
19426 -int Level)             /* Initialization level */
19427 +SK_AC  *pAC,           /* Pointer to adapter context */
19428 +SK_IOC IoC,            /* IO context handle */
19429 +int            Level)          /* Initialization level */
19430  {
19431         unsigned int    PortMax;        /* Number of ports */
19432         unsigned int    PortIndex;      /* Current port index in loop */
19433 -       SK_U16          Val16;          /* Multiple purpose 16 bit variable */
19434 -       SK_U8           Val8;           /* Mulitple purpose 8 bit variable */
19435 -       SK_EVPARA       EventParam;     /* Event struct for timer event */
19436 -       SK_PNMI_VCT     *pVctBackupData;
19437 -
19438 +       SK_EVPARA               EventParam;     /* Event struct for timer event */
19439
19440         SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
19441                 ("PNMI: SkPnmiInit: Called, level=%d\n", Level));
19442 @@ -372,9 +374,11 @@
19443
19444         case SK_INIT_DATA:
19445                 SK_MEMSET((char *)&pAC->Pnmi, 0, sizeof(pAC->Pnmi));
19446 +
19447                 pAC->Pnmi.TrapBufFree = SK_PNMI_TRAP_QUEUE_LEN;
19448                 pAC->Pnmi.StartUpTime = SK_PNMI_HUNDREDS_SEC(SkOsGetTime(pAC));
19449                 pAC->Pnmi.RlmtChangeThreshold = SK_PNMI_DEF_RLMT_CHG_THRES;
19450 +
19451                 for (PortIndex = 0; PortIndex < SK_MAX_MACS; PortIndex ++) {
19452
19453                         pAC->Pnmi.Port[PortIndex].ActiveFlag = SK_FALSE;
19454 @@ -408,51 +412,42 @@
19455                 break;
19456
19457         case SK_INIT_IO:
19458 -               /*
19459 -                * Reset MAC counters
19460 -                */
19461 +
19462 +               /* Reset MAC counters. */
19463                 PortMax = pAC->GIni.GIMacsFound;
19464
19465                 for (PortIndex = 0; PortIndex < PortMax; PortIndex ++) {
19466
19467                         pAC->GIni.GIFunc.pFnMacResetCounter(pAC, IoC, PortIndex);
19468                 }
19469 -
19470 +
19471                 /* Initialize DSP variables for Vct() to 0xff => Never written! */
19472                 for (PortIndex = 0; PortIndex < PortMax; PortIndex ++) {
19473                         pAC->GIni.GP[PortIndex].PCableLen = 0xff;
19474 -                       pVctBackupData = &pAC->Pnmi.VctBackup[PortIndex];
19475 -                       pVctBackupData->PCableLen = 0xff;
19476 +                       pAC->Pnmi.VctBackup[PortIndex].CableLen = 0xff;
19477                 }
19478 -
19479 -               /*
19480 -                * Get pci bus speed
19481 -                */
19482 -               SK_IN16(IoC, B0_CTST, &Val16);
19483 -               if ((Val16 & CS_BUS_CLOCK) == 0) {
19484
19485 -                       pAC->Pnmi.PciBusSpeed = 33;
19486 +               /* Get PCI bus speed. */
19487 +               if (pAC->GIni.GIPciClock66) {
19488 +
19489 +                       pAC->Pnmi.PciBusSpeed = 66;
19490                 }
19491                 else {
19492 -                       pAC->Pnmi.PciBusSpeed = 66;
19493 +                       pAC->Pnmi.PciBusSpeed = 33;
19494                 }
19495
19496 -               /*
19497 -                * Get pci bus width
19498 -                */
19499 -               SK_IN16(IoC, B0_CTST, &Val16);
19500 -               if ((Val16 & CS_BUS_SLOT_SZ) == 0) {
19501 +               /* Get PCI bus width. */
19502 +               if (pAC->GIni.GIPciSlot64) {
19503
19504 -                       pAC->Pnmi.PciBusWidth = 32;
19505 +                       pAC->Pnmi.PciBusWidth = 64;
19506                 }
19507                 else {
19508 -                       pAC->Pnmi.PciBusWidth = 64;
19509 +                       pAC->Pnmi.PciBusWidth = 32;
19510                 }
19511
19512 -               /*
19513 -                * Get chipset
19514 -                */
19515 +               /* Get chipset. */
19516                 switch (pAC->GIni.GIChipId) {
19517 +
19518                 case CHIP_ID_GENESIS:
19519                         pAC->Pnmi.Chipset = SK_PNMI_CHIPSET_XMAC;
19520                         break;
19521 @@ -460,58 +455,52 @@
19522                 case CHIP_ID_YUKON:
19523                         pAC->Pnmi.Chipset = SK_PNMI_CHIPSET_YUKON;
19524                         break;
19525 +\r
19526 +               case CHIP_ID_YUKON_LITE:\r
19527 +                       pAC->Pnmi.Chipset = SK_PNMI_CHIPSET_YUKON_LITE;\r
19528 +                       break;\r
19529 +\r
19530 +               case CHIP_ID_YUKON_LP:\r
19531 +                       pAC->Pnmi.Chipset = SK_PNMI_CHIPSET_YUKON_LP;\r
19532 +                       break;\r
19533 +\r
19534 +               case CHIP_ID_YUKON_XL:\r
19535 +                       pAC->Pnmi.Chipset = SK_PNMI_CHIPSET_YUKON_XL;\r
19536 +                       break;\r
19537 +\r
19538 +               case CHIP_ID_YUKON_EC:\r
19539 +                       pAC->Pnmi.Chipset = SK_PNMI_CHIPSET_YUKON_EC;\r
19540 +                       break;\r
19541 +\r
19542 +               case CHIP_ID_YUKON_FE:\r
19543 +                       pAC->Pnmi.Chipset = SK_PNMI_CHIPSET_YUKON_FE;\r
19544 +                       break;\r
19545
19546                 default:
19547                         break;
19548                 }
19549
19550 -               /*
19551 -                * Get PMD and DeviceType
19552 -                */
19553 -               SK_IN8(IoC, B2_PMD_TYP, &Val8);
19554 -               switch (Val8) {
19555 +               /* Get PMD and Device Type. */
19556 +               switch (pAC->GIni.GIPmdTyp) {
19557 +
19558                 case 'S':
19559                         pAC->Pnmi.PMD = 3;
19560 -                       if (pAC->GIni.GIMacsFound > 1) {
19561 -
19562 -                               pAC->Pnmi.DeviceType = 0x00020002;
19563 -                       }
19564 -                       else {
19565 -                               pAC->Pnmi.DeviceType = 0x00020001;
19566 -                       }
19567 +                       pAC->Pnmi.DeviceType = 0x00020001;
19568                         break;
19569
19570                 case 'L':
19571                         pAC->Pnmi.PMD = 2;
19572 -                       if (pAC->GIni.GIMacsFound > 1) {
19573 -
19574 -                               pAC->Pnmi.DeviceType = 0x00020004;
19575 -                       }
19576 -                       else {
19577 -                               pAC->Pnmi.DeviceType = 0x00020003;
19578 -                       }
19579 +                       pAC->Pnmi.DeviceType = 0x00020003;
19580                         break;
19581
19582                 case 'C':
19583                         pAC->Pnmi.PMD = 4;
19584 -                       if (pAC->GIni.GIMacsFound > 1) {
19585 -
19586 -                               pAC->Pnmi.DeviceType = 0x00020006;
19587 -                       }
19588 -                       else {
19589 -                               pAC->Pnmi.DeviceType = 0x00020005;
19590 -                       }
19591 +                       pAC->Pnmi.DeviceType = 0x00020005;
19592                         break;
19593
19594                 case 'T':
19595                         pAC->Pnmi.PMD = 5;
19596 -                       if (pAC->GIni.GIMacsFound > 1) {
19597 -
19598 -                               pAC->Pnmi.DeviceType = 0x00020008;
19599 -                       }
19600 -                       else {
19601 -                               pAC->Pnmi.DeviceType = 0x00020007;
19602 -                       }
19603 +                       pAC->Pnmi.DeviceType = 0x00020007;
19604                         break;
19605
19606                 default :
19607 @@ -520,11 +509,14 @@
19608                         break;
19609                 }
19610
19611 -               /*
19612 -                * Get connector
19613 -                */
19614 -               SK_IN8(IoC, B2_CONN_TYP, &Val8);
19615 -               switch (Val8) {
19616 +               if (pAC->GIni.GIMacsFound > 1) {
19617 +
19618 +                       pAC->Pnmi.DeviceType++;
19619 +               }
19620 +
19621 +               /* Get connector type. */
19622 +               switch (pAC->GIni.GIConTyp) {
19623 +
19624                 case 'C':
19625                         pAC->Pnmi.Connector = 2;
19626                         break;
19627 @@ -552,17 +544,17 @@
19628                 break;
19629
19630         case SK_INIT_RUN:
19631 -               /*
19632 -                * Start timer for RLMT change counter
19633 -                */
19634 +
19635 +               /* Start timer for RLMT change counter. */
19636                 SK_MEMSET((char *)&EventParam, 0, sizeof(EventParam));
19637 +
19638                 SkTimerStart(pAC, IoC, &pAC->Pnmi.RlmtChangeEstimate.EstTimer,
19639 -                       28125000, SKGE_PNMI, SK_PNMI_EVT_CHG_EST_TIMER,
19640 +                       SK_PNMI_EVT_TIMER_CHECK, SKGE_PNMI, SK_PNMI_EVT_CHG_EST_TIMER,
19641                         EventParam);
19642                 break;
19643
19644         default:
19645 -               break; /* Nothing todo */
19646 +               break; /* Nothing to do. */
19647         }
19648
19649         return (0);
19650 @@ -642,7 +634,6 @@
19651                 ("PNMI: SkPnmiPreSetVar: Called, Id=0x%x, BufLen=%d, Instance=%d, NetIndex=%d\n",
19652                         Id, *pLen, Instance, NetIndex));
19653
19654 -
19655         return (PnmiVar(pAC, IoC, SK_PNMI_PRESET, Id, (char *)pBuf, pLen,
19656                 Instance, NetIndex));
19657  }
19658 @@ -724,7 +715,6 @@
19659         unsigned int    TmpLen;
19660         char            KeyArr[SK_PNMI_VPD_ENTRIES][SK_PNMI_VPD_KEY_SIZE];
19661
19662 -
19663         SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
19664                 ("PNMI: SkPnmiGetStruct: Called, BufLen=%d, NetIndex=%d\n",
19665                         *pLen, NetIndex));
19666 @@ -733,22 +723,19 @@
19667
19668                 if (*pLen >= SK_PNMI_MIN_STRUCT_SIZE) {
19669
19670 -                       SK_PNMI_SET_STAT(pBuf, SK_PNMI_ERR_TOO_SHORT,
19671 -                               (SK_U32)(-1));
19672 +                       SK_PNMI_SET_STAT(pBuf, SK_PNMI_ERR_TOO_SHORT, (SK_U32)(-1));
19673                 }
19674
19675                 *pLen = SK_PNMI_STRUCT_SIZE;
19676                 return (SK_PNMI_ERR_TOO_SHORT);
19677         }
19678
19679 -    /*
19680 -     * Check NetIndex
19681 -     */
19682 +       /* Check NetIndex. */
19683         if (NetIndex >= pAC->Rlmt.NumNets) {
19684                 return (SK_PNMI_ERR_UNKNOWN_NET);
19685         }
19686
19687 -       /* Update statistic */
19688 +       /* Update statistics. */
19689         SK_PNMI_CHECKFLAGS("SkPnmiGetStruct: On call");
19690
19691         if ((Ret = MacUpdate(pAC, IoC, 0, pAC->GIni.GIMacsFound - 1)) !=
19692 @@ -773,15 +760,12 @@
19693                 return (Ret);
19694         }
19695
19696 -       /*
19697 -        * Increment semaphores to indicate that an update was
19698 -        * already done
19699 -        */
19700 +       /* Increment semaphores to indicate that an update was already done. */
19701         pAC->Pnmi.MacUpdatedFlag ++;
19702         pAC->Pnmi.RlmtUpdatedFlag ++;
19703         pAC->Pnmi.SirqUpdatedFlag ++;
19704
19705 -       /* Get vpd keys for instance calculation */
19706 +       /* Get VPD keys for instance calculation. */
19707         Ret = GetVpdKeyArr(pAC, IoC, &KeyArr[0][0], sizeof(KeyArr), &TmpLen);
19708         if (Ret != SK_PNMI_ERR_OK) {
19709
19710 @@ -795,13 +779,13 @@
19711                 return (SK_PNMI_ERR_GENERAL);
19712         }
19713
19714 -       /* Retrieve values */
19715 +       /* Retrieve values. */
19716         SK_MEMSET((char *)pBuf, 0, SK_PNMI_STRUCT_SIZE);
19717 +
19718         for (TableIndex = 0; TableIndex < ID_TABLE_SIZE; TableIndex ++) {
19719
19720                 InstanceNo = IdTable[TableIndex].InstanceNo;
19721 -               for (InstanceCnt = 1; InstanceCnt <= InstanceNo;
19722 -                       InstanceCnt ++) {
19723 +               for (InstanceCnt = 1; InstanceCnt <= InstanceNo; InstanceCnt ++) {
19724
19725                         DstOffset = IdTable[TableIndex].Offset +
19726                                 (InstanceCnt - 1) *
19727 @@ -998,7 +982,6 @@
19728         unsigned int    PhysPortIndex;
19729      unsigned int       MaxNetNumber;
19730         int                     CounterIndex;
19731 -       int                     Ret;
19732         SK_U16          MacStatus;
19733         SK_U64          OverflowStatus;
19734         SK_U64          Mask;
19735 @@ -1012,12 +995,7 @@
19736         SK_U64          Delta;
19737         SK_PNMI_ESTIMATE *pEst;
19738         SK_U32          NetIndex;
19739 -       SK_GEPORT       *pPrt;
19740 -       SK_PNMI_VCT     *pVctBackupData;
19741         SK_U32          RetCode;
19742 -       int             i;
19743 -       SK_U32          CableLength;
19744 -
19745
19746  #ifdef DEBUG
19747         if (Event != SK_PNMI_EVT_XMAC_RESET) {
19748 @@ -1048,9 +1026,7 @@
19749  #endif /* DEBUG */
19750                 OverflowStatus = 0;
19751
19752 -               /*
19753 -                * Check which source caused an overflow interrupt.
19754 -                */
19755 +               /* Check which source caused an overflow interrupt. */
19756                 if ((pAC->GIni.GIFunc.pFnMacOverflow(pAC, IoC, PhysPortIndex,
19757                                 MacStatus, &OverflowStatus) != 0) ||
19758                         (OverflowStatus == 0)) {
19759 @@ -1068,7 +1044,6 @@
19760
19761                         Mask = (SK_U64)1 << CounterIndex;
19762                         if ((OverflowStatus & Mask) == 0) {
19763 -
19764                                 continue;
19765                         }
19766
19767 @@ -1100,9 +1075,7 @@
19768                         case SK_PNMI_HRX_IRLENGTH:
19769                         case SK_PNMI_HRX_RESERVED:
19770
19771 -                       /*
19772 -                        * the following counters aren't be handled (id > 63)
19773 -                        */
19774 +                       /* The following counters aren't be handled (id > 63). */
19775                         case SK_PNMI_HTX_SYNC:
19776                         case SK_PNMI_HTX_SYNC_OCTET:
19777                                 break;
19778 @@ -1189,7 +1162,7 @@
19779                 if ((unsigned int)Param.Para64 >= (unsigned int)pAC->I2c.MaxSens) {
19780
19781                         SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_CTRL,
19782 -                               ("PNMI: ERR: SkPnmiEvent: SK_PNMI_EVT_SEN_ERR_UPP parameter wrong, SensorIndex=%d\n",
19783 +                               ("PNMI: ERR: SK_PNMI_EVT_SEN_ERR_UPP parameter wrong, SensorIndex=%d\n",
19784                                 (unsigned int)Param.Para64));
19785                         return (0);
19786                 }
19787 @@ -1208,16 +1181,14 @@
19788         case SK_PNMI_EVT_CHG_EST_TIMER:
19789                 /*
19790                  * Calculate port switch average on a per hour basis
19791 -                *   Time interval for check       : 28125 ms
19792 +                *   Time interval for check       : 28125 ms (SK_PNMI_EVT_TIMER_CHECK)
19793                  *   Number of values for average  : 8
19794                  *
19795                  * Be careful in changing these values, on change check
19796                  *   - typedef of SK_PNMI_ESTIMATE (Size of EstValue
19797                  *     array one less than value number)
19798                  *   - Timer initialization SkTimerStart() in SkPnmiInit
19799 -                *   - Delta value below must be multiplicated with
19800 -                *     power of 2
19801 -                *
19802 +                *   - Delta value below must be multiplicated with power of 2
19803                  */
19804                 pEst = &pAC->Pnmi.RlmtChangeEstimate;
19805                 CounterIndex = pEst->EstValueIndex + 1;
19806 @@ -1240,7 +1211,7 @@
19807                         Delta = NewestValue - OldestValue;
19808                 }
19809                 else {
19810 -                       /* Overflow situation */
19811 +                       /* Overflow situation. */
19812                         Delta = (SK_U64)(0 - OldestValue) + NewestValue;
19813                 }
19814
19815 @@ -1266,8 +1237,9 @@
19816                 }
19817
19818                 SK_MEMSET((char *)&EventParam, 0, sizeof(EventParam));
19819 +
19820                 SkTimerStart(pAC, IoC, &pAC->Pnmi.RlmtChangeEstimate.EstTimer,
19821 -                       28125000, SKGE_PNMI, SK_PNMI_EVT_CHG_EST_TIMER,
19822 +                       SK_PNMI_EVT_TIMER_CHECK, SKGE_PNMI, SK_PNMI_EVT_CHG_EST_TIMER,
19823                         EventParam);
19824                 break;
19825
19826 @@ -1311,29 +1283,25 @@
19827                                 (unsigned int)Param.Para64));
19828                         return (0);
19829                 }
19830 -#endif
19831 +#endif /* DEBUG */
19832 +
19833                 PhysPortIndex = (unsigned int)Param.Para64;
19834
19835 -               /*
19836 -                * Update XMAC statistic to get fresh values
19837 -                */
19838 -               Ret = MacUpdate(pAC, IoC, 0, pAC->GIni.GIMacsFound - 1);
19839 -               if (Ret != SK_PNMI_ERR_OK) {
19840 +               /* Update XMAC statistic to get fresh values. */
19841 +               if (MacUpdate(pAC, IoC, 0, pAC->GIni.GIMacsFound - 1) !=
19842 +                       SK_PNMI_ERR_OK) {
19843
19844                         SK_PNMI_CHECKFLAGS("SkPnmiEvent: On return");
19845                         return (0);
19846                 }
19847 -               /*
19848 -                * Increment semaphore to indicate that an update was
19849 -                * already done
19850 -                */
19851 +
19852 +               /* Increment semaphore to indicate that an update was already done. */
19853                 pAC->Pnmi.MacUpdatedFlag ++;
19854
19855                 for (CounterIndex = 0; CounterIndex < SK_PNMI_MAX_IDX;
19856                         CounterIndex ++) {
19857
19858                         if (!StatAddr[CounterIndex][MacType].GetOffset) {
19859 -
19860                                 continue;
19861                         }
19862
19863 @@ -1366,14 +1334,15 @@
19864                 QueueRlmtPortTrap(pAC, OID_SKGE_TRAP_RLMT_PORT_UP, PhysPortIndex);
19865                 (void)SK_DRIVER_SENDEVENT(pAC, IoC);
19866
19867 -               /* Bugfix for XMAC errata (#10620)*/
19868 +               /* Bugfix for XMAC errata (#10620). */
19869                 if (MacType == SK_MAC_XMAC) {
19870 -                       /* Add incremental difference to offset (#10620)*/
19871 +                       /* Add incremental difference to offset (#10620). */
19872                         (void)pAC->GIni.GIFunc.pFnMacStatistic(pAC, IoC, PhysPortIndex,
19873                                 XM_RXE_SHT_ERR, &Val32);
19874
19875                         Value = (((SK_U64)pAC->Pnmi.Port[PhysPortIndex].
19876                                  CounterHigh[SK_PNMI_HRX_SHORTS] << 32) | (SK_U64)Val32);
19877 +
19878                         pAC->Pnmi.Port[PhysPortIndex].CounterOffset[SK_PNMI_HRX_SHORTS] +=
19879                                 Value - pAC->Pnmi.Port[PhysPortIndex].RxShortZeroMark;
19880                 }
19881 @@ -1403,7 +1372,7 @@
19882                 QueueRlmtPortTrap(pAC, OID_SKGE_TRAP_RLMT_PORT_DOWN, PhysPortIndex);
19883                 (void)SK_DRIVER_SENDEVENT(pAC, IoC);
19884
19885 -               /* Bugfix #10620 - get zero level for incremental difference */
19886 +               /* Bugfix #10620 - get zero level for incremental difference. */
19887                 if (MacType == SK_MAC_XMAC) {
19888
19889                         (void)pAC->GIni.GIFunc.pFnMacStatistic(pAC, IoC, PhysPortIndex,
19890 @@ -1435,17 +1404,13 @@
19891                 }
19892  #endif /* DEBUG */
19893
19894 -               /*
19895 -                * For now, ignore event if NetIndex != 0.
19896 -                */
19897 +               /* For now, ignore event if NetIndex != 0. */
19898                 if (Param.Para32[1] != 0) {
19899
19900                         return (0);
19901                 }
19902
19903 -               /*
19904 -                * Nothing to do if port is already inactive
19905 -                */
19906 +               /* Nothing to do if port is already inactive. */
19907                 if (!pAC->Pnmi.Port[PhysPortIndex].ActiveFlag) {
19908
19909                         return (0);
19910 @@ -1476,7 +1441,6 @@
19911                         CounterIndex ++) {
19912
19913                         if (!StatAddr[CounterIndex][MacType].GetOffset) {
19914 -
19915                                 continue;
19916                         }
19917
19918 @@ -1485,9 +1449,7 @@
19919                         pAC->Pnmi.VirtualCounterOffset[CounterIndex] += Value;
19920                 }
19921
19922 -               /*
19923 -                * Set port to inactive
19924 -                */
19925 +               /* Set port to inactive. */
19926                 pAC->Pnmi.Port[PhysPortIndex].ActiveFlag = SK_FALSE;
19927
19928                 pAC->Pnmi.MacUpdatedFlag --;
19929 @@ -1513,25 +1475,19 @@
19930                 }
19931  #endif /* DEBUG */
19932
19933 -               /*
19934 -                * For now, ignore event if NetIndex != 0.
19935 -                */
19936 +               /* For now, ignore event if NetIndex != 0. */
19937                 if (Param.Para32[1] != 0) {
19938
19939                         return (0);
19940                 }
19941
19942 -               /*
19943 -                * Nothing to do if port is already active
19944 -                */
19945 +               /* Nothing to do if port is already inactive. */
19946                 if (pAC->Pnmi.Port[PhysPortIndex].ActiveFlag) {
19947
19948                         return (0);
19949                 }
19950
19951 -               /*
19952 -                * Statistic maintenance
19953 -                */
19954 +               /* Statistic maintenance. */
19955                 pAC->Pnmi.RlmtChangeCts ++;
19956                 pAC->Pnmi.RlmtChangeTime = SK_PNMI_HUNDREDS_SEC(SkOsGetTime(pAC));
19957
19958 @@ -1565,7 +1521,6 @@
19959                         CounterIndex ++) {
19960
19961                         if (!StatAddr[CounterIndex][MacType].GetOffset) {
19962 -
19963                                 continue;
19964                         }
19965
19966 @@ -1574,16 +1529,14 @@
19967                         pAC->Pnmi.VirtualCounterOffset[CounterIndex] -= Value;
19968                 }
19969
19970 -               /* Set port to active */
19971 +               /* Set port to active. */
19972                 pAC->Pnmi.Port[PhysPortIndex].ActiveFlag = SK_TRUE;
19973
19974                 pAC->Pnmi.MacUpdatedFlag --;
19975                 break;
19976
19977         case SK_PNMI_EVT_RLMT_SEGMENTATION:
19978 -               /*
19979 -                * Para.Para32[0] contains the NetIndex.
19980 -                */
19981 +               /* Para.Para32[0] contains the NetIndex. */
19982
19983                 /*
19984                  * Store a trap message in the trap buffer and generate an event for
19985 @@ -1598,71 +1551,53 @@
19986                  *  Param.Para32[0] contains the number of Nets.
19987                  *  Param.Para32[1] is reserved, contains -1.
19988                  */
19989 -           /*
19990 -        * Check number of nets
19991 -                */
19992 +           /* Check number of nets. */
19993                 MaxNetNumber = pAC->GIni.GIMacsFound;
19994 -               if (((unsigned int)Param.Para32[0] < 1)
19995 -                       || ((unsigned int)Param.Para32[0] > MaxNetNumber)) {
19996 +
19997 +               if (((unsigned int)Param.Para32[0] < 1) ||
19998 +                       ((unsigned int)Param.Para32[0] > MaxNetNumber)) {
19999 +
20000                         return (SK_PNMI_ERR_UNKNOWN_NET);
20001                 }
20002
20003 -        if ((unsigned int)Param.Para32[0] == 1) { /* single net mode */
20004 +        if ((unsigned int)Param.Para32[0] == 1) { /* SingleNet mode. */
20005                 pAC->Pnmi.DualNetActiveFlag = SK_FALSE;
20006          }
20007 -        else { /* dual net mode */
20008 +        else { /* DualNet mode. */
20009                 pAC->Pnmi.DualNetActiveFlag = SK_TRUE;
20010          }
20011          break;
20012
20013      case SK_PNMI_EVT_VCT_RESET:
20014                 PhysPortIndex = Param.Para32[0];
20015 -               pPrt = &pAC->GIni.GP[PhysPortIndex];
20016 -               pVctBackupData = &pAC->Pnmi.VctBackup[PhysPortIndex];
20017
20018                 if (pAC->Pnmi.VctStatus[PhysPortIndex] & SK_PNMI_VCT_PENDING) {
20019 +
20020                         RetCode = SkGmCableDiagStatus(pAC, IoC, PhysPortIndex, SK_FALSE);
20021 +
20022                         if (RetCode == 2) {
20023                                 /*
20024                                  * VCT test is still running.
20025                                  * Start VCT timer counter again.
20026                                  */
20027 -                               SK_MEMSET((char *) &Param, 0, sizeof(Param));
20028 +                               SK_MEMSET((char *)&Param, 0, sizeof(Param));
20029 +
20030                                 Param.Para32[0] = PhysPortIndex;
20031                                 Param.Para32[1] = -1;
20032 -                               SkTimerStart(pAC, IoC,
20033 -                                       &pAC->Pnmi.VctTimeout[PhysPortIndex].VctTimer,
20034 -                               4000000, SKGE_PNMI, SK_PNMI_EVT_VCT_RESET, Param);
20035 +
20036 +                               SkTimerStart(pAC, IoC, &pAC->Pnmi.VctTimeout[PhysPortIndex],
20037 +                                       SK_PNMI_VCT_TIMER_CHECK, SKGE_PNMI, SK_PNMI_EVT_VCT_RESET, Param);
20038 +
20039                                 break;
20040                         }
20041 -                       pAC->Pnmi.VctStatus[PhysPortIndex] &= ~SK_PNMI_VCT_PENDING;
20042 -                       pAC->Pnmi.VctStatus[PhysPortIndex] |=
20043 -                               (SK_PNMI_VCT_NEW_VCT_DATA | SK_PNMI_VCT_TEST_DONE);
20044
20045 -                       /* Copy results for later use to PNMI struct. */
20046 -                       for (i = 0; i < 4; i++)  {
20047 -                               if (pPrt->PMdiPairSts[i] == SK_PNMI_VCT_NORMAL_CABLE) {
20048 -                                       if ((pPrt->PMdiPairLen[i] > 35) &&
20049 -                                               (pPrt->PMdiPairLen[i] < 0xff)) {
20050 -                                               pPrt->PMdiPairSts[i] = SK_PNMI_VCT_IMPEDANCE_MISMATCH;
20051 -                                       }
20052 -                               }
20053 -                               if ((pPrt->PMdiPairLen[i] > 35) &&
20054 -                                       (pPrt->PMdiPairLen[i] != 0xff)) {
20055 -                                       CableLength = 1000 *
20056 -                                               (((175 * pPrt->PMdiPairLen[i]) / 210) - 28);
20057 -                               }
20058 -                               else {
20059 -                                       CableLength = 0;
20060 -                               }
20061 -                               pVctBackupData->PMdiPairLen[i] = CableLength;
20062 -                               pVctBackupData->PMdiPairSts[i] = pPrt->PMdiPairSts[i];
20063 -                       }
20064 +                       VctGetResults(pAC, IoC, PhysPortIndex);
20065
20066 -                       Param.Para32[0] = PhysPortIndex;
20067 -                       Param.Para32[1] = -1;
20068 -                       SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_RESET, Param);
20069 -                       SkEventDispatcher(pAC, IoC);
20070 +                       EventParam.Para32[0] = PhysPortIndex;
20071 +                       EventParam.Para32[1] = -1;
20072 +                       SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_RESET, EventParam);
20073 +
20074 +                       /* SkEventDispatcher(pAC, IoC); */
20075                 }
20076
20077                 break;
20078 @@ -1710,14 +1645,13 @@
20079         unsigned int    TableIndex;
20080         int             Ret;
20081
20082 -
20083         if ((TableIndex = LookupId(Id)) == (unsigned int)(-1)) {
20084
20085                 *pLen = 0;
20086                 return (SK_PNMI_ERR_UNKNOWN_OID);
20087         }
20088
20089 -    /* Check NetIndex */
20090 +    /* Check NetIndex. */
20091         if (NetIndex >= pAC->Rlmt.NumNets) {
20092                 return (SK_PNMI_ERR_UNKNOWN_NET);
20093         }
20094 @@ -1767,22 +1701,20 @@
20095         SK_U32          Instance;
20096         SK_U32          Id;
20097
20098 -
20099 -       /* Check if the passed buffer has the right size */
20100 +       /* Check if the passed buffer has the right size. */
20101         if (*pLen < SK_PNMI_STRUCT_SIZE) {
20102
20103 -               /* Check if we can return the error within the buffer */
20104 +               /* Check if we can return the error within the buffer. */
20105                 if (*pLen >= SK_PNMI_MIN_STRUCT_SIZE) {
20106
20107 -                       SK_PNMI_SET_STAT(pBuf, SK_PNMI_ERR_TOO_SHORT,
20108 -                               (SK_U32)(-1));
20109 +                       SK_PNMI_SET_STAT(pBuf, SK_PNMI_ERR_TOO_SHORT, (SK_U32)(-1));
20110                 }
20111
20112                 *pLen = SK_PNMI_STRUCT_SIZE;
20113                 return (SK_PNMI_ERR_TOO_SHORT);
20114         }
20115
20116 -    /* Check NetIndex */
20117 +    /* Check NetIndex. */
20118         if (NetIndex >= pAC->Rlmt.NumNets) {
20119                 return (SK_PNMI_ERR_UNKNOWN_NET);
20120         }
20121 @@ -1810,12 +1742,11 @@
20122         pAC->Pnmi.RlmtUpdatedFlag ++;
20123         pAC->Pnmi.SirqUpdatedFlag ++;
20124
20125 -       /* Preset/Set values */
20126 +       /* PRESET/SET values. */
20127         for (TableIndex = 0; TableIndex < ID_TABLE_SIZE; TableIndex ++) {
20128
20129                 if ((IdTable[TableIndex].Access != SK_PNMI_RW) &&
20130                         (IdTable[TableIndex].Access != SK_PNMI_WO)) {
20131 -
20132                         continue;
20133                 }
20134
20135 @@ -1826,8 +1757,7 @@
20136                         InstanceCnt ++) {
20137
20138                         DstOffset = IdTable[TableIndex].Offset +
20139 -                               (InstanceCnt - 1) *
20140 -                               IdTable[TableIndex].StructSize;
20141 +                               (InstanceCnt - 1) * IdTable[TableIndex].StructSize;
20142
20143                         /*
20144                          * Because VPD multiple instance variables are
20145 @@ -1837,9 +1767,7 @@
20146                          */
20147                         Instance = (SK_U32)InstanceCnt;
20148
20149 -                       /*
20150 -                        * Evaluate needed buffer length
20151 -                        */
20152 +                       /* Evaluate needed buffer length. */
20153                         Len = 0;
20154                         Ret = IdTable[TableIndex].Func(pAC, IoC,
20155                                 SK_PNMI_GET, IdTable[TableIndex].Id,
20156 @@ -1855,8 +1783,7 @@
20157                                 pAC->Pnmi.SirqUpdatedFlag --;
20158
20159                                 SK_PNMI_CHECKFLAGS("PnmiStruct: On return");
20160 -                               SK_PNMI_SET_STAT(pBuf,
20161 -                                       SK_PNMI_ERR_GENERAL, DstOffset);
20162 +                               SK_PNMI_SET_STAT(pBuf, SK_PNMI_ERR_GENERAL, DstOffset);
20163                                 *pLen = SK_PNMI_MIN_STRUCT_SIZE;
20164                                 return (SK_PNMI_ERR_GENERAL);
20165                         }
20166 @@ -1878,7 +1805,7 @@
20167                                 }
20168                         }
20169
20170 -                       /* Call the OID handler function */
20171 +                       /* Call the OID handler function. */
20172                         Ret = IdTable[TableIndex].Func(pAC, IoC, Action,
20173                                 IdTable[TableIndex].Id, pBuf + DstOffset,
20174                                 &Len, Instance, TableIndex, NetIndex);
20175 @@ -1889,8 +1816,7 @@
20176                                 pAC->Pnmi.SirqUpdatedFlag --;
20177
20178                                 SK_PNMI_CHECKFLAGS("PnmiStruct: On return");
20179 -                               SK_PNMI_SET_STAT(pBuf, SK_PNMI_ERR_BAD_VALUE,
20180 -                                       DstOffset);
20181 +                               SK_PNMI_SET_STAT(pBuf, SK_PNMI_ERR_BAD_VALUE, DstOffset);
20182                                 *pLen = SK_PNMI_MIN_STRUCT_SIZE;
20183                                 return (SK_PNMI_ERR_BAD_VALUE);
20184                         }
20185 @@ -1924,7 +1850,7 @@
20186
20187                 if (IdTable[i].Id == Id) {
20188
20189 -                       return i;
20190 +                       return (i);
20191                 }
20192         }
20193
20194 @@ -1965,16 +1891,13 @@
20195  {
20196         if (Id != OID_SKGE_ALL_DATA) {
20197
20198 -               SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR003,
20199 -                       SK_PNMI_ERR003MSG);
20200 +               SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR003, SK_PNMI_ERR003MSG);
20201
20202                 *pLen = 0;
20203                 return (SK_PNMI_ERR_GENERAL);
20204         }
20205
20206 -       /*
20207 -        * Check instance. We only handle single instance variables
20208 -        */
20209 +       /* Check instance. We only handle single instance variables. */
20210         if (Instance != (SK_U32)(-1) && Instance != 1) {
20211
20212                 *pLen = 0;
20213 @@ -2033,10 +1956,7 @@
20214         int     Ret;
20215         SK_U32  ActionOp;
20216
20217 -
20218 -       /*
20219 -        * Check instance. We only handle single instance variables
20220 -        */
20221 +       /* Check instance. We only handle single instance variables. */
20222         if (Instance != (SK_U32)(-1) && Instance != 1) {
20223
20224                 *pLen = 0;
20225 @@ -2049,10 +1969,10 @@
20226                 return (SK_PNMI_ERR_TOO_SHORT);
20227         }
20228
20229 -       /* Check if a get should be performed */
20230 +       /* Check if a GET should be performed. */
20231         if (Action == SK_PNMI_GET) {
20232
20233 -               /* A get is easy. We always return the same value */
20234 +               /* A GET is easy. We always return the same value. */
20235                 ActionOp = (SK_U32)SK_PNMI_ACT_IDLE;
20236                 SK_PNMI_STORE_U32(pBuf, ActionOp);
20237                 *pLen = sizeof(SK_U32);
20238 @@ -2060,13 +1980,13 @@
20239                 return (SK_PNMI_ERR_OK);
20240         }
20241
20242 -       /* Continue with PRESET/SET action */
20243 +       /* Continue with PRESET/SET action. */
20244         if (*pLen > sizeof(SK_U32)) {
20245
20246                 return (SK_PNMI_ERR_BAD_VALUE);
20247         }
20248
20249 -       /* Check if the command is a known one */
20250 +       /* Check if the command is a known one. */
20251         SK_PNMI_READ_U32(pBuf, ActionOp);
20252         if (*pLen > sizeof(SK_U32) ||
20253                 (ActionOp != SK_PNMI_ACT_IDLE &&
20254 @@ -2078,7 +1998,7 @@
20255                 return (SK_PNMI_ERR_BAD_VALUE);
20256         }
20257
20258 -       /* A preset ends here */
20259 +       /* A PRESET ends here. */
20260         if (Action == SK_PNMI_PRESET) {
20261
20262                 return (SK_PNMI_ERR_OK);
20263 @@ -2087,19 +2007,15 @@
20264         switch (ActionOp) {
20265
20266         case SK_PNMI_ACT_IDLE:
20267 -               /* Nothing to do */
20268 +               /* Nothing to do. */
20269                 break;
20270
20271         case SK_PNMI_ACT_RESET:
20272 -               /*
20273 -                * Perform a driver reset or something that comes near
20274 -                * to this.
20275 -                */
20276 +               /* Perform a driver reset or something that comes near to this. */
20277                 Ret = SK_DRIVER_RESET(pAC, IoC);
20278                 if (Ret != 0) {
20279
20280 -                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR005,
20281 -                               SK_PNMI_ERR005MSG);
20282 +                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR005, SK_PNMI_ERR005MSG);
20283
20284                         return (SK_PNMI_ERR_GENERAL);
20285                 }
20286 @@ -2116,13 +2032,12 @@
20287                 break;
20288
20289         case SK_PNMI_ACT_RESETCNT:
20290 -               /* Set all counters and timestamps to zero */
20291 +               /* Set all counters and timestamps to zero. */
20292                 ResetCounter(pAC, IoC, NetIndex);
20293                 break;
20294
20295         default:
20296 -               SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR006,
20297 -                       SK_PNMI_ERR006MSG);
20298 +               SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR006, SK_PNMI_ERR006MSG);
20299
20300                 return (SK_PNMI_ERR_GENERAL);
20301         }
20302 @@ -2166,25 +2081,21 @@
20303         SK_U32  StatVal32;
20304         SK_BOOL Is64BitReq = SK_FALSE;
20305
20306 -       /*
20307 -        * Only the active Mac is returned
20308 -        */
20309 +       /* Only the active MAC is returned. */
20310         if (Instance != (SK_U32)(-1) && Instance != 1) {
20311
20312                 *pLen = 0;
20313                 return (SK_PNMI_ERR_UNKNOWN_INST);
20314         }
20315
20316 -       /*
20317 -        * Check action type
20318 -        */
20319 +       /* Check action type. */
20320         if (Action != SK_PNMI_GET) {
20321
20322                 *pLen = 0;
20323                 return (SK_PNMI_ERR_READ_ONLY);
20324         }
20325
20326 -       /* Check length */
20327 +       /* Check length. */
20328         switch (Id) {
20329
20330         case OID_802_3_PERMANENT_ADDRESS:
20331 @@ -2205,12 +2116,12 @@
20332
20333  #else /* SK_NDIS_64BIT_CTR */
20334
20335 -               /* for compatibility, at least 32bit are required for OID */
20336 +               /* For compatibility, at least 32 bits are required for OID. */
20337                 if (*pLen < sizeof(SK_U32)) {
20338                         /*
20339 -                       * but indicate handling for 64bit values,
20340 -                       * if insufficient space is provided
20341 -                       */
20342 +                        * Indicate handling for 64 bit values,
20343 +                        * if insufficient space is provided.
20344 +                        */
20345                         *pLen = sizeof(SK_U64);
20346                         return (SK_PNMI_ERR_TOO_SHORT);
20347                 }
20348 @@ -2226,16 +2137,14 @@
20349          * to indicate that an update was already done.
20350          */
20351         Ret = MacUpdate(pAC, IoC, 0, pAC->GIni.GIMacsFound - 1);
20352 -       if ( Ret != SK_PNMI_ERR_OK) {
20353 +       if (Ret != SK_PNMI_ERR_OK) {
20354
20355                 *pLen = 0;
20356                 return (Ret);
20357         }
20358         pAC->Pnmi.MacUpdatedFlag ++;
20359
20360 -       /*
20361 -        * Get value (MAC Index 0 identifies the virtual MAC)
20362 -        */
20363 +       /* Get value (MAC index 0 identifies the virtual MAC). */
20364         switch (Id) {
20365
20366         case OID_802_3_PERMANENT_ADDRESS:
20367 @@ -2251,7 +2160,7 @@
20368         default:
20369                 StatVal = GetStatVal(pAC, IoC, 0, IdTable[TableIndex].Param, NetIndex);
20370
20371 -               /* by default 32bit values are evaluated */
20372 +               /* By default 32 bit values are evaluated. */
20373                 if (!Is64BitReq) {
20374                         StatVal32 = (SK_U32)StatVal;
20375                         SK_PNMI_STORE_U32(pBuf, StatVal32);
20376 @@ -2305,21 +2214,19 @@
20377         int                             MacType;
20378         int                             Ret;
20379         SK_U64                  StatVal;
20380 -
20381 -
20382
20383 -       /* Calculate instance if wished. MAC index 0 is the virtual MAC */
20384 +       /* Calculate instance if wished. MAC index 0 is the virtual MAC. */
20385         PhysPortMax = pAC->GIni.GIMacsFound;
20386         LogPortMax = SK_PNMI_PORT_PHYS2LOG(PhysPortMax);
20387
20388         MacType = pAC->GIni.GIMacType;
20389
20390 -       if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) { /* Dual net mode */
20391 +       if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) { /* DualNet mode. */
20392                 LogPortMax--;
20393         }
20394
20395 -       if ((Instance != (SK_U32)(-1))) { /* Only one specific instance is queried */
20396 -               /* Check instance range */
20397 +       if ((Instance != (SK_U32)(-1))) { /* Only one specific instance is queried. */
20398 +               /* Check instance range. */
20399                 if ((Instance < 1) || (Instance > LogPortMax)) {
20400
20401                         *pLen = 0;
20402 @@ -2329,20 +2236,20 @@
20403                 Limit = LogPortIndex + 1;
20404         }
20405
20406 -       else { /* Instance == (SK_U32)(-1), get all Instances of that OID */
20407 +       else { /* Instance == (SK_U32)(-1), get all Instances of that OID. */
20408
20409                 LogPortIndex = 0;
20410                 Limit = LogPortMax;
20411         }
20412
20413 -       /* Check action */
20414 +       /* Check action. */
20415         if (Action != SK_PNMI_GET) {
20416
20417                 *pLen = 0;
20418                 return (SK_PNMI_ERR_READ_ONLY);
20419         }
20420
20421 -       /* Check length */
20422 +       /* Check length. */
20423         if (*pLen < (Limit - LogPortIndex) * sizeof(SK_U64)) {
20424
20425                 *pLen = (Limit - LogPortIndex) * sizeof(SK_U64);
20426 @@ -2361,7 +2268,7 @@
20427         }
20428         pAC->Pnmi.MacUpdatedFlag ++;
20429
20430 -       /* Get value */
20431 +       /* Get value. */
20432         Offset = 0;
20433         for (; LogPortIndex < Limit; LogPortIndex ++) {
20434
20435 @@ -2467,19 +2374,16 @@
20436         unsigned int    Limit;
20437         unsigned int    Offset = 0;
20438
20439 -       /*
20440 -        * Calculate instance if wished. MAC index 0 is the virtual
20441 -        * MAC.
20442 -        */
20443 +       /* Calculate instance if wished. MAC index 0 is the virtual MAC. */
20444         PhysPortMax = pAC->GIni.GIMacsFound;
20445         LogPortMax = SK_PNMI_PORT_PHYS2LOG(PhysPortMax);
20446
20447 -       if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) { /* Dual net mode */
20448 +       if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) { /* DualNet mode. */
20449                 LogPortMax--;
20450         }
20451
20452 -       if ((Instance != (SK_U32)(-1))) { /* Only one specific instance is queried */
20453 -               /* Check instance range */
20454 +       if ((Instance != (SK_U32)(-1))) { /* Only one specific instance is queried. */
20455 +               /* Check instance range. */
20456                 if ((Instance < 1) || (Instance > LogPortMax)) {
20457
20458                         *pLen = 0;
20459 @@ -2488,27 +2392,23 @@
20460                 LogPortIndex = SK_PNMI_PORT_INST2LOG(Instance);
20461                 Limit = LogPortIndex + 1;
20462         }
20463 -       else { /* Instance == (SK_U32)(-1), get all Instances of that OID */
20464 +       else { /* Instance == (SK_U32)(-1), get all Instances of that OID. */
20465
20466                 LogPortIndex = 0;
20467                 Limit = LogPortMax;
20468         }
20469
20470 -       /*
20471 -        * Perform Action
20472 -        */
20473 +       /* Perform action. */
20474         if (Action == SK_PNMI_GET) {
20475
20476 -               /* Check length */
20477 +               /* Check length. */
20478                 if (*pLen < (Limit - LogPortIndex) * 6) {
20479
20480                         *pLen = (Limit - LogPortIndex) * 6;
20481                         return (SK_PNMI_ERR_TOO_SHORT);
20482                 }
20483
20484 -               /*
20485 -                * Get value
20486 -                */
20487 +               /* Get value. */
20488                 for (; LogPortIndex < Limit; LogPortIndex ++) {
20489
20490                         switch (Id) {
20491 @@ -2532,8 +2432,7 @@
20492                                                 &pAC->Addr.Net[NetIndex].PermanentMacAddress);
20493                                 }
20494                                 else {
20495 -                                       PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
20496 -                                               pAC, LogPortIndex);
20497 +                                       PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC, LogPortIndex);
20498
20499                                         CopyMac(pBuf + Offset,
20500                                                 &pAC->Addr.Port[PhysPortIndex].PermanentMacAddress);
20501 @@ -2542,8 +2441,7 @@
20502                                 break;
20503
20504                         default:
20505 -                               SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR008,
20506 -                                       SK_PNMI_ERR008MSG);
20507 +                               SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR008, SK_PNMI_ERR008MSG);
20508
20509                                 *pLen = 0;
20510                                 return (SK_PNMI_ERR_GENERAL);
20511 @@ -2554,8 +2452,8 @@
20512         }
20513         else {
20514                 /*
20515 -                * The logical MAC address may not be changed only
20516 -                * the physical ones
20517 +                * The logical MAC address may not be changed,
20518 +                * only the physical ones.
20519                  */
20520                 if (Id == OID_SKGE_PHYS_FAC_ADDR) {
20521
20522 @@ -2563,19 +2461,16 @@
20523                         return (SK_PNMI_ERR_READ_ONLY);
20524                 }
20525
20526 -               /*
20527 -                * Only the current address may be changed
20528 -                */
20529 +               /* Only the current address may be changed. */
20530                 if (Id != OID_SKGE_PHYS_CUR_ADDR) {
20531
20532 -                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR009,
20533 -                               SK_PNMI_ERR009MSG);
20534 +                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR009, SK_PNMI_ERR009MSG);
20535
20536                         *pLen = 0;
20537                         return (SK_PNMI_ERR_GENERAL);
20538                 }
20539
20540 -               /* Check length */
20541 +               /* Check length. */
20542                 if (*pLen < (Limit - LogPortIndex) * 6) {
20543
20544                         *pLen = (Limit - LogPortIndex) * 6;
20545 @@ -2587,32 +2482,26 @@
20546                         return (SK_PNMI_ERR_BAD_VALUE);
20547                 }
20548
20549 -               /*
20550 -                * Check Action
20551 -                */
20552 +               /* Check action. */
20553                 if (Action == SK_PNMI_PRESET) {
20554
20555                         *pLen = 0;
20556                         return (SK_PNMI_ERR_OK);
20557                 }
20558
20559 -               /*
20560 -                * Set OID_SKGE_MAC_CUR_ADDR
20561 -                */
20562 +               /* Set OID_SKGE_MAC_CUR_ADDR.  */
20563                 for (; LogPortIndex < Limit; LogPortIndex ++, Offset += 6) {
20564
20565                         /*
20566                          * A set to virtual port and set of broadcast
20567 -                        * address will be ignored
20568 +                        * address will be ignored.
20569                          */
20570                         if (LogPortIndex == 0 || SK_MEMCMP(pBuf + Offset,
20571                                 "\xff\xff\xff\xff\xff\xff", 6) == 0) {
20572 -
20573                                 continue;
20574                         }
20575
20576 -                       PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC,
20577 -                               LogPortIndex);
20578 +                       PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC, LogPortIndex);
20579
20580                         Ret = SkAddrOverride(pAC, IoC, PhysPortIndex,
20581                                 (SK_MAC_ADDR *)(pBuf + Offset),
20582 @@ -2665,10 +2554,7 @@
20583         unsigned int    Offset = 0;
20584         SK_U64          StatVal;
20585
20586 -
20587 -       /*
20588 -        * Calculate instance if wished
20589 -        */
20590 +       /* Calculate instance if wished. */
20591         if (Instance != (SK_U32)(-1)) {
20592
20593                 if ((Instance < 1) || (Instance > SKCS_NUM_PROTOCOLS)) {
20594 @@ -2684,25 +2570,21 @@
20595                 Limit = SKCS_NUM_PROTOCOLS;
20596         }
20597
20598 -       /*
20599 -        * Check action
20600 -        */
20601 +       /* Check action. */
20602         if (Action != SK_PNMI_GET) {
20603
20604                 *pLen = 0;
20605                 return (SK_PNMI_ERR_READ_ONLY);
20606         }
20607
20608 -       /* Check length */
20609 +       /* Check length. */
20610         if (*pLen < (Limit - Index) * sizeof(SK_U64)) {
20611
20612                 *pLen = (Limit - Index) * sizeof(SK_U64);
20613                 return (SK_PNMI_ERR_TOO_SHORT);
20614         }
20615
20616 -       /*
20617 -        * Get value
20618 -        */
20619 +       /* Get value. */
20620         for (; Index < Limit; Index ++) {
20621
20622                 switch (Id) {
20623 @@ -2728,8 +2610,7 @@
20624                         break;
20625
20626                 default:
20627 -                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR010,
20628 -                               SK_PNMI_ERR010MSG);
20629 +                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR010, SK_PNMI_ERR010MSG);
20630
20631                         *pLen = 0;
20632                         return (SK_PNMI_ERR_GENERAL);
20633 @@ -2739,9 +2620,7 @@
20634                 Offset += sizeof(SK_U64);
20635         }
20636
20637 -       /*
20638 -        * Store used buffer space
20639 -        */
20640 +       /* Store used buffer space. */
20641         *pLen = Offset;
20642
20643         return (SK_PNMI_ERR_OK);
20644 @@ -2784,10 +2663,7 @@
20645         SK_U32          Val32;
20646         SK_U64          Val64;
20647
20648 -
20649 -       /*
20650 -        * Calculate instance if wished
20651 -        */
20652 +       /* Calculate instance if wished. */
20653         if ((Instance != (SK_U32)(-1))) {
20654
20655                 if ((Instance < 1) || (Instance > (SK_U32)pAC->I2c.MaxSens)) {
20656 @@ -2804,16 +2680,14 @@
20657                 Limit = (unsigned int) pAC->I2c.MaxSens;
20658         }
20659
20660 -       /*
20661 -        * Check action
20662 -        */
20663 +       /* Check action. */
20664         if (Action != SK_PNMI_GET) {
20665
20666                 *pLen = 0;
20667                 return (SK_PNMI_ERR_READ_ONLY);
20668         }
20669
20670 -       /* Check length */
20671 +       /* Check length. */
20672         switch (Id) {
20673
20674         case OID_SKGE_SENSOR_VALUE:
20675 @@ -2872,38 +2746,33 @@
20676                 break;
20677
20678         default:
20679 -               SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR012,
20680 -                       SK_PNMI_ERR012MSG);
20681 +               SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR012, SK_PNMI_ERR012MSG);
20682
20683                 *pLen = 0;
20684                 return (SK_PNMI_ERR_GENERAL);
20685
20686         }
20687
20688 -       /*
20689 -        * Get value
20690 -        */
20691 +       /* Get value. */
20692         for (Offset = 0; Index < Limit; Index ++) {
20693
20694                 switch (Id) {
20695
20696                 case OID_SKGE_SENSOR_INDEX:
20697                         *(pBuf + Offset) = (char)Index;
20698 -                       Offset += sizeof(char);
20699 +                       Offset ++;
20700                         break;
20701
20702                 case OID_SKGE_SENSOR_DESCR:
20703                         Len = SK_STRLEN(pAC->I2c.SenTable[Index].SenDesc);
20704 -                       SK_MEMCPY(pBuf + Offset + 1,
20705 -                               pAC->I2c.SenTable[Index].SenDesc, Len);
20706 +                       SK_MEMCPY(pBuf + Offset + 1, pAC->I2c.SenTable[Index].SenDesc, Len);
20707                         *(pBuf + Offset) = (char)Len;
20708                         Offset += Len + 1;
20709                         break;
20710
20711                 case OID_SKGE_SENSOR_TYPE:
20712 -                       *(pBuf + Offset) =
20713 -                               (char)pAC->I2c.SenTable[Index].SenType;
20714 -                       Offset += sizeof(char);
20715 +                       *(pBuf + Offset) = (char)pAC->I2c.SenTable[Index].SenType;
20716 +                       Offset ++;
20717                         break;
20718
20719                 case OID_SKGE_SENSOR_VALUE:
20720 @@ -2940,9 +2809,8 @@
20721                         break;
20722
20723                 case OID_SKGE_SENSOR_STATUS:
20724 -                       *(pBuf + Offset) =
20725 -                               (char)pAC->I2c.SenTable[Index].SenErrFlag;
20726 -                       Offset += sizeof(char);
20727 +                       *(pBuf + Offset) = (char)pAC->I2c.SenTable[Index].SenErrFlag;
20728 +                       Offset ++;
20729                         break;
20730
20731                 case OID_SKGE_SENSOR_WAR_CTS:
20732 @@ -2979,9 +2847,7 @@
20733                 }
20734         }
20735
20736 -       /*
20737 -        * Store used buffer space
20738 -        */
20739 +       /* Store used buffer space. */
20740         *pLen = Offset;
20741
20742         return (SK_PNMI_ERR_OK);
20743 @@ -3035,9 +2901,7 @@
20744         int             Ret;
20745         SK_U32          Val32;
20746
20747 -       /*
20748 -        * Get array of all currently stored VPD keys
20749 -        */
20750 +       /* Get array of all currently stored VPD keys. */
20751         Ret = GetVpdKeyArr(pAC, IoC, &KeyArr[0][0], sizeof(KeyArr), &KeyNo);
20752         if (Ret != SK_PNMI_ERR_OK) {
20753                 *pLen = 0;
20754 @@ -3082,21 +2946,19 @@
20755                 }
20756         }
20757
20758 -       /*
20759 -        * Get value, if a query should be performed
20760 -        */
20761 +       /* Get value, if a query should be performed. */
20762         if (Action == SK_PNMI_GET) {
20763
20764                 switch (Id) {
20765
20766                 case OID_SKGE_VPD_FREE_BYTES:
20767 -                       /* Check length of buffer */
20768 +                       /* Check length of buffer. */
20769                         if (*pLen < sizeof(SK_U32)) {
20770
20771                                 *pLen = sizeof(SK_U32);
20772                                 return (SK_PNMI_ERR_TOO_SHORT);
20773                         }
20774 -                       /* Get number of free bytes */
20775 +                       /* Get number of free bytes. */
20776                         pVpdStatus = VpdStat(pAC, IoC);
20777                         if (pVpdStatus == NULL) {
20778
20779 @@ -3121,7 +2983,7 @@
20780                         break;
20781
20782                 case OID_SKGE_VPD_ENTRIES_LIST:
20783 -                       /* Check length */
20784 +                       /* Check length. */
20785                         for (Len = 0, Index = 0; Index < KeyNo; Index ++) {
20786
20787                                 Len += SK_STRLEN(KeyArr[Index]) + 1;
20788 @@ -3132,7 +2994,7 @@
20789                                 return (SK_PNMI_ERR_TOO_SHORT);
20790                         }
20791
20792 -                       /* Get value */
20793 +                       /* Get value. */
20794                         *(pBuf) = (char)Len - 1;
20795                         for (Offset = 1, Index = 0; Index < KeyNo; Index ++) {
20796
20797 @@ -3151,7 +3013,7 @@
20798                         break;
20799
20800                 case OID_SKGE_VPD_ENTRIES_NUMBER:
20801 -                       /* Check length */
20802 +                       /* Check length. */
20803                         if (*pLen < sizeof(SK_U32)) {
20804
20805                                 *pLen = sizeof(SK_U32);
20806 @@ -3164,7 +3026,7 @@
20807                         break;
20808
20809                 case OID_SKGE_VPD_KEY:
20810 -                       /* Check buffer length, if it is large enough */
20811 +                       /* Check buffer length, if it is large enough. */
20812                         for (Len = 0, Index = FirstIndex;
20813                                 Index < LastIndex; Index ++) {
20814
20815 @@ -3180,31 +3042,27 @@
20816                          * Get the key to an intermediate buffer, because
20817                          * we have to prepend a length byte.
20818                          */
20819 -                       for (Offset = 0, Index = FirstIndex;
20820 -                               Index < LastIndex; Index ++) {
20821 +                       for (Offset = 0, Index = FirstIndex; Index < LastIndex; Index ++) {
20822
20823                                 Len = SK_STRLEN(KeyArr[Index]);
20824
20825                                 *(pBuf + Offset) = (char)Len;
20826 -                               SK_MEMCPY(pBuf + Offset + 1, KeyArr[Index],
20827 -                                       Len);
20828 +                               SK_MEMCPY(pBuf + Offset + 1, KeyArr[Index], Len);
20829                                 Offset += Len + 1;
20830                         }
20831                         *pLen = Offset;
20832                         break;
20833
20834                 case OID_SKGE_VPD_VALUE:
20835 -                       /* Check the buffer length if it is large enough */
20836 -                       for (Offset = 0, Index = FirstIndex;
20837 -                               Index < LastIndex; Index ++) {
20838 +                       /* Check the buffer length if it is large enough. */
20839 +                       for (Offset = 0, Index = FirstIndex; Index < LastIndex; Index ++) {
20840
20841                                 BufLen = 256;
20842                                 if (VpdRead(pAC, IoC, KeyArr[Index], Buf,
20843                                         (int *)&BufLen) > 0 ||
20844                                         BufLen >= SK_PNMI_VPD_DATALEN) {
20845
20846 -                                       SK_ERR_LOG(pAC, SK_ERRCL_SW,
20847 -                                               SK_PNMI_ERR021,
20848 +                                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR021,
20849                                                 SK_PNMI_ERR021MSG);
20850
20851                                         return (SK_PNMI_ERR_GENERAL);
20852 @@ -3221,16 +3079,14 @@
20853                          * Get the value to an intermediate buffer, because
20854                          * we have to prepend a length byte.
20855                          */
20856 -                       for (Offset = 0, Index = FirstIndex;
20857 -                               Index < LastIndex; Index ++) {
20858 +                       for (Offset = 0, Index = FirstIndex; Index < LastIndex; Index ++) {
20859
20860                                 BufLen = 256;
20861                                 if (VpdRead(pAC, IoC, KeyArr[Index], Buf,
20862                                         (int *)&BufLen) > 0 ||
20863                                         BufLen >= SK_PNMI_VPD_DATALEN) {
20864
20865 -                                       SK_ERR_LOG(pAC, SK_ERRCL_SW,
20866 -                                               SK_PNMI_ERR022,
20867 +                                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR022,
20868                                                 SK_PNMI_ERR022MSG);
20869
20870                                         *pLen = 0;
20871 @@ -3251,8 +3107,7 @@
20872                                 return (SK_PNMI_ERR_TOO_SHORT);
20873                         }
20874
20875 -                       for (Offset = 0, Index = FirstIndex;
20876 -                               Index < LastIndex; Index ++) {
20877 +                       for (Offset = 0, Index = FirstIndex; Index < LastIndex; Index ++) {
20878
20879                                 if (VpdMayWrite(KeyArr[Index])) {
20880
20881 @@ -3278,15 +3133,14 @@
20882                         break;
20883
20884                 default:
20885 -                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR023,
20886 -                               SK_PNMI_ERR023MSG);
20887 +                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR023, SK_PNMI_ERR023MSG);
20888
20889                         *pLen = 0;
20890                         return (SK_PNMI_ERR_GENERAL);
20891                 }
20892         }
20893         else {
20894 -               /* The only OID which can be set is VPD_ACTION */
20895 +               /* The only OID which can be set is VPD_ACTION. */
20896                 if (Id != OID_SKGE_VPD_ACTION) {
20897
20898                         if (Id == OID_SKGE_VPD_FREE_BYTES ||
20899 @@ -3300,8 +3154,7 @@
20900                                 return (SK_PNMI_ERR_READ_ONLY);
20901                         }
20902
20903 -                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR024,
20904 -                               SK_PNMI_ERR024MSG);
20905 +                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR024, SK_PNMI_ERR024MSG);
20906
20907                         *pLen = 0;
20908                         return (SK_PNMI_ERR_GENERAL);
20909 @@ -3317,14 +3170,11 @@
20910                         return (SK_PNMI_ERR_TOO_SHORT);
20911                 }
20912
20913 -               /*
20914 -                * The first byte contains the VPD action type we should
20915 -                * perform.
20916 -                */
20917 +               /* The first byte contains the VPD action type we should perform. */
20918                 switch (*pBuf) {
20919
20920                 case SK_PNMI_VPD_IGNORE:
20921 -                       /* Nothing to do */
20922 +                       /* Nothing to do. */
20923                         break;
20924
20925                 case SK_PNMI_VPD_CREATE:
20926 @@ -3356,13 +3206,13 @@
20927                         SK_MEMCPY(Buf, pBuf + 4, Offset);
20928                         Buf[Offset] = 0;
20929
20930 -                       /* A preset ends here */
20931 +                       /* A PRESET ends here. */
20932                         if (Action == SK_PNMI_PRESET) {
20933
20934                                 return (SK_PNMI_ERR_OK);
20935                         }
20936
20937 -                       /* Write the new entry or modify an existing one */
20938 +                       /* Write the new entry or modify an existing one .*/
20939                         Ret = VpdWrite(pAC, IoC, KeyStr, Buf);
20940                         if (Ret == SK_PNMI_VPD_NOWRITE ) {
20941
20942 @@ -3394,7 +3244,7 @@
20943                         break;
20944
20945                 case SK_PNMI_VPD_DELETE:
20946 -                       /* Check if the buffer size is plausible */
20947 +                       /* Check if the buffer size is plausible. */
20948                         if (*pLen < 3) {
20949
20950                                 *pLen = 3;
20951 @@ -3409,7 +3259,7 @@
20952                         KeyStr[1] = pBuf[2];
20953                         KeyStr[2] = 0;
20954
20955 -                       /* Find the passed key in the array */
20956 +                       /* Find the passed key in the array. */
20957                         for (Index = 0; Index < KeyNo; Index ++) {
20958
20959                                 if (SK_STRCMP(KeyStr, KeyArr[Index]) == 0) {
20960 @@ -3417,6 +3267,7 @@
20961                                         break;
20962                                 }
20963                         }
20964 +
20965                         /*
20966                          * If we cannot find the key it is wrong, so we
20967                          * return an appropriate error value.
20968 @@ -3432,7 +3283,7 @@
20969                                 return (SK_PNMI_ERR_OK);
20970                         }
20971
20972 -                       /* Ok, you wanted it and you will get it */
20973 +                       /* Ok, you wanted it and you will get it. */
20974                         Ret = VpdDelete(pAC, IoC, KeyStr);
20975                         if (Ret != SK_PNMI_VPD_OK) {
20976
20977 @@ -3505,23 +3356,21 @@
20978         SK_U32          Val32;
20979         SK_U64          Val64;
20980         SK_U64          Val64RxHwErrs = 0;
20981 +       SK_U64          Val64RxRunt = 0;
20982 +       SK_U64          Val64RxFcs = 0;
20983         SK_U64          Val64TxHwErrs = 0;
20984         SK_BOOL         Is64BitReq = SK_FALSE;
20985         char            Buf[256];
20986         int                     MacType;
20987
20988 -       /*
20989 -        * Check instance. We only handle single instance variables.
20990 -        */
20991 +       /* Check instance. We only handle single instance variables. */
20992         if (Instance != (SK_U32)(-1) && Instance != 1) {
20993
20994                 *pLen = 0;
20995                 return (SK_PNMI_ERR_UNKNOWN_INST);
20996         }
20997
20998 -       /*
20999 -        * Check action. We only allow get requests.
21000 -        */
21001 +       /* Check action. We only allow get requests. */
21002         if (Action != SK_PNMI_GET) {
21003
21004                 *pLen = 0;
21005 @@ -3530,9 +3379,7 @@
21006
21007         MacType = pAC->GIni.GIMacType;
21008
21009 -       /*
21010 -        * Check length for the various supported OIDs
21011 -        */
21012 +       /* Check length for the various supported OIDs. */
21013         switch (Id) {
21014
21015         case OID_GEN_XMIT_ERROR:
21016 @@ -3546,14 +3393,12 @@
21017
21018  #else /* SK_NDIS_64BIT_CTR */
21019
21020 -               /*
21021 -                * for compatibility, at least 32bit are required for oid
21022 -                */
21023 +               /* For compatibility, at least 32bit are required for OID. */
21024                 if (*pLen < sizeof(SK_U32)) {
21025                         /*
21026 -                       * but indicate handling for 64bit values,
21027 -                       * if insufficient space is provided
21028 -                       */
21029 +                        * Indicate handling for 64bit values,
21030 +                        * if insufficient space is provided.
21031 +                        */
21032                         *pLen = sizeof(SK_U64);
21033                         return (SK_PNMI_ERR_TOO_SHORT);
21034                 }
21035 @@ -3624,11 +3469,11 @@
21036                 break;
21037
21038         default:
21039 -               /* Checked later */
21040 +               /* Checked later. */
21041                 break;
21042         }
21043
21044 -       /* Update statistic */
21045 +       /* Update statistics. */
21046         if (Id == OID_SKGE_RX_HW_ERROR_CTS ||
21047                 Id == OID_SKGE_TX_HW_ERROR_CTS ||
21048                 Id == OID_SKGE_IN_ERRORS_CTS ||
21049 @@ -3636,7 +3481,8 @@
21050                 Id == OID_GEN_XMIT_ERROR ||
21051                 Id == OID_GEN_RCV_ERROR) {
21052
21053 -               /* Force the XMAC to update its statistic counters and
21054 +               /*
21055 +                * Force the XMAC to update its statistic counters and
21056                  * Increment semaphore to indicate that an update was
21057                  * already done.
21058                  */
21059 @@ -3667,11 +3513,26 @@
21060                                 GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_IRLENGTH, NetIndex) +
21061                                 GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_SYMBOL, NetIndex) +
21062                                 GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_SHORTS, NetIndex) +
21063 -                               GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_RUNT, NetIndex) +
21064                                 GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_TOO_LONG, NetIndex) +
21065 -                               GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_FCS, NetIndex) +
21066                                 GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_CEXT, NetIndex);
21067 -               break;
21068 +
21069 +
21070 +                       /*
21071 +                       * In some cases the runt and fcs counters are incremented when collisions
21072 +                       * occur. We have to correct those counters here.
21073 +                       */
21074 +                       Val64RxRunt = GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_RUNT, NetIndex);
21075 +                       Val64RxFcs = GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_FCS, NetIndex);
21076 +
21077 +                       if (Val64RxRunt > Val64RxFcs) {
21078 +                               Val64RxRunt -= Val64RxFcs;
21079 +                               Val64RxHwErrs += Val64RxRunt;
21080 +                       }
21081 +                       else {
21082 +                               Val64RxFcs -= Val64RxRunt;
21083 +                               Val64RxHwErrs += Val64RxFcs;
21084 +                       }
21085 +                       break;
21086
21087                 case OID_SKGE_TX_HW_ERROR_CTS:
21088                 case OID_SKGE_OUT_ERROR_CTS:
21089 @@ -3685,9 +3546,7 @@
21090                 }
21091         }
21092
21093 -       /*
21094 -        * Retrieve value
21095 -        */
21096 +       /* Retrieve value. */
21097         switch (Id) {
21098
21099         case OID_SKGE_SUPPORTED_LIST:
21100 @@ -3697,11 +3556,11 @@
21101                         *pLen = Len;
21102                         return (SK_PNMI_ERR_TOO_SHORT);
21103                 }
21104 -               for (Offset = 0, Index = 0; Offset < Len;
21105 -                       Offset += sizeof(SK_U32), Index ++) {
21106 +               for (Offset = 0, Index = 0; Offset < Len; Index ++) {
21107
21108                         Val32 = (SK_U32)IdTable[Index].Id;
21109                         SK_PNMI_STORE_U32(pBuf + Offset, Val32);
21110 +                       Offset += sizeof(SK_U32);
21111                 }
21112                 *pLen = Len;
21113                 break;
21114 @@ -3727,8 +3586,7 @@
21115         case OID_SKGE_DRIVER_DESCR:
21116                 if (pAC->Pnmi.pDriverDescription == NULL) {
21117
21118 -                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR007,
21119 -                               SK_PNMI_ERR007MSG);
21120 +                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR007, SK_PNMI_ERR007MSG);
21121
21122                         *pLen = 0;
21123                         return (SK_PNMI_ERR_GENERAL);
21124 @@ -3737,8 +3595,7 @@
21125                 Len = SK_STRLEN(pAC->Pnmi.pDriverDescription) + 1;
21126                 if (Len > SK_PNMI_STRINGLEN1) {
21127
21128 -                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR029,
21129 -                               SK_PNMI_ERR029MSG);
21130 +                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR029, SK_PNMI_ERR029MSG);
21131
21132                         *pLen = 0;
21133                         return (SK_PNMI_ERR_GENERAL);
21134 @@ -3757,8 +3614,7 @@
21135         case OID_SKGE_DRIVER_VERSION:
21136                 if (pAC->Pnmi.pDriverVersion == NULL) {
21137
21138 -                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR030,
21139 -                               SK_PNMI_ERR030MSG);
21140 +                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR030, SK_PNMI_ERR030MSG);
21141
21142                         *pLen = 0;
21143                         return (SK_PNMI_ERR_GENERAL);
21144 @@ -3767,8 +3623,7 @@
21145                 Len = SK_STRLEN(pAC->Pnmi.pDriverVersion) + 1;
21146                 if (Len > SK_PNMI_STRINGLEN1) {
21147
21148 -                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR031,
21149 -                               SK_PNMI_ERR031MSG);
21150 +                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR031, SK_PNMI_ERR031MSG);
21151
21152                         *pLen = 0;
21153                         return (SK_PNMI_ERR_GENERAL);
21154 @@ -3787,8 +3642,7 @@
21155         case OID_SKGE_DRIVER_RELDATE:
21156                 if (pAC->Pnmi.pDriverReleaseDate == NULL) {
21157
21158 -                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR030,
21159 -                               SK_PNMI_ERR053MSG);
21160 +                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR053, SK_PNMI_ERR053MSG);
21161
21162                         *pLen = 0;
21163                         return (SK_PNMI_ERR_GENERAL);
21164 @@ -3797,8 +3651,7 @@
21165                 Len = SK_STRLEN(pAC->Pnmi.pDriverReleaseDate) + 1;
21166                 if (Len > SK_PNMI_STRINGLEN1) {
21167
21168 -                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR031,
21169 -                               SK_PNMI_ERR054MSG);
21170 +                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR054, SK_PNMI_ERR054MSG);
21171
21172                         *pLen = 0;
21173                         return (SK_PNMI_ERR_GENERAL);
21174 @@ -3817,8 +3670,7 @@
21175         case OID_SKGE_DRIVER_FILENAME:
21176                 if (pAC->Pnmi.pDriverFileName == NULL) {
21177
21178 -                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR030,
21179 -                               SK_PNMI_ERR055MSG);
21180 +                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR055, SK_PNMI_ERR055MSG);
21181
21182                         *pLen = 0;
21183                         return (SK_PNMI_ERR_GENERAL);
21184 @@ -3827,8 +3679,7 @@
21185                 Len = SK_STRLEN(pAC->Pnmi.pDriverFileName) + 1;
21186                 if (Len > SK_PNMI_STRINGLEN1) {
21187
21188 -                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR031,
21189 -                               SK_PNMI_ERR056MSG);
21190 +                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR056, SK_PNMI_ERR056MSG);
21191
21192                         *pLen = 0;
21193                         return (SK_PNMI_ERR_GENERAL);
21194 @@ -3854,8 +3705,7 @@
21195                 Len = 256;
21196                 if (VpdRead(pAC, IoC, VPD_NAME, Buf, (int *)&Len) > 0) {
21197
21198 -                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR032,
21199 -                               SK_PNMI_ERR032MSG);
21200 +                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR032, SK_PNMI_ERR032MSG);
21201
21202                         *pLen = 0;
21203                         return (SK_PNMI_ERR_GENERAL);
21204 @@ -3863,8 +3713,7 @@
21205                 Len ++;
21206                 if (Len > SK_PNMI_STRINGLEN1) {
21207
21208 -                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR033,
21209 -                               SK_PNMI_ERR033MSG);
21210 +                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR033, SK_PNMI_ERR033MSG);
21211
21212                         *pLen = 0;
21213                         return (SK_PNMI_ERR_GENERAL);
21214 @@ -3880,7 +3729,6 @@
21215                 break;
21216
21217         case OID_SKGE_HW_VERSION:
21218 -               /* Oh, I love to do some string manipulation */
21219                 if (*pLen < 5) {
21220
21221                         *pLen = 5;
21222 @@ -3889,9 +3737,9 @@
21223                 Val8 = (SK_U8)pAC->GIni.GIPciHwRev;
21224                 pBuf[0] = 4;
21225                 pBuf[1] = 'v';
21226 -               pBuf[2] = (char)(0x30 | ((Val8 >> 4) & 0x0F));
21227 +               pBuf[2] = (char)('0' | ((Val8 >> 4) & 0x0f));
21228                 pBuf[3] = '.';
21229 -               pBuf[4] = (char)(0x30 | (Val8 & 0x0F));
21230 +               pBuf[4] = (char)('0' | (Val8 & 0x0f));
21231                 *pLen = 5;
21232                 break;
21233
21234 @@ -3914,12 +3762,12 @@
21235                 break;
21236
21237         case OID_SKGE_VAUXAVAIL:
21238 -               *pBuf = (char) pAC->GIni.GIVauxAvail;
21239 +               *pBuf = (char)pAC->GIni.GIVauxAvail;
21240                 *pLen = sizeof(char);
21241                 break;
21242
21243         case OID_SKGE_BUS_TYPE:
21244 -               *pBuf = (char) SK_PNMI_BUS_PCI;
21245 +               *pBuf = (char)SK_PNMI_BUS_PCI;
21246                 *pLen = sizeof(char);
21247                 break;
21248
21249 @@ -3968,31 +3816,31 @@
21250                 break;
21251
21252         case OID_SKGE_RLMT_MONITOR_NUMBER:
21253 -/* XXX Not yet implemented by RLMT therefore we return zero elements */
21254 +               /* Not yet implemented by RLMT, therefore we return zero elements. */
21255                 Val32 = 0;
21256                 SK_PNMI_STORE_U32(pBuf, Val32);
21257                 *pLen = sizeof(SK_U32);
21258                 break;
21259
21260         case OID_SKGE_TX_SW_QUEUE_LEN:
21261 -               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
21262 +               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort). */
21263                 if (MacType == SK_MAC_XMAC) {
21264 -                       /* Dual net mode */
21265 +                       /* DualNet mode. */
21266                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21267                                 Val64 = pAC->Pnmi.BufPort[NetIndex].TxSwQueueLen;
21268                         }
21269 -                       /* Single net mode */
21270 +                       /* SingleNet mode. */
21271                         else {
21272                                 Val64 = pAC->Pnmi.BufPort[0].TxSwQueueLen +
21273                                         pAC->Pnmi.BufPort[1].TxSwQueueLen;
21274                         }
21275                 }
21276                 else {
21277 -                       /* Dual net mode */
21278 +                       /* DualNet mode. */
21279                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21280                                 Val64 = pAC->Pnmi.Port[NetIndex].TxSwQueueLen;
21281                         }
21282 -                       /* Single net mode */
21283 +                       /* SingleNet mode. */
21284                         else {
21285                                 Val64 = pAC->Pnmi.Port[0].TxSwQueueLen +
21286                                         pAC->Pnmi.Port[1].TxSwQueueLen;
21287 @@ -4004,24 +3852,24 @@
21288
21289
21290         case OID_SKGE_TX_SW_QUEUE_MAX:
21291 -               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
21292 +               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort). */
21293                 if (MacType == SK_MAC_XMAC) {
21294 -                       /* Dual net mode */
21295 +                       /* DualNet mode. */
21296                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21297                                 Val64 = pAC->Pnmi.BufPort[NetIndex].TxSwQueueMax;
21298                         }
21299 -                       /* Single net mode */
21300 +                       /* SingleNet mode. */
21301                         else {
21302                                 Val64 = pAC->Pnmi.BufPort[0].TxSwQueueMax +
21303                                         pAC->Pnmi.BufPort[1].TxSwQueueMax;
21304                         }
21305                 }
21306                 else {
21307 -                       /* Dual net mode */
21308 +                       /* DualNet mode. */
21309                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21310                                 Val64 = pAC->Pnmi.Port[NetIndex].TxSwQueueMax;
21311                         }
21312 -                       /* Single net mode */
21313 +                       /* SingleNet mode. */
21314                         else {
21315                                 Val64 = pAC->Pnmi.Port[0].TxSwQueueMax +
21316                                         pAC->Pnmi.Port[1].TxSwQueueMax;
21317 @@ -4032,24 +3880,24 @@
21318                 break;
21319
21320         case OID_SKGE_TX_RETRY:
21321 -               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
21322 +               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort). */
21323                 if (MacType == SK_MAC_XMAC) {
21324 -                       /* Dual net mode */
21325 +                       /* DualNet mode. */
21326                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21327                                 Val64 = pAC->Pnmi.BufPort[NetIndex].TxRetryCts;
21328                         }
21329 -                       /* Single net mode */
21330 +                       /* SingleNet mode. */
21331                         else {
21332                                 Val64 = pAC->Pnmi.BufPort[0].TxRetryCts +
21333                                         pAC->Pnmi.BufPort[1].TxRetryCts;
21334                         }
21335                 }
21336                 else {
21337 -                       /* Dual net mode */
21338 +                       /* DualNet mode. */
21339                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21340                                 Val64 = pAC->Pnmi.Port[NetIndex].TxRetryCts;
21341                         }
21342 -                       /* Single net mode */
21343 +                       /* SingleNet mode. */
21344                         else {
21345                                 Val64 = pAC->Pnmi.Port[0].TxRetryCts +
21346                                         pAC->Pnmi.Port[1].TxRetryCts;
21347 @@ -4060,24 +3908,24 @@
21348                 break;
21349
21350         case OID_SKGE_RX_INTR_CTS:
21351 -               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
21352 +               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort). */
21353                 if (MacType == SK_MAC_XMAC) {
21354 -                       /* Dual net mode */
21355 +                       /* DualNet mode. */
21356                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21357                                 Val64 = pAC->Pnmi.BufPort[NetIndex].RxIntrCts;
21358                         }
21359 -                       /* Single net mode */
21360 +                       /* SingleNet mode. */
21361                         else {
21362                                 Val64 = pAC->Pnmi.BufPort[0].RxIntrCts +
21363                                         pAC->Pnmi.BufPort[1].RxIntrCts;
21364                         }
21365                 }
21366                 else {
21367 -                       /* Dual net mode */
21368 +                       /* DualNet mode. */
21369                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21370                                 Val64 = pAC->Pnmi.Port[NetIndex].RxIntrCts;
21371                         }
21372 -                       /* Single net mode */
21373 +                       /* SingleNet mode. */
21374                         else {
21375                                 Val64 = pAC->Pnmi.Port[0].RxIntrCts +
21376                                         pAC->Pnmi.Port[1].RxIntrCts;
21377 @@ -4088,24 +3936,24 @@
21378                 break;
21379
21380         case OID_SKGE_TX_INTR_CTS:
21381 -               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
21382 +               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort). */
21383                 if (MacType == SK_MAC_XMAC) {
21384 -                       /* Dual net mode */
21385 +                       /* DualNet mode. */
21386                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21387                                 Val64 = pAC->Pnmi.BufPort[NetIndex].TxIntrCts;
21388                         }
21389 -                       /* Single net mode */
21390 +                       /* SingleNet mode. */
21391                         else {
21392                                 Val64 = pAC->Pnmi.BufPort[0].TxIntrCts +
21393                                         pAC->Pnmi.BufPort[1].TxIntrCts;
21394                         }
21395                 }
21396                 else {
21397 -                       /* Dual net mode */
21398 +                       /* DualNet mode. */
21399                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21400                                 Val64 = pAC->Pnmi.Port[NetIndex].TxIntrCts;
21401                         }
21402 -                       /* Single net mode */
21403 +                       /* SingleNet mode. */
21404                         else {
21405                                 Val64 = pAC->Pnmi.Port[0].TxIntrCts +
21406                                         pAC->Pnmi.Port[1].TxIntrCts;
21407 @@ -4116,24 +3964,24 @@
21408                 break;
21409
21410         case OID_SKGE_RX_NO_BUF_CTS:
21411 -               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
21412 +               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort). */
21413                 if (MacType == SK_MAC_XMAC) {
21414 -                       /* Dual net mode */
21415 +                       /* DualNet mode. */
21416                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21417                                 Val64 = pAC->Pnmi.BufPort[NetIndex].RxNoBufCts;
21418                         }
21419 -                       /* Single net mode */
21420 +                       /* SingleNet mode. */
21421                         else {
21422                                 Val64 = pAC->Pnmi.BufPort[0].RxNoBufCts +
21423                                         pAC->Pnmi.BufPort[1].RxNoBufCts;
21424                         }
21425                 }
21426                 else {
21427 -                       /* Dual net mode */
21428 +                       /* DualNet mode. */
21429                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21430                                 Val64 = pAC->Pnmi.Port[NetIndex].RxNoBufCts;
21431                         }
21432 -                       /* Single net mode */
21433 +                       /* SingleNet mode. */
21434                         else {
21435                                 Val64 = pAC->Pnmi.Port[0].RxNoBufCts +
21436                                         pAC->Pnmi.Port[1].RxNoBufCts;
21437 @@ -4144,24 +3992,24 @@
21438                 break;
21439
21440         case OID_SKGE_TX_NO_BUF_CTS:
21441 -               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
21442 +               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort). */
21443                 if (MacType == SK_MAC_XMAC) {
21444 -                       /* Dual net mode */
21445 +                       /* DualNet mode. */
21446                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21447                                 Val64 = pAC->Pnmi.BufPort[NetIndex].TxNoBufCts;
21448                         }
21449 -                       /* Single net mode */
21450 +                       /* SingleNet mode. */
21451                         else {
21452                                 Val64 = pAC->Pnmi.BufPort[0].TxNoBufCts +
21453                                         pAC->Pnmi.BufPort[1].TxNoBufCts;
21454                         }
21455                 }
21456                 else {
21457 -                       /* Dual net mode */
21458 +                       /* DualNet mode. */
21459                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21460                                 Val64 = pAC->Pnmi.Port[NetIndex].TxNoBufCts;
21461                         }
21462 -                       /* Single net mode */
21463 +                       /* SingleNet mode. */
21464                         else {
21465                                 Val64 = pAC->Pnmi.Port[0].TxNoBufCts +
21466                                         pAC->Pnmi.Port[1].TxNoBufCts;
21467 @@ -4172,24 +4020,24 @@
21468                 break;
21469
21470         case OID_SKGE_TX_USED_DESCR_NO:
21471 -               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
21472 +               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort). */
21473                 if (MacType == SK_MAC_XMAC) {
21474 -                       /* Dual net mode */
21475 +                       /* DualNet mode. */
21476                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21477                                 Val64 = pAC->Pnmi.BufPort[NetIndex].TxUsedDescrNo;
21478                         }
21479 -                       /* Single net mode */
21480 +                       /* SingleNet mode. */
21481                         else {
21482                                 Val64 = pAC->Pnmi.BufPort[0].TxUsedDescrNo +
21483                                         pAC->Pnmi.BufPort[1].TxUsedDescrNo;
21484                         }
21485                 }
21486                 else {
21487 -                       /* Dual net mode */
21488 +                       /* DualNet mode. */
21489                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21490                                 Val64 = pAC->Pnmi.Port[NetIndex].TxUsedDescrNo;
21491                         }
21492 -                       /* Single net mode */
21493 +                       /* SingleNet mode. */
21494                         else {
21495                                 Val64 = pAC->Pnmi.Port[0].TxUsedDescrNo +
21496                                         pAC->Pnmi.Port[1].TxUsedDescrNo;
21497 @@ -4200,24 +4048,24 @@
21498                 break;
21499
21500         case OID_SKGE_RX_DELIVERED_CTS:
21501 -               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
21502 +               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort). */
21503                 if (MacType == SK_MAC_XMAC) {
21504 -                       /* Dual net mode */
21505 +                       /* DualNet mode. */
21506                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21507                                 Val64 = pAC->Pnmi.BufPort[NetIndex].RxDeliveredCts;
21508                         }
21509 -                       /* Single net mode */
21510 +                       /* SingleNet mode. */
21511                         else {
21512                                 Val64 = pAC->Pnmi.BufPort[0].RxDeliveredCts +
21513                                         pAC->Pnmi.BufPort[1].RxDeliveredCts;
21514                         }
21515                 }
21516                 else {
21517 -                       /* Dual net mode */
21518 +                       /* DualNet mode. */
21519                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21520                                 Val64 = pAC->Pnmi.Port[NetIndex].RxDeliveredCts;
21521                         }
21522 -                       /* Single net mode */
21523 +                       /* SingleNet mode. */
21524                         else {
21525                                 Val64 = pAC->Pnmi.Port[0].RxDeliveredCts +
21526                                         pAC->Pnmi.Port[1].RxDeliveredCts;
21527 @@ -4228,24 +4076,24 @@
21528                 break;
21529
21530         case OID_SKGE_RX_OCTETS_DELIV_CTS:
21531 -               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
21532 +               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort). */
21533                 if (MacType == SK_MAC_XMAC) {
21534 -                       /* Dual net mode */
21535 +                       /* DualNet mode. */
21536                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21537                                 Val64 = pAC->Pnmi.BufPort[NetIndex].RxOctetsDeliveredCts;
21538                         }
21539 -                       /* Single net mode */
21540 +                       /* SingleNet mode. */
21541                         else {
21542                                 Val64 = pAC->Pnmi.BufPort[0].RxOctetsDeliveredCts +
21543                                         pAC->Pnmi.BufPort[1].RxOctetsDeliveredCts;
21544                         }
21545                 }
21546                 else {
21547 -                       /* Dual net mode */
21548 +                       /* DualNet mode. */
21549                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21550                                 Val64 = pAC->Pnmi.Port[NetIndex].RxOctetsDeliveredCts;
21551                         }
21552 -                       /* Single net mode */
21553 +                       /* SingleNet mode. */
21554                         else {
21555                                 Val64 = pAC->Pnmi.Port[0].RxOctetsDeliveredCts +
21556                                         pAC->Pnmi.Port[1].RxOctetsDeliveredCts;
21557 @@ -4266,13 +4114,13 @@
21558                 break;
21559
21560         case OID_SKGE_IN_ERRORS_CTS:
21561 -               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
21562 +               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort). */
21563                 if (MacType == SK_MAC_XMAC) {
21564 -                       /* Dual net mode */
21565 +                       /* DualNet mode. */
21566                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21567                                 Val64 = Val64RxHwErrs + pAC->Pnmi.BufPort[NetIndex].RxNoBufCts;
21568                         }
21569 -                       /* Single net mode */
21570 +                       /* SingleNet mode. */
21571                         else {
21572                                 Val64 = Val64RxHwErrs +
21573                                         pAC->Pnmi.BufPort[0].RxNoBufCts +
21574 @@ -4280,11 +4128,11 @@
21575                         }
21576                 }
21577                 else {
21578 -                       /* Dual net mode */
21579 +                       /* DualNet mode. */
21580                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21581                                 Val64 = Val64RxHwErrs + pAC->Pnmi.Port[NetIndex].RxNoBufCts;
21582                         }
21583 -                       /* Single net mode */
21584 +                       /* SingleNet mode. */
21585                         else {
21586                                 Val64 = Val64RxHwErrs +
21587                                         pAC->Pnmi.Port[0].RxNoBufCts +
21588 @@ -4296,13 +4144,13 @@
21589                 break;
21590
21591         case OID_SKGE_OUT_ERROR_CTS:
21592 -               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
21593 +               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort). */
21594                 if (MacType == SK_MAC_XMAC) {
21595 -                       /* Dual net mode */
21596 +                       /* DualNet mode. */
21597                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21598                                 Val64 = Val64TxHwErrs + pAC->Pnmi.BufPort[NetIndex].TxNoBufCts;
21599                         }
21600 -                       /* Single net mode */
21601 +                       /* SingleNet mode. */
21602                         else {
21603                                 Val64 = Val64TxHwErrs +
21604                                         pAC->Pnmi.BufPort[0].TxNoBufCts +
21605 @@ -4310,11 +4158,11 @@
21606                         }
21607                 }
21608                 else {
21609 -                       /* Dual net mode */
21610 +                       /* DualNet mode. */
21611                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21612                                 Val64 = Val64TxHwErrs + pAC->Pnmi.Port[NetIndex].TxNoBufCts;
21613                         }
21614 -                       /* Single net mode */
21615 +                       /* SingleNet mode. */
21616                         else {
21617                                 Val64 = Val64TxHwErrs +
21618                                         pAC->Pnmi.Port[0].TxNoBufCts +
21619 @@ -4326,24 +4174,24 @@
21620                 break;
21621
21622         case OID_SKGE_ERR_RECOVERY_CTS:
21623 -               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
21624 +               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort). */
21625                 if (MacType == SK_MAC_XMAC) {
21626 -                       /* Dual net mode */
21627 +                       /* DualNet mode. */
21628                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21629                                 Val64 = pAC->Pnmi.BufPort[NetIndex].ErrRecoveryCts;
21630                         }
21631 -                       /* Single net mode */
21632 +                       /* SingleNet mode. */
21633                         else {
21634                                 Val64 = pAC->Pnmi.BufPort[0].ErrRecoveryCts +
21635                                         pAC->Pnmi.BufPort[1].ErrRecoveryCts;
21636                         }
21637                 }
21638                 else {
21639 -                       /* Dual net mode */
21640 +                       /* DualNet mode. */
21641                         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21642                                 Val64 = pAC->Pnmi.Port[NetIndex].ErrRecoveryCts;
21643                         }
21644 -                       /* Single net mode */
21645 +                       /* SingleNet mode. */
21646                         else {
21647                                 Val64 = pAC->Pnmi.Port[0].ErrRecoveryCts +
21648                                         pAC->Pnmi.Port[1].ErrRecoveryCts;
21649 @@ -4367,7 +4215,7 @@
21650                 break;
21651
21652         case OID_GEN_RCV_ERROR:
21653 -               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
21654 +               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort). */
21655                 if (MacType == SK_MAC_XMAC) {
21656                         Val64 = Val64RxHwErrs + pAC->Pnmi.BufPort[NetIndex].RxNoBufCts;
21657                 }
21658 @@ -4376,7 +4224,7 @@
21659                 }
21660
21661                 /*
21662 -                * by default 32bit values are evaluated
21663 +                * By default 32bit values are evaluated.
21664                  */
21665                 if (!Is64BitReq) {
21666                         Val32 = (SK_U32)Val64;
21667 @@ -4390,7 +4238,7 @@
21668                 break;
21669
21670         case OID_GEN_XMIT_ERROR:
21671 -               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
21672 +               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort). */
21673                 if (MacType == SK_MAC_XMAC) {
21674                         Val64 = Val64TxHwErrs + pAC->Pnmi.BufPort[NetIndex].TxNoBufCts;
21675                 }
21676 @@ -4399,7 +4247,7 @@
21677                 }
21678
21679                 /*
21680 -                * by default 32bit values are evaluated
21681 +                * By default 32bit values are evaluated.
21682                  */
21683                 if (!Is64BitReq) {
21684                         Val32 = (SK_U32)Val64;
21685 @@ -4413,16 +4261,19 @@
21686                 break;
21687
21688         case OID_GEN_RCV_NO_BUFFER:
21689 -               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
21690 +               /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort). */
21691                 if (MacType == SK_MAC_XMAC) {
21692 -                       Val64 = pAC->Pnmi.BufPort[NetIndex].RxNoBufCts;
21693 +                       Val64 = pAC->Pnmi.BufPort[NetIndex].RxNoBufCts +
21694 +                               GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_OVERFLOW, NetIndex);
21695 +
21696                 }
21697                 else {
21698 -                       Val64 = pAC->Pnmi.Port[NetIndex].RxNoBufCts;
21699 +                       Val64 = pAC->Pnmi.Port[NetIndex].RxNoBufCts +
21700 +                               GetStatVal(pAC, IoC, 0, SK_PNMI_HRX_OVERFLOW, NetIndex);
21701                 }
21702
21703                 /*
21704 -                * by default 32bit values are evaluated
21705 +                * By default 32bit values are evaluated.
21706                  */
21707                 if (!Is64BitReq) {
21708                         Val32 = (SK_U32)Val64;
21709 @@ -4442,8 +4293,7 @@
21710                 break;
21711
21712         default:
21713 -               SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR034,
21714 -                       SK_PNMI_ERR034MSG);
21715 +               SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR034, SK_PNMI_ERR034MSG);
21716
21717                 *pLen = 0;
21718                 return (SK_PNMI_ERR_GENERAL);
21719 @@ -4500,25 +4350,17 @@
21720         SK_U32          Val32;
21721         SK_U64          Val64;
21722
21723 -
21724 -       /*
21725 -        * Check instance. Only single instance OIDs are allowed here.
21726 -        */
21727 +       /* Check instance. Only single instance OIDs are allowed here. */
21728         if (Instance != (SK_U32)(-1) && Instance != 1) {
21729
21730                 *pLen = 0;
21731                 return (SK_PNMI_ERR_UNKNOWN_INST);
21732         }
21733
21734 -       /*
21735 -        * Perform the requested action.
21736 -        */
21737 +       /* Perform the requested action. */
21738         if (Action == SK_PNMI_GET) {
21739
21740 -               /*
21741 -                * Check if the buffer length is large enough.
21742 -                */
21743 -
21744 +               /* Check if the buffer length is large enough. */
21745                 switch (Id) {
21746
21747                 case OID_SKGE_RLMT_MODE:
21748 @@ -4551,8 +4393,7 @@
21749                         break;
21750
21751                 default:
21752 -                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR035,
21753 -                               SK_PNMI_ERR035MSG);
21754 +                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR035, SK_PNMI_ERR035MSG);
21755
21756                         *pLen = 0;
21757                         return (SK_PNMI_ERR_GENERAL);
21758 @@ -4571,9 +4412,7 @@
21759                 }
21760                 pAC->Pnmi.RlmtUpdatedFlag ++;
21761
21762 -               /*
21763 -                * Retrieve Value
21764 -               */
21765 +               /* Retrieve value. */
21766                 switch (Id) {
21767
21768                 case OID_SKGE_RLMT_MODE:
21769 @@ -4651,17 +4490,17 @@
21770                 pAC->Pnmi.RlmtUpdatedFlag --;
21771         }
21772         else {
21773 -               /* Perform a preset or set */
21774 +               /* Perform a PRESET or SET. */
21775                 switch (Id) {
21776
21777                 case OID_SKGE_RLMT_MODE:
21778 -                       /* Check if the buffer length is plausible */
21779 +                       /* Check if the buffer length is plausible. */
21780                         if (*pLen < sizeof(char)) {
21781
21782                                 *pLen = sizeof(char);
21783                                 return (SK_PNMI_ERR_TOO_SHORT);
21784                         }
21785 -                       /* Check if the value range is correct */
21786 +                       /* Check if the value range is correct. */
21787                         if (*pLen != sizeof(char) ||
21788                                 (*pBuf & SK_PNMI_RLMT_MODE_CHK_LINK) == 0 ||
21789                                 *(SK_U8 *)pBuf > 15) {
21790 @@ -4669,21 +4508,21 @@
21791                                 *pLen = 0;
21792                                 return (SK_PNMI_ERR_BAD_VALUE);
21793                         }
21794 -                       /* The preset ends here */
21795 +                       /* The PRESET ends here. */
21796                         if (Action == SK_PNMI_PRESET) {
21797
21798                                 *pLen = 0;
21799                                 return (SK_PNMI_ERR_OK);
21800                         }
21801 -                       /* Send an event to RLMT to change the mode */
21802 +                       /* Send an event to RLMT to change the mode. */
21803                         SK_MEMSET((char *)&EventParam, 0, sizeof(EventParam));
21804 +
21805                         EventParam.Para32[0] |= (SK_U32)(*pBuf);
21806                         EventParam.Para32[1] = 0;
21807                         if (SkRlmtEvent(pAC, IoC, SK_RLMT_MODE_CHANGE,
21808                                 EventParam) > 0) {
21809
21810 -                               SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR037,
21811 -                                       SK_PNMI_ERR037MSG);
21812 +                               SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR037, SK_PNMI_ERR037MSG);
21813
21814                                 *pLen = 0;
21815                                 return (SK_PNMI_ERR_GENERAL);
21816 @@ -4691,20 +4530,25 @@
21817                         break;
21818
21819                 case OID_SKGE_RLMT_PORT_PREFERRED:
21820 -                       /* Check if the buffer length is plausible */
21821 +                       /* PRESET/SET action makes no sense in Dual Net mode. */
21822 +                       if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21823 +                               break;
21824 +                       }
21825 +
21826 +                       /* Check if the buffer length is plausible. */
21827                         if (*pLen < sizeof(char)) {
21828
21829                                 *pLen = sizeof(char);
21830                                 return (SK_PNMI_ERR_TOO_SHORT);
21831                         }
21832 -                       /* Check if the value range is correct */
21833 +                       /* Check if the value range is correct. */
21834                         if (*pLen != sizeof(char) || *(SK_U8 *)pBuf >
21835                                 (SK_U8)pAC->GIni.GIMacsFound) {
21836
21837                                 *pLen = 0;
21838                                 return (SK_PNMI_ERR_BAD_VALUE);
21839                         }
21840 -                       /* The preset ends here */
21841 +                       /* The PRESET ends here. */
21842                         if (Action == SK_PNMI_PRESET) {
21843
21844                                 *pLen = 0;
21845 @@ -4717,13 +4561,13 @@
21846                          * make the decision which is the preferred port.
21847                          */
21848                         SK_MEMSET((char *)&EventParam, 0, sizeof(EventParam));
21849 +
21850                         EventParam.Para32[0] = (SK_U32)(*pBuf) - 1;
21851                         EventParam.Para32[1] = NetIndex;
21852                         if (SkRlmtEvent(pAC, IoC, SK_RLMT_PREFPORT_CHANGE,
21853                                 EventParam) > 0) {
21854
21855 -                               SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR038,
21856 -                                       SK_PNMI_ERR038MSG);
21857 +                               SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR038, SK_PNMI_ERR038MSG);
21858
21859                                 *pLen = 0;
21860                                 return (SK_PNMI_ERR_GENERAL);
21861 @@ -4731,22 +4575,20 @@
21862                         break;
21863
21864                 case OID_SKGE_RLMT_CHANGE_THRES:
21865 -                       /* Check if the buffer length is plausible */
21866 +                       /* Check if the buffer length is plausible. */
21867                         if (*pLen < sizeof(SK_U64)) {
21868
21869                                 *pLen = sizeof(SK_U64);
21870                                 return (SK_PNMI_ERR_TOO_SHORT);
21871                         }
21872 -                       /*
21873 -                        * There are not many restrictions to the
21874 -                        * value range.
21875 -                        */
21876 +
21877 +                       /* There are not many restrictions to the value range. */
21878                         if (*pLen != sizeof(SK_U64)) {
21879
21880                                 *pLen = 0;
21881                                 return (SK_PNMI_ERR_BAD_VALUE);
21882                         }
21883 -                       /* A preset ends here */
21884 +                       /* The PRESET ends here. */
21885                         if (Action == SK_PNMI_PRESET) {
21886
21887                                 *pLen = 0;
21888 @@ -4761,7 +4603,7 @@
21889                         break;
21890
21891                 default:
21892 -                       /* The other OIDs are not be able for set */
21893 +                       /* The other OIDs are not be able for set. */
21894                         *pLen = 0;
21895                         return (SK_PNMI_ERR_READ_ONLY);
21896                 }
21897 @@ -4806,54 +4648,49 @@
21898         SK_U32          Val32;
21899         SK_U64          Val64;
21900
21901 -       /*
21902 -        * Calculate the port indexes from the instance.
21903 -        */
21904 +
21905 +       /* Calculate the port indexes from the instance. */
21906         PhysPortMax = pAC->GIni.GIMacsFound;
21907
21908         if ((Instance != (SK_U32)(-1))) {
21909 -               /* Check instance range */
21910 +               /* Check instance range. */
21911                 if ((Instance < 1) || (Instance > PhysPortMax)) {
21912
21913                         *pLen = 0;
21914                         return (SK_PNMI_ERR_UNKNOWN_INST);
21915                 }
21916
21917 -               /* Single net mode */
21918 +               /* SingleNet mode. */
21919                 PhysPortIndex = Instance - 1;
21920
21921 -               /* Dual net mode */
21922 +               /* DualNet mode. */
21923                 if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21924                         PhysPortIndex = NetIndex;
21925                 }
21926
21927 -               /* Both net modes */
21928 +               /* Both net modes. */
21929                 Limit = PhysPortIndex + 1;
21930         }
21931         else {
21932 -               /* Single net mode */
21933 +               /* SingleNet mode. */
21934                 PhysPortIndex = 0;
21935                 Limit = PhysPortMax;
21936
21937 -               /* Dual net mode */
21938 +               /* DualNet mode. */
21939                 if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
21940                         PhysPortIndex = NetIndex;
21941                         Limit = PhysPortIndex + 1;
21942                 }
21943         }
21944
21945 -       /*
21946 -        * Currently only get requests are allowed.
21947 -        */
21948 +       /* Currently only GET requests are allowed. */
21949         if (Action != SK_PNMI_GET) {
21950
21951                 *pLen = 0;
21952                 return (SK_PNMI_ERR_READ_ONLY);
21953         }
21954
21955 -       /*
21956 -        * Check if the buffer length is large enough.
21957 -        */
21958 +       /* Check if the buffer length is large enough. */
21959         switch (Id) {
21960
21961         case OID_SKGE_RLMT_PORT_INDEX:
21962 @@ -4877,8 +4714,7 @@
21963                 break;
21964
21965         default:
21966 -               SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR039,
21967 -                       SK_PNMI_ERR039MSG);
21968 +               SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR039, SK_PNMI_ERR039MSG);
21969
21970                 *pLen = 0;
21971                 return (SK_PNMI_ERR_GENERAL);
21972 @@ -4896,9 +4732,7 @@
21973         }
21974         pAC->Pnmi.RlmtUpdatedFlag ++;
21975
21976 -       /*
21977 -        * Get value
21978 -        */
21979 +       /* Get value. */
21980         Offset = 0;
21981         for (; PhysPortIndex < Limit; PhysPortIndex ++) {
21982
21983 @@ -5011,19 +4845,21 @@
21984         int                     Ret;
21985         SK_EVPARA       EventParam;
21986         SK_U32          Val32;
21987 +#ifdef SK_PHY_LP_MODE
21988 +       SK_U8   CurrentPhyPowerState;
21989 +#endif /* SK_PHY_LP_MODE */
21990
21991 -       /*
21992 -        * Calculate instance if wished. MAC index 0 is the virtual MAC.
21993 -        */
21994 +
21995 +       /* Calculate instance if wished. MAC index 0 is the virtual MAC. */
21996         PhysPortMax = pAC->GIni.GIMacsFound;
21997         LogPortMax = SK_PNMI_PORT_PHYS2LOG(PhysPortMax);
21998
21999 -       if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) { /* Dual net mode */
22000 +       if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) { /* DualNet mode. */
22001                 LogPortMax--;
22002         }
22003
22004 -       if ((Instance != (SK_U32)(-1))) { /* Only one specific instance is queried */
22005 -               /* Check instance range */
22006 +       if ((Instance != (SK_U32)(-1))) { /* Only one specific instance is queried. */
22007 +               /* Check instance range. */
22008                 if ((Instance < 1) || (Instance > LogPortMax)) {
22009
22010                         *pLen = 0;
22011 @@ -5033,18 +4869,16 @@
22012                 Limit = LogPortIndex + 1;
22013         }
22014
22015 -       else { /* Instance == (SK_U32)(-1), get all Instances of that OID */
22016 +       else { /* Instance == (SK_U32)(-1), get all Instances of that OID. */
22017
22018                 LogPortIndex = 0;
22019                 Limit = LogPortMax;
22020         }
22021
22022 -       /*
22023 -        * Perform action
22024 -        */
22025 +       /* Perform action. */
22026         if (Action == SK_PNMI_GET) {
22027
22028 -               /* Check length */
22029 +               /* Check length. */
22030                 switch (Id) {
22031
22032                 case OID_SKGE_PMD:
22033 @@ -5082,8 +4916,7 @@
22034                         break;
22035
22036                 default:
22037 -                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR041,
22038 -                               SK_PNMI_ERR041MSG);
22039 +                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR041, SK_PNMI_ERR041MSG);
22040                         *pLen = 0;
22041                         return (SK_PNMI_ERR_GENERAL);
22042                 }
22043 @@ -5099,9 +4932,7 @@
22044                 }
22045                 pAC->Pnmi.SirqUpdatedFlag ++;
22046
22047 -               /*
22048 -                * Get value
22049 -                */
22050 +               /* Get value. */
22051                 Offset = 0;
22052                 for (; LogPortIndex < Limit; LogPortIndex ++) {
22053
22054 @@ -5111,107 +4942,99 @@
22055
22056                         case OID_SKGE_PMD:
22057                                 *pBufPtr = pAC->Pnmi.PMD;
22058 -                               Offset += sizeof(char);
22059 +                               Offset ++;
22060                                 break;
22061
22062                         case OID_SKGE_CONNECTOR:
22063                                 *pBufPtr = pAC->Pnmi.Connector;
22064 -                               Offset += sizeof(char);
22065 +                               Offset ++;
22066                                 break;
22067
22068                         case OID_SKGE_PHY_TYPE:
22069 -                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
22070 +                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNet mode. */
22071                                         if (LogPortIndex == 0) {
22072                                                 continue;
22073                                         }
22074 -                                       else {
22075 -                                               /* Get value for physical ports */
22076 -                                               PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
22077 -                                                       pAC, LogPortIndex);
22078 -                                               Val32 = pAC->GIni.GP[PhysPortIndex].PhyType;
22079 -                                               SK_PNMI_STORE_U32(pBufPtr, Val32);
22080 -                                       }
22081 +                                       /* Get value for physical port. */
22082 +                                       PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC, LogPortIndex);
22083 +                                       Val32 = pAC->GIni.GP[PhysPortIndex].PhyType;
22084                                 }
22085 -                               else { /* DualNetMode */
22086 +                               else { /* DualNet mode. */
22087
22088                                         Val32 = pAC->GIni.GP[NetIndex].PhyType;
22089 -                                       SK_PNMI_STORE_U32(pBufPtr, Val32);
22090                                 }
22091 +                               SK_PNMI_STORE_U32(pBufPtr, Val32);
22092                                 Offset += sizeof(SK_U32);
22093                                 break;
22094
22095  #ifdef SK_PHY_LP_MODE
22096                         case OID_SKGE_PHY_LP_MODE:
22097 -                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
22098 +                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNet mode. */
22099                                         if (LogPortIndex == 0) {
22100                                                 continue;
22101                                         }
22102 -                                       else {
22103 -                                               /* Get value for physical ports */
22104 -                                               PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC, LogPortIndex);
22105 -                                               Val8 = (SK_U8) pAC->GIni.GP[PhysPortIndex].PPhyPowerState;
22106 -                                               *pBufPtr = Val8;
22107 -                                       }
22108 +                                       /* Get value for physical port. */
22109 +                                       PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC, LogPortIndex);
22110 +                                       *pBufPtr = (SK_U8)pAC->GIni.GP[PhysPortIndex].PPhyPowerState;
22111                                 }
22112 -                               else { /* DualNetMode */
22113 +                               else { /* DualNet mode. */
22114
22115 -                                       Val8 = (SK_U8) pAC->GIni.GP[PhysPortIndex].PPhyPowerState;
22116 -                                       *pBufPtr = Val8;
22117 +                                       *pBufPtr = (SK_U8)pAC->GIni.GP[NetIndex].PPhyPowerState;
22118                                 }
22119                                 Offset += sizeof(SK_U8);
22120                                 break;
22121  #endif
22122
22123                         case OID_SKGE_LINK_CAP:
22124 -                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
22125 +                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNet mode. */
22126                                         if (LogPortIndex == 0) {
22127 -                                               /* Get value for virtual port */
22128 +                                               /* Get value for virtual port. */
22129                                                 VirtualConf(pAC, IoC, Id, pBufPtr);
22130                                         }
22131                                         else {
22132 -                                               /* Get value for physical ports */
22133 +                                               /* Get value for physical port. */
22134                                                 PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
22135                                                         pAC, LogPortIndex);
22136
22137                                                 *pBufPtr = pAC->GIni.GP[PhysPortIndex].PLinkCap;
22138                                         }
22139                                 }
22140 -                               else { /* DualNetMode */
22141 +                               else { /* DualNet mode. */
22142
22143                                         *pBufPtr = pAC->GIni.GP[NetIndex].PLinkCap;
22144                                 }
22145 -                               Offset += sizeof(char);
22146 +                               Offset ++;
22147                                 break;
22148
22149                         case OID_SKGE_LINK_MODE:
22150 -                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
22151 +                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNet mode. */
22152                                         if (LogPortIndex == 0) {
22153 -                                               /* Get value for virtual port */
22154 +                                               /* Get value for virtual port. */
22155                                                 VirtualConf(pAC, IoC, Id, pBufPtr);
22156                                         }
22157                                         else {
22158 -                                               /* Get value for physical ports */
22159 +                                               /* Get value for physical port. */
22160                                                 PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
22161                                                         pAC, LogPortIndex);
22162
22163                                                 *pBufPtr = pAC->GIni.GP[PhysPortIndex].PLinkModeConf;
22164                                         }
22165                                 }
22166 -                               else { /* DualNetMode */
22167 +                               else { /* DualNet mode. */
22168
22169                                         *pBufPtr = pAC->GIni.GP[NetIndex].PLinkModeConf;
22170                                 }
22171 -                               Offset += sizeof(char);
22172 +                               Offset ++;
22173                                 break;
22174
22175                         case OID_SKGE_LINK_MODE_STATUS:
22176 -                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
22177 +                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNet mode. */
22178                                         if (LogPortIndex == 0) {
22179 -                                               /* Get value for virtual port */
22180 +                                               /* Get value for virtual port. */
22181                                                 VirtualConf(pAC, IoC, Id, pBufPtr);
22182                                         }
22183                                         else {
22184 -                                               /* Get value for physical port */
22185 +                                               /* Get value for physical port. */
22186                                                 PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
22187                                                         pAC, LogPortIndex);
22188
22189 @@ -5219,147 +5042,147 @@
22190                                                         CalculateLinkModeStatus(pAC, IoC, PhysPortIndex);
22191                                         }
22192                                 }
22193 -                               else { /* DualNetMode */
22194 +                               else { /* DualNet mode. */
22195
22196                                         *pBufPtr = CalculateLinkModeStatus(pAC, IoC, NetIndex);
22197                                 }
22198 -                               Offset += sizeof(char);
22199 +                               Offset ++;
22200                                 break;
22201
22202                         case OID_SKGE_LINK_STATUS:
22203 -                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
22204 +                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNet mode. */
22205                                         if (LogPortIndex == 0) {
22206 -                                               /* Get value for virtual port */
22207 +                                               /* Get value for virtual port. */
22208                                                 VirtualConf(pAC, IoC, Id, pBufPtr);
22209                                         }
22210                                         else {
22211 -                                               /* Get value for physical ports */
22212 +                                               /* Get value for physical port. */
22213                                                 PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
22214                                                         pAC, LogPortIndex);
22215
22216                                                 *pBufPtr = CalculateLinkStatus(pAC, IoC, PhysPortIndex);
22217                                         }
22218                                 }
22219 -                               else { /* DualNetMode */
22220 +                               else { /* DualNet mode. */
22221
22222                                         *pBufPtr = CalculateLinkStatus(pAC, IoC, NetIndex);
22223                                 }
22224 -                               Offset += sizeof(char);
22225 +                               Offset ++;
22226                                 break;
22227
22228                         case OID_SKGE_FLOWCTRL_CAP:
22229 -                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
22230 +                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNet mode. */
22231                                         if (LogPortIndex == 0) {
22232 -                                               /* Get value for virtual port */
22233 +                                               /* Get value for virtual port. */
22234                                                 VirtualConf(pAC, IoC, Id, pBufPtr);
22235                                         }
22236                                         else {
22237 -                                               /* Get value for physical ports */
22238 +                                               /* Get value for physical port. */
22239                                                 PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
22240                                                         pAC, LogPortIndex);
22241
22242                                                 *pBufPtr = pAC->GIni.GP[PhysPortIndex].PFlowCtrlCap;
22243                                         }
22244                                 }
22245 -                               else { /* DualNetMode */
22246 +                               else { /* DualNet mode. */
22247
22248                                         *pBufPtr = pAC->GIni.GP[NetIndex].PFlowCtrlCap;
22249                                 }
22250 -                               Offset += sizeof(char);
22251 +                               Offset ++;
22252                                 break;
22253
22254                         case OID_SKGE_FLOWCTRL_MODE:
22255 -                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
22256 +                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNet mode. */
22257                                         if (LogPortIndex == 0) {
22258 -                                               /* Get value for virtual port */
22259 +                                               /* Get value for virtual port. */
22260                                                 VirtualConf(pAC, IoC, Id, pBufPtr);
22261                                         }
22262                                         else {
22263 -                                               /* Get value for physical port */
22264 +                                               /* Get value for physical port. */
22265                                                 PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
22266                                                         pAC, LogPortIndex);
22267
22268                                                 *pBufPtr = pAC->GIni.GP[PhysPortIndex].PFlowCtrlMode;
22269                                         }
22270                                 }
22271 -                               else { /* DualNetMode */
22272 +                               else { /* DualNet mode. */
22273
22274                                         *pBufPtr = pAC->GIni.GP[NetIndex].PFlowCtrlMode;
22275                                 }
22276 -                               Offset += sizeof(char);
22277 +                               Offset ++;
22278                                 break;
22279
22280                         case OID_SKGE_FLOWCTRL_STATUS:
22281 -                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
22282 +                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNet mode. */
22283                                         if (LogPortIndex == 0) {
22284 -                                               /* Get value for virtual port */
22285 +                                               /* Get value for virtual port. */
22286                                                 VirtualConf(pAC, IoC, Id, pBufPtr);
22287                                         }
22288                                         else {
22289 -                                               /* Get value for physical port */
22290 +                                               /* Get value for physical port. */
22291                                                 PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
22292                                                         pAC, LogPortIndex);
22293
22294                                                 *pBufPtr = pAC->GIni.GP[PhysPortIndex].PFlowCtrlStatus;
22295                                         }
22296                                 }
22297 -                               else { /* DualNetMode */
22298 +                               else { /* DualNet mode. */
22299
22300                                         *pBufPtr = pAC->GIni.GP[NetIndex].PFlowCtrlStatus;
22301                                 }
22302 -                               Offset += sizeof(char);
22303 +                               Offset ++;
22304                                 break;
22305
22306                         case OID_SKGE_PHY_OPERATION_CAP:
22307 -                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
22308 +                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNet Mode. */
22309                                         if (LogPortIndex == 0) {
22310 -                                               /* Get value for virtual port */
22311 +                                               /* Get value for virtual port. */
22312                                                 VirtualConf(pAC, IoC, Id, pBufPtr);
22313                                         }
22314                                         else {
22315 -                                               /* Get value for physical ports */
22316 +                                               /* Get value for physical port. */
22317                                                 PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
22318                                                         pAC, LogPortIndex);
22319
22320                                                 *pBufPtr = pAC->GIni.GP[PhysPortIndex].PMSCap;
22321                                         }
22322                                 }
22323 -                               else { /* DualNetMode */
22324 +                               else { /* DualNet mode. */
22325
22326                                         *pBufPtr = pAC->GIni.GP[NetIndex].PMSCap;
22327                                 }
22328 -                               Offset += sizeof(char);
22329 +                               Offset ++;
22330                                 break;
22331
22332                         case OID_SKGE_PHY_OPERATION_MODE:
22333 -                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
22334 +                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNet mode. */
22335                                         if (LogPortIndex == 0) {
22336 -                                               /* Get value for virtual port */
22337 +                                               /* Get value for virtual port. */
22338                                                 VirtualConf(pAC, IoC, Id, pBufPtr);
22339                                         }
22340                                         else {
22341 -                                               /* Get value for physical port */
22342 +                                               /* Get value for physical port. */
22343                                                 PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
22344                                                         pAC, LogPortIndex);
22345
22346                                                 *pBufPtr = pAC->GIni.GP[PhysPortIndex].PMSMode;
22347                                         }
22348                                 }
22349 -                               else { /* DualNetMode */
22350 +                               else { /* DualNet mode. */
22351
22352                                         *pBufPtr = pAC->GIni.GP[NetIndex].PMSMode;
22353                                 }
22354 -                               Offset += sizeof(char);
22355 +                               Offset ++;
22356                                 break;
22357
22358                         case OID_SKGE_PHY_OPERATION_STATUS:
22359 -                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
22360 +                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNet mode. */
22361                                         if (LogPortIndex == 0) {
22362 -                                               /* Get value for virtual port */
22363 +                                               /* Get value for virtual port. */
22364                                                 VirtualConf(pAC, IoC, Id, pBufPtr);
22365                                         }
22366                                         else {
22367 -                                               /* Get value for physical port */
22368 +                                               /* Get value for physical port. */
22369                                                 PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
22370                                                         pAC, LogPortIndex);
22371
22372 @@ -5370,70 +5193,70 @@
22373
22374                                         *pBufPtr = pAC->GIni.GP[NetIndex].PMSStatus;
22375                                 }
22376 -                               Offset += sizeof(char);
22377 +                               Offset ++;
22378                                 break;
22379
22380                         case OID_SKGE_SPEED_CAP:
22381 -                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
22382 +                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNet mode. */
22383                                         if (LogPortIndex == 0) {
22384 -                                               /* Get value for virtual port */
22385 +                                               /* Get value for virtual port. */
22386                                                 VirtualConf(pAC, IoC, Id, pBufPtr);
22387                                         }
22388                                         else {
22389 -                                               /* Get value for physical ports */
22390 +                                               /* Get value for physical port. */
22391                                                 PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
22392                                                         pAC, LogPortIndex);
22393
22394                                                 *pBufPtr = pAC->GIni.GP[PhysPortIndex].PLinkSpeedCap;
22395                                         }
22396                                 }
22397 -                               else { /* DualNetMode */
22398 +                               else { /* DualNet mode. */
22399
22400                                         *pBufPtr = pAC->GIni.GP[NetIndex].PLinkSpeedCap;
22401                                 }
22402 -                               Offset += sizeof(char);
22403 +                               Offset ++;
22404                                 break;
22405
22406                         case OID_SKGE_SPEED_MODE:
22407 -                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
22408 +                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNet mode. */
22409                                         if (LogPortIndex == 0) {
22410 -                                               /* Get value for virtual port */
22411 +                                               /* Get value for virtual port. */
22412                                                 VirtualConf(pAC, IoC, Id, pBufPtr);
22413                                         }
22414                                         else {
22415 -                                               /* Get value for physical port */
22416 +                                               /* Get value for physical port. */
22417                                                 PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
22418                                                         pAC, LogPortIndex);
22419
22420                                                 *pBufPtr = pAC->GIni.GP[PhysPortIndex].PLinkSpeed;
22421                                         }
22422                                 }
22423 -                               else { /* DualNetMode */
22424 +                               else { /* DualNet mode. */
22425
22426                                         *pBufPtr = pAC->GIni.GP[NetIndex].PLinkSpeed;
22427                                 }
22428 -                               Offset += sizeof(char);
22429 +                               Offset ++;
22430                                 break;
22431
22432                         case OID_SKGE_SPEED_STATUS:
22433 -                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
22434 +                               if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNet mode. */
22435                                         if (LogPortIndex == 0) {
22436 -                                               /* Get value for virtual port */
22437 +                                               /* Get value for virtual port. */
22438                                                 VirtualConf(pAC, IoC, Id, pBufPtr);
22439                                         }
22440                                         else {
22441 -                                               /* Get value for physical port */
22442 +                                               /* Get value for physical port. */
22443                                                 PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(
22444                                                         pAC, LogPortIndex);
22445
22446                                                 *pBufPtr = pAC->GIni.GP[PhysPortIndex].PLinkSpeedUsed;
22447                                         }
22448                                 }
22449 -                               else { /* DualNetMode */
22450 +                               else { /* DualNet mode. */
22451
22452                                         *pBufPtr = pAC->GIni.GP[NetIndex].PLinkSpeedUsed;
22453                                 }
22454 -                               Offset += sizeof(char);
22455 +                               Offset ++;
22456                                 break;
22457
22458                         case OID_SKGE_MTU:
22459 @@ -5486,40 +5309,33 @@
22460                         return (SK_PNMI_ERR_TOO_SHORT);
22461                 }
22462                 break;
22463 -#endif
22464 +#endif /* SK_PHY_LP_MODE */
22465
22466         case OID_SKGE_MTU:
22467 -               if (*pLen < sizeof(SK_U32)) {
22468 +               if (*pLen < (Limit - LogPortIndex) * sizeof(SK_U32)) {
22469
22470 -                       *pLen = sizeof(SK_U32);
22471 +                       *pLen = (Limit - LogPortIndex) * sizeof(SK_U32);
22472                         return (SK_PNMI_ERR_TOO_SHORT);
22473                 }
22474 -               if (*pLen != sizeof(SK_U32)) {
22475 -
22476 -                       *pLen = 0;
22477 -                       return (SK_PNMI_ERR_BAD_VALUE);
22478 -               }
22479                 break;
22480 -
22481 +
22482      default:
22483                 *pLen = 0;
22484                 return (SK_PNMI_ERR_READ_ONLY);
22485         }
22486
22487 -       /*
22488 -        * Perform preset or set
22489 -        */
22490 +       /* Perform PRESET or SET. */
22491         Offset = 0;
22492         for (; LogPortIndex < Limit; LogPortIndex ++) {
22493
22494 +               Val8 = *(pBuf + Offset);
22495 +
22496                 switch (Id) {
22497
22498                 case OID_SKGE_LINK_MODE:
22499 -                       /* Check the value range */
22500 -                       Val8 = *(pBuf + Offset);
22501 +                       /* Check the value range. */
22502                         if (Val8 == 0) {
22503 -
22504 -                               Offset += sizeof(char);
22505 +                               Offset++;
22506                                 break;
22507                         }
22508                         if (Val8 < SK_LMODE_HALF ||
22509 @@ -5530,51 +5346,68 @@
22510                                 return (SK_PNMI_ERR_BAD_VALUE);
22511                         }
22512
22513 -                       /* The preset ends here */
22514 +                       /* The PRESET ends here. */
22515                         if (Action == SK_PNMI_PRESET) {
22516
22517                                 return (SK_PNMI_ERR_OK);
22518                         }
22519
22520 -                       if (LogPortIndex == 0) {
22521 -
22522 -                               /*
22523 -                                * The virtual port consists of all currently
22524 -                                * active ports. Find them and send an event
22525 -                                * with the new link mode to SIRQ.
22526 -                                */
22527 -                               for (PhysPortIndex = 0;
22528 -                                       PhysPortIndex < PhysPortMax;
22529 -                                       PhysPortIndex ++) {
22530 -
22531 -                                       if (!pAC->Pnmi.Port[PhysPortIndex].
22532 -                                               ActiveFlag) {
22533 -
22534 -                                               continue;
22535 -                                       }
22536 +                       if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNet mode. */
22537 +                               if (LogPortIndex == 0) {
22538 +                                       /*
22539 +                                        * The virtual port consists of all currently
22540 +                                        * active ports. Find them and send an event
22541 +                                        * with the new link mode to SIRQ.
22542 +                                        */
22543 +                                       for (PhysPortIndex = 0; PhysPortIndex < PhysPortMax;
22544 +                                               PhysPortIndex ++) {
22545
22546 -                                       EventParam.Para32[0] = PhysPortIndex;
22547 +                                               if (!pAC->Pnmi.Port[PhysPortIndex].ActiveFlag) {
22548 +                                                       continue;
22549 +                                               }
22550 +
22551 +                                               EventParam.Para32[0] = PhysPortIndex;
22552 +                                               EventParam.Para32[1] = (SK_U32)Val8;
22553 +                                               if (SkGeSirqEvent(pAC, IoC,
22554 +                                                       SK_HWEV_SET_LMODE,
22555 +                                                       EventParam) > 0) {
22556 +
22557 +                                                       SK_ERR_LOG(pAC, SK_ERRCL_SW,
22558 +                                                               SK_PNMI_ERR043,
22559 +                                                               SK_PNMI_ERR043MSG);
22560 +
22561 +                                                       *pLen = 0;
22562 +                                                       return (SK_PNMI_ERR_GENERAL);
22563 +                                               }
22564 +                                       } /* for */
22565 +                               }
22566 +                               else {
22567 +                                       /*
22568 +                                        * Send an event with the new link mode to
22569 +                                        * the SIRQ module.
22570 +                                        */
22571 +                                       EventParam.Para32[0] = SK_PNMI_PORT_LOG2PHYS(
22572 +                                               pAC, LogPortIndex);
22573                                         EventParam.Para32[1] = (SK_U32)Val8;
22574 -                                       if (SkGeSirqEvent(pAC, IoC,
22575 -                                               SK_HWEV_SET_LMODE,
22576 +                                       if (SkGeSirqEvent(pAC, IoC, SK_HWEV_SET_LMODE,
22577                                                 EventParam) > 0) {
22578 -
22579 +
22580                                                 SK_ERR_LOG(pAC, SK_ERRCL_SW,
22581                                                         SK_PNMI_ERR043,
22582                                                         SK_PNMI_ERR043MSG);
22583 -
22584 +
22585                                                 *pLen = 0;
22586                                                 return (SK_PNMI_ERR_GENERAL);
22587                                         }
22588                                 }
22589                         }
22590 -                       else {
22591 +                       else { /* DualNet mode. */
22592 +
22593                                 /*
22594                                  * Send an event with the new link mode to
22595                                  * the SIRQ module.
22596                                  */
22597 -                               EventParam.Para32[0] = SK_PNMI_PORT_LOG2PHYS(
22598 -                                       pAC, LogPortIndex);
22599 +                               EventParam.Para32[0] = NetIndex;
22600                                 EventParam.Para32[1] = (SK_U32)Val8;
22601                                 if (SkGeSirqEvent(pAC, IoC, SK_HWEV_SET_LMODE,
22602                                         EventParam) > 0) {
22603 @@ -5587,15 +5420,13 @@
22604                                         return (SK_PNMI_ERR_GENERAL);
22605                                 }
22606                         }
22607 -                       Offset += sizeof(char);
22608 +                       Offset++;
22609                         break;
22610
22611                 case OID_SKGE_FLOWCTRL_MODE:
22612 -                       /* Check the value range */
22613 -                       Val8 = *(pBuf + Offset);
22614 +                       /* Check the value range. */
22615                         if (Val8 == 0) {
22616 -
22617 -                               Offset += sizeof(char);
22618 +                               Offset++;
22619                                 break;
22620                         }
22621                         if (Val8 < SK_FLOW_MODE_NONE ||
22622 @@ -5606,30 +5437,48 @@
22623                                 return (SK_PNMI_ERR_BAD_VALUE);
22624                         }
22625
22626 -                       /* The preset ends here */
22627 +                       /* The PRESET ends here. */
22628                         if (Action == SK_PNMI_PRESET) {
22629
22630                                 return (SK_PNMI_ERR_OK);
22631                         }
22632
22633 -                       if (LogPortIndex == 0) {
22634 +                       if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNet mode. */
22635 +                               if (LogPortIndex == 0) {
22636 +                                       /*
22637 +                                        * The virtual port consists of all currently
22638 +                                        * active ports. Find them and send an event
22639 +                                        * with the new flow control mode to SIRQ.
22640 +                                        */
22641 +                                       for (PhysPortIndex = 0; PhysPortIndex < PhysPortMax;
22642 +                                               PhysPortIndex ++) {
22643
22644 -                               /*
22645 -                                * The virtual port consists of all currently
22646 -                                * active ports. Find them and send an event
22647 -                                * with the new flow control mode to SIRQ.
22648 -                                */
22649 -                               for (PhysPortIndex = 0;
22650 -                                       PhysPortIndex < PhysPortMax;
22651 -                                       PhysPortIndex ++) {
22652 +                                               if (!pAC->Pnmi.Port[PhysPortIndex].ActiveFlag) {
22653 +                                                       continue;
22654 +                                               }
22655
22656 -                                       if (!pAC->Pnmi.Port[PhysPortIndex].
22657 -                                               ActiveFlag) {
22658 +                                               EventParam.Para32[0] = PhysPortIndex;
22659 +                                               EventParam.Para32[1] = (SK_U32)Val8;
22660 +                                               if (SkGeSirqEvent(pAC, IoC,
22661 +                                                       SK_HWEV_SET_FLOWMODE,
22662 +                                                       EventParam) > 0) {
22663 +
22664 +                                                       SK_ERR_LOG(pAC, SK_ERRCL_SW,
22665 +                                                               SK_PNMI_ERR044,
22666 +                                                               SK_PNMI_ERR044MSG);
22667
22668 -                                               continue;
22669 +                                                       *pLen = 0;
22670 +                                                       return (SK_PNMI_ERR_GENERAL);
22671 +                                               }
22672                                         }
22673 -
22674 -                                       EventParam.Para32[0] = PhysPortIndex;
22675 +                               }
22676 +                               else {
22677 +                                       /*
22678 +                                        * Send an event with the new flow control
22679 +                                        * mode to the SIRQ module.
22680 +                                        */
22681 +                                       EventParam.Para32[0] = SK_PNMI_PORT_LOG2PHYS(
22682 +                                               pAC, LogPortIndex);
22683                                         EventParam.Para32[1] = (SK_U32)Val8;
22684                                         if (SkGeSirqEvent(pAC, IoC,
22685                                                 SK_HWEV_SET_FLOWMODE,
22686 @@ -5644,17 +5493,16 @@
22687                                         }
22688                                 }
22689                         }
22690 -                       else {
22691 +                       else { /* DualNet mode. */
22692 +
22693                                 /*
22694 -                                * Send an event with the new flow control
22695 -                                * mode to the SIRQ module.
22696 +                                * Send an event with the new link mode to
22697 +                                * the SIRQ module.
22698                                  */
22699 -                               EventParam.Para32[0] = SK_PNMI_PORT_LOG2PHYS(
22700 -                                       pAC, LogPortIndex);
22701 +                               EventParam.Para32[0] = NetIndex;
22702                                 EventParam.Para32[1] = (SK_U32)Val8;
22703 -                               if (SkGeSirqEvent(pAC, IoC,
22704 -                                       SK_HWEV_SET_FLOWMODE, EventParam)
22705 -                                       > 0) {
22706 +                               if (SkGeSirqEvent(pAC, IoC, SK_HWEV_SET_FLOWMODE,
22707 +                                       EventParam) > 0) {
22708
22709                                         SK_ERR_LOG(pAC, SK_ERRCL_SW,
22710                                                 SK_PNMI_ERR044,
22711 @@ -5664,15 +5512,14 @@
22712                                         return (SK_PNMI_ERR_GENERAL);
22713                                 }
22714                         }
22715 -                       Offset += sizeof(char);
22716 +                       Offset++;
22717                         break;
22718
22719                 case OID_SKGE_PHY_OPERATION_MODE :
22720 -                       /* Check the value range */
22721 -                       Val8 = *(pBuf + Offset);
22722 +                       /* Check the value range. */
22723                         if (Val8 == 0) {
22724 -                               /* mode of this port remains unchanged */
22725 -                               Offset += sizeof(char);
22726 +                               /* Mode of this port remains unchanged. */
22727 +                               Offset++;
22728                                 break;
22729                         }
22730                         if (Val8 < SK_MS_MODE_AUTO ||
22731 @@ -5683,34 +5530,51 @@
22732                                 return (SK_PNMI_ERR_BAD_VALUE);
22733                         }
22734
22735 -                       /* The preset ends here */
22736 +                       /* The PRESET ends here. */
22737                         if (Action == SK_PNMI_PRESET) {
22738
22739                                 return (SK_PNMI_ERR_OK);
22740                         }
22741
22742 -                       if (LogPortIndex == 0) {
22743 +                       if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNet mode. */
22744 +                               if (LogPortIndex == 0) {
22745 +                                       /*
22746 +                                        * The virtual port consists of all currently
22747 +                                        * active ports. Find them and send an event
22748 +                                        * with new master/slave (role) mode to SIRQ.
22749 +                                        */
22750 +                                       for (PhysPortIndex = 0; PhysPortIndex < PhysPortMax;
22751 +                                               PhysPortIndex ++) {
22752
22753 -                               /*
22754 -                                * The virtual port consists of all currently
22755 -                                * active ports. Find them and send an event
22756 -                                * with new master/slave (role) mode to SIRQ.
22757 -                                */
22758 -                               for (PhysPortIndex = 0;
22759 -                                       PhysPortIndex < PhysPortMax;
22760 -                                       PhysPortIndex ++) {
22761 +                                               if (!pAC->Pnmi.Port[PhysPortIndex].ActiveFlag) {
22762 +                                                       continue;
22763 +                                               }
22764
22765 -                                       if (!pAC->Pnmi.Port[PhysPortIndex].
22766 -                                               ActiveFlag) {
22767 +                                               EventParam.Para32[0] = PhysPortIndex;
22768 +                                               EventParam.Para32[1] = (SK_U32)Val8;
22769 +                                               if (SkGeSirqEvent(pAC, IoC,
22770 +                                                       SK_HWEV_SET_ROLE,
22771 +                                                       EventParam) > 0) {
22772 +
22773 +                                                       SK_ERR_LOG(pAC, SK_ERRCL_SW,
22774 +                                                               SK_PNMI_ERR042,
22775 +                                                               SK_PNMI_ERR042MSG);
22776
22777 -                                               continue;
22778 +                                                       *pLen = 0;
22779 +                                                       return (SK_PNMI_ERR_GENERAL);
22780 +                                               }
22781                                         }
22782 -
22783 -                                       EventParam.Para32[0] = PhysPortIndex;
22784 +                               }
22785 +                               else {
22786 +                                       /*
22787 +                                        * Send an event with the new master/slave
22788 +                                        * (role) mode to the SIRQ module.
22789 +                                        */
22790 +                                       EventParam.Para32[0] = SK_PNMI_PORT_LOG2PHYS(
22791 +                                               pAC, LogPortIndex);
22792                                         EventParam.Para32[1] = (SK_U32)Val8;
22793                                         if (SkGeSirqEvent(pAC, IoC,
22794 -                                               SK_HWEV_SET_ROLE,
22795 -                                               EventParam) > 0) {
22796 +                                               SK_HWEV_SET_ROLE, EventParam) > 0) {
22797
22798                                                 SK_ERR_LOG(pAC, SK_ERRCL_SW,
22799                                                         SK_PNMI_ERR042,
22800 @@ -5721,16 +5585,16 @@
22801                                         }
22802                                 }
22803                         }
22804 -                       else {
22805 +                       else { /* DualNet mode. */
22806 +
22807                                 /*
22808 -                                * Send an event with the new master/slave
22809 -                                * (role) mode to the SIRQ module.
22810 +                                * Send an event with the new link mode to
22811 +                                * the SIRQ module.
22812                                  */
22813 -                               EventParam.Para32[0] = SK_PNMI_PORT_LOG2PHYS(
22814 -                                       pAC, LogPortIndex);
22815 +                               EventParam.Para32[0] = NetIndex;
22816                                 EventParam.Para32[1] = (SK_U32)Val8;
22817 -                               if (SkGeSirqEvent(pAC, IoC,
22818 -                                       SK_HWEV_SET_ROLE, EventParam) > 0) {
22819 +                               if (SkGeSirqEvent(pAC, IoC, SK_HWEV_SET_ROLE,
22820 +                                       EventParam) > 0) {
22821
22822                                         SK_ERR_LOG(pAC, SK_ERRCL_SW,
22823                                                 SK_PNMI_ERR042,
22824 @@ -5740,16 +5604,13 @@
22825                                         return (SK_PNMI_ERR_GENERAL);
22826                                 }
22827                         }
22828 -
22829 -                       Offset += sizeof(char);
22830 +                       Offset++;
22831                         break;
22832
22833                 case OID_SKGE_SPEED_MODE:
22834 -                       /* Check the value range */
22835 -                       Val8 = *(pBuf + Offset);
22836 +                       /* Check the value range. */
22837                         if (Val8 == 0) {
22838 -
22839 -                               Offset += sizeof(char);
22840 +                               Offset++;
22841                                 break;
22842                         }
22843                         if (Val8 < (SK_LSPEED_AUTO) ||
22844 @@ -5760,29 +5621,49 @@
22845                                 return (SK_PNMI_ERR_BAD_VALUE);
22846                         }
22847
22848 -                       /* The preset ends here */
22849 +                       /* The PRESET ends here. */
22850                         if (Action == SK_PNMI_PRESET) {
22851
22852                                 return (SK_PNMI_ERR_OK);
22853                         }
22854
22855 -                       if (LogPortIndex == 0) {
22856 +                       if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNet mode. */
22857 +                               if (LogPortIndex == 0) {
22858
22859 -                               /*
22860 -                                * The virtual port consists of all currently
22861 -                                * active ports. Find them and send an event
22862 -                                * with the new flow control mode to SIRQ.
22863 -                                */
22864 -                               for (PhysPortIndex = 0;
22865 -                                       PhysPortIndex < PhysPortMax;
22866 -                                       PhysPortIndex ++) {
22867 +                                       /*
22868 +                                        * The virtual port consists of all currently
22869 +                                        * active ports. Find them and send an event
22870 +                                        * with the new flow control mode to SIRQ.
22871 +                                        */
22872 +                                       for (PhysPortIndex = 0; PhysPortIndex < PhysPortMax;
22873 +                                               PhysPortIndex ++) {
22874
22875 -                                       if (!pAC->Pnmi.Port[PhysPortIndex].ActiveFlag) {
22876 +                                               if (!pAC->Pnmi.Port[PhysPortIndex].ActiveFlag) {
22877 +                                                       continue;
22878 +                                               }
22879
22880 -                                               continue;
22881 -                                       }
22882 +                                               EventParam.Para32[0] = PhysPortIndex;
22883 +                                               EventParam.Para32[1] = (SK_U32)Val8;
22884 +                                               if (SkGeSirqEvent(pAC, IoC,
22885 +                                                       SK_HWEV_SET_SPEED,
22886 +                                                       EventParam) > 0) {
22887 +
22888 +                                                       SK_ERR_LOG(pAC, SK_ERRCL_SW,
22889 +                                                               SK_PNMI_ERR045,
22890 +                                                               SK_PNMI_ERR045MSG);
22891
22892 -                                       EventParam.Para32[0] = PhysPortIndex;
22893 +                                                       *pLen = 0;
22894 +                                                       return (SK_PNMI_ERR_GENERAL);
22895 +                                               }
22896 +                                       }
22897 +                               }
22898 +                               else {
22899 +                                       /*
22900 +                                        * Send an event with the new flow control
22901 +                                        * mode to the SIRQ module.
22902 +                                        */
22903 +                                       EventParam.Para32[0] = SK_PNMI_PORT_LOG2PHYS(
22904 +                                               pAC, LogPortIndex);
22905                                         EventParam.Para32[1] = (SK_U32)Val8;
22906                                         if (SkGeSirqEvent(pAC, IoC,
22907                                                 SK_HWEV_SET_SPEED,
22908 @@ -5797,16 +5678,15 @@
22909                                         }
22910                                 }
22911                         }
22912 -                       else {
22913 +                       else { /* DualNet mode. */
22914 +
22915                                 /*
22916 -                                * Send an event with the new flow control
22917 -                                * mode to the SIRQ module.
22918 +                                * Send an event with the new link mode to
22919 +                                * the SIRQ module.
22920                                  */
22921 -                               EventParam.Para32[0] = SK_PNMI_PORT_LOG2PHYS(
22922 -                                       pAC, LogPortIndex);
22923 +                               EventParam.Para32[0] = NetIndex;
22924                                 EventParam.Para32[1] = (SK_U32)Val8;
22925 -                               if (SkGeSirqEvent(pAC, IoC,
22926 -                                       SK_HWEV_SET_SPEED,
22927 +                               if (SkGeSirqEvent(pAC, IoC, SK_HWEV_SET_SPEED,
22928                                         EventParam) > 0) {
22929
22930                                         SK_ERR_LOG(pAC, SK_ERRCL_SW,
22931 @@ -5817,23 +5697,25 @@
22932                                         return (SK_PNMI_ERR_GENERAL);
22933                                 }
22934                         }
22935 -                       Offset += sizeof(char);
22936 +                       Offset++;
22937                         break;
22938
22939 -               case OID_SKGE_MTU :
22940 -                       /* Check the value range */
22941 -                       Val32 = *(SK_U32*)(pBuf + Offset);
22942 +               case OID_SKGE_MTU:
22943 +                       /* Check the value range. */
22944 +                       SK_PNMI_READ_U32((pBuf + Offset), Val32);
22945 +
22946                         if (Val32 == 0) {
22947 -                               /* mtu of this port remains unchanged */
22948 +                               /* MTU of this port remains unchanged. */
22949                                 Offset += sizeof(SK_U32);
22950                                 break;
22951                         }
22952 +
22953                         if (SK_DRIVER_PRESET_MTU(pAC, IoC, NetIndex, Val32) != 0) {
22954                                 *pLen = 0;
22955                                 return (SK_PNMI_ERR_BAD_VALUE);
22956                         }
22957
22958 -                       /* The preset ends here */
22959 +                       /* The PRESET ends here. */
22960                         if (Action == SK_PNMI_PRESET) {
22961                                 return (SK_PNMI_ERR_OK);
22962                         }
22963 @@ -5844,116 +5726,69 @@
22964
22965                         Offset += sizeof(SK_U32);
22966                         break;
22967 -
22968 +
22969  #ifdef SK_PHY_LP_MODE
22970                 case OID_SKGE_PHY_LP_MODE:
22971 -                       /* The preset ends here */
22972 +                       /* The PRESET ends here. */
22973                         if (Action == SK_PNMI_PRESET) {
22974
22975                                 return (SK_PNMI_ERR_OK);
22976                         }
22977
22978 -                       if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
22979 +                       if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNet mode. */
22980                                 if (LogPortIndex == 0) {
22981                                         Offset = 0;
22982                                         continue;
22983                                 }
22984 -                               else {
22985 -                                       /* Set value for physical ports */
22986 -                                       PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC, LogPortIndex);
22987 -
22988 -                                       switch (*(pBuf + Offset)) {
22989 -                                               case 0:
22990 -                                                       /* If LowPowerMode is active, we can leave it. */
22991 -                                                       if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState) {
22992 -
22993 -                                                               Val32 = SkGmLeaveLowPowerMode(pAC, IoC, PhysPortIndex);
22994 -
22995 -                                                               if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState < 3)     {
22996 -
22997 -                                                                       SkDrvInitAdapter(pAC);
22998 -                                                               }
22999 -                                                               break;
23000 -                                                       }
23001 -                                                       else {
23002 -                                                               *pLen = 0;
23003 -                                                               return (SK_PNMI_ERR_GENERAL);
23004 -                                                       }
23005 -                                               case 1:
23006 -                                               case 2:
23007 -                                               case 3:
23008 -                                               case 4:
23009 -                                                       /* If no LowPowerMode is active, we can enter it. */
23010 -                                                       if (!pAC->GIni.GP[PhysPortIndex].PPhyPowerState) {
23011 -
23012 -                                                               if ((*(pBuf + Offset)) < 3)     {
23013 -
23014 -                                                                       SkDrvDeInitAdapter(pAC);
23015 -                                                               }
23016 -
23017 -                                                               Val32 = SkGmEnterLowPowerMode(pAC, IoC, PhysPortIndex, *pBuf);
23018 -                                                               break;
23019 -                                                       }
23020 -                                                       else {
23021 -                                                               *pLen = 0;
23022 -                                                               return (SK_PNMI_ERR_GENERAL);
23023 -                                                       }
23024 -                                               default:
23025 -                                                       *pLen = 0;
23026 -                                                       return (SK_PNMI_ERR_BAD_VALUE);
23027 -                                       }
23028 -                               }
23029                         }
23030 -                       else { /* DualNetMode */
23031 -
23032 -                               switch (*(pBuf + Offset)) {
23033 -                                       case 0:
23034 -                                               /* If we are in a LowPowerMode, we can leave it. */
23035 -                                               if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState) {
23036 +                       /* Set value for physical port. */
23037 +                       PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC, LogPortIndex);
23038 +                       CurrentPhyPowerState = pAC->GIni.GP[PhysPortIndex].PPhyPowerState;
23039
23040 -                                                       Val32 = SkGmLeaveLowPowerMode(pAC, IoC, PhysPortIndex);
23041 -
23042 -                                                       if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState < 3)     {
23043 +                       switch (Val8) {
23044 +                               case PHY_PM_OPERATIONAL_MODE:
23045 +                                       /* If LowPowerMode is active, we can leave it. */
23046 +                                       if (CurrentPhyPowerState) {
23047
23048 -                                                               SkDrvInitAdapter(pAC);
23049 -                                                       }
23050 -                                                       break;
23051 -                                               }
23052 -                                               else {
23053 -                                                       *pLen = 0;
23054 -                                                       return (SK_PNMI_ERR_GENERAL);
23055 -                                               }
23056 -
23057 -                                       case 1:
23058 -                                       case 2:
23059 -                                       case 3:
23060 -                                       case 4:
23061 -                                               /* If we are not already in LowPowerMode, we can enter it. */
23062 -                                               if (!pAC->GIni.GP[PhysPortIndex].PPhyPowerState) {
23063 -
23064 -                                                       if ((*(pBuf + Offset)) < 3)     {
23065 -
23066 -                                                               SkDrvDeInitAdapter(pAC);
23067 -                                                       }
23068 -                                                       else {
23069 -
23070 -                                                               Val32 = SkGmEnterLowPowerMode(pAC, IoC, PhysPortIndex, *pBuf);
23071 -                                                       }
23072 -                                                       break;
23073 -                                               }
23074 -                                               else {
23075 -                                                       *pLen = 0;
23076 -                                                       return (SK_PNMI_ERR_GENERAL);
23077 +                                               Val32 = SkGmLeaveLowPowerMode(pAC, IoC, PhysPortIndex);
23078 +
23079 +                                               if ((CurrentPhyPowerState == PHY_PM_DEEP_SLEEP) ||
23080 +                                                       (CurrentPhyPowerState == PHY_PM_IEEE_POWER_DOWN)) {
23081 +
23082 +                                                       SkDrvInitAdapter(pAC);
23083                                                 }
23084 -
23085 -                                       default:
23086 +                                               break;
23087 +                                       }
23088 +                                       else {
23089                                                 *pLen = 0;
23090 -                                               return (SK_PNMI_ERR_BAD_VALUE);
23091 -                               }
23092 +                                               return (SK_PNMI_ERR_GENERAL);
23093 +                                       }
23094 +                               case PHY_PM_DEEP_SLEEP:
23095 +                               case PHY_PM_IEEE_POWER_DOWN:
23096 +                                       /* If no LowPowerMode is active, we can enter it. */
23097 +                                       if (!CurrentPhyPowerState) {
23098 +                                               SkDrvDeInitAdapter(pAC);
23099 +                                       }
23100 +
23101 +                               case PHY_PM_ENERGY_DETECT:
23102 +                               case PHY_PM_ENERGY_DETECT_PLUS:
23103 +                                       /* If no LowPowerMode is active, we can enter it. */
23104 +                                       if (!CurrentPhyPowerState) {
23105 +
23106 +                                               Val32 = SkGmEnterLowPowerMode(pAC, IoC, PhysPortIndex, *pBuf);
23107 +                                               break;
23108 +                                       }
23109 +                                       else {
23110 +                                               *pLen = 0;
23111 +                                               return (SK_PNMI_ERR_GENERAL);
23112 +                                       }
23113 +                               default:
23114 +                                       *pLen = 0;
23115 +                                       return (SK_PNMI_ERR_BAD_VALUE);
23116                         }
23117 -                       Offset += sizeof(SK_U8);
23118 +                       Offset++;
23119                         break;
23120 -#endif
23121 +#endif /* SK_PHY_LP_MODE */
23122
23123                 default:
23124              SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_ERR,
23125 @@ -6003,14 +5838,11 @@
23126         unsigned int    Limit;
23127         unsigned int    Offset;
23128         unsigned int    Entries;
23129 -
23130
23131 -       /*
23132 -        * Calculate instance if wished.
23133 -        */
23134 -       /* XXX Not yet implemented. Return always an empty table. */
23135 +       /* Not implemented yet. Return always an empty table. */
23136         Entries = 0;
23137
23138 +       /* Calculate instance if wished. */
23139         if ((Instance != (SK_U32)(-1))) {
23140
23141                 if ((Instance < 1) || (Instance > Entries)) {
23142 @@ -6027,12 +5859,10 @@
23143                 Limit = Entries;
23144         }
23145
23146 -       /*
23147 -        * Get/Set value
23148 -       */
23149 +       /* GET/SET value. */
23150         if (Action == SK_PNMI_GET) {
23151
23152 -               for (Offset=0; Index < Limit; Index ++) {
23153 +               for (Offset = 0; Index < Limit; Index ++) {
23154
23155                         switch (Id) {
23156
23157 @@ -6054,32 +5884,29 @@
23158                 *pLen = Offset;
23159         }
23160         else {
23161 -               /* Only MONITOR_ADMIN can be set */
23162 +               /* Only MONITOR_ADMIN can be set. */
23163                 if (Id != OID_SKGE_RLMT_MONITOR_ADMIN) {
23164
23165                         *pLen = 0;
23166                         return (SK_PNMI_ERR_READ_ONLY);
23167                 }
23168
23169 -               /* Check if the length is plausible */
23170 +               /* Check if the length is plausible. */
23171                 if (*pLen < (Limit - Index)) {
23172
23173                         return (SK_PNMI_ERR_TOO_SHORT);
23174                 }
23175 -               /* Okay, we have a wide value range */
23176 +               /* Okay, we have a wide value range. */
23177                 if (*pLen != (Limit - Index)) {
23178
23179                         *pLen = 0;
23180                         return (SK_PNMI_ERR_BAD_VALUE);
23181                 }
23182 -/*
23183 -               for (Offset=0; Index < Limit; Index ++) {
23184 -               }
23185 -*/
23186 -/*
23187 - * XXX Not yet implemented. Return always BAD_VALUE, because the table
23188 - * is empty.
23189 - */
23190 +
23191 +               /*
23192 +                * Not yet implemented. Return always BAD_VALUE,
23193 +                * because the table is empty.
23194 +                */
23195                 *pLen = 0;
23196                 return (SK_PNMI_ERR_BAD_VALUE);
23197         }
23198 @@ -6120,14 +5947,12 @@
23199         PortActiveFlag = SK_FALSE;
23200         PhysPortMax = pAC->GIni.GIMacsFound;
23201
23202 -       for (PhysPortIndex = 0; PhysPortIndex < PhysPortMax;
23203 -               PhysPortIndex ++) {
23204 +       for (PhysPortIndex = 0; PhysPortIndex < PhysPortMax; PhysPortIndex ++) {
23205
23206                 pPrt = &pAC->GIni.GP[PhysPortIndex];
23207
23208 -               /* Check if the physical port is active */
23209 +               /* Check if the physical port is active. */
23210                 if (!pAC->Pnmi.Port[PhysPortIndex].ActiveFlag) {
23211 -
23212                         continue;
23213                 }
23214
23215 @@ -6136,12 +5961,13 @@
23216                 switch (Id) {
23217
23218                 case OID_SKGE_PHY_TYPE:
23219 -                       /* Check if it is the first active port */
23220 +                       /* Check if it is the first active port. */
23221                         if (*pBuf == 0) {
23222                                 Val32 = pPrt->PhyType;
23223                                 SK_PNMI_STORE_U32(pBuf, Val32);
23224                                 continue;
23225                         }
23226 +                       break;
23227
23228                 case OID_SKGE_LINK_CAP:
23229
23230 @@ -6155,7 +5981,7 @@
23231                         break;
23232
23233                 case OID_SKGE_LINK_MODE:
23234 -                       /* Check if it is the first active port */
23235 +                       /* Check if it is the first active port. */
23236                         if (*pBuf == 0) {
23237
23238                                 *pBuf = pPrt->PLinkModeConf;
23239 @@ -6163,9 +5989,8 @@
23240                         }
23241
23242                         /*
23243 -                        * If we find an active port with a different link
23244 -                        * mode than the first one we return a value that
23245 -                        * indicates that the link mode is indeterminated.
23246 +                        * If we find an active port with a different link mode
23247 +                        * than the first one we return indeterminated.
23248                          */
23249                         if (*pBuf != pPrt->PLinkModeConf) {
23250
23251 @@ -6174,10 +5999,10 @@
23252                         break;
23253
23254                 case OID_SKGE_LINK_MODE_STATUS:
23255 -                       /* Get the link mode of the physical port */
23256 +                       /* Get the link mode of the physical port. */
23257                         Val8 = CalculateLinkModeStatus(pAC, IoC, PhysPortIndex);
23258
23259 -                       /* Check if it is the first active port */
23260 +                       /* Check if it is the first active port. */
23261                         if (*pBuf == 0) {
23262
23263                                 *pBuf = Val8;
23264 @@ -6185,10 +6010,8 @@
23265                         }
23266
23267                         /*
23268 -                        * If we find an active port with a different link
23269 -                        * mode status than the first one we return a value
23270 -                        * that indicates that the link mode status is
23271 -                        * indeterminated.
23272 +                        * If we find an active port with a different link mode status
23273 +                        * than the first one we return indeterminated.
23274                          */
23275                         if (*pBuf != Val8) {
23276
23277 @@ -6197,10 +6020,10 @@
23278                         break;
23279
23280                 case OID_SKGE_LINK_STATUS:
23281 -                       /* Get the link status of the physical port */
23282 +                       /* Get the link status of the physical port. */
23283                         Val8 = CalculateLinkStatus(pAC, IoC, PhysPortIndex);
23284
23285 -                       /* Check if it is the first active port */
23286 +                       /* Check if it is the first active port. */
23287                         if (*pBuf == 0) {
23288
23289                                 *pBuf = Val8;
23290 @@ -6208,10 +6031,8 @@
23291                         }
23292
23293                         /*
23294 -                        * If we find an active port with a different link
23295 -                        * status than the first one, we return a value
23296 -                        * that indicates that the link status is
23297 -                        * indeterminated.
23298 +                        * If we find an active port with a different link status
23299 +                        * than the first one we return indeterminated.
23300                          */
23301                         if (*pBuf != Val8) {
23302
23303 @@ -6220,7 +6041,7 @@
23304                         break;
23305
23306                 case OID_SKGE_FLOWCTRL_CAP:
23307 -                       /* Check if it is the first active port */
23308 +                       /* Check if it is the first active port. */
23309                         if (*pBuf == 0) {
23310
23311                                 *pBuf = pPrt->PFlowCtrlCap;
23312 @@ -6235,7 +6056,7 @@
23313                         break;
23314
23315                 case OID_SKGE_FLOWCTRL_MODE:
23316 -                       /* Check if it is the first active port */
23317 +                       /* Check if it is the first active port. */
23318                         if (*pBuf == 0) {
23319
23320                                 *pBuf = pPrt->PFlowCtrlMode;
23321 @@ -6243,9 +6064,8 @@
23322                         }
23323
23324                         /*
23325 -                        * If we find an active port with a different flow
23326 -                        * control mode than the first one, we return a value
23327 -                        * that indicates that the mode is indeterminated.
23328 +                        * If we find an active port with a different flow-control mode
23329 +                        * than the first one we return indeterminated.
23330                          */
23331                         if (*pBuf != pPrt->PFlowCtrlMode) {
23332
23333 @@ -6254,7 +6074,7 @@
23334                         break;
23335
23336                 case OID_SKGE_FLOWCTRL_STATUS:
23337 -                       /* Check if it is the first active port */
23338 +                       /* Check if it is the first active port. */
23339                         if (*pBuf == 0) {
23340
23341                                 *pBuf = pPrt->PFlowCtrlStatus;
23342 @@ -6262,10 +6082,8 @@
23343                         }
23344
23345                         /*
23346 -                        * If we find an active port with a different flow
23347 -                        * control status than the first one, we return a
23348 -                        * value that indicates that the status is
23349 -                        * indeterminated.
23350 +                        * If we find an active port with a different flow-control status
23351 +                        * than the first one we return indeterminated.
23352                          */
23353                         if (*pBuf != pPrt->PFlowCtrlStatus) {
23354
23355 @@ -6274,7 +6092,7 @@
23356                         break;
23357
23358                 case OID_SKGE_PHY_OPERATION_CAP:
23359 -                       /* Check if it is the first active port */
23360 +                       /* Check if it is the first active port. */
23361                         if (*pBuf == 0) {
23362
23363                                 *pBuf = pPrt->PMSCap;
23364 @@ -6289,7 +6107,7 @@
23365                         break;
23366
23367                 case OID_SKGE_PHY_OPERATION_MODE:
23368 -                       /* Check if it is the first active port */
23369 +                       /* Check if it is the first active port. */
23370                         if (*pBuf == 0) {
23371
23372                                 *pBuf = pPrt->PMSMode;
23373 @@ -6297,9 +6115,8 @@
23374                         }
23375
23376                         /*
23377 -                        * If we find an active port with a different master/
23378 -                        * slave mode than the first one, we return a value
23379 -                        * that indicates that the mode is indeterminated.
23380 +                        * If we find an active port with a different master/slave mode
23381 +                        * than the first one we return indeterminated.
23382                          */
23383                         if (*pBuf != pPrt->PMSMode) {
23384
23385 @@ -6308,7 +6125,7 @@
23386                         break;
23387
23388                 case OID_SKGE_PHY_OPERATION_STATUS:
23389 -                       /* Check if it is the first active port */
23390 +                       /* Check if it is the first active port. */
23391                         if (*pBuf == 0) {
23392
23393                                 *pBuf = pPrt->PMSStatus;
23394 @@ -6316,10 +6133,8 @@
23395                         }
23396
23397                         /*
23398 -                        * If we find an active port with a different master/
23399 -                        * slave status than the first one, we return a
23400 -                        * value that indicates that the status is
23401 -                        * indeterminated.
23402 +                        * If we find an active port with a different master/slave status
23403 +                        * than the first one we return indeterminated.
23404                          */
23405                         if (*pBuf != pPrt->PMSStatus) {
23406
23407 @@ -6328,7 +6143,7 @@
23408                         break;
23409
23410                 case OID_SKGE_SPEED_MODE:
23411 -                       /* Check if it is the first active port */
23412 +                       /* Check if it is the first active port. */
23413                         if (*pBuf == 0) {
23414
23415                                 *pBuf = pPrt->PLinkSpeed;
23416 @@ -6336,9 +6151,8 @@
23417                         }
23418
23419                         /*
23420 -                        * If we find an active port with a different flow
23421 -                        * control mode than the first one, we return a value
23422 -                        * that indicates that the mode is indeterminated.
23423 +                        * If we find an active port with a different link speed
23424 +                        * than the first one we return indeterminated.
23425                          */
23426                         if (*pBuf != pPrt->PLinkSpeed) {
23427
23428 @@ -6347,7 +6161,7 @@
23429                         break;
23430
23431                 case OID_SKGE_SPEED_STATUS:
23432 -                       /* Check if it is the first active port */
23433 +                       /* Check if it is the first active port. */
23434                         if (*pBuf == 0) {
23435
23436                                 *pBuf = pPrt->PLinkSpeedUsed;
23437 @@ -6355,10 +6169,8 @@
23438                         }
23439
23440                         /*
23441 -                        * If we find an active port with a different flow
23442 -                        * control status than the first one, we return a
23443 -                        * value that indicates that the status is
23444 -                        * indeterminated.
23445 +                        * If we find an active port with a different link speed used
23446 +                        * than the first one we return indeterminated.
23447                          */
23448                         if (*pBuf != pPrt->PLinkSpeedUsed) {
23449
23450 @@ -6368,9 +6180,7 @@
23451                 }
23452         }
23453
23454 -       /*
23455 -        * If no port is active return an indeterminated answer
23456 -        */
23457 +       /* If no port is active return an indeterminated answer. */
23458         if (!PortActiveFlag) {
23459
23460                 switch (Id) {
23461 @@ -6487,16 +6297,15 @@
23462  {
23463         SK_U8   Result;
23464
23465 -       /* Get the current mode, which can be full or half duplex */
23466 +       /* Get the current mode, which can be full or half duplex. */
23467         Result = pAC->GIni.GP[PhysPortIndex].PLinkModeStatus;
23468
23469 -       /* Check if no valid mode could be found (link is down) */
23470 +       /* Check if no valid mode could be found (link is down). */
23471         if (Result < SK_LMODE_STAT_HALF) {
23472
23473                 Result = SK_LMODE_STAT_UNKNOWN;
23474         }
23475         else if (pAC->GIni.GP[PhysPortIndex].PLinkMode >= SK_LMODE_AUTOHALF) {
23476 -
23477                 /*
23478                  * Auto-negotiation was used to bring up the link. Change
23479                  * the already found duplex status that it indicates
23480 @@ -6541,22 +6350,19 @@
23481         int                     Index;
23482         int                     Ret;
23483
23484 -
23485         SK_MEMSET(pKeyArr, 0, KeyArrLen);
23486
23487 -       /*
23488 -        * Get VPD key list
23489 -        */
23490 -       Ret = VpdKeys(pAC, IoC, (char *)&BufKeys, (int *)&BufKeysLen,
23491 +       /* Get VPD key list. */
23492 +       Ret = VpdKeys(pAC, IoC, BufKeys, (int *)&BufKeysLen,
23493                 (int *)pKeyNo);
23494 +
23495         if (Ret > 0) {
23496
23497 -               SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR014,
23498 -                       SK_PNMI_ERR014MSG);
23499 +               SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR014, SK_PNMI_ERR014MSG);
23500
23501                 return (SK_PNMI_ERR_GENERAL);
23502         }
23503 -       /* If no keys are available return now */
23504 +       /* If no keys are available return now. */
23505         if (*pKeyNo == 0 || BufKeysLen == 0) {
23506
23507                 return (SK_PNMI_ERR_OK);
23508 @@ -6564,12 +6370,11 @@
23509         /*
23510          * If the key list is too long for us trunc it and give a
23511          * errorlog notification. This case should not happen because
23512 -        * the maximum number of keys is limited due to RAM limitations
23513 +        * the maximum number of keys is limited due to RAM limitations.
23514          */
23515         if (*pKeyNo > SK_PNMI_VPD_ENTRIES) {
23516
23517 -               SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR015,
23518 -                       SK_PNMI_ERR015MSG);
23519 +               SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR015, SK_PNMI_ERR015MSG);
23520
23521                 *pKeyNo = SK_PNMI_VPD_ENTRIES;
23522         }
23523 @@ -6582,14 +6387,12 @@
23524                 Offset ++) {
23525
23526                 if (BufKeys[Offset] != 0) {
23527 -
23528                         continue;
23529                 }
23530
23531                 if (Offset - StartOffset > SK_PNMI_VPD_KEY_SIZE) {
23532
23533 -                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR016,
23534 -                               SK_PNMI_ERR016MSG);
23535 +                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR016, SK_PNMI_ERR016MSG);
23536                         return (SK_PNMI_ERR_GENERAL);
23537                 }
23538
23539 @@ -6600,7 +6403,7 @@
23540                 StartOffset = Offset + 1;
23541         }
23542
23543 -       /* Last key not zero terminated? Get it anyway */
23544 +       /* Last key not zero terminated? Get it anyway. */
23545         if (StartOffset < Offset) {
23546
23547                 SK_STRNCPY(pKeyArr + Index * SK_PNMI_VPD_KEY_SIZE,
23548 @@ -6629,19 +6432,18 @@
23549  {
23550         SK_EVPARA       EventParam;
23551
23552 -
23553         /* Was the module already updated during the current PNMI call? */
23554         if (pAC->Pnmi.SirqUpdatedFlag > 0) {
23555
23556                 return (SK_PNMI_ERR_OK);
23557         }
23558
23559 -       /* Send an synchronuous update event to the module */
23560 +       /* Send an synchronuous update event to the module. */
23561         SK_MEMSET((char *)&EventParam, 0, sizeof(EventParam));
23562 -       if (SkGeSirqEvent(pAC, IoC, SK_HWEV_UPDATE_STAT, EventParam) > 0) {
23563 +
23564 +       if (SkGeSirqEvent(pAC, IoC, SK_HWEV_UPDATE_STAT, EventParam)) {
23565
23566 -               SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR047,
23567 -                       SK_PNMI_ERR047MSG);
23568 +               SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR047, SK_PNMI_ERR047MSG);
23569
23570                 return (SK_PNMI_ERR_GENERAL);
23571         }
23572 @@ -6669,21 +6471,19 @@
23573  {
23574         SK_EVPARA       EventParam;
23575
23576 -
23577         /* Was the module already updated during the current PNMI call? */
23578         if (pAC->Pnmi.RlmtUpdatedFlag > 0) {
23579
23580                 return (SK_PNMI_ERR_OK);
23581         }
23582
23583 -       /* Send an synchronuous update event to the module */
23584 +       /* Send an synchronuous update event to the module. */
23585         SK_MEMSET((char *)&EventParam, 0, sizeof(EventParam));
23586         EventParam.Para32[0] = NetIndex;
23587         EventParam.Para32[1] = (SK_U32)-1;
23588         if (SkRlmtEvent(pAC, IoC, SK_RLMT_STATS_UPDATE, EventParam) > 0) {
23589
23590 -               SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR048,
23591 -                       SK_PNMI_ERR048MSG);
23592 +               SK_ERR_LOG(pAC, SK_ERRCL_SW, SK_PNMI_ERR048, SK_PNMI_ERR048MSG);
23593
23594                 return (SK_PNMI_ERR_GENERAL);
23595         }
23596 @@ -6721,20 +6521,20 @@
23597                 return (SK_PNMI_ERR_OK);
23598         }
23599
23600 -       /* Send an update command to all MACs specified */
23601 +       /* Send an update command to all MACs specified. */
23602         for (MacIndex = FirstMac; MacIndex <= LastMac; MacIndex ++) {
23603
23604                 /*
23605                  * 2002-09-13 pweber:   Freeze the current SW counters.
23606                  *                      (That should be done as close as
23607                  *                      possible to the update of the
23608 -                *                      HW counters)
23609 +                *                      HW counters).
23610                  */
23611                 if (pAC->GIni.GIMacType == SK_MAC_XMAC) {
23612                         pAC->Pnmi.BufPort[MacIndex] = pAC->Pnmi.Port[MacIndex];
23613                 }
23614
23615 -               /* 2002-09-13 pweber:  Update the HW counter  */
23616 +               /* 2002-09-13 pweber:  Update the HW counter.  */
23617                 if (pAC->GIni.GIFunc.pFnMacUpdateStats(pAC, IoC, MacIndex) != 0) {
23618
23619                         return (SK_PNMI_ERR_GENERAL);
23620 @@ -6772,19 +6572,19 @@
23621         SK_U64                  Val = 0;
23622
23623
23624 -       if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {   /* Dual net mode */
23625 +       if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {   /* DualNet mode. */
23626
23627                 PhysPortIndex = NetIndex;
23628
23629                 Val = GetPhysStatVal(pAC, IoC, PhysPortIndex, StatIndex);
23630         }
23631 -       else {  /* Single Net mode */
23632 +       else {  /* SingleNet mode. */
23633
23634                 if (LogPortIndex == 0) {
23635
23636                         PhysPortMax = pAC->GIni.GIMacsFound;
23637
23638 -                       /* Add counter of all active ports */
23639 +                       /* Add counter of all active ports. */
23640                         for (PhysPortIndex = 0; PhysPortIndex < PhysPortMax;
23641                                 PhysPortIndex ++) {
23642
23643 @@ -6794,11 +6594,11 @@
23644                                 }
23645                         }
23646
23647 -                       /* Correct value because of port switches */
23648 +                       /* Correct value because of port switches. */
23649                         Val += pAC->Pnmi.VirtualCounterOffset[StatIndex];
23650                 }
23651                 else {
23652 -                       /* Get counter value of physical port */
23653 +                       /* Get counter value of physical port. */
23654                         PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC, LogPortIndex);
23655
23656                         Val = GetPhysStatVal(pAC, IoC, PhysPortIndex, StatIndex);
23657 @@ -6844,7 +6644,7 @@
23658
23659         MacType = pAC->GIni.GIMacType;
23660
23661 -       /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort) */
23662 +       /* 2002-09-17 pweber: For XMAC, use the frozen SW counters (BufPort). */
23663         if (MacType == SK_MAC_XMAC) {
23664                 pPnmiPrt = &pAC->Pnmi.BufPort[PhysPortIndex];
23665         }
23666 @@ -6912,7 +6712,7 @@
23667         case SK_PNMI_HTX_BURST:
23668         case SK_PNMI_HTX_EXCESS_DEF:
23669         case SK_PNMI_HTX_CARRIER:
23670 -               /* Not supported by GMAC */
23671 +               /* Not supported by GMAC. */
23672                 if (MacType == SK_MAC_GMAC) {
23673                         return (Val);
23674                 }
23675 @@ -6924,7 +6724,7 @@
23676                 break;
23677
23678         case SK_PNMI_HTX_MACC:
23679 -               /* GMAC only supports PAUSE MAC control frames */
23680 +               /* GMAC only supports PAUSE MAC control frames. */
23681                 if (MacType == SK_MAC_GMAC) {
23682                         HelpIndex = SK_PNMI_HTX_PMACC;
23683                 }
23684 @@ -6941,7 +6741,7 @@
23685
23686         case SK_PNMI_HTX_COL:
23687         case SK_PNMI_HRX_UNDERSIZE:
23688 -               /* Not supported by XMAC */
23689 +               /* Not supported by XMAC. */
23690                 if (MacType == SK_MAC_XMAC) {
23691                         return (Val);
23692                 }
23693 @@ -6953,7 +6753,7 @@
23694                 break;
23695
23696         case SK_PNMI_HTX_DEFFERAL:
23697 -               /* Not supported by GMAC */
23698 +               /* Not supported by GMAC. */
23699                 if (MacType == SK_MAC_GMAC) {
23700                         return (Val);
23701                 }
23702 @@ -6971,7 +6771,7 @@
23703                         HighVal = 0;
23704                 }
23705                 else {
23706 -                       /* Otherwise get contents of hardware register */
23707 +                       /* Otherwise get contents of hardware register. */
23708                         (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
23709                                                                                   StatAddr[StatIndex][MacType].Reg,
23710                                                                                   &LowVal);
23711 @@ -6980,7 +6780,7 @@
23712                 break;
23713
23714         case SK_PNMI_HRX_BADOCTET:
23715 -               /* Not supported by XMAC */
23716 +               /* Not supported by XMAC. */
23717                 if (MacType == SK_MAC_XMAC) {
23718                         return (Val);
23719                 }
23720 @@ -6999,7 +6799,7 @@
23721                 return (Val);
23722
23723         case SK_PNMI_HRX_LONGFRAMES:
23724 -               /* For XMAC the SW counter is managed by PNMI */
23725 +               /* For XMAC the SW counter is managed by PNMI. */
23726                 if (MacType == SK_MAC_XMAC) {
23727                         return (pPnmiPrt->StatRxLongFrameCts);
23728                 }
23729 @@ -7019,7 +6819,7 @@
23730                 Val = (((SK_U64)HighVal << 32) | (SK_U64)LowVal);
23731
23732                 if (MacType == SK_MAC_GMAC) {
23733 -                       /* For GMAC the SW counter is additionally managed by PNMI */
23734 +                       /* For GMAC the SW counter is additionally managed by PNMI. */
23735                         Val += pPnmiPrt->StatRxFrameTooLongCts;
23736                 }
23737                 else {
23738 @@ -7037,20 +6837,19 @@
23739                 break;
23740
23741         case SK_PNMI_HRX_SHORTS:
23742 -               /* Not supported by GMAC */
23743 +               /* Not supported by GMAC. */
23744                 if (MacType == SK_MAC_GMAC) {
23745                         /* GM_RXE_FRAG?? */
23746                         return (Val);
23747                 }
23748
23749                 /*
23750 -                * XMAC counts short frame errors even if link down (#10620)
23751 -                *
23752 -                * If link-down the counter remains constant
23753 +                * XMAC counts short frame errors even if link down (#10620).
23754 +                * If the link is down, the counter remains constant.
23755                  */
23756                 if (pPrt->PLinkModeStatus != SK_LMODE_STAT_UNKNOWN) {
23757
23758 -                       /* Otherwise get incremental difference */
23759 +                       /* Otherwise get incremental difference. */
23760                         (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
23761                                                                                   StatAddr[StatIndex][MacType].Reg,
23762                                                                                   &LowVal);
23763 @@ -7073,7 +6872,7 @@
23764         case SK_PNMI_HRX_IRLENGTH:
23765         case SK_PNMI_HRX_SYMBOL:
23766         case SK_PNMI_HRX_CEXT:
23767 -               /* Not supported by GMAC */
23768 +               /* Not supported by GMAC. */
23769                 if (MacType == SK_MAC_GMAC) {
23770                         return (Val);
23771                 }
23772 @@ -7085,7 +6884,7 @@
23773                 break;
23774
23775         case SK_PNMI_HRX_PMACC_ERR:
23776 -               /* For GMAC the SW counter is managed by PNMI */
23777 +               /* For GMAC the SW counter is managed by PNMI. */
23778                 if (MacType == SK_MAC_GMAC) {
23779                         return (pPnmiPrt->StatRxPMaccErr);
23780                 }
23781 @@ -7096,13 +6895,13 @@
23782                 HighVal = pPnmiPrt->CounterHigh[StatIndex];
23783                 break;
23784
23785 -       /* SW counter managed by PNMI */
23786 +       /* SW counter managed by PNMI. */
23787         case SK_PNMI_HTX_SYNC:
23788                 LowVal = (SK_U32)pPnmiPrt->StatSyncCts;
23789                 HighVal = (SK_U32)(pPnmiPrt->StatSyncCts >> 32);
23790                 break;
23791
23792 -       /* SW counter managed by PNMI */
23793 +       /* SW counter managed by PNMI. */
23794         case SK_PNMI_HTX_SYNC_OCTET:
23795                 LowVal = (SK_U32)pPnmiPrt->StatSyncOctetsCts;
23796                 HighVal = (SK_U32)(pPnmiPrt->StatSyncOctetsCts >> 32);
23797 @@ -7110,17 +6909,19 @@
23798
23799         case SK_PNMI_HRX_FCS:
23800                 /*
23801 -                * Broadcom filters FCS errors and counts it in
23802 -                * Receive Error Counter register
23803 +                * Broadcom filters FCS errors and counts them in
23804 +                * Receive Error Counter register.
23805                  */
23806                 if (pPrt->PhyType == SK_PHY_BCOM) {
23807 -                       /* do not read while not initialized (PHY_READ hangs!)*/
23808 +#ifdef GENESIS
23809 +                       /* Do not read while not initialized (PHY_READ hangs!). */
23810                         if (pPrt->PState != SK_PRT_RESET) {
23811                                 SkXmPhyRead(pAC, IoC, PhysPortIndex, PHY_BCOM_RE_CTR, &Word);
23812
23813                                 LowVal = Word;
23814                         }
23815                         HighVal = pPnmiPrt->CounterHigh[StatIndex];
23816 +#endif /* GENESIS */
23817                 }
23818                 else {
23819                         (void)pFnMac->pFnMacStatistic(pAC, IoC, PhysPortIndex,
23820 @@ -7140,7 +6941,7 @@
23821
23822         Val = (((SK_U64)HighVal << 32) | (SK_U64)LowVal);
23823
23824 -       /* Correct value because of possible XMAC reset. XMAC Errata #2 */
23825 +       /* Correct value because of possible XMAC reset (XMAC Errata #2). */
23826         Val += pPnmiPrt->CounterOffset[StatIndex];
23827
23828         return (Val);
23829 @@ -7165,22 +6966,21 @@
23830         unsigned int    PhysPortIndex;
23831         SK_EVPARA       EventParam;
23832
23833 -
23834         SK_MEMSET((char *)&EventParam, 0, sizeof(EventParam));
23835
23836 -       /* Notify sensor module */
23837 +       /* Notify sensor module. */
23838         SkEventQueue(pAC, SKGE_I2C, SK_I2CEV_CLEAR, EventParam);
23839
23840 -       /* Notify RLMT module */
23841 +       /* Notify RLMT module. */
23842         EventParam.Para32[0] = NetIndex;
23843         EventParam.Para32[1] = (SK_U32)-1;
23844         SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STATS_CLEAR, EventParam);
23845         EventParam.Para32[1] = 0;
23846
23847 -       /* Notify SIRQ module */
23848 +       /* Notify SIRQ module. */
23849         SkEventQueue(pAC, SKGE_HWAC, SK_HWEV_CLEAR_STAT, EventParam);
23850
23851 -       /* Notify CSUM module */
23852 +       /* Notify CSUM module. */
23853  #ifdef SK_USE_CSUM
23854         EventParam.Para32[0] = NetIndex;
23855         EventParam.Para32[1] = (SK_U32)-1;
23856 @@ -7188,7 +6988,7 @@
23857                 EventParam);
23858  #endif /* SK_USE_CSUM */
23859
23860 -       /* Clear XMAC statistic */
23861 +       /* Clear XMAC statistics. */
23862         for (PhysPortIndex = 0; PhysPortIndex <
23863                 (unsigned int)pAC->GIni.GIMacsFound; PhysPortIndex ++) {
23864
23865 @@ -7215,13 +7015,13 @@
23866                         PhysPortIndex].StatRxPMaccErr));
23867         }
23868
23869 -       /*
23870 -        * Clear local statistics
23871 -        */
23872 +       /* Clear local statistics. */
23873         SK_MEMSET((char *)&pAC->Pnmi.VirtualCounterOffset, 0,
23874                   sizeof(pAC->Pnmi.VirtualCounterOffset));
23875 +
23876         pAC->Pnmi.RlmtChangeCts = 0;
23877         pAC->Pnmi.RlmtChangeTime = 0;
23878 +
23879         SK_MEMSET((char *)&pAC->Pnmi.RlmtChangeEstimate.EstValue[0], 0,
23880                 sizeof(pAC->Pnmi.RlmtChangeEstimate.EstValue));
23881         pAC->Pnmi.RlmtChangeEstimate.EstValueIndex = 0;
23882 @@ -7258,23 +7058,21 @@
23883  SK_U32 TrapId,         /* SNMP ID of the trap */
23884  unsigned int Size)     /* Space needed for trap entry */
23885  {
23886 -       unsigned int            BufPad = pAC->Pnmi.TrapBufPad;
23887 -       unsigned int            BufFree = pAC->Pnmi.TrapBufFree;
23888 -       unsigned int            Beg = pAC->Pnmi.TrapQueueBeg;
23889 -       unsigned int            End = pAC->Pnmi.TrapQueueEnd;
23890 +       unsigned int    BufPad = pAC->Pnmi.TrapBufPad;
23891 +       unsigned int    BufFree = pAC->Pnmi.TrapBufFree;
23892 +       unsigned int    Beg = pAC->Pnmi.TrapQueueBeg;
23893 +       unsigned int    End = pAC->Pnmi.TrapQueueEnd;
23894         char                    *pBuf = &pAC->Pnmi.TrapBuf[0];
23895         int                     Wrap;
23896 -       unsigned int            NeededSpace;
23897 -       unsigned int            EntrySize;
23898 +       unsigned int    NeededSpace;
23899 +       unsigned int    EntrySize;
23900         SK_U32                  Val32;
23901         SK_U64                  Val64;
23902
23903 -
23904 -       /* Last byte of entry will get a copy of the entry length */
23905 +       /* Last byte of entry will get a copy of the entry length. */
23906         Size ++;
23907
23908 -       /*
23909 -        * Calculate needed buffer space */
23910 +       /* Calculate needed buffer space. */
23911         if (Beg >= Size) {
23912
23913                 NeededSpace = Size;
23914 @@ -7289,7 +7087,7 @@
23915          * Check if enough buffer space is provided. Otherwise
23916          * free some entries. Leave one byte space between begin
23917          * and end of buffer to make it possible to detect whether
23918 -        * the buffer is full or empty
23919 +        * the buffer is full or empty.
23920          */
23921         while (BufFree < NeededSpace + 1) {
23922
23923 @@ -7328,13 +7126,13 @@
23924         }
23925         BufFree -= NeededSpace;
23926
23927 -       /* Save the current offsets */
23928 +       /* Save the current offsets. */
23929         pAC->Pnmi.TrapQueueBeg = Beg;
23930         pAC->Pnmi.TrapQueueEnd = End;
23931         pAC->Pnmi.TrapBufPad = BufPad;
23932         pAC->Pnmi.TrapBufFree = BufFree;
23933
23934 -       /* Initialize the trap entry */
23935 +       /* Initialize the trap entry. */
23936         *(pBuf + Beg + Size - 1) = (char)Size;
23937         *(pBuf + Beg) = (char)Size;
23938         Val32 = (pAC->Pnmi.TrapUnique) ++;
23939 @@ -7369,7 +7167,6 @@
23940         unsigned int    Len;
23941         unsigned int    DstOff = 0;
23942
23943 -
23944         while (Trap != End) {
23945
23946                 Len = (unsigned int)*(pBuf + Trap);
23947 @@ -7414,7 +7211,6 @@
23948         unsigned int    Entries = 0;
23949         unsigned int    TotalLen = 0;
23950
23951 -
23952         while (Trap != End) {
23953
23954                 Len = (unsigned int)*(pBuf + Trap);
23955 @@ -7471,14 +7267,14 @@
23956         unsigned int    DescrLen;
23957         SK_U32          Val32;
23958
23959 -
23960 -       /* Get trap buffer entry */
23961 +       /* Get trap buffer entry. */
23962         DescrLen = SK_STRLEN(pAC->I2c.SenTable[SensorIndex].SenDesc);
23963 +
23964         pBuf = GetTrapEntry(pAC, TrapId,
23965                 SK_PNMI_TRAP_SENSOR_LEN_BASE + DescrLen);
23966         Offset = SK_PNMI_TRAP_SIMPLE_LEN;
23967
23968 -       /* Store additionally sensor trap related data */
23969 +       /* Store additionally sensor trap related data. */
23970         Val32 = OID_SKGE_SENSOR_INDEX;
23971         SK_PNMI_STORE_U32(pBuf + Offset, Val32);
23972         *(pBuf + Offset + 4) = 4;
23973 @@ -7523,7 +7319,6 @@
23974         char    *pBuf;
23975         SK_U32  Val32;
23976
23977 -
23978         pBuf = GetTrapEntry(pAC, OID_SKGE_TRAP_RLMT_CHANGE_PORT,
23979                 SK_PNMI_TRAP_RLMT_CHANGE_LEN);
23980
23981 @@ -7551,7 +7346,6 @@
23982         char    *pBuf;
23983         SK_U32  Val32;
23984
23985 -
23986         pBuf = GetTrapEntry(pAC, TrapId, SK_PNMI_TRAP_RLMT_PORT_LEN);
23987
23988         Val32 = OID_SKGE_RLMT_PORT_INDEX;
23989 @@ -7571,12 +7365,11 @@
23990   *     Nothing
23991   */
23992  PNMI_STATIC void CopyMac(
23993 -char *pDst,            /* Pointer to destination buffer */
23994 +char           *pDst,  /* Pointer to destination buffer */
23995  SK_MAC_ADDR *pMac)     /* Pointer of Source */
23996  {
23997         int     i;
23998
23999 -
24000         for (i = 0; i < sizeof(SK_MAC_ADDR); i ++) {
24001
24002                 *(pDst + i) = pMac->a[i];
24003 @@ -7616,17 +7409,14 @@
24004
24005         SK_U32  RetCode = SK_PNMI_ERR_GENERAL;
24006
24007 -       /*
24008 -        * Check instance. We only handle single instance variables
24009 -        */
24010 +       /* Check instance. We only handle single instance variables. */
24011         if (Instance != (SK_U32)(-1) && Instance != 1) {
24012
24013                 *pLen = 0;
24014                 return (SK_PNMI_ERR_UNKNOWN_INST);
24015         }
24016
24017 -
24018 -    /* Check length */
24019 +    /* Check length. */
24020      switch (Id) {
24021
24022      case OID_PNP_CAPABILITIES:
24023 @@ -7664,14 +7454,10 @@
24024          break;
24025      }
24026
24027 -    /*
24028 -        * Perform action
24029 -        */
24030 +       /* Perform action. */
24031         if (Action == SK_PNMI_GET) {
24032
24033 -               /*
24034 -                * Get value
24035 -                */
24036 +               /* Get value. */
24037                 switch (Id) {
24038
24039                 case OID_PNP_CAPABILITIES:
24040 @@ -7679,18 +7465,21 @@
24041                         break;
24042
24043                 case OID_PNP_QUERY_POWER:
24044 -                       /* The Windows DDK describes: An OID_PNP_QUERY_POWER requests
24045 -                        the miniport to indicate whether it can transition its NIC
24046 -                        to the low-power state.
24047 -                        A miniport driver must always return NDIS_STATUS_SUCCESS
24048 -                        to a query of OID_PNP_QUERY_POWER. */
24049 +                       /*
24050 +                        * The Windows DDK describes: An OID_PNP_QUERY_POWER requests
24051 +                        * the miniport to indicate whether it can transition its NIC
24052 +                        * to the low-power state.
24053 +                        * A miniport driver must always return NDIS_STATUS_SUCCESS
24054 +                        * to a query of OID_PNP_QUERY_POWER.
24055 +                        */
24056                         *pLen = sizeof(SK_DEVICE_POWER_STATE);
24057              RetCode = SK_PNMI_ERR_OK;
24058                         break;
24059
24060 -                       /* NDIS handles these OIDs as write-only.
24061 +                       /*
24062 +                        * NDIS handles these OIDs as write-only.
24063                          * So in case of get action the buffer with written length = 0
24064 -                        * is returned
24065 +                        * is returned.
24066                          */
24067                 case OID_PNP_SET_POWER:
24068                 case OID_PNP_ADD_WAKE_UP_PATTERN:
24069 @@ -7711,13 +7500,11 @@
24070                 return (RetCode);
24071         }
24072
24073 -
24074 -       /*
24075 -        * Perform preset or set
24076 -        */
24077 +       /* Perform PRESET or SET. */
24078
24079 -       /* POWER module does not support PRESET action */
24080 +       /* The POWER module does not support PRESET action. */
24081         if (Action == SK_PNMI_PRESET) {
24082 +
24083                 return (SK_PNMI_ERR_OK);
24084         }
24085
24086 @@ -7749,7 +7536,7 @@
24087  #ifdef SK_DIAG_SUPPORT
24088  /*****************************************************************************
24089   *
24090 - * DiagActions - OID handler function of Diagnostic driver
24091 + * DiagActions - OID handler function of Diagnostic driver
24092   *
24093   * Description:
24094   *     The code is simple. No description necessary.
24095 @@ -7776,22 +7563,17 @@
24096  unsigned int TableIndex, /* Index to the Id table */
24097  SK_U32 NetIndex)       /* NetIndex (0..n), in single net mode always zero */
24098  {
24099 -
24100         SK_U32  DiagStatus;
24101         SK_U32  RetCode = SK_PNMI_ERR_GENERAL;
24102
24103 -       /*
24104 -        * Check instance. We only handle single instance variables.
24105 -        */
24106 +       /* Check instance. We only handle single instance variables. */
24107         if (Instance != (SK_U32)(-1) && Instance != 1) {
24108
24109                 *pLen = 0;
24110                 return (SK_PNMI_ERR_UNKNOWN_INST);
24111         }
24112
24113 -       /*
24114 -        * Check length.
24115 -        */
24116 +    /* Check length. */
24117         switch (Id) {
24118
24119         case OID_SKGE_DIAG_MODE:
24120 @@ -7809,10 +7591,9 @@
24121         }
24122
24123         /* Perform action. */
24124 -
24125 -       /* GET value. */
24126         if (Action == SK_PNMI_GET) {
24127
24128 +               /* Get value. */
24129                 switch (Id) {
24130
24131                 case OID_SKGE_DIAG_MODE:
24132 @@ -7827,14 +7608,15 @@
24133                         RetCode = SK_PNMI_ERR_GENERAL;
24134                         break;
24135                 }
24136 -               return (RetCode);
24137 +               return (RetCode);
24138         }
24139
24140         /* From here SET or PRESET value. */
24141
24142         /* PRESET value is not supported. */
24143         if (Action == SK_PNMI_PRESET) {
24144 -               return (SK_PNMI_ERR_OK);
24145 +
24146 +               return (SK_PNMI_ERR_OK);
24147         }
24148
24149         /* SET value. */
24150 @@ -7846,7 +7628,7 @@
24151
24152                                 /* Attach the DIAG to this adapter. */
24153                                 case SK_DIAG_ATTACHED:
24154 -                                       /* Check if we come from running */
24155 +                                       /* Check if we come from running. */
24156                                         if (pAC->Pnmi.DiagAttached == SK_DIAG_RUNNING) {
24157
24158                                                 RetCode = SkDrvLeaveDiagMode(pAC);
24159 @@ -7881,7 +7663,7 @@
24160                                                 /* If DiagMode is not active, we can enter it. */
24161                                                 if (!pAC->DiagModeActive) {
24162
24163 -                                                       RetCode = SkDrvEnterDiagMode(pAC);
24164 +                                                       RetCode = SkDrvEnterDiagMode(pAC);
24165                                                 }
24166                                                 else {
24167
24168 @@ -7900,7 +7682,7 @@
24169                                         break;
24170
24171                                 case SK_DIAG_IDLE:
24172 -                                       /* Check if we come from running */
24173 +                                       /* Check if we come from running. */
24174                                         if (pAC->Pnmi.DiagAttached == SK_DIAG_RUNNING) {
24175
24176                                                 RetCode = SkDrvLeaveDiagMode(pAC);
24177 @@ -7946,7 +7728,7 @@
24178
24179  /*****************************************************************************
24180   *
24181 - * Vct - OID handler function of  OIDs
24182 + * Vct - OID handler function of OIDs for Virtual Cable Tester (VCT)
24183   *
24184   * Description:
24185   *     The code is simple. No description necessary.
24186 @@ -7982,153 +7764,150 @@
24187         SK_U32          PhysPortIndex;
24188         SK_U32          Limit;
24189         SK_U32          Offset;
24190 -       SK_BOOL         Link;
24191 -       SK_U32          RetCode = SK_PNMI_ERR_GENERAL;
24192 -       int             i;
24193 +       SK_U32          RetCode;
24194 +       int                     i;
24195         SK_EVPARA       Para;
24196 -       SK_U32          CableLength;
24197 -
24198 -       /*
24199 -        * Calculate the port indexes from the instance.
24200 -        */
24201 +
24202 +       RetCode = SK_PNMI_ERR_GENERAL;
24203 +
24204 +       /* Calculate the port indexes from the instance. */
24205         PhysPortMax = pAC->GIni.GIMacsFound;
24206         LogPortMax = SK_PNMI_PORT_PHYS2LOG(PhysPortMax);
24207 -
24208 +
24209         /* Dual net mode? */
24210         if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
24211                 LogPortMax--;
24212         }
24213 -
24214 +
24215         if ((Instance != (SK_U32) (-1))) {
24216 -               /* Check instance range. */
24217 -               if ((Instance < 2) || (Instance > LogPortMax)) {
24218 -                       *pLen = 0;
24219 -                       return (SK_PNMI_ERR_UNKNOWN_INST);
24220 -               }
24221 -
24222 +               /*
24223 +                * Get one instance of that OID, so check the instance range:
24224 +                * There is no virtual port with an Instance == 1, so we get
24225 +                * the values from one physical port only.
24226 +                */
24227                 if (pAC->Pnmi.DualNetActiveFlag == SK_TRUE) {
24228                         PhysPortIndex = NetIndex;
24229                 }
24230 -               else {
24231 +               else {\r
24232 +                       if ((Instance < 2) || (Instance > LogPortMax)) {\r
24233 +                               *pLen = 0;\r
24234 +                               return (SK_PNMI_ERR_UNKNOWN_INST);\r
24235 +                       }
24236                         PhysPortIndex = Instance - 2;
24237                 }
24238                 Limit = PhysPortIndex + 1;
24239         }
24240         else {
24241                 /*
24242 -                * Instance == (SK_U32) (-1), get all Instances of that OID.
24243 -                *
24244 -                * Not implemented yet. May be used in future releases.
24245 +                * Instance == (SK_U32) (-1), so get all instances of that OID.
24246 +                * There is no virtual port with an Instance == 1, so we get
24247 +                * the values from all physical ports.
24248                  */
24249                 PhysPortIndex = 0;
24250                 Limit = PhysPortMax;
24251         }
24252 -
24253 -       pPrt = &pAC->GIni.GP[PhysPortIndex];
24254 -       if (pPrt->PHWLinkUp) {
24255 -               Link = SK_TRUE;
24256 -       }
24257 -       else {
24258 -               Link = SK_FALSE;
24259 -       }
24260 -
24261 -       /* Check MAC type */
24262 -       if (pPrt->PhyType != SK_PHY_MARV_COPPER) {
24263 +
24264 +       /* Check MAC type. */
24265 +       if ((Id != OID_SKGE_VCT_CAPABILITIES) &&
24266 +               (pAC->GIni.GP[PhysPortIndex].PhyType != SK_PHY_MARV_COPPER)) {
24267                 *pLen = 0;
24268 -               return (SK_PNMI_ERR_GENERAL);
24269 +               return (SK_PNMI_ERR_NOT_SUPPORTED);
24270         }
24271 -
24272 -       /* Initialize backup data pointer. */
24273 -       pVctBackupData = &pAC->Pnmi.VctBackup[PhysPortIndex];
24274 -
24275 -       /* Check action type */
24276 +
24277 +       /* Check action type. */
24278         if (Action == SK_PNMI_GET) {
24279 -               /* Check length */
24280 +               /* Check length. */
24281                 switch (Id) {
24282 -
24283 +
24284                 case OID_SKGE_VCT_GET:
24285                         if (*pLen < (Limit - PhysPortIndex) * sizeof(SK_PNMI_VCT)) {
24286                                 *pLen = (Limit - PhysPortIndex) * sizeof(SK_PNMI_VCT);
24287                                 return (SK_PNMI_ERR_TOO_SHORT);
24288                         }
24289                         break;
24290 -
24291 +
24292                 case OID_SKGE_VCT_STATUS:
24293 +               case OID_SKGE_VCT_CAPABILITIES:
24294                         if (*pLen < (Limit - PhysPortIndex) * sizeof(SK_U8)) {
24295                                 *pLen = (Limit - PhysPortIndex) * sizeof(SK_U8);
24296                                 return (SK_PNMI_ERR_TOO_SHORT);
24297                         }
24298                         break;
24299 -
24300 +
24301                 default:
24302                         *pLen = 0;
24303                         return (SK_PNMI_ERR_GENERAL);
24304                 }
24305 -
24306 -               /* Get value */
24307 +
24308 +               /* Get value. */
24309                 Offset = 0;
24310                 for (; PhysPortIndex < Limit; PhysPortIndex++) {
24311 +\r
24312 +                       pPrt = &pAC->GIni.GP[PhysPortIndex];\r
24313 +
24314                         switch (Id) {
24315 -
24316 +
24317                         case OID_SKGE_VCT_GET:
24318 -                               if ((Link == SK_FALSE) &&
24319 +                               if (!pPrt->PHWLinkUp &&
24320                                         (pAC->Pnmi.VctStatus[PhysPortIndex] & SK_PNMI_VCT_PENDING)) {
24321 +
24322                                         RetCode = SkGmCableDiagStatus(pAC, IoC, PhysPortIndex, SK_FALSE);
24323 +
24324                                         if (RetCode == 0) {
24325 -                                               pAC->Pnmi.VctStatus[PhysPortIndex] &= ~SK_PNMI_VCT_PENDING;
24326 -                                               pAC->Pnmi.VctStatus[PhysPortIndex] |=
24327 -                                                       (SK_PNMI_VCT_NEW_VCT_DATA | SK_PNMI_VCT_TEST_DONE);
24328 -
24329 -                                               /* Copy results for later use to PNMI struct. */
24330 -                                               for (i = 0; i < 4; i++)  {
24331 -                                                       if (pPrt->PMdiPairSts[i] == SK_PNMI_VCT_NORMAL_CABLE) {
24332 -                                                               if ((pPrt->PMdiPairLen[i] > 35) && (pPrt->PMdiPairLen[i] < 0xff)) {
24333 -                                                                       pPrt->PMdiPairSts[i] = SK_PNMI_VCT_IMPEDANCE_MISMATCH;
24334 -                                                               }
24335 -                                                       }
24336 -                                                       if ((pPrt->PMdiPairLen[i] > 35) && (pPrt->PMdiPairLen[i] != 0xff)) {
24337 -                                                               CableLength = 1000 * (((175 * pPrt->PMdiPairLen[i]) / 210) - 28);
24338 -                                                       }
24339 -                                                       else {
24340 -                                                               CableLength = 0;
24341 -                                                       }
24342 -                                                       pVctBackupData->PMdiPairLen[i] = CableLength;
24343 -                                                       pVctBackupData->PMdiPairSts[i] = pPrt->PMdiPairSts[i];
24344 -                                               }
24345 +
24346 +                                               /* VCT test is finished, so save the data. */
24347 +                                               VctGetResults(pAC, IoC, PhysPortIndex);
24348
24349                                                 Para.Para32[0] = PhysPortIndex;
24350                                                 Para.Para32[1] = -1;
24351                                                 SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_RESET, Para);
24352 -                                               SkEventDispatcher(pAC, IoC);
24353 -                                       }
24354 -                                       else {
24355 -                                               ; /* VCT test is running. */
24356 +
24357 +                                               /* SkEventDispatcher(pAC, IoC); */
24358                                         }
24359                                 }
24360 -
24361 +
24362 +                               /* Initialize backup data pointer. */
24363 +                               pVctBackupData = &pAC->Pnmi.VctBackup[PhysPortIndex];
24364 +
24365                                 /* Get all results. */
24366                                 CheckVctStatus(pAC, IoC, pBuf, Offset, PhysPortIndex);
24367 -                               Offset += sizeof(SK_U8);
24368 +
24369 +                               Offset++;
24370                                 *(pBuf + Offset) = pPrt->PCableLen;
24371 -                               Offset += sizeof(SK_U8);
24372 +                               Offset++;
24373                                 for (i = 0; i < 4; i++)  {
24374 -                                       SK_PNMI_STORE_U32((pBuf + Offset), pVctBackupData->PMdiPairLen[i]);
24375 +
24376 +                                       SK_PNMI_STORE_U32((pBuf + Offset), pVctBackupData->MdiPairLen[i]);
24377                                         Offset += sizeof(SK_U32);
24378                                 }
24379                                 for (i = 0; i < 4; i++)  {
24380 -                                       *(pBuf + Offset) = pVctBackupData->PMdiPairSts[i];
24381 -                                       Offset += sizeof(SK_U8);
24382 +
24383 +                                       *(pBuf + Offset) = pVctBackupData->MdiPairSts[i];
24384 +                                       Offset++;
24385                                 }
24386 -
24387 +
24388                                 RetCode = SK_PNMI_ERR_OK;
24389                                 break;
24390 -
24391 +
24392                         case OID_SKGE_VCT_STATUS:
24393                                 CheckVctStatus(pAC, IoC, pBuf, Offset, PhysPortIndex);
24394 -                               Offset += sizeof(SK_U8);
24395 +
24396 +                               Offset++;
24397                                 RetCode = SK_PNMI_ERR_OK;
24398                                 break;
24399 -
24400 +
24401 +                       case OID_SKGE_VCT_CAPABILITIES:
24402 +                               if (pPrt->PhyType != SK_PHY_MARV_COPPER) {
24403 +                                       *(pBuf + Offset) = SK_PNMI_VCT_NOT_SUPPORTED;
24404 +                               }
24405 +                               else {
24406 +                                       *(pBuf + Offset) = SK_PNMI_VCT_SUPPORTED;
24407 +                               }
24408 +                               Offset++;
24409 +
24410 +                               RetCode = SK_PNMI_ERR_OK;
24411 +                               break;
24412 +
24413                         default:
24414                                 *pLen = 0;
24415                                 return (SK_PNMI_ERR_GENERAL);
24416 @@ -8136,15 +7915,15 @@
24417                 } /* for */
24418                 *pLen = Offset;
24419                 return (RetCode);
24420 -
24421 +
24422         } /* if SK_PNMI_GET */
24423 -
24424 +
24425         /*
24426          * From here SET or PRESET action. Check if the passed
24427          * buffer length is plausible.
24428          */
24429 -
24430 -       /* Check length */
24431 +
24432 +       /* Check length. */
24433         switch (Id) {
24434         case OID_SKGE_VCT_SET:
24435                 if (*pLen < (Limit - PhysPortIndex) * sizeof(SK_U32)) {
24436 @@ -8152,42 +7931,45 @@
24437                         return (SK_PNMI_ERR_TOO_SHORT);
24438                 }
24439                 break;
24440 -
24441 +
24442         default:
24443                 *pLen = 0;
24444                 return (SK_PNMI_ERR_GENERAL);
24445         }
24446 -
24447 -       /*
24448 -        * Perform preset or set.
24449 -        */
24450 -
24451 +
24452 +       /* Perform PRESET or SET. */
24453 +
24454         /* VCT does not support PRESET action. */
24455         if (Action == SK_PNMI_PRESET) {
24456 +
24457                 return (SK_PNMI_ERR_OK);
24458         }
24459 -
24460 +
24461         Offset = 0;
24462         for (; PhysPortIndex < Limit; PhysPortIndex++) {
24463 +
24464 +               pPrt = &pAC->GIni.GP[PhysPortIndex];
24465 +
24466                 switch (Id) {
24467                 case OID_SKGE_VCT_SET: /* Start VCT test. */
24468 -                       if (Link == SK_FALSE) {
24469 +                       if (!pPrt->PHWLinkUp) {
24470                                 SkGeStopPort(pAC, IoC, PhysPortIndex, SK_STOP_ALL, SK_SOFT_RST);
24471 -
24472 +
24473                                 RetCode = SkGmCableDiagStatus(pAC, IoC, PhysPortIndex, SK_TRUE);
24474 +
24475                                 if (RetCode == 0) { /* RetCode: 0 => Start! */
24476                                         pAC->Pnmi.VctStatus[PhysPortIndex] |= SK_PNMI_VCT_PENDING;
24477 -                                       pAC->Pnmi.VctStatus[PhysPortIndex] &= ~SK_PNMI_VCT_NEW_VCT_DATA;
24478 -                                       pAC->Pnmi.VctStatus[PhysPortIndex] &= ~SK_PNMI_VCT_LINK;
24479 -
24480 -                                       /*
24481 -                                        * Start VCT timer counter.
24482 -                                        */
24483 -                                       SK_MEMSET((char *) &Para, 0, sizeof(Para));
24484 +                                       pAC->Pnmi.VctStatus[PhysPortIndex] &=
24485 +                                               ~(SK_PNMI_VCT_NEW_VCT_DATA | SK_PNMI_VCT_LINK);
24486 +
24487 +                                       /* Start VCT timer counter. */
24488 +                                       SK_MEMSET((char *)&Para, 0, sizeof(Para));
24489                                         Para.Para32[0] = PhysPortIndex;
24490                                         Para.Para32[1] = -1;
24491 -                                       SkTimerStart(pAC, IoC, &pAC->Pnmi.VctTimeout[PhysPortIndex].VctTimer,
24492 -                                               4000000, SKGE_PNMI, SK_PNMI_EVT_VCT_RESET, Para);
24493 +
24494 +                                       SkTimerStart(pAC, IoC, &pAC->Pnmi.VctTimeout[PhysPortIndex],
24495 +                                               SK_PNMI_VCT_TIMER_CHECK, SKGE_PNMI, SK_PNMI_EVT_VCT_RESET, Para);
24496 +
24497                                         SK_PNMI_STORE_U32((pBuf + Offset), RetCode);
24498                                         RetCode = SK_PNMI_ERR_OK;
24499                                 }
24500 @@ -8203,7 +7985,7 @@
24501                         }
24502                         Offset += sizeof(SK_U32);
24503                         break;
24504 -
24505 +
24506                 default:
24507                         *pLen = 0;
24508                         return (SK_PNMI_ERR_GENERAL);
24509 @@ -8215,6 +7997,65 @@
24510  } /* Vct */
24511
24512
24513 +PNMI_STATIC void VctGetResults(
24514 +SK_AC          *pAC,
24515 +SK_IOC         IoC,
24516 +SK_U32         Port)
24517 +{
24518 +       SK_GEPORT       *pPrt;
24519 +       int                     i;
24520 +       SK_U8           PairLen;
24521 +       SK_U8           PairSts;
24522 +       SK_U32          MinLength;
24523 +       SK_U32          CableLength;
24524 +
24525 +       pPrt = &pAC->GIni.GP[Port];
24526 +
24527 +       if (pAC->GIni.GIChipId == CHIP_ID_YUKON_FE) {
24528 +               MinLength = 25;
24529 +       }
24530 +       else {
24531 +               MinLength = 35;
24532 +       }
24533 +
24534 +       /* Copy results for later use to PNMI struct. */
24535 +       for (i = 0; i < 4; i++)  {
24536 +
24537 +               PairLen = pPrt->PMdiPairLen[i];
24538 +
24539 +               if (((pPrt->PLinkSpeedCap & SK_LSPEED_CAP_1000MBPS) == 0) && (i > 1)) {
24540 +                       PairSts = SK_PNMI_VCT_NOT_PRESENT;
24541 +               }
24542 +               else {
24543 +                       PairSts = pPrt->PMdiPairSts[i];
24544 +               }
24545 +
24546 +               if ((PairSts == SK_PNMI_VCT_NORMAL_CABLE) &&
24547 +                       (PairLen > 28) && (PairLen < 0xff)) {
24548 +
24549 +                       PairSts = SK_PNMI_VCT_IMPEDANCE_MISMATCH;
24550 +               }
24551 +
24552 +               /* Ignore values <= MinLength, the linear factor is 4/5. */
24553 +               if ((PairLen > MinLength) && (PairLen < 0xff)) {
24554 +
24555 +                       CableLength = 1000UL * (PairLen - MinLength) * 4 / 5;
24556 +               }
24557 +               else {
24558 +                       /* No cable or short cable. */
24559 +                       CableLength = 0;
24560 +               }
24561 +
24562 +               pAC->Pnmi.VctBackup[Port].MdiPairLen[i] = CableLength;
24563 +               pAC->Pnmi.VctBackup[Port].MdiPairSts[i] = PairSts;
24564 +       }
24565 +
24566 +       pAC->Pnmi.VctStatus[Port] &= ~SK_PNMI_VCT_PENDING;
24567 +       pAC->Pnmi.VctStatus[Port] |= (SK_PNMI_VCT_NEW_VCT_DATA |
24568 +               SK_PNMI_VCT_TEST_DONE);
24569 +
24570 +} /* GetVctResults */
24571 +
24572  PNMI_STATIC void CheckVctStatus(
24573  SK_AC          *pAC,
24574  SK_IOC         IoC,
24575 @@ -8224,54 +8065,57 @@
24576  {
24577         SK_GEPORT       *pPrt;
24578         SK_PNMI_VCT     *pVctData;
24579 +       SK_U8           VctStatus;
24580         SK_U32          RetCode;
24581 -
24582 +
24583         pPrt = &pAC->GIni.GP[PhysPortIndex];
24584 -
24585 +
24586         pVctData = (SK_PNMI_VCT *) (pBuf + Offset);
24587         pVctData->VctStatus = SK_PNMI_VCT_NONE;
24588 -
24589 +
24590 +       VctStatus = pAC->Pnmi.VctStatus[PhysPortIndex];
24591 +
24592         if (!pPrt->PHWLinkUp) {
24593 -
24594 +
24595                 /* Was a VCT test ever made before? */
24596 -               if (pAC->Pnmi.VctStatus[PhysPortIndex] & SK_PNMI_VCT_TEST_DONE) {
24597 -                       if ((pAC->Pnmi.VctStatus[PhysPortIndex] & SK_PNMI_VCT_LINK)) {
24598 +               if (VctStatus & SK_PNMI_VCT_TEST_DONE) {
24599 +                       if (VctStatus & SK_PNMI_VCT_LINK) {
24600                                 pVctData->VctStatus |= SK_PNMI_VCT_OLD_VCT_DATA;
24601                         }
24602                         else {
24603                                 pVctData->VctStatus |= SK_PNMI_VCT_NEW_VCT_DATA;
24604                         }
24605                 }
24606 -
24607 +
24608                 /* Check VCT test status. */
24609                 RetCode = SkGmCableDiagStatus(pAC,IoC, PhysPortIndex, SK_FALSE);
24610 +
24611                 if (RetCode == 2) { /* VCT test is running. */
24612                         pVctData->VctStatus |= SK_PNMI_VCT_RUNNING;
24613                 }
24614                 else { /* VCT data was copied to pAC here. Check PENDING state. */
24615 -                       if (pAC->Pnmi.VctStatus[PhysPortIndex] & SK_PNMI_VCT_PENDING) {
24616 +                       if (VctStatus & SK_PNMI_VCT_PENDING) {
24617                                 pVctData->VctStatus |= SK_PNMI_VCT_NEW_VCT_DATA;
24618                         }
24619                 }
24620 -
24621 +
24622                 if (pPrt->PCableLen != 0xff) { /* Old DSP value. */
24623                         pVctData->VctStatus |= SK_PNMI_VCT_OLD_DSP_DATA;
24624                 }
24625         }
24626         else {
24627 -
24628                 /* Was a VCT test ever made before? */
24629 -               if (pAC->Pnmi.VctStatus[PhysPortIndex] & SK_PNMI_VCT_TEST_DONE) {
24630 +               if (VctStatus & SK_PNMI_VCT_TEST_DONE) {
24631                         pVctData->VctStatus &= ~SK_PNMI_VCT_NEW_VCT_DATA;
24632                         pVctData->VctStatus |= SK_PNMI_VCT_OLD_VCT_DATA;
24633                 }
24634 -
24635 +
24636                 /* DSP only valid in 100/1000 modes. */
24637 -               if (pAC->GIni.GP[PhysPortIndex].PLinkSpeedUsed !=
24638 -                       SK_LSPEED_STAT_10MBPS) {
24639 +               if (pPrt->PLinkSpeedUsed != SK_LSPEED_STAT_10MBPS) {
24640                         pVctData->VctStatus |= SK_PNMI_VCT_NEW_DSP_DATA;
24641                 }
24642 -       }
24643 +       }\r
24644 +
24645  } /* CheckVctStatus */
24646
24647
24648 @@ -8314,29 +8158,29 @@
24649         ReturnCode = SK_PNMI_ERR_GENERAL;
24650
24651         SK_MEMCPY(&Mode, pBuf, sizeof(SK_I32));
24652 -       SK_MEMCPY(&Oid, (char *) pBuf + sizeof(SK_I32), sizeof(SK_U32));
24653 +       SK_MEMCPY(&Oid, (char *)pBuf + sizeof(SK_I32), sizeof(SK_U32));
24654         HeaderLength = sizeof(SK_I32) + sizeof(SK_U32);
24655         *pLen = *pLen - HeaderLength;
24656 -       SK_MEMCPY((char *) pBuf + sizeof(SK_I32), (char *) pBuf + HeaderLength, *pLen);
24657 +       SK_MEMCPY((char *)pBuf + sizeof(SK_I32), (char *)pBuf + HeaderLength, *pLen);
24658
24659         switch(Mode) {
24660         case SK_GET_SINGLE_VAR:
24661 -               ReturnCode = SkPnmiGetVar(pAC, IoC, Oid,
24662 -                               (char *) pBuf + sizeof(SK_I32), pLen,
24663 +               ReturnCode = SkPnmiGetVar(pAC, IoC, Oid,
24664 +                               (char *)pBuf + sizeof(SK_I32), pLen,
24665                                 ((SK_U32) (-1)), NetIndex);
24666                 SK_PNMI_STORE_U32(pBuf, ReturnCode);
24667                 *pLen = *pLen + sizeof(SK_I32);
24668                 break;
24669         case SK_PRESET_SINGLE_VAR:
24670 -               ReturnCode = SkPnmiPreSetVar(pAC, IoC, Oid,
24671 -                               (char *) pBuf + sizeof(SK_I32), pLen,
24672 +               ReturnCode = SkPnmiPreSetVar(pAC, IoC, Oid,
24673 +                               (char *)pBuf + sizeof(SK_I32), pLen,
24674                                 ((SK_U32) (-1)), NetIndex);
24675                 SK_PNMI_STORE_U32(pBuf, ReturnCode);
24676                 *pLen = *pLen + sizeof(SK_I32);
24677                 break;
24678         case SK_SET_SINGLE_VAR:
24679 -               ReturnCode = SkPnmiSetVar(pAC, IoC, Oid,
24680 -                               (char *) pBuf + sizeof(SK_I32), pLen,
24681 +               ReturnCode = SkPnmiSetVar(pAC, IoC, Oid,
24682 +                               (char *)pBuf + sizeof(SK_I32), pLen,
24683                                 ((SK_U32) (-1)), NetIndex);
24684                 SK_PNMI_STORE_U32(pBuf, ReturnCode);
24685                 *pLen = *pLen + sizeof(SK_I32);
24686 @@ -8357,3 +8201,86 @@
24687         return (ReturnCode);
24688
24689  } /* SkGeIocGen */
24690 +
24691 +#ifdef SK_ASF
24692 +/*****************************************************************************
24693 + *
24694 + * Asf
24695 + *
24696 + * Description:
24697 + *  The code is simple. No description necessary.
24698 + *
24699 + * Returns:
24700 + *  SK_PNMI_ERR_OK           The request was successfully performed.
24701 + *  SK_PNMI_ERR_GENERAL      A general severe internal error occured.
24702 + *  SK_PNMI_ERR_TOO_SHORT    The passed buffer is too short to contain
24703 + *                           the correct data (e.g. a 32bit value is
24704 + *                           needed, but a 16 bit value was passed).
24705 + *  SK_PNMI_ERR_UNKNOWN_INST The requested instance of the OID doesn't
24706 + *                           exist (e.g. port instance 3 on a two port
24707 + *                           adapter.
24708 + */
24709 +
24710 +PNMI_STATIC int Asf(
24711 +SK_AC *pAC,     /* Pointer to adapter context */
24712 +SK_IOC IoC,     /* IO context handle */
24713 +int Action,     /* GET/PRESET/SET action */
24714 +SK_U32 Id,      /* Object ID that is to be processed */
24715 +char *pBuf,     /* Buffer used for the management data transfer */
24716 +unsigned int *pLen, /* On call: pBuf buffer length. On return: used buffer */
24717 +SK_U32 Instance,    /* Instance (1..n) that is to be queried or -1 */
24718 +unsigned int TableIndex, /* Index to the Id table */
24719 +SK_U32 NetIndex)    /* NetIndex (0..n), in single net mode always zero */
24720 +{
24721 +    SK_U32  RetCode = SK_PNMI_ERR_GENERAL;
24722 +
24723 +    /*
24724 +     * Check instance. We only handle single instance variables.
24725 +     */
24726 +    if (Instance != (SK_U32)(-1) && Instance != 1) {
24727 +
24728 +        *pLen = 0;
24729 +        return (SK_PNMI_ERR_UNKNOWN_INST);
24730 +    }
24731 +
24732 +    /* Perform action. */
24733 +    /* GET value. */
24734 +    if (Action == SK_PNMI_GET) {
24735 +        switch (Id) {
24736 +            case OID_SKGE_ASF:
24737 +                RetCode = SkAsfGet(pAC, IoC, (SK_U8 *) pBuf, pLen);
24738 +                break;
24739 +            default:
24740 +                RetCode = SkAsfGetOid( pAC, IoC, Id, Instance, (SK_U8 *) pBuf, pLen );
24741 +                break;
24742 +        }
24743 +
24744 +        return (RetCode);
24745 +    }
24746 +
24747 +    /* PRESET value. */
24748 +    if (Action == SK_PNMI_PRESET) {
24749 +        switch (Id) {
24750 +            case OID_SKGE_ASF:
24751 +                RetCode = SkAsfPreSet(pAC, IoC, (SK_U8 *) pBuf, pLen);
24752 +                break;
24753 +            default:
24754 +                RetCode = SkAsfPreSetOid( pAC, IoC, Id, Instance, (SK_U8 *) pBuf, pLen );
24755 +                break;
24756 +        }
24757 +    }
24758 +
24759 +    /* SET value. */
24760 +    if (Action == SK_PNMI_SET) {
24761 +        switch (Id) {
24762 +            case OID_SKGE_ASF:
24763 +                RetCode = SkAsfSet(pAC, IoC, (SK_U8 *) pBuf, pLen);
24764 +                break;
24765 +            default:
24766 +                RetCode = SkAsfSetOid( pAC, IoC, Id, Instance, (SK_U8 *) pBuf, pLen );
24767 +                break;
24768 +        }
24769 +    }
24770 +    return (RetCode);
24771 +}
24772 +#endif /* SK_ASF */
24773 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/skgesirq.c linux-2.6.9.new/drivers/net/sk98lin/skgesirq.c
24774 --- linux-2.6.9.old/drivers/net/sk98lin/skgesirq.c      2004-10-19 05:53:06.000000000 +0800
24775 +++ linux-2.6.9.new/drivers/net/sk98lin/skgesirq.c      2006-12-07 14:35:03.000000000 +0800
24776 @@ -2,8 +2,8 @@
24777   *
24778   * Name:       skgesirq.c
24779   * Project:    Gigabit Ethernet Adapters, Common Modules
24780 - * Version:    $Revision: 1.92 $
24781 - * Date:       $Date: 2003/09/16 14:37:07 $
24782 + * Version:    $Revision: 2.21 $
24783 + * Date:       $Date: 2005/03/03 15:49:58 $
24784   * Purpose:    Special IRQ module
24785   *
24786   ******************************************************************************/
24787 @@ -11,13 +11,12 @@
24788  /******************************************************************************
24789   *
24790   *     (C)Copyright 1998-2002 SysKonnect.
24791 - *     (C)Copyright 2002-2003 Marvell.
24792 + *     (C)Copyright 2002-2005 Marvell.
24793   *
24794   *     This program is free software; you can redistribute it and/or modify
24795   *     it under the terms of the GNU General Public License as published by
24796   *     the Free Software Foundation; either version 2 of the License, or
24797   *     (at your option) any later version.
24798 - *
24799   *     The information in this file is provided "AS IS" without warranty.
24800   *
24801   ******************************************************************************/
24802 @@ -38,7 +37,7 @@
24803   *     right after this ISR.
24804   *
24805   *     The Interrupt source register of the adapter is NOT read by this module.
24806 - *  SO if the drivers implementor needs a while loop around the
24807 + *     SO if the drivers implementor needs a while loop around the
24808   *     slow data paths interrupt bits, he needs to call the SkGeSirqIsr() for
24809   *     each loop entered.
24810   *
24811 @@ -46,11 +45,6 @@
24812   *
24813   */
24814
24815 -#if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
24816 -static const char SysKonnectFileId[] =
24817 -       "@(#) $Id: skgesirq.c,v 1.92 2003/09/16 14:37:07 rschmidt Exp $ (C) Marvell.";
24818 -#endif
24819 -
24820  #include "h/skdrv1st.h"                /* Driver Specific Definitions */
24821  #ifndef SK_SLIM
24822  #include "h/skgepnmi.h"                /* PNMI Definitions */
24823 @@ -58,6 +52,13 @@
24824  #endif
24825  #include "h/skdrv2nd.h"                /* Adapter Control and Driver specific Def. */
24826
24827 +/* local variables ************************************************************/
24828 +
24829 +#if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
24830 +static const char SysKonnectFileId[] =
24831 +       "@(#) $Id: skgesirq.c,v 2.21 2005/03/03 15:49:58 rschmidt Exp $ (C) Marvell.";
24832 +#endif
24833 +
24834  /* local function prototypes */
24835  #ifdef GENESIS
24836  static int     SkGePortCheckUpXmac(SK_AC*, SK_IOC, int, SK_BOOL);
24837 @@ -86,7 +87,7 @@
24838         XM_RXF_511B,
24839         XM_RXF_1023B,
24840         XM_RXF_MAX_SZ
24841 -} ;
24842 +};
24843  #endif /* GENESIS */
24844
24845  #ifdef __C2MAN__
24846 @@ -109,8 +110,8 @@
24847   * Returns: N/A
24848   */
24849  static void SkHWInitDefSense(
24850 -SK_AC  *pAC,   /* adapter context */
24851 -SK_IOC IoC,    /* IO context */
24852 +SK_AC  *pAC,   /* Adapter Context */
24853 +SK_IOC IoC,    /* I/O context */
24854  int            Port)   /* Port Index (MAC_1 + n) */
24855  {
24856         SK_GEPORT       *pPrt;          /* GIni Port struct pointer */
24857 @@ -119,7 +120,7 @@
24858
24859         pPrt->PAutoNegTimeOut = 0;
24860
24861 -       if (pPrt->PLinkModeConf != SK_LMODE_AUTOSENSE) {
24862 +       if (pPrt->PLinkModeConf != (SK_U8)SK_LMODE_AUTOSENSE) {
24863                 pPrt->PLinkMode = pPrt->PLinkModeConf;
24864                 return;
24865         }
24866 @@ -145,8 +146,8 @@
24867   *
24868   */
24869  static SK_U8 SkHWSenseGetNext(
24870 -SK_AC  *pAC,   /* adapter context */
24871 -SK_IOC IoC,    /* IO context */
24872 +SK_AC  *pAC,   /* Adapter Context */
24873 +SK_IOC IoC,    /* I/O context */
24874  int            Port)   /* Port Index (MAC_1 + n) */
24875  {
24876         SK_GEPORT       *pPrt;          /* GIni Port struct pointer */
24877 @@ -155,18 +156,18 @@
24878
24879         pPrt->PAutoNegTimeOut = 0;
24880
24881 -    if (pPrt->PLinkModeConf != (SK_U8)SK_LMODE_AUTOSENSE) {
24882 +       if (pPrt->PLinkModeConf != (SK_U8)SK_LMODE_AUTOSENSE) {
24883                 /* Leave all as configured */
24884                 return(pPrt->PLinkModeConf);
24885         }
24886
24887 -    if (pPrt->PLinkMode == (SK_U8)SK_LMODE_AUTOFULL) {
24888 +       if (pPrt->PLinkMode == (SK_U8)SK_LMODE_AUTOFULL) {
24889                 /* Return next mode AUTOBOTH */
24890 -        return ((SK_U8)SK_LMODE_AUTOBOTH);
24891 +               return((SK_U8)SK_LMODE_AUTOBOTH);
24892         }
24893
24894         /* Return default autofull */
24895 -    return ((SK_U8)SK_LMODE_AUTOFULL);
24896 +       return((SK_U8)SK_LMODE_AUTOFULL);
24897  }      /* SkHWSenseGetNext */
24898
24899
24900 @@ -179,8 +180,8 @@
24901   * Returns: N/A
24902   */
24903  static void SkHWSenseSetNext(
24904 -SK_AC  *pAC,           /* adapter context */
24905 -SK_IOC IoC,            /* IO context */
24906 +SK_AC  *pAC,           /* Adapter Context */
24907 +SK_IOC IoC,            /* I/O context */
24908  int            Port,           /* Port Index (MAC_1 + n) */
24909  SK_U8  NewMode)        /* New Mode to be written in sense mode */
24910  {
24911 @@ -190,7 +191,7 @@
24912
24913         pPrt->PAutoNegTimeOut = 0;
24914
24915 -    if (pPrt->PLinkModeConf != (SK_U8)SK_LMODE_AUTOSENSE) {
24916 +       if (pPrt->PLinkModeConf != (SK_U8)SK_LMODE_AUTOSENSE) {
24917                 return;
24918         }
24919
24920 @@ -214,8 +215,8 @@
24921   * Returns: N/A
24922   */
24923  void SkHWLinkDown(
24924 -SK_AC  *pAC,           /* adapter context */
24925 -SK_IOC IoC,            /* IO context */
24926 +SK_AC  *pAC,           /* Adapter Context */
24927 +SK_IOC IoC,            /* I/O context */
24928  int            Port)           /* Port Index (MAC_1 + n) */
24929  {
24930         SK_GEPORT       *pPrt;          /* GIni Port struct pointer */
24931 @@ -227,11 +228,11 @@
24932
24933         /* Disable Receiver and Transmitter */
24934         SkMacRxTxDisable(pAC, IoC, Port);
24935 -
24936 +
24937         /* Init default sense mode */
24938         SkHWInitDefSense(pAC, IoC, Port);
24939
24940 -       if (pPrt->PHWLinkUp == SK_FALSE) {
24941 +       if (!pPrt->PHWLinkUp) {
24942                 return;
24943         }
24944
24945 @@ -242,8 +243,8 @@
24946         pPrt->PHWLinkUp = SK_FALSE;
24947
24948         /* Reset Port stati */
24949 -    pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_UNKNOWN;
24950 -    pPrt->PFlowCtrlStatus = (SK_U8)SK_FLOW_STAT_NONE;
24951 +       pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_UNKNOWN;
24952 +       pPrt->PFlowCtrlStatus = (SK_U8)SK_FLOW_STAT_NONE;
24953         pPrt->PLinkSpeedUsed = (SK_U8)SK_LSPEED_STAT_INDETERMINATED;
24954
24955         /* Re-init Phy especially when the AutoSense default is set now */
24956 @@ -266,8 +267,8 @@
24957   * Returns: N/A
24958   */
24959  void SkHWLinkUp(
24960 -SK_AC  *pAC,   /* adapter context */
24961 -SK_IOC IoC,    /* IO context */
24962 +SK_AC  *pAC,   /* Adapter Context */
24963 +SK_IOC IoC,    /* I/O context */
24964  int            Port)   /* Port Index (MAC_1 + n) */
24965  {
24966         SK_GEPORT       *pPrt;          /* GIni Port struct pointer */
24967 @@ -281,11 +282,11 @@
24968
24969         pPrt->PHWLinkUp = SK_TRUE;
24970         pPrt->PAutoNegFail = SK_FALSE;
24971 -    pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_UNKNOWN;
24972 +       pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_UNKNOWN;
24973
24974 -    if (pPrt->PLinkMode != (SK_U8)SK_LMODE_AUTOHALF &&
24975 -        pPrt->PLinkMode != (SK_U8)SK_LMODE_AUTOFULL &&
24976 -        pPrt->PLinkMode != (SK_U8)SK_LMODE_AUTOBOTH) {
24977 +       if (pPrt->PLinkMode != (SK_U8)SK_LMODE_AUTOHALF &&
24978 +               pPrt->PLinkMode != (SK_U8)SK_LMODE_AUTOFULL &&
24979 +               pPrt->PLinkMode != (SK_U8)SK_LMODE_AUTOBOTH) {
24980                 /* Link is up and no Auto-negotiation should be done */
24981
24982                 /* Link speed should be the configured one */
24983 @@ -304,18 +305,18 @@
24984                 }
24985
24986                 /* Set Link Mode Status */
24987 -               if (pPrt->PLinkMode == SK_LMODE_FULL) {
24988 +               if (pPrt->PLinkMode == (SK_U8)SK_LMODE_FULL) {
24989                         pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_FULL;
24990                 }
24991                 else {
24992 -            pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_HALF;
24993 +                       pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_HALF;
24994                 }
24995
24996                 /* No flow control without auto-negotiation */
24997 -        pPrt->PFlowCtrlStatus = (SK_U8)SK_FLOW_STAT_NONE;
24998 +               pPrt->PFlowCtrlStatus = (SK_U8)SK_FLOW_STAT_NONE;
24999
25000                 /* enable Rx/Tx */
25001 -        (void)SkMacRxTxEnable(pAC, IoC, Port);
25002 +               (void)SkMacRxTxEnable(pAC, IoC, Port);
25003         }
25004  }      /* SkHWLinkUp */
25005
25006 @@ -329,14 +330,16 @@
25007   * Returns: N/A
25008   */
25009  static void SkMacParity(
25010 -SK_AC  *pAC,   /* adapter context */
25011 -SK_IOC IoC,    /* IO context */
25012 -int            Port)   /* Port Index of the port failed */
25013 +SK_AC  *pAC,   /* Adapter Context */
25014 +SK_IOC IoC,    /* I/O context */
25015 +int            Port)   /* Port Index (MAC_1 + n) */
25016  {
25017         SK_EVPARA       Para;
25018         SK_GEPORT       *pPrt;          /* GIni Port struct pointer */
25019         SK_U32          TxMax;          /* Tx Max Size Counter */
25020
25021 +       TxMax = 0;
25022 +
25023         pPrt = &pAC->GIni.GP[Port];
25024
25025         /* Clear IRQ Tx Parity Error */
25026 @@ -355,7 +358,7 @@
25027                         pAC->GIni.GIChipRev == 0) ? GMF_CLI_TX_FC : GMF_CLI_TX_PE));
25028         }
25029  #endif /* YUKON */
25030 -
25031 +
25032         if (pPrt->PCheckPar) {
25033
25034                 if (Port == MAC_1) {
25035 @@ -366,7 +369,7 @@
25036                 }
25037                 Para.Para64 = Port;
25038                 SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_FAIL, Para);
25039 -
25040 +
25041                 Para.Para32[0] = Port;
25042                 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
25043
25044 @@ -378,7 +381,7 @@
25045         if (pAC->GIni.GIGenesis) {
25046                 /* Snap statistic counters */
25047                 (void)SkXmUpdateStats(pAC, IoC, Port);
25048 -
25049 +
25050                 (void)SkXmMacStatistic(pAC, IoC, Port, XM_TXF_MAX_SZ, &TxMax);
25051         }
25052  #endif /* GENESIS */
25053 @@ -399,15 +402,15 @@
25054
25055  /******************************************************************************
25056   *
25057 - *     SkGeHwErr() - Hardware Error service routine
25058 + *     SkGeYuHwErr() - Hardware Error service routine (Genesis and Yukon)
25059   *
25060   * Description: handles all HW Error interrupts
25061   *
25062   * Returns: N/A
25063   */
25064 -static void SkGeHwErr(
25065 -SK_AC  *pAC,           /* adapter context */
25066 -SK_IOC IoC,            /* IO context */
25067 +static void SkGeYuHwErr(
25068 +SK_AC  *pAC,           /* Adapter Context */
25069 +SK_IOC IoC,            /* I/O context */
25070  SK_U32 HwStatus)       /* Interrupt status word */
25071  {
25072         SK_EVPARA       Para;
25073 @@ -423,10 +426,10 @@
25074                 }
25075
25076                 /* Reset all bits in the PCI STATUS register */
25077 -               SK_IN16(IoC, PCI_C(PCI_STATUS), &Word);
25078 -
25079 +               SK_IN16(IoC, PCI_C(pAC, PCI_STATUS), &Word);
25080 +
25081                 SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
25082 -        SK_OUT16(IoC, PCI_C(PCI_STATUS), (SK_U16)(Word | PCI_ERRBITS));
25083 +               SK_OUT16(IoC, PCI_C(pAC, PCI_STATUS), (SK_U16)(Word | PCI_ERRBITS));
25084                 SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
25085
25086                 Para.Para64 = 0;
25087 @@ -484,14 +487,18 @@
25088  #endif /* YUKON */
25089
25090         if ((HwStatus & IS_RAM_RD_PAR) != 0) {
25091 +
25092                 SK_OUT16(IoC, B3_RI_CTRL, RI_CLR_RD_PERR);
25093 +
25094                 SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E014, SKERR_SIRQ_E014MSG);
25095                 Para.Para64 = 0;
25096                 SkEventQueue(pAC, SKGE_DRV, SK_DRV_ADAP_FAIL, Para);
25097         }
25098
25099         if ((HwStatus & IS_RAM_WR_PAR) != 0) {
25100 +
25101                 SK_OUT16(IoC, B3_RI_CTRL, RI_CLR_WR_PERR);
25102 +
25103                 SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E015, SKERR_SIRQ_E015MSG);
25104                 Para.Para64 = 0;
25105                 SkEventQueue(pAC, SKGE_DRV, SK_DRV_ADAP_FAIL, Para);
25106 @@ -512,7 +519,7 @@
25107                 SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E018, SKERR_SIRQ_E018MSG);
25108                 Para.Para64 = MAC_1;
25109                 SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_FAIL, Para);
25110 -
25111 +
25112                 Para.Para32[0] = MAC_1;
25113                 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
25114         }
25115 @@ -524,37 +531,286 @@
25116                 SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E019, SKERR_SIRQ_E019MSG);
25117                 Para.Para64 = MAC_2;
25118                 SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_FAIL, Para);
25119 -
25120 +
25121                 Para.Para32[0] = MAC_2;
25122                 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
25123         }
25124 -}      /* SkGeHwErr */
25125 +}      /* SkGeYuHwErr */
25126 +
25127 +#ifdef YUK2
25128 +/******************************************************************************
25129 + *
25130 + *     SkYuk2HwPortErr() - Service HW Errors for specified port (Yukon-2 only)
25131 + *
25132 + * Description: handles the HW Error interrupts for a specific port.
25133 + *
25134 + * Returns: N/A
25135 + */
25136 +static void SkYuk2HwPortErr(
25137 +SK_AC  *pAC,           /* Adapter Context */
25138 +SK_IOC IoC,            /* I/O Context */
25139 +SK_U32 HwStatus,       /* Interrupt status word */
25140 +int            Port)           /* Port Index (MAC_1 + n) */
25141 +{
25142 +       SK_EVPARA       Para;
25143 +       int                     Queue;
25144 +
25145 +       if (Port == MAC_2) {
25146 +               HwStatus >>= 8;
25147 +       }
25148 +
25149 +       if ((HwStatus & Y2_HWE_L1_MASK) == 0) {
25150 +               return;
25151 +       }
25152 +
25153 +       if ((HwStatus & Y2_IS_PAR_RD1) != 0) {
25154 +               /* Clear IRQ */
25155 +               SK_OUT16(IoC, SELECT_RAM_BUFFER(Port, B3_RI_CTRL), RI_CLR_RD_PERR);
25156 +
25157 +               if (Port == MAC_1) {
25158 +                       SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E028, SKERR_SIRQ_E028MSG);
25159 +               }
25160 +               else {
25161 +                       SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E030, SKERR_SIRQ_E030MSG);
25162 +               }
25163 +       }
25164 +
25165 +       if ((HwStatus & Y2_IS_PAR_WR1) != 0) {
25166 +               /* Clear IRQ */
25167 +               SK_OUT16(IoC, SELECT_RAM_BUFFER(Port, B3_RI_CTRL), RI_CLR_WR_PERR);
25168
25169 +               if (Port == MAC_1) {
25170 +                       SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E029, SKERR_SIRQ_E029MSG);
25171 +               }
25172 +               else {
25173 +                       SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E031, SKERR_SIRQ_E031MSG);
25174 +               }
25175 +       }
25176 +
25177 +       if ((HwStatus & Y2_IS_PAR_MAC1) != 0) {
25178 +               /* Clear IRQ */
25179 +               SK_OUT8(IoC, MR_ADDR(Port, TX_GMF_CTRL_T), GMF_CLI_TX_PE);
25180 +
25181 +               if (Port == MAC_1) {
25182 +                       SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E016, SKERR_SIRQ_E016MSG);
25183 +               }
25184 +               else {
25185 +                       SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E017, SKERR_SIRQ_E017MSG);
25186 +               }
25187 +       }
25188 +
25189 +       if ((HwStatus & Y2_IS_PAR_RX1) != 0) {
25190 +               if (Port == MAC_1) {
25191 +                       Queue = Q_R1;
25192 +                       SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E018, SKERR_SIRQ_E018MSG);
25193 +               }
25194 +               else {
25195 +                       Queue = Q_R2;
25196 +                       SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E019, SKERR_SIRQ_E019MSG);
25197 +               }
25198 +               /* Clear IRQ */
25199 +               SK_OUT32(IoC, Q_ADDR(Queue, Q_CSR), BMU_CLR_IRQ_PAR);
25200 +       }
25201 +
25202 +       if ((HwStatus & Y2_IS_TCP_TXS1) != 0) {
25203 +               if (Port == MAC_1) {
25204 +                       Queue = Q_XS1;
25205 +                       SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E033, SKERR_SIRQ_E033MSG);
25206 +               }
25207 +               else {
25208 +                       Queue = Q_XS2;
25209 +                       SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E035, SKERR_SIRQ_E035MSG);
25210 +               }
25211 +               /* Clear IRQ */
25212 +               SK_OUT32(IoC, Q_ADDR(Queue, Q_CSR), BMU_CLR_IRQ_TCP);
25213 +       }
25214 +
25215 +       if ((HwStatus & Y2_IS_TCP_TXA1) != 0) {
25216 +               if (Port == MAC_1) {
25217 +                       Queue = Q_XA1;
25218 +                       SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E032, SKERR_SIRQ_E032MSG);
25219 +               }
25220 +               else {
25221 +                       Queue = Q_XA2;
25222 +                       SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E034, SKERR_SIRQ_E034MSG);
25223 +               }
25224 +               /* Clear IRQ */
25225 +               SK_OUT32(IoC, Q_ADDR(Queue, Q_CSR), BMU_CLR_IRQ_TCP);
25226 +       }
25227 +
25228 +       Para.Para64 = Port;
25229 +       SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_FAIL, Para);
25230 +
25231 +       Para.Para32[0] = Port;
25232 +       SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
25233 +
25234 +}      /* SkYuk2HwPortErr */
25235
25236  /******************************************************************************
25237   *
25238 - *     SkGeSirqIsr() - Special Interrupt Service Routine
25239 + *     SkYuk2HwErr() - Hardware Error service routine (Yukon-2 only)
25240   *
25241 - * Description: handles all non data transfer specific interrupts (slow path)
25242 + * Description: handles all HW Error interrupts
25243 + *
25244 + * Returns: N/A
25245 + */
25246 +static void SkYuk2HwErr(
25247 +SK_AC  *pAC,           /* Adapter Context */
25248 +SK_IOC IoC,            /* I/O Context */
25249 +SK_U32 HwStatus)       /* Interrupt status word */
25250 +{
25251 +       SK_EVPARA       Para;
25252 +       SK_U16          Word;
25253 +       SK_U32          DWord;
25254 +       SK_U32          TlpHead[4];
25255 +       int                     i;
25256 +
25257 +       /* This is necessary only for Rx timing measurements */
25258 +       if ((HwStatus & Y2_IS_TIST_OV) != 0) {
25259 +               /* increment Time Stamp Timer counter (high) */
25260 +               pAC->GIni.GITimeStampCnt++;
25261 +
25262 +               /* Clear Time Stamp Timer IRQ */
25263 +               SK_OUT8(IoC, GMAC_TI_ST_CTRL, (SK_U8)GMT_ST_CLR_IRQ);
25264 +       }
25265 +
25266 +       /* Evaluate Y2_IS_PCI_NEXP before Y2_IS_MST_ERR or Y2_IS_IRQ_STAT */
25267 +       if ((HwStatus & Y2_IS_PCI_NEXP) != 0) {
25268 +               /* PCI-Express Error occured which is not described in PEX spec. */
25269 +               /*
25270 +                * This error is also mapped either to Master Abort (Y2_IS_MST_ERR)
25271 +                * or Target Abort (Y2_IS_IRQ_STAT) bit and can only be cleared there.
25272 +                * Therefore handle this event just by printing an error log entry.
25273 +                */
25274 +               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E027, SKERR_SIRQ_E027MSG);
25275 +       }
25276 +
25277 +       if ((HwStatus & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) != 0) {
25278 +               /* PCI Errors occured */
25279 +               if ((HwStatus & Y2_IS_IRQ_STAT) != 0) {
25280 +                       SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E013, SKERR_SIRQ_E013MSG);
25281 +               }
25282 +               else {
25283 +                       SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E012, SKERR_SIRQ_E012MSG);
25284 +               }
25285 +
25286 +               /* Reset all bits in the PCI STATUS register */
25287 +               SK_IN16(IoC, PCI_C(pAC, PCI_STATUS), &Word);
25288 +
25289 +               SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
25290 +               SK_OUT16(IoC, PCI_C(pAC, PCI_STATUS), (SK_U16)(Word | PCI_ERRBITS));
25291 +               SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
25292 +
25293 +               Para.Para64 = 0;
25294 +               SkEventQueue(pAC, SKGE_DRV, SK_DRV_ADAP_FAIL, Para);
25295 +       }
25296 +
25297 +       /* check for PCI-Express Uncorrectable Error*/
25298 +       if ((HwStatus & Y2_IS_PCI_EXP) != 0) {
25299 +               /*
25300 +                * On PCI-Express bus bridges are called root complexes (RC).
25301 +                * PCI-Express errors are recognized by the root complex too,
25302 +                * which requests the system to handle the problem. After error
25303 +                * occurence it may be that no access to the adapter may be performed
25304 +                * any longer.
25305 +                */
25306 +
25307 +               /* Get uncorrectable error status */
25308 +               SK_IN32(IoC, PCI_C(pAC, PEX_UNC_ERR_STAT), &DWord);
25309 +
25310 +               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
25311 +                       ("PEX Uncorr.Error Status: 0x%08lX\n", DWord));
25312 +
25313 +               if (DWord != PEX_UNSUP_REQ) {
25314 +                       /* ignore Unsupported Request Errors */
25315 +                       SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E026, SKERR_SIRQ_E026MSG);
25316 +               }
25317 +
25318 +               if ((DWord & (PEX_FATAL_ERRORS | PEX_POIS_TLP)) != 0) {
25319 +                       /*
25320 +                        * Stop only, if the uncorrectable error is fatal or
25321 +                        * Poisoned TLP occured
25322 +                        */
25323 +                       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ, ("Header Log:"));
25324 +
25325 +                       for (i = 0; i < 4; i++) {
25326 +                               /* get TLP Header from Log Registers */
25327 +                               SK_IN32(IoC, PCI_C(pAC, PEX_HEADER_LOG + i*4), TlpHead + i);
25328 +
25329 +                               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
25330 +                                       (" 0x%08lX", TlpHead[i]));
25331 +                       }
25332 +                       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ, ("\n"));
25333 +
25334 +                       /* check for vendor defined broadcast message */
25335 +                       if (TlpHead[0] == 0x73004001 && (SK_U8)TlpHead[1] == 0x7f) {
25336 +
25337 +                               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
25338 +                                       ("Vendor defined broadcast message\n"));
25339 +                       }
25340 +                       else {
25341 +                               Para.Para64 = 0;
25342 +                               SkEventQueue(pAC, SKGE_DRV, SK_DRV_ADAP_FAIL, Para);
25343 +
25344 +                               pAC->GIni.GIValHwIrqMask &= ~Y2_IS_PCI_EXP;
25345 +                               /* Rewrite HW IRQ mask */
25346 +                               SK_OUT32(IoC, B0_HWE_IMSK, pAC->GIni.GIValHwIrqMask);
25347 +                       }
25348 +               }
25349 +               /* clear the interrupt */
25350 +               SK_OUT32(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
25351 +               SK_OUT32(IoC, PCI_C(pAC, PEX_UNC_ERR_STAT), 0xffffffffUL);
25352 +               SK_OUT32(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
25353 +       }
25354 +
25355 +       for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
25356 +
25357 +               SkYuk2HwPortErr(pAC, IoC, HwStatus, i);
25358 +       }
25359 +
25360 +}      /* SkYuk2HwErr */
25361 +#endif /* YUK2 */
25362 +
25363 +/******************************************************************************
25364 + *
25365 + *     SkGeSirqIsr() - Wrapper for Special Interrupt Service Routine
25366 + *
25367 + * Description: calls the preselected special ISR (slow path)
25368   *
25369   * Returns: N/A
25370   */
25371  void SkGeSirqIsr(
25372 -SK_AC  *pAC,           /* adapter context */
25373 -SK_IOC IoC,            /* IO context */
25374 +SK_AC  *pAC,           /* Adapter Context */
25375 +SK_IOC IoC,            /* I/O context */
25376 +SK_U32 Istatus)        /* Interrupt status word */
25377 +{
25378 +       pAC->GIni.GIFunc.pSkGeSirqIsr(pAC, IoC, Istatus);
25379 +}
25380 +
25381 +/******************************************************************************
25382 + *
25383 + *     SkGeYuSirqIsr() - Special Interrupt Service Routine
25384 + *
25385 + * Description: handles all non data transfer specific interrupts (slow path)
25386 + *
25387 + * Returns: N/A
25388 + */
25389 +void SkGeYuSirqIsr(
25390 +SK_AC  *pAC,           /* Adapter Context */
25391 +SK_IOC IoC,            /* I/O Context */
25392  SK_U32 Istatus)        /* Interrupt status word */
25393  {
25394         SK_EVPARA       Para;
25395         SK_U32          RegVal32;       /* Read register value */
25396         SK_GEPORT       *pPrt;          /* GIni Port struct pointer */
25397 -       SK_U16          PhyInt;
25398 +       SK_U16          PhyInt;
25399         int                     i;
25400
25401         if (((Istatus & IS_HW_ERR) & pAC->GIni.GIValIrqMask) != 0) {
25402                 /* read the HW Error Interrupt source */
25403                 SK_IN32(IoC, B0_HWE_ISRC, &RegVal32);
25404 -
25405 -               SkGeHwErr(pAC, IoC, RegVal32);
25406 +
25407 +               SkGeYuHwErr(pAC, IoC, RegVal32);
25408         }
25409
25410         /*
25411 @@ -569,7 +825,7 @@
25412         }
25413
25414         if (((Istatus & (IS_PA_TO_RX2 | IS_PA_TO_TX2)) != 0) &&
25415 -           pAC->GIni.GP[MAC_2].PState == SK_PRT_RESET) {
25416 +               pAC->GIni.GP[MAC_2].PState == SK_PRT_RESET) {
25417                 /* MAC 2 was not initialized but Packet timeout occured */
25418                 SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E005,
25419                         SKERR_SIRQ_E005MSG);
25420 @@ -590,8 +846,8 @@
25421         }
25422
25423         if ((Istatus & IS_PA_TO_TX1) != 0) {
25424 -
25425 -               pPrt = &pAC->GIni.GP[0];
25426 +
25427 +               pPrt = &pAC->GIni.GP[MAC_1];
25428
25429                 /* May be a normal situation in a server with a slow network */
25430                 SK_OUT16(IoC, B3_PA_CTRL, PA_CLR_TO_TX1);
25431 @@ -612,25 +868,18 @@
25432                                  * we ignore those
25433                                  */
25434                                 pPrt->HalfDupTimerActive = SK_TRUE;
25435 -#ifdef XXX
25436 -                               Len = sizeof(SK_U64);
25437 -                               SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets,
25438 -                                       &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, 0),
25439 -                                       pAC->Rlmt.Port[0].Net->NetNumber);
25440 -
25441 -                               pPrt->LastOctets = Octets;
25442 -#endif /* XXX */
25443 +
25444                                 /* Snap statistic counters */
25445                                 (void)SkXmUpdateStats(pAC, IoC, 0);
25446
25447                                 (void)SkXmMacStatistic(pAC, IoC, 0, XM_TXO_OK_HI, &RegVal32);
25448
25449                                 pPrt->LastOctets = (SK_U64)RegVal32 << 32;
25450 -
25451 +
25452                                 (void)SkXmMacStatistic(pAC, IoC, 0, XM_TXO_OK_LO, &RegVal32);
25453
25454                                 pPrt->LastOctets += RegVal32;
25455 -
25456 +
25457                                 Para.Para32[0] = 0;
25458                                 SkTimerStart(pAC, IoC, &pPrt->HalfDupChkTimer, SK_HALFDUP_CHK_TIME,
25459                                         SKGE_HWAC, SK_HWEV_HALFDUP_CHK, Para);
25460 @@ -640,8 +889,8 @@
25461         }
25462
25463         if ((Istatus & IS_PA_TO_TX2) != 0) {
25464 -
25465 -               pPrt = &pAC->GIni.GP[1];
25466 +
25467 +               pPrt = &pAC->GIni.GP[MAC_2];
25468
25469                 /* May be a normal situation in a server with a slow network */
25470                 SK_OUT16(IoC, B3_PA_CTRL, PA_CLR_TO_TX2);
25471 @@ -653,25 +902,18 @@
25472                                  pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOHALF) &&
25473                                 !pPrt->HalfDupTimerActive) {
25474                                 pPrt->HalfDupTimerActive = SK_TRUE;
25475 -#ifdef XXX
25476 -                               Len = sizeof(SK_U64);
25477 -                               SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets,
25478 -                                       &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, 1),
25479 -                                       pAC->Rlmt.Port[1].Net->NetNumber);
25480 -
25481 -                               pPrt->LastOctets = Octets;
25482 -#endif /* XXX */
25483 +
25484                                 /* Snap statistic counters */
25485                                 (void)SkXmUpdateStats(pAC, IoC, 1);
25486
25487                                 (void)SkXmMacStatistic(pAC, IoC, 1, XM_TXO_OK_HI, &RegVal32);
25488
25489                                 pPrt->LastOctets = (SK_U64)RegVal32 << 32;
25490 -
25491 +
25492                                 (void)SkXmMacStatistic(pAC, IoC, 1, XM_TXO_OK_LO, &RegVal32);
25493
25494                                 pPrt->LastOctets += RegVal32;
25495 -
25496 +
25497                                 Para.Para32[0] = 1;
25498                                 SkTimerStart(pAC, IoC, &pPrt->HalfDupChkTimer, SK_HALFDUP_CHK_TIME,
25499                                         SKGE_HWAC, SK_HWEV_HALFDUP_CHK, Para);
25500 @@ -684,6 +926,7 @@
25501         if ((Istatus & IS_R1_C) != 0) {
25502                 /* Clear IRQ */
25503                 SK_OUT32(IoC, B0_R1_CSR, CSR_IRQ_CL_C);
25504 +
25505                 SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E006,
25506                         SKERR_SIRQ_E006MSG);
25507                 Para.Para64 = MAC_1;
25508 @@ -695,6 +938,7 @@
25509         if ((Istatus & IS_R2_C) != 0) {
25510                 /* Clear IRQ */
25511                 SK_OUT32(IoC, B0_R2_CSR, CSR_IRQ_CL_C);
25512 +
25513                 SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E007,
25514                         SKERR_SIRQ_E007MSG);
25515                 Para.Para64 = MAC_2;
25516 @@ -706,6 +950,7 @@
25517         if ((Istatus & IS_XS1_C) != 0) {
25518                 /* Clear IRQ */
25519                 SK_OUT32(IoC, B0_XS1_CSR, CSR_IRQ_CL_C);
25520 +
25521                 SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E008,
25522                         SKERR_SIRQ_E008MSG);
25523                 Para.Para64 = MAC_1;
25524 @@ -717,6 +962,7 @@
25525         if ((Istatus & IS_XA1_C) != 0) {
25526                 /* Clear IRQ */
25527                 SK_OUT32(IoC, B0_XA1_CSR, CSR_IRQ_CL_C);
25528 +
25529                 SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E009,
25530                         SKERR_SIRQ_E009MSG);
25531                 Para.Para64 = MAC_1;
25532 @@ -728,6 +974,7 @@
25533         if ((Istatus & IS_XS2_C) != 0) {
25534                 /* Clear IRQ */
25535                 SK_OUT32(IoC, B0_XS2_CSR, CSR_IRQ_CL_C);
25536 +
25537                 SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E010,
25538                         SKERR_SIRQ_E010MSG);
25539                 Para.Para64 = MAC_2;
25540 @@ -739,6 +986,7 @@
25541         if ((Istatus & IS_XA2_C) != 0) {
25542                 /* Clear IRQ */
25543                 SK_OUT32(IoC, B0_XA2_CSR, CSR_IRQ_CL_C);
25544 +
25545                 SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E011,
25546                         SKERR_SIRQ_E011MSG);
25547                 Para.Para64 = MAC_2;
25548 @@ -751,39 +999,37 @@
25549         if ((Istatus & IS_EXT_REG) != 0) {
25550                 /* Test IRQs from PHY */
25551                 for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
25552 -
25553 +
25554                         pPrt = &pAC->GIni.GP[i];
25555 -
25556 +
25557                         if (pPrt->PState == SK_PRT_RESET) {
25558                                 continue;
25559                         }
25560 -
25561 +
25562  #ifdef GENESIS
25563                         if (pAC->GIni.GIGenesis) {
25564 -
25565 +
25566                                 switch (pPrt->PhyType) {
25567 -
25568 +
25569                                 case SK_PHY_XMAC:
25570                                         break;
25571 -
25572 +
25573                                 case SK_PHY_BCOM:
25574                                         SkXmPhyRead(pAC, IoC, i, PHY_BCOM_INT_STAT, &PhyInt);
25575 -
25576 +
25577                                         if ((PhyInt & ~PHY_B_DEF_MSK) != 0) {
25578                                                 SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
25579 -                                                       ("Port %d Bcom Int: 0x%04X\n",
25580 -                                                       i, PhyInt));
25581 +                                                       ("Port %d PHY Int: 0x%04X\n", i, PhyInt));
25582                                                 SkPhyIsrBcom(pAC, IoC, i, PhyInt);
25583                                         }
25584                                         break;
25585  #ifdef OTHER_PHY
25586                                 case SK_PHY_LONE:
25587                                         SkXmPhyRead(pAC, IoC, i, PHY_LONE_INT_STAT, &PhyInt);
25588 -
25589 +
25590                                         if ((PhyInt & PHY_L_DEF_MSK) != 0) {
25591                                                 SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
25592 -                                                       ("Port %d Lone Int: %x\n",
25593 -                                                       i, PhyInt));
25594 +                                                       ("Port %d PHY Int: 0x%04X\n", i, PhyInt));
25595                                                 SkPhyIsrLone(pAC, IoC, i, PhyInt);
25596                                         }
25597                                         break;
25598 @@ -791,7 +1037,7 @@
25599                                 }
25600                         }
25601  #endif /* GENESIS */
25602 -
25603 +
25604  #ifdef YUKON
25605                         if (pAC->GIni.GIYukon) {
25606                                 /* Read PHY Interrupt Status */
25607 @@ -799,8 +1045,7 @@
25608
25609                                 if ((PhyInt & PHY_M_DEF_MSK) != 0) {
25610                                         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
25611 -                                               ("Port %d Marv Int: 0x%04X\n",
25612 -                                               i, PhyInt));
25613 +                                               ("Port %d PHY Int: 0x%04X\n", i, PhyInt));
25614                                         SkPhyIsrGmac(pAC, IoC, i, PhyInt);
25615                                 }
25616                         }
25617 @@ -808,13 +1053,13 @@
25618                 }
25619         }
25620
25621 -       /* I2C Ready interrupt */
25622 +       /* TWSI Ready interrupt */
25623         if ((Istatus & IS_I2C_READY) != 0) {
25624  #ifdef SK_SLIM
25625 -        SK_OUT32(IoC, B2_I2C_IRQ, I2C_CLR_IRQ);
25626 -#else
25627 +               SK_OUT32(IoC, B2_I2C_IRQ, I2C_CLR_IRQ);
25628 +#else
25629                 SkI2cIsr(pAC, IoC);
25630 -#endif
25631 +#endif
25632         }
25633
25634         /* SW forced interrupt */
25635 @@ -829,7 +1074,7 @@
25636                  * us only a link going down.
25637                  */
25638                 /* clear interrupt */
25639 -               SK_OUT8(IoC, MR_ADDR(MAC_1, LNK_SYNC_CTRL), LED_CLR_IRQ);
25640 +               SK_OUT8(IoC, MR_ADDR(MAC_1, LNK_SYNC_CTRL), LNK_CLR_IRQ);
25641         }
25642
25643         /* Check MAC after link sync counter */
25644 @@ -844,7 +1089,7 @@
25645                  * us only a link going down.
25646                  */
25647                 /* clear interrupt */
25648 -               SK_OUT8(IoC, MR_ADDR(MAC_2, LNK_SYNC_CTRL), LED_CLR_IRQ);
25649 +               SK_OUT8(IoC, MR_ADDR(MAC_2, LNK_SYNC_CTRL), LNK_CLR_IRQ);
25650         }
25651
25652         /* Check MAC after link sync counter */
25653 @@ -860,13 +1105,189 @@
25654                         /* read the HW Error Interrupt source */
25655                         SK_IN32(IoC, B0_HWE_ISRC, &RegVal32);
25656
25657 -                       SkGeHwErr(pAC, IoC, RegVal32);
25658 +                       SkGeYuHwErr(pAC, IoC, RegVal32);
25659                 }
25660
25661                 SkHwtIsr(pAC, IoC);
25662         }
25663
25664 -}      /* SkGeSirqIsr */
25665 +}      /* SkGeYuSirqIsr */
25666 +
25667 +#ifdef YUK2
25668 +/******************************************************************************
25669 + *
25670 + *     SkYuk2PortSirq() - Service HW Errors for specified port (Yukon-2 only)
25671 + *
25672 + * Description: handles the HW Error interrupts for a specific port.
25673 + *
25674 + * Returns: N/A
25675 + */
25676 +static void SkYuk2PortSirq(
25677 +SK_AC  *pAC,           /* Adapter Context */
25678 +SK_IOC IoC,            /* I/O Context */
25679 +SK_U32 IStatus,        /* Interrupt status word */
25680 +int            Port)           /* Port Index (MAC_1 + n) */
25681 +{
25682 +       SK_EVPARA       Para;
25683 +       int                     Queue;
25684 +       SK_U16          PhyInt;
25685 +
25686 +       if (Port == MAC_2) {
25687 +               IStatus >>= 8;
25688 +       }
25689 +
25690 +       /* Interrupt from PHY */
25691 +       if ((IStatus & Y2_IS_IRQ_PHY1) != 0) {
25692 +               /* Read PHY Interrupt Status */
25693 +               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_INT_STAT, &PhyInt);
25694 +
25695 +               if ((PhyInt & PHY_M_DEF_MSK) != 0) {
25696 +                       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
25697 +                               ("Port %d PHY Int: 0x%04X\n", Port, PhyInt));
25698 +                       SkPhyIsrGmac(pAC, IoC, Port, PhyInt);
25699 +               }
25700 +       }
25701 +
25702 +       /* Interrupt from MAC */
25703 +       if ((IStatus & Y2_IS_IRQ_MAC1) != 0) {
25704 +               SkMacIrq(pAC, IoC, Port);
25705 +       }
25706 +
25707 +       if ((IStatus & (Y2_IS_CHK_RX1 | Y2_IS_CHK_TXS1 | Y2_IS_CHK_TXA1)) != 0) {
25708 +               if ((IStatus & Y2_IS_CHK_RX1) != 0) {
25709 +                       if (Port == MAC_1) {
25710 +                               Queue = Q_R1;
25711 +                               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E006,
25712 +                                       SKERR_SIRQ_E006MSG);
25713 +                       }
25714 +                       else {
25715 +                               Queue = Q_R2;
25716 +                               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E007,
25717 +                                       SKERR_SIRQ_E007MSG);
25718 +                       }
25719 +                       /* Clear IRQ */
25720 +                       SK_OUT32(IoC, Q_ADDR(Queue, Q_CSR), BMU_CLR_IRQ_CHK);
25721 +               }
25722 +
25723 +               if ((IStatus & Y2_IS_CHK_TXS1) != 0) {
25724 +                       if (Port == MAC_1) {
25725 +                               Queue = Q_XS1;
25726 +                               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E008,
25727 +                                       SKERR_SIRQ_E008MSG);
25728 +                       }
25729 +                       else {
25730 +                               Queue = Q_XS2;
25731 +                               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E010,
25732 +                                       SKERR_SIRQ_E010MSG);
25733 +                       }
25734 +                       /* Clear IRQ */
25735 +                       SK_OUT32(IoC, Q_ADDR(Queue, Q_CSR), BMU_CLR_IRQ_CHK);
25736 +               }
25737 +
25738 +               if ((IStatus & Y2_IS_CHK_TXA1) != 0) {
25739 +                       if (Port == MAC_1) {
25740 +                               Queue = Q_XA1;
25741 +                               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E009,
25742 +                                       SKERR_SIRQ_E009MSG);
25743 +                       }
25744 +                       else {
25745 +                               Queue = Q_XA2;
25746 +                               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E011,
25747 +                                       SKERR_SIRQ_E011MSG);
25748 +                       }
25749 +                       /* Clear IRQ */
25750 +                       SK_OUT32(IoC, Q_ADDR(Queue, Q_CSR), BMU_CLR_IRQ_CHK);
25751 +               }
25752 +
25753 +               Para.Para64 = Port;
25754 +               SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_FAIL, Para);
25755 +
25756 +               Para.Para32[0] = Port;
25757 +               SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
25758 +       }
25759 +}      /* SkYuk2PortSirq */
25760 +#endif /* YUK2 */
25761 +
25762 +/******************************************************************************
25763 + *
25764 + *     SkYuk2SirqIsr() - Special Interrupt Service Routine     (Yukon-2 only)
25765 + *
25766 + * Description: handles all non data transfer specific interrupts (slow path)
25767 + *
25768 + * Returns: N/A
25769 + */
25770 +void SkYuk2SirqIsr(
25771 +SK_AC  *pAC,           /* Adapter Context */
25772 +SK_IOC IoC,            /* I/O Context */
25773 +SK_U32 Istatus)        /* Interrupt status word */
25774 +{
25775 +#ifdef YUK2
25776 +       SK_EVPARA       Para;
25777 +       SK_U32          RegVal32;       /* Read register value */
25778 +       SK_U8           Value;
25779 +
25780 +       /* HW Error indicated ? */
25781 +       if (((Istatus & Y2_IS_HW_ERR) & pAC->GIni.GIValIrqMask) != 0) {
25782 +               /* read the HW Error Interrupt source */
25783 +               SK_IN32(IoC, B0_HWE_ISRC, &RegVal32);
25784 +
25785 +               SkYuk2HwErr(pAC, IoC, RegVal32);
25786 +       }
25787 +
25788 +       /* Interrupt from ASF Subsystem */
25789 +       if ((Istatus & Y2_IS_ASF) != 0) {
25790 +               /* clear IRQ */
25791 +               /* later on clearing should be done in ASF ISR handler */
25792 +               SK_IN8(IoC, B28_Y2_ASF_STAT_CMD, &Value);
25793 +               Value |= Y2_ASF_CLR_HSTI;
25794 +               SK_OUT8(IoC, B28_Y2_ASF_STAT_CMD, Value);
25795 +               /* Call IRQ handler in ASF Module */
25796 +               /* TBD */
25797 +       }
25798 +
25799 +       /* Check IRQ from polling unit */
25800 +       if ((Istatus & Y2_IS_POLL_CHK) != 0) {
25801 +               /* Clear IRQ */
25802 +               SK_OUT32(IoC, POLL_CTRL, PC_CLR_IRQ_CHK);
25803 +
25804 +               SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_SIRQ_E036,
25805 +                       SKERR_SIRQ_E036MSG);
25806 +               Para.Para64 = 0;
25807 +               SkEventQueue(pAC, SKGE_DRV, SK_DRV_ADAP_FAIL, Para);
25808 +       }
25809 +
25810 +       /* TWSI Ready interrupt */
25811 +       if ((Istatus & Y2_IS_TWSI_RDY) != 0) {
25812 +#ifdef SK_SLIM
25813 +               SK_OUT32(IoC, B2_I2C_IRQ, I2C_CLR_IRQ);
25814 +#else
25815 +               SkI2cIsr(pAC, IoC);
25816 +#endif
25817 +       }
25818 +
25819 +       /* SW forced interrupt */
25820 +       if ((Istatus & Y2_IS_IRQ_SW) != 0) {
25821 +               /* clear the software IRQ */
25822 +               SK_OUT8(IoC, B0_CTST, CS_CL_SW_IRQ);
25823 +       }
25824 +
25825 +       if ((Istatus & Y2_IS_L1_MASK) != 0) {
25826 +               SkYuk2PortSirq(pAC, IoC, Istatus, MAC_1);
25827 +       }
25828 +
25829 +       if ((Istatus & Y2_IS_L2_MASK) != 0) {
25830 +               SkYuk2PortSirq(pAC, IoC, Istatus, MAC_2);
25831 +       }
25832 +
25833 +       /* Timer interrupt (served last) */
25834 +       if ((Istatus & Y2_IS_TIMINT) != 0) {
25835 +               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
25836 +                       ("Timer Int: 0x%08lX\n", Istatus));
25837 +               SkHwtIsr(pAC, IoC);
25838 +       }
25839 +#endif /* YUK2 */
25840 +
25841 +}      /* SkYuk2SirqIsr */
25842
25843
25844  #ifdef GENESIS
25845 @@ -880,8 +1301,8 @@
25846   */
25847  static int SkGePortCheckShorts(
25848  SK_AC  *pAC,           /* Adapter Context */
25849 -SK_IOC IoC,            /* IO Context */
25850 -int            Port)           /* Which port should be checked */
25851 +SK_IOC IoC,            /* I/O Context */
25852 +int            Port)           /* Port Index (MAC_1 + n) */
25853  {
25854         SK_U32          Shorts;                 /* Short Event Counter */
25855         SK_U32          CheckShorts;    /* Check value for Short Event Counter */
25856 @@ -909,9 +1330,9 @@
25857         RxCts = 0;
25858
25859         for (i = 0; i < sizeof(SkGeRxRegs)/sizeof(SkGeRxRegs[0]); i++) {
25860 -
25861 +
25862                 (void)SkXmMacStatistic(pAC, IoC, Port, SkGeRxRegs[i], &RxTmp);
25863 -
25864 +
25865                 RxCts += (SK_U64)RxTmp;
25866         }
25867
25868 @@ -928,11 +1349,11 @@
25869                 CheckShorts = 2;
25870
25871                 (void)SkXmMacStatistic(pAC, IoC, Port, XM_RXF_FCS_ERR, &FcsErrCts);
25872 -
25873 -               if (pPrt->PLinkModeConf == SK_LMODE_AUTOSENSE &&
25874 -                   pPrt->PLipaAutoNeg == SK_LIPA_UNKNOWN &&
25875 -                   (pPrt->PLinkMode == SK_LMODE_HALF ||
25876 -                        pPrt->PLinkMode == SK_LMODE_FULL)) {
25877 +
25878 +               if (pPrt->PLinkModeConf == (SK_U8)SK_LMODE_AUTOSENSE &&
25879 +                       pPrt->PLipaAutoNeg == (SK_U8)SK_LIPA_UNKNOWN &&
25880 +                       (pPrt->PLinkMode == (SK_U8)SK_LMODE_HALF ||
25881 +                        pPrt->PLinkMode == (SK_U8)SK_LMODE_FULL)) {
25882                         /*
25883                          * This is autosensing and we are in the fallback
25884                          * manual full/half duplex mode.
25885 @@ -941,16 +1362,16 @@
25886                                 /* Nothing received, restart link */
25887                                 pPrt->PPrevFcs = FcsErrCts;
25888                                 pPrt->PPrevShorts = Shorts;
25889 -
25890 +
25891                                 return(SK_HW_PS_RESTART);
25892                         }
25893                         else {
25894 -                               pPrt->PLipaAutoNeg = SK_LIPA_MANUAL;
25895 +                               pPrt->PLipaAutoNeg = (SK_U8)SK_LIPA_MANUAL;
25896                         }
25897                 }
25898
25899                 if (((RxCts - pPrt->PPrevRx) > pPrt->PRxLim) ||
25900 -                   (!(FcsErrCts - pPrt->PPrevFcs))) {
25901 +                       (!(FcsErrCts - pPrt->PPrevFcs))) {
25902                         /*
25903                          * Note: The compare with zero above has to be done the way shown,
25904                          * otherwise the Linux driver will have a problem.
25905 @@ -995,29 +1416,25 @@
25906   */
25907  static int SkGePortCheckUp(
25908  SK_AC  *pAC,           /* Adapter Context */
25909 -SK_IOC IoC,            /* IO Context */
25910 -int            Port)           /* Which port should be checked */
25911 +SK_IOC IoC,            /* I/O Context */
25912 +int            Port)           /* Port Index (MAC_1 + n) */
25913  {
25914         SK_GEPORT       *pPrt;          /* GIni Port struct pointer */
25915         SK_BOOL         AutoNeg;        /* Is Auto-negotiation used ? */
25916         int                     Rtv;            /* Return value */
25917
25918         Rtv = SK_HW_PS_NONE;
25919 -
25920 +
25921         pPrt = &pAC->GIni.GP[Port];
25922
25923 -       if (pPrt->PLinkMode == SK_LMODE_HALF || pPrt->PLinkMode == SK_LMODE_FULL) {
25924 -               AutoNeg = SK_FALSE;
25925 -       }
25926 -       else {
25927 -               AutoNeg = SK_TRUE;
25928 -       }
25929 +       AutoNeg = pPrt->PLinkMode != SK_LMODE_HALF &&
25930 +                         pPrt->PLinkMode != SK_LMODE_FULL;
25931
25932  #ifdef GENESIS
25933         if (pAC->GIni.GIGenesis) {
25934
25935                 switch (pPrt->PhyType) {
25936 -
25937 +
25938                 case SK_PHY_XMAC:
25939                         Rtv = SkGePortCheckUpXmac(pAC, IoC, Port, AutoNeg);
25940                         break;
25941 @@ -1038,7 +1455,7 @@
25942
25943  #ifdef YUKON
25944         if (pAC->GIni.GIYukon) {
25945 -
25946 +
25947                 Rtv = SkGePortCheckUpGmac(pAC, IoC, Port, AutoNeg);
25948         }
25949  #endif /* YUKON */
25950 @@ -1059,8 +1476,8 @@
25951   */
25952  static int SkGePortCheckUpXmac(
25953  SK_AC  *pAC,           /* Adapter Context */
25954 -SK_IOC IoC,            /* IO Context */
25955 -int            Port,           /* Which port should be checked */
25956 +SK_IOC IoC,            /* I/O Context */
25957 +int            Port,           /* Port Index (MAC_1 + n) */
25958  SK_BOOL        AutoNeg)        /* Is Auto-negotiation used ? */
25959  {
25960         SK_U32          Shorts;         /* Short Event Counter */
25961 @@ -1098,7 +1515,7 @@
25962                         XM_IN16(IoC, Port, XM_ISRC, &Isrc);
25963                         IsrcSum |= Isrc;
25964                         SkXmAutoNegLipaXmac(pAC, IoC, Port, IsrcSum);
25965 -
25966 +
25967                         if ((Isrc & XM_IS_INP_ASS) == 0) {
25968                                 /* It has been in sync since last time */
25969                                 /* Restart the PORT */
25970 @@ -1117,14 +1534,14 @@
25971                                  * Link Restart Workaround:
25972                                  *  it may be possible that the other Link side
25973                                  *  restarts its link as well an we detect
25974 -                                *  another LinkBroken. To prevent this
25975 +                                *  another PLinkBroken. To prevent this
25976                                  *  happening we check for a maximum number
25977                                  *  of consecutive restart. If those happens,
25978                                  *  we do NOT restart the active link and
25979                                  *  check whether the link is now o.k.
25980                                  */
25981                                 pPrt->PLinkResCt++;
25982 -
25983 +
25984                                 pPrt->PAutoNegTimeOut = 0;
25985
25986                                 if (pPrt->PLinkResCt < SK_MAX_LRESTART) {
25987 @@ -1132,13 +1549,13 @@
25988                                 }
25989
25990                                 pPrt->PLinkResCt = 0;
25991 -
25992 +
25993                                 SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
25994                                         ("Do NOT restart on Port %d %x %x\n", Port, Isrc, IsrcSum));
25995                         }
25996                         else {
25997                                 pPrt->PIsave = (SK_U16)(IsrcSum & XM_IS_AND);
25998 -
25999 +
26000                                 SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26001                                         ("Save Sync/nosync Port %d %x %x\n", Port, Isrc, IsrcSum));
26002
26003 @@ -1165,7 +1582,7 @@
26004                                 if ((Isrc & XM_IS_INP_ASS) != 0) {
26005                                         pPrt->PLinkBroken = SK_TRUE;
26006                                         /* Re-Init Link partner Autoneg flag */
26007 -                                       pPrt->PLipaAutoNeg = SK_LIPA_UNKNOWN;
26008 +                                       pPrt->PLipaAutoNeg = (SK_U8)SK_LIPA_UNKNOWN;
26009                                         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
26010                                                 ("Link broken Port %d\n", Port));
26011
26012 @@ -1178,7 +1595,7 @@
26013                 }
26014                 else {
26015                         SkXmAutoNegLipaXmac(pAC, IoC, Port, Isrc);
26016 -
26017 +
26018                         if (SkGePortCheckShorts(pAC, IoC, Port) == SK_HW_PS_RESTART) {
26019                                 return(SK_HW_PS_RESTART);
26020                         }
26021 @@ -1210,17 +1627,21 @@
26022         }
26023
26024         if (AutoNeg) {
26025 +               /* Auto-Negotiation Done ? */
26026                 if ((IsrcSum & XM_IS_AND) != 0) {
26027 +
26028                         SkHWLinkUp(pAC, IoC, Port);
26029 +
26030                         Done = SkMacAutoNegDone(pAC, IoC, Port);
26031 +
26032                         if (Done != SK_AND_OK) {
26033                                 /* Get PHY parameters, for debugging only */
26034                                 SkXmPhyRead(pAC, IoC, Port, PHY_XMAC_AUNE_LP, &LpAb);
26035                                 SkXmPhyRead(pAC, IoC, Port, PHY_XMAC_RES_ABI, &ResAb);
26036 -                               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26037 +                               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
26038                                         ("AutoNeg FAIL Port %d (LpAb %x, ResAb %x)\n",
26039 -                                        Port, LpAb, ResAb));
26040 -
26041 +                                       Port, LpAb, ResAb));
26042 +
26043                                 /* Try next possible mode */
26044                                 NextMode = SkHWSenseGetNext(pAC, IoC, Port);
26045                                 SkHWLinkDown(pAC, IoC, Port);
26046 @@ -1236,42 +1657,41 @@
26047                          * (clear Page Received bit if set)
26048                          */
26049                         SkXmPhyRead(pAC, IoC, Port, PHY_XMAC_AUNE_EXP, &ExtStat);
26050 -
26051 +
26052                         return(SK_HW_PS_LINK);
26053                 }
26054 -
26055 +
26056                 /* AutoNeg not done, but HW link is up. Check for timeouts */
26057 -               pPrt->PAutoNegTimeOut++;
26058 -               if (pPrt->PAutoNegTimeOut >= SK_AND_MAX_TO) {
26059 +               if (pPrt->PAutoNegTimeOut++ >= SK_AND_MAX_TO) {
26060                         /* Increase the Timeout counter */
26061                         pPrt->PAutoNegTOCt++;
26062
26063                         /* Timeout occured */
26064                         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
26065                                 ("AutoNeg timeout Port %d\n", Port));
26066 -                       if (pPrt->PLinkModeConf == SK_LMODE_AUTOSENSE &&
26067 -                               pPrt->PLipaAutoNeg != SK_LIPA_AUTO) {
26068 +                       if (pPrt->PLinkModeConf == (SK_U8)SK_LMODE_AUTOSENSE &&
26069 +                               pPrt->PLipaAutoNeg != (SK_U8)SK_LIPA_AUTO) {
26070                                 /* Set Link manually up */
26071                                 SkHWSenseSetNext(pAC, IoC, Port, SK_LMODE_FULL);
26072                                 SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
26073                                         ("Set manual full duplex Port %d\n", Port));
26074                         }
26075
26076 -                       if (pPrt->PLinkModeConf == SK_LMODE_AUTOSENSE &&
26077 -                               pPrt->PLipaAutoNeg == SK_LIPA_AUTO &&
26078 +                       if (pPrt->PLinkModeConf == (SK_U8)SK_LMODE_AUTOSENSE &&
26079 +                               pPrt->PLipaAutoNeg == (SK_U8)SK_LIPA_AUTO &&
26080                                 pPrt->PAutoNegTOCt >= SK_MAX_ANEG_TO) {
26081                                 /*
26082                                  * This is rather complicated.
26083                                  * we need to check here whether the LIPA_AUTO
26084                                  * we saw before is false alert. We saw at one
26085 -                                * switch ( SR8800) that on boot time it sends
26086 +                                * switch (SR8800) that on boot time it sends
26087                                  * just one auto-neg packet and does no further
26088                                  * auto-negotiation.
26089                                  * Solution: we restart the autosensing after
26090                                  * a few timeouts.
26091                                  */
26092                                 pPrt->PAutoNegTOCt = 0;
26093 -                               pPrt->PLipaAutoNeg = SK_LIPA_UNKNOWN;
26094 +                               pPrt->PLipaAutoNeg = (SK_U8)SK_LIPA_UNKNOWN;
26095                                 SkHWInitDefSense(pAC, IoC, Port);
26096                         }
26097
26098 @@ -1282,18 +1702,18 @@
26099         else {
26100                 /* Link is up and we don't need more */
26101  #ifdef DEBUG
26102 -               if (pPrt->PLipaAutoNeg == SK_LIPA_AUTO) {
26103 -                       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26104 +               if (pPrt->PLipaAutoNeg == (SK_U8)SK_LIPA_AUTO) {
26105 +                       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
26106                                 ("ERROR: Lipa auto detected on port %d\n", Port));
26107                 }
26108  #endif /* DEBUG */
26109                 SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
26110                         ("Link sync(GP), Port %d\n", Port));
26111                 SkHWLinkUp(pAC, IoC, Port);
26112 -
26113 +
26114                 /*
26115 -                * Link sync (GP) and so assume a good connection. But if not received
26116 -                * a bunch of frames received in a time slot (maybe broken tx cable)
26117 +                * Link sync (GP) and so assume a good connection. But if no
26118 +                * bunch of frames received in a time slot (maybe broken Tx cable)
26119                  * the port is restart.
26120                  */
26121                 return(SK_HW_PS_LINK);
26122 @@ -1314,8 +1734,8 @@
26123   */
26124  static int SkGePortCheckUpBcom(
26125  SK_AC  *pAC,           /* Adapter Context */
26126 -SK_IOC IoC,            /* IO Context */
26127 -int            Port,           /* Which port should be checked */
26128 +SK_IOC IoC,            /* I/O Context */
26129 +int            Port,           /* Port Index (MAC_1 + n) */
26130  SK_BOOL        AutoNeg)        /* Is Auto-negotiation used ? */
26131  {
26132         SK_GEPORT       *pPrt;          /* GIni Port struct pointer */
26133 @@ -1334,74 +1754,6 @@
26134         /* Check for No HCD Link events (#10523) */
26135         SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_INT_STAT, &Isrc);
26136
26137 -#ifdef xDEBUG
26138 -       if ((Isrc & ~(PHY_B_IS_HCT | PHY_B_IS_LCT) ==
26139 -               (PHY_B_IS_SCR_S_ER | PHY_B_IS_RRS_CHANGE | PHY_B_IS_LRS_CHANGE)) {
26140 -
26141 -               SK_U32  Stat1, Stat2, Stat3;
26142 -
26143 -               Stat1 = 0;
26144 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_INT_MASK, &Stat1);
26145 -               CMSMPrintString(
26146 -                       pAC->pConfigTable,
26147 -                       MSG_TYPE_RUNTIME_INFO,
26148 -                       "CheckUp1 - Stat: %x, Mask: %x",
26149 -                       (void *)Isrc,
26150 -                       (void *)Stat1);
26151 -
26152 -               Stat1 = 0;
26153 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_CTRL, &Stat1);
26154 -               Stat2 = 0;
26155 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_STAT, &Stat2);
26156 -               Stat1 = Stat1 << 16 | Stat2;
26157 -               Stat2 = 0;
26158 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUNE_ADV, &Stat2);
26159 -               Stat3 = 0;
26160 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUNE_LP, &Stat3);
26161 -               Stat2 = Stat2 << 16 | Stat3;
26162 -               CMSMPrintString(
26163 -                       pAC->pConfigTable,
26164 -                       MSG_TYPE_RUNTIME_INFO,
26165 -                       "Ctrl/Stat: %x, AN Adv/LP: %x",
26166 -                       (void *)Stat1,
26167 -                       (void *)Stat2);
26168 -
26169 -               Stat1 = 0;
26170 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUNE_EXP, &Stat1);
26171 -               Stat2 = 0;
26172 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_EXT_STAT, &Stat2);
26173 -               Stat1 = Stat1 << 16 | Stat2;
26174 -               Stat2 = 0;
26175 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_1000T_CTRL, &Stat2);
26176 -               Stat3 = 0;
26177 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_1000T_STAT, &Stat3);
26178 -               Stat2 = Stat2 << 16 | Stat3;
26179 -               CMSMPrintString(
26180 -                       pAC->pConfigTable,
26181 -                       MSG_TYPE_RUNTIME_INFO,
26182 -                       "AN Exp/IEEE Ext: %x, 1000T Ctrl/Stat: %x",
26183 -                       (void *)Stat1,
26184 -                       (void *)Stat2);
26185 -
26186 -               Stat1 = 0;
26187 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_P_EXT_CTRL, &Stat1);
26188 -               Stat2 = 0;
26189 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_P_EXT_STAT, &Stat2);
26190 -               Stat1 = Stat1 << 16 | Stat2;
26191 -               Stat2 = 0;
26192 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_CTRL, &Stat2);
26193 -               Stat3 = 0;
26194 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_STAT, &Stat3);
26195 -               Stat2 = Stat2 << 16 | Stat3;
26196 -               CMSMPrintString(
26197 -                       pAC->pConfigTable,
26198 -                       MSG_TYPE_RUNTIME_INFO,
26199 -                       "PHY Ext Ctrl/Stat: %x, Aux Ctrl/Stat: %x",
26200 -                       (void *)Stat1,
26201 -                       (void *)Stat2);
26202 -       }
26203 -#endif /* DEBUG */
26204 -
26205         if ((Isrc & (PHY_B_IS_NO_HDCL /* | PHY_B_IS_NO_HDC */)) != 0) {
26206                 /*
26207                  * Workaround BCom Errata:
26208 @@ -1414,14 +1766,6 @@
26209                         (SK_U16)(Ctrl & ~PHY_CT_LOOP));
26210                 SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26211                         ("No HCD Link event, Port %d\n", Port));
26212 -#ifdef xDEBUG
26213 -               CMSMPrintString(
26214 -                       pAC->pConfigTable,
26215 -                       MSG_TYPE_RUNTIME_INFO,
26216 -                       "No HCD link event, port %d.",
26217 -                       (void *)Port,
26218 -                       (void *)NULL);
26219 -#endif /* DEBUG */
26220         }
26221
26222         /* Not obsolete: link status bit is latched to 0 and autoclearing! */
26223 @@ -1431,72 +1775,6 @@
26224                 return(SK_HW_PS_NONE);
26225         }
26226
26227 -#ifdef xDEBUG
26228 -       {
26229 -               SK_U32  Stat1, Stat2, Stat3;
26230 -
26231 -               Stat1 = 0;
26232 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_INT_MASK, &Stat1);
26233 -               CMSMPrintString(
26234 -                       pAC->pConfigTable,
26235 -                       MSG_TYPE_RUNTIME_INFO,
26236 -                       "CheckUp1a - Stat: %x, Mask: %x",
26237 -                       (void *)Isrc,
26238 -                       (void *)Stat1);
26239 -
26240 -               Stat1 = 0;
26241 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_CTRL, &Stat1);
26242 -               Stat2 = 0;
26243 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_STAT, &PhyStat);
26244 -               Stat1 = Stat1 << 16 | PhyStat;
26245 -               Stat2 = 0;
26246 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUNE_ADV, &Stat2);
26247 -               Stat3 = 0;
26248 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUNE_LP, &Stat3);
26249 -               Stat2 = Stat2 << 16 | Stat3;
26250 -               CMSMPrintString(
26251 -                       pAC->pConfigTable,
26252 -                       MSG_TYPE_RUNTIME_INFO,
26253 -                       "Ctrl/Stat: %x, AN Adv/LP: %x",
26254 -                       (void *)Stat1,
26255 -                       (void *)Stat2);
26256 -
26257 -               Stat1 = 0;
26258 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUNE_EXP, &Stat1);
26259 -               Stat2 = 0;
26260 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_EXT_STAT, &Stat2);
26261 -               Stat1 = Stat1 << 16 | Stat2;
26262 -               Stat2 = 0;
26263 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_1000T_CTRL, &Stat2);
26264 -               Stat3 = 0;
26265 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_1000T_STAT, &ResAb);
26266 -               Stat2 = Stat2 << 16 | ResAb;
26267 -               CMSMPrintString(
26268 -                       pAC->pConfigTable,
26269 -                       MSG_TYPE_RUNTIME_INFO,
26270 -                       "AN Exp/IEEE Ext: %x, 1000T Ctrl/Stat: %x",
26271 -                       (void *)Stat1,
26272 -                       (void *)Stat2);
26273 -
26274 -               Stat1 = 0;
26275 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_P_EXT_CTRL, &Stat1);
26276 -               Stat2 = 0;
26277 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_P_EXT_STAT, &Stat2);
26278 -               Stat1 = Stat1 << 16 | Stat2;
26279 -               Stat2 = 0;
26280 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_CTRL, &Stat2);
26281 -               Stat3 = 0;
26282 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_STAT, &Stat3);
26283 -               Stat2 = Stat2 << 16 | Stat3;
26284 -               CMSMPrintString(
26285 -                       pAC->pConfigTable,
26286 -                       MSG_TYPE_RUNTIME_INFO,
26287 -                       "PHY Ext Ctrl/Stat: %x, Aux Ctrl/Stat: %x",
26288 -                       (void *)Stat1,
26289 -                       (void *)Stat2);
26290 -       }
26291 -#endif /* DEBUG */
26292 -
26293         /*
26294          * Here we usually can check whether the link is in sync and
26295          * auto-negotiation is done.
26296 @@ -1505,7 +1783,7 @@
26297         SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_STAT, &PhyStat);
26298
26299         SkMacAutoNegLipaPhy(pAC, IoC, Port, PhyStat);
26300 -
26301 +
26302         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26303                 ("CheckUp Port %d, PhyStat: 0x%04X\n", Port, PhyStat));
26304
26305 @@ -1513,88 +1791,62 @@
26306
26307         if ((ResAb & PHY_B_1000S_MSF) != 0) {
26308                 /* Error */
26309 -               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26310 -                       ("Master/Slave Fault port %d\n", Port));
26311 -
26312 +               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
26313 +                       ("Master/Slave Fault, ResAb: 0x%04X\n", ResAb));
26314 +
26315                 pPrt->PAutoNegFail = SK_TRUE;
26316                 pPrt->PMSStatus = SK_MS_STAT_FAULT;
26317 -
26318 +
26319                 return(SK_HW_PS_RESTART);
26320         }
26321
26322         if ((PhyStat & PHY_ST_LSYNC) == 0) {
26323                 return(SK_HW_PS_NONE);
26324         }
26325 -
26326 +
26327         pPrt->PMSStatus = ((ResAb & PHY_B_1000S_MSR) != 0) ?
26328                 SK_MS_STAT_MASTER : SK_MS_STAT_SLAVE;
26329 -
26330 +
26331         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26332                 ("Port %d, ResAb: 0x%04X\n", Port, ResAb));
26333
26334         if (AutoNeg) {
26335 +               /* Auto-Negotiation Over ? */
26336                 if ((PhyStat & PHY_ST_AN_OVER) != 0) {
26337 -
26338 +
26339                         SkHWLinkUp(pAC, IoC, Port);
26340 -
26341 +
26342                         Done = SkMacAutoNegDone(pAC, IoC, Port);
26343 -
26344 +
26345                         if (Done != SK_AND_OK) {
26346  #ifdef DEBUG
26347                                 /* Get PHY parameters, for debugging only */
26348                                 SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUNE_LP, &LpAb);
26349                                 SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_1000T_STAT, &ExtStat);
26350 -                               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26351 +                               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
26352                                         ("AutoNeg FAIL Port %d (LpAb %x, 1000TStat %x)\n",
26353                                         Port, LpAb, ExtStat));
26354  #endif /* DEBUG */
26355                                 return(SK_HW_PS_RESTART);
26356                         }
26357                         else {
26358 -#ifdef xDEBUG
26359 -                               /* Dummy read ISR to prevent extra link downs/ups */
26360 -                               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_INT_STAT, &ExtStat);
26361 -
26362 -                               if ((ExtStat & ~(PHY_B_IS_HCT | PHY_B_IS_LCT)) != 0) {
26363 -                                       CMSMPrintString(
26364 -                                               pAC->pConfigTable,
26365 -                                               MSG_TYPE_RUNTIME_INFO,
26366 -                                               "CheckUp2 - Stat: %x",
26367 -                                               (void *)ExtStat,
26368 -                                               (void *)NULL);
26369 -                               }
26370 -#endif /* DEBUG */
26371                                 return(SK_HW_PS_LINK);
26372                         }
26373                 }
26374         }
26375         else {  /* !AutoNeg */
26376 -               /* Link is up and we don't need more. */
26377 +               /* Link is up and we don't need more */
26378  #ifdef DEBUG
26379 -               if (pPrt->PLipaAutoNeg == SK_LIPA_AUTO) {
26380 -                       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26381 +               if (pPrt->PLipaAutoNeg == (SK_U8)SK_LIPA_AUTO) {
26382 +                       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
26383                                 ("ERROR: Lipa auto detected on port %d\n", Port));
26384                 }
26385  #endif /* DEBUG */
26386
26387 -#ifdef xDEBUG
26388 -               /* Dummy read ISR to prevent extra link downs/ups */
26389 -               SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_INT_STAT, &ExtStat);
26390 -
26391 -               if ((ExtStat & ~(PHY_B_IS_HCT | PHY_B_IS_LCT)) != 0) {
26392 -                       CMSMPrintString(
26393 -                               pAC->pConfigTable,
26394 -                               MSG_TYPE_RUNTIME_INFO,
26395 -                               "CheckUp3 - Stat: %x",
26396 -                               (void *)ExtStat,
26397 -                               (void *)NULL);
26398 -               }
26399 -#endif /* DEBUG */
26400 -
26401                 SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
26402                         ("Link sync(GP), Port %d\n", Port));
26403                 SkHWLinkUp(pAC, IoC, Port);
26404 -
26405 +
26406                 return(SK_HW_PS_LINK);
26407         }
26408
26409 @@ -1615,20 +1867,17 @@
26410   */
26411  static int SkGePortCheckUpGmac(
26412  SK_AC  *pAC,           /* Adapter Context */
26413 -SK_IOC IoC,            /* IO Context */
26414 -int            Port,           /* Which port should be checked */
26415 +SK_IOC IoC,            /* I/O Context */
26416 +int            Port,           /* Port Index (MAC_1 + n) */
26417  SK_BOOL        AutoNeg)        /* Is Auto-negotiation used ? */
26418  {
26419         SK_GEPORT       *pPrt;          /* GIni Port struct pointer */
26420         int                     Done;
26421 -       SK_U16          PhyIsrc;        /* PHY Interrupt source */
26422 -       SK_U16          PhyStat;        /* PPY Status */
26423 +       SK_U16          PhyStat;        /* PHY Status */
26424         SK_U16          PhySpecStat;/* PHY Specific Status */
26425         SK_U16          ResAb;          /* Master/Slave resolution */
26426         SK_EVPARA       Para;
26427 -#ifdef DEBUG
26428         SK_U16          Word;           /* I/O helper */
26429 -#endif /* DEBUG */
26430
26431         pPrt = &pAC->GIni.GP[Port];
26432
26433 @@ -1642,94 +1891,125 @@
26434         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26435                 ("CheckUp Port %d, PhyStat: 0x%04X\n", Port, PhyStat));
26436
26437 -       /* Read PHY Interrupt Status */
26438 -       SkGmPhyRead(pAC, IoC, Port, PHY_MARV_INT_STAT, &PhyIsrc);
26439 +       SkMacAutoNegLipaPhy(pAC, IoC, Port, PhyStat);
26440
26441 -       if ((PhyIsrc & PHY_M_IS_AN_COMPL) != 0) {
26442 -               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26443 -                       ("Auto-Negotiation Completed, PhyIsrc: 0x%04X\n", PhyIsrc));
26444 -       }
26445 +       if ((pPrt->PLinkSpeedCap & SK_LSPEED_CAP_1000MBPS) != 0) {
26446
26447 -       if ((PhyIsrc & PHY_M_IS_LSP_CHANGE) != 0) {
26448 -               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26449 -                       ("Link Speed Changed, PhyIsrc: 0x%04X\n", PhyIsrc));
26450 -       }
26451 +               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_1000T_STAT, &ResAb);
26452
26453 -       SkMacAutoNegLipaPhy(pAC, IoC, Port, PhyStat);
26454 -
26455 -       SkGmPhyRead(pAC, IoC, Port, PHY_MARV_1000T_STAT, &ResAb);
26456 +               if ((ResAb & PHY_B_1000S_MSF) != 0) {
26457 +                       /* Error */
26458 +                       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
26459 +                               ("Master/Slave Fault, ResAb: 0x%04X\n", ResAb));
26460
26461 -       if ((ResAb & PHY_B_1000S_MSF) != 0) {
26462 -               /* Error */
26463 -               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26464 -                       ("Master/Slave Fault port %d\n", Port));
26465 -
26466 -               pPrt->PAutoNegFail = SK_TRUE;
26467 -               pPrt->PMSStatus = SK_MS_STAT_FAULT;
26468 -
26469 -               return(SK_HW_PS_RESTART);
26470 +                       pPrt->PAutoNegFail = SK_TRUE;
26471 +                       pPrt->PMSStatus = SK_MS_STAT_FAULT;
26472 +
26473 +                       return(SK_HW_PS_RESTART);
26474 +               }
26475         }
26476
26477         /* Read PHY Specific Status */
26478         SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_STAT, &PhySpecStat);
26479 -
26480 +
26481         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26482                 ("Phy1000BT: 0x%04X, PhySpecStat: 0x%04X\n", ResAb, PhySpecStat));
26483
26484  #ifdef DEBUG
26485         SkGmPhyRead(pAC, IoC, Port, PHY_MARV_AUNE_EXP, &Word);
26486
26487 -       if ((PhyIsrc & PHY_M_IS_AN_PR) != 0 || (Word & PHY_ANE_RX_PG) != 0 ||
26488 +       if ((Word & PHY_ANE_RX_PG) != 0 ||
26489                 (PhySpecStat & PHY_M_PS_PAGE_REC) != 0)  {
26490                 /* Read PHY Next Page Link Partner */
26491                 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_NEPG_LP, &Word);
26492
26493                 SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26494 -                       ("Page Received, NextPage: 0x%04X\n", Word));
26495 +                       ("Page received, NextPage: 0x%04X\n", Word));
26496         }
26497  #endif /* DEBUG */
26498
26499         if ((PhySpecStat & PHY_M_PS_LINK_UP) == 0) {
26500 +               /* Link down */
26501                 return(SK_HW_PS_NONE);
26502         }
26503 -
26504 -       if ((PhySpecStat & PHY_M_PS_DOWNS_STAT) != 0 ||
26505 -               (PhyIsrc & PHY_M_IS_DOWNSH_DET) != 0) {
26506 -               /* Downshift detected */
26507 -               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E025, SKERR_SIRQ_E025MSG);
26508 -
26509 -               Para.Para64 = Port;
26510 -               SkEventQueue(pAC, SKGE_DRV, SK_DRV_DOWNSHIFT_DET, Para);
26511 -
26512 -               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26513 -                       ("Downshift detected, PhyIsrc: 0x%04X\n", PhyIsrc));
26514 +
26515 +#ifdef XXX
26516 +       SK_U16          PhyInt;
26517 +       /* Read PHY Interrupt Status */
26518 +       SkGmPhyRead(pAC, IoC, Port, PHY_MARV_INT_STAT, &PhyInt);
26519 +
26520 +       /* cross check that the link is really up */
26521 +       if ((PhyInt & PHY_M_IS_LST_CHANGE) == 0) {
26522 +               /* Link Status unchanged */
26523 +               return(SK_HW_PS_NONE);
26524         }
26525 +#endif /* XXX */
26526
26527 -       pPrt->PMSStatus = ((ResAb & PHY_B_1000S_MSR) != 0) ?
26528 -               SK_MS_STAT_MASTER : SK_MS_STAT_SLAVE;
26529 +       if (pAC->GIni.GICopperType) {
26530 +
26531 +               if ((pPrt->PLinkSpeedCap & SK_LSPEED_CAP_1000MBPS) != 0) {
26532 +
26533 +                       if ((PhySpecStat & PHY_M_PS_DOWNS_STAT) != 0) {
26534 +                               /* Downshift detected */
26535 +                               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E025,
26536 +                                       SKERR_SIRQ_E025MSG);
26537 +
26538 +                               Para.Para64 = Port;
26539 +                               SkEventQueue(pAC, SKGE_DRV, SK_DRV_DOWNSHIFT_DET, Para);
26540
26541 -       pPrt->PCableLen = (SK_U8)((PhySpecStat & PHY_M_PS_CABLE_MSK) >> 7);
26542 +                               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26543 +                                       ("Downshift detected, PhySpecStat: 0x%04X\n", PhySpecStat));
26544 +                       }
26545 +
26546 +                       pPrt->PMSStatus = ((ResAb & PHY_B_1000S_MSR) != 0) ?
26547 +                               SK_MS_STAT_MASTER : SK_MS_STAT_SLAVE;
26548 +               }
26549
26550 +               if ((PhySpecStat & PHY_M_PS_MDI_X_STAT) != 0) {
26551 +                       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26552 +                               ("MDI Xover detected, PhyStat: 0x%04X\n", PhySpecStat));
26553 +               }
26554 +
26555 +               /* on PHY 88E1112 cable length is in Reg. 26, Page 5 */
26556 +               if (pAC->GIni.GIChipId == CHIP_ID_YUKON_XL) {
26557 +                       /* save page register */
26558 +                       SkGmPhyRead(pAC, IoC, Port, PHY_MARV_EXT_ADR, &Word);
26559 +
26560 +                       /* select page 5 to access VCT DSP distance register */
26561 +                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, 5);
26562 +
26563 +                       /* get VCT DSP distance */
26564 +                       SkGmPhyRead(pAC, IoC, Port, PHY_MARV_EXT_CTRL_2, &PhySpecStat);
26565 +
26566 +                       /* restore page register */
26567 +                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, Word);
26568 +
26569 +                       pPrt->PCableLen = (SK_U8)(PhySpecStat & PHY_M_EC2_FO_AM_MSK);
26570 +               }
26571 +               else {
26572 +                       pPrt->PCableLen = (SK_U8)((PhySpecStat & PHY_M_PS_CABLE_MSK) >> 7);
26573 +               }
26574 +       }
26575 +
26576         if (AutoNeg) {
26577 -               /* Auto-Negotiation Over ? */
26578 +               /* Auto-Negotiation Complete ? */
26579                 if ((PhyStat & PHY_ST_AN_OVER) != 0) {
26580 -
26581 +
26582                         SkHWLinkUp(pAC, IoC, Port);
26583 -
26584 +
26585                         Done = SkMacAutoNegDone(pAC, IoC, Port);
26586 -
26587 +
26588                         if (Done != SK_AND_OK) {
26589                                 return(SK_HW_PS_RESTART);
26590                         }
26591 -
26592 +
26593                         return(SK_HW_PS_LINK);
26594                 }
26595         }
26596         else {  /* !AutoNeg */
26597 -               /* Link is up and we don't need more */
26598  #ifdef DEBUG
26599 -               if (pPrt->PLipaAutoNeg == SK_LIPA_AUTO) {
26600 -                       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26601 +               if (pPrt->PLipaAutoNeg == (SK_U8)SK_LIPA_AUTO) {
26602 +                       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
26603                                 ("ERROR: Lipa auto detected on port %d\n", Port));
26604                 }
26605  #endif /* DEBUG */
26606 @@ -1737,7 +2017,7 @@
26607                 SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
26608                         ("Link sync, Port %d\n", Port));
26609                 SkHWLinkUp(pAC, IoC, Port);
26610 -
26611 +
26612                 return(SK_HW_PS_LINK);
26613         }
26614
26615 @@ -1758,8 +2038,8 @@
26616   */
26617  static int SkGePortCheckUpLone(
26618  SK_AC  *pAC,           /* Adapter Context */
26619 -SK_IOC IoC,            /* IO Context */
26620 -int            Port,           /* Which port should be checked */
26621 +SK_IOC IoC,            /* I/O Context */
26622 +int            Port,           /* Port Index (MAC_1 + n) */
26623  SK_BOOL        AutoNeg)        /* Is Auto-negotiation used ? */
26624  {
26625         SK_GEPORT       *pPrt;          /* GIni Port struct pointer */
26626 @@ -1788,7 +2068,7 @@
26627         StatSum |= PhyStat;
26628
26629         SkMacAutoNegLipaPhy(pAC, IoC, Port, PhyStat);
26630 -
26631 +
26632         if ((PhyStat & PHY_ST_LSYNC) == 0) {
26633                 /* Save Auto-negotiation Done bit */
26634                 pPrt->PIsave = (SK_U16)(StatSum & PHY_ST_AN_OVER);
26635 @@ -1802,17 +2082,21 @@
26636         }
26637
26638         if (AutoNeg) {
26639 +               /* Auto-Negotiation Over ? */
26640                 if ((StatSum & PHY_ST_AN_OVER) != 0) {
26641 +
26642                         SkHWLinkUp(pAC, IoC, Port);
26643 +
26644                         Done = SkMacAutoNegDone(pAC, IoC, Port);
26645 +
26646                         if (Done != SK_AND_OK) {
26647                                 /* Get PHY parameters, for debugging only */
26648                                 SkXmPhyRead(pAC, IoC, Port, PHY_LONE_AUNE_LP, &LpAb);
26649                                 SkXmPhyRead(pAC, IoC, Port, PHY_LONE_1000T_STAT, &ExtStat);
26650 -                               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26651 +                               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
26652                                         ("AutoNeg FAIL Port %d (LpAb %x, 1000TStat %x)\n",
26653                                          Port, LpAb, ExtStat));
26654 -
26655 +
26656                                 /* Try next possible mode */
26657                                 NextMode = SkHWSenseGetNext(pAC, IoC, Port);
26658                                 SkHWLinkDown(pAC, IoC, Port);
26659 @@ -1833,15 +2117,14 @@
26660                                 return(SK_HW_PS_LINK);
26661                         }
26662                 }
26663 -
26664 +
26665                 /* AutoNeg not done, but HW link is up. Check for timeouts */
26666 -               pPrt->PAutoNegTimeOut++;
26667 -               if (pPrt->PAutoNegTimeOut >= SK_AND_MAX_TO) {
26668 +               if (pPrt->PAutoNegTimeOut++ >= SK_AND_MAX_TO) {
26669                         /* Timeout occured */
26670                         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
26671                                 ("AutoNeg timeout Port %d\n", Port));
26672 -                       if (pPrt->PLinkModeConf == SK_LMODE_AUTOSENSE &&
26673 -                               pPrt->PLipaAutoNeg != SK_LIPA_AUTO) {
26674 +                       if (pPrt->PLinkModeConf == (SK_U8)SK_LMODE_AUTOSENSE &&
26675 +                               pPrt->PLipaAutoNeg != (SK_U8)SK_LIPA_AUTO) {
26676                                 /* Set Link manually up */
26677                                 SkHWSenseSetNext(pAC, IoC, Port, SK_LMODE_FULL);
26678                                 SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
26679 @@ -1855,8 +2138,8 @@
26680         else {
26681                 /* Link is up and we don't need more */
26682  #ifdef DEBUG
26683 -               if (pPrt->PLipaAutoNeg == SK_LIPA_AUTO) {
26684 -                       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26685 +               if (pPrt->PLipaAutoNeg == (SK_U8)SK_LIPA_AUTO) {
26686 +                       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
26687                                 ("ERROR: Lipa auto detected on port %d\n", Port));
26688                 }
26689  #endif /* DEBUG */
26690 @@ -1866,11 +2149,12 @@
26691                  * extra link down/ups
26692                  */
26693                 SkXmPhyRead(pAC, IoC, Port, PHY_LONE_INT_STAT, &ExtStat);
26694 -
26695 +
26696                 SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
26697                         ("Link sync(GP), Port %d\n", Port));
26698 +
26699                 SkHWLinkUp(pAC, IoC, Port);
26700 -
26701 +
26702                 return(SK_HW_PS_LINK);
26703         }
26704
26705 @@ -1889,8 +2173,8 @@
26706   */
26707  static int SkGePortCheckUpNat(
26708  SK_AC  *pAC,           /* Adapter Context */
26709 -SK_IOC IoC,            /* IO Context */
26710 -int            Port,           /* Which port should be checked */
26711 +SK_IOC IoC,            /* I/O Context */
26712 +int            Port,           /* Port Index (MAC_1 + n) */
26713  SK_BOOL        AutoNeg)        /* Is Auto-negotiation used ? */
26714  {
26715         /* todo: National */
26716 @@ -1909,12 +2193,12 @@
26717   */
26718  int    SkGeSirqEvent(
26719  SK_AC          *pAC,           /* Adapter Context */
26720 -SK_IOC         IoC,            /* Io Context */
26721 +SK_IOC         IoC,            /* I/O Context */
26722  SK_U32         Event,          /* Module specific Event */
26723  SK_EVPARA      Para)           /* Event specific Parameter */
26724  {
26725         SK_GEPORT       *pPrt;          /* GIni Port struct pointer */
26726 -       SK_U32          Port;
26727 +       int                     Port;
26728         SK_U32          Val32;
26729         int                     PortStat;
26730         SK_U8           Val8;
26731 @@ -1922,25 +2206,25 @@
26732         SK_U64          Octets;
26733  #endif /* GENESIS */
26734
26735 -       Port = Para.Para32[0];
26736 +       Port = (int)Para.Para32[0];
26737         pPrt = &pAC->GIni.GP[Port];
26738
26739         switch (Event) {
26740         case SK_HWEV_WATIM:
26741                 if (pPrt->PState == SK_PRT_RESET) {
26742 -
26743 +
26744                         PortStat = SK_HW_PS_NONE;
26745                 }
26746                 else {
26747                         /* Check whether port came up */
26748 -                       PortStat = SkGePortCheckUp(pAC, IoC, (int)Port);
26749 +                       PortStat = SkGePortCheckUp(pAC, IoC, Port);
26750                 }
26751
26752                 switch (PortStat) {
26753                 case SK_HW_PS_RESTART:
26754                         if (pPrt->PHWLinkUp) {
26755                                 /* Set Link to down */
26756 -                               SkHWLinkDown(pAC, IoC, (int)Port);
26757 +                               SkHWLinkDown(pAC, IoC, Port);
26758
26759                                 /*
26760                                  * Signal directly to RLMT to ensure correct
26761 @@ -1958,19 +2242,23 @@
26762                         SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_UP, Para);
26763                         break;
26764                 }
26765 -
26766 +
26767                 /* Start again the check Timer */
26768                 if (pPrt->PHWLinkUp) {
26769 +
26770                         Val32 = SK_WA_ACT_TIME;
26771                 }
26772                 else {
26773                         Val32 = SK_WA_INA_TIME;
26774 -               }
26775
26776 -               /* Todo: still needed for non-XMAC PHYs??? */
26777 +                       if (pAC->GIni.GIYukon) {
26778 +                               Val32 *= 5;
26779 +                       }
26780 +               }
26781                 /* Start workaround Errata #2 timer */
26782                 SkTimerStart(pAC, IoC, &pPrt->PWaTimer, Val32,
26783                         SKGE_HWAC, SK_HWEV_WATIM, Para);
26784 +
26785                 break;
26786
26787         case SK_HWEV_PORT_START:
26788 @@ -1982,7 +2270,7 @@
26789                         SkRlmtEvent(pAC, IoC, SK_RLMT_LINK_DOWN, Para);
26790                 }
26791
26792 -               SkHWLinkDown(pAC, IoC, (int)Port);
26793 +               SkHWLinkDown(pAC, IoC, Port);
26794
26795                 /* Schedule Port RESET */
26796                 SkEventQueue(pAC, SKGE_DRV, SK_DRV_PORT_RESET, Para);
26797 @@ -1990,6 +2278,7 @@
26798                 /* Start workaround Errata #2 timer */
26799                 SkTimerStart(pAC, IoC, &pPrt->PWaTimer, SK_WA_INA_TIME,
26800                         SKGE_HWAC, SK_HWEV_WATIM, Para);
26801 +
26802                 break;
26803
26804         case SK_HWEV_PORT_STOP:
26805 @@ -2004,7 +2293,7 @@
26806                 /* Stop Workaround Timer */
26807                 SkTimerStop(pAC, IoC, &pPrt->PWaTimer);
26808
26809 -               SkHWLinkDown(pAC, IoC, (int)Port);
26810 +               SkHWLinkDown(pAC, IoC, Port);
26811                 break;
26812
26813         case SK_HWEV_UPDATE_STAT:
26814 @@ -2013,7 +2302,7 @@
26815
26816         case SK_HWEV_CLEAR_STAT:
26817                 /* We do NOT need to clear any statistics */
26818 -               for (Port = 0; Port < (SK_U32)pAC->GIni.GIMacsFound; Port++) {
26819 +               for (Port = 0; Port < pAC->GIni.GIMacsFound; Port++) {
26820                         pPrt->PPrevRx = 0;
26821                         pPrt->PPrevFcs = 0;
26822                         pPrt->PPrevShorts = 0;
26823 @@ -2085,23 +2374,18 @@
26824                         pPrt->HalfDupTimerActive = SK_FALSE;
26825                         if (pPrt->PLinkModeStatus == SK_LMODE_STAT_HALF ||
26826                                 pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOHALF) {
26827 -#ifdef XXX
26828 -                               Len = sizeof(SK_U64);
26829 -                               SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets,
26830 -                                       &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, Port),
26831 -                                       pAC->Rlmt.Port[Port].Net->NetNumber);
26832 -#endif /* XXX */
26833 +
26834                                 /* Snap statistic counters */
26835                                 (void)SkXmUpdateStats(pAC, IoC, Port);
26836
26837                                 (void)SkXmMacStatistic(pAC, IoC, Port, XM_TXO_OK_HI, &Val32);
26838
26839                                 Octets = (SK_U64)Val32 << 32;
26840 -
26841 +
26842                                 (void)SkXmMacStatistic(pAC, IoC, Port, XM_TXO_OK_LO, &Val32);
26843
26844                                 Octets += Val32;
26845 -
26846 +
26847                                 if (pPrt->LastOctets == Octets) {
26848                                         /* Tx hanging, a FIFO flush restarts it */
26849                                         SkMacFlushTxFifo(pAC, IoC, Port);
26850 @@ -2110,7 +2394,7 @@
26851                 }
26852                 break;
26853  #endif /* GENESIS */
26854 -
26855 +
26856         default:
26857                 SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_SIRQ_E001, SKERR_SIRQ_E001MSG);
26858                 break;
26859 @@ -2131,8 +2415,8 @@
26860   */
26861  static void SkPhyIsrBcom(
26862  SK_AC          *pAC,           /* Adapter Context */
26863 -SK_IOC         IoC,            /* Io Context */
26864 -int                    Port,           /* Port Num = PHY Num */
26865 +SK_IOC         IoC,            /* I/O Context */
26866 +int                    Port,           /* Port Index (MAC_1 + n) */
26867  SK_U16         IStatus)        /* Interrupt Status */
26868  {
26869         SK_GEPORT       *pPrt;          /* GIni Port struct pointer */
26870 @@ -2145,7 +2429,7 @@
26871                 SK_ERR_LOG(pAC, SK_ERRCL_HW | SK_ERRCL_INIT, SKERR_SIRQ_E022,
26872                         SKERR_SIRQ_E022MSG);
26873         }
26874 -
26875 +
26876         if ((IStatus & (PHY_B_IS_AN_PR | PHY_B_IS_LST_CHANGE)) != 0) {
26877
26878                 SkHWLinkDown(pAC, IoC, Port);
26879 @@ -2174,8 +2458,8 @@
26880   */
26881  static void SkPhyIsrGmac(
26882  SK_AC          *pAC,           /* Adapter Context */
26883 -SK_IOC         IoC,            /* Io Context */
26884 -int                    Port,           /* Port Num = PHY Num */
26885 +SK_IOC         IoC,            /* I/O Context */
26886 +int                    Port,           /* Port Index (MAC_1 + n) */
26887  SK_U16         IStatus)        /* Interrupt Status */
26888  {
26889         SK_GEPORT       *pPrt;          /* GIni Port struct pointer */
26890 @@ -2184,37 +2468,69 @@
26891
26892         pPrt = &pAC->GIni.GP[Port];
26893
26894 -       if ((IStatus & (PHY_M_IS_AN_PR | PHY_M_IS_LST_CHANGE)) != 0) {
26895 -
26896 -               SkHWLinkDown(pAC, IoC, Port);
26897 +       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26898 +               ("Port %d PHY IRQ, PhyIsrc: 0x%04X\n", Port, IStatus));
26899
26900 -               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_AUNE_ADV, &Word);
26901 +       if ((IStatus & PHY_M_IS_LST_CHANGE) != 0) {
26902
26903                 SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26904 -                       ("AutoNeg.Adv: 0x%04X\n", Word));
26905 -
26906 -               /* Set Auto-negotiation advertisement */
26907 -               if (pPrt->PFlowCtrlMode == SK_FLOW_MODE_SYM_OR_REM) {
26908 -                       /* restore Asymmetric Pause bit */
26909 -                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_AUNE_ADV,
26910 -                               (SK_U16)(Word | PHY_M_AN_ASP));
26911 -               }
26912 -
26913 +                       ("Link Status changed\n"));
26914 +
26915                 Para.Para32[0] = (SK_U32)Port;
26916 -               /* Signal to RLMT */
26917 -               SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
26918 +
26919 +               if (pPrt->PHWLinkUp) {
26920 +
26921 +                       SkHWLinkDown(pAC, IoC, Port);
26922 +
26923 +                       SkGmPhyRead(pAC, IoC, Port, PHY_MARV_AUNE_ADV, &Word);
26924 +
26925 +                       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26926 +                               ("AutoNeg.Adv: 0x%04X\n", Word));
26927 +
26928 +                       /* Set Auto-negotiation advertisement */
26929 +                       if (pAC->GIni.GIChipId != CHIP_ID_YUKON_FE &&
26930 +                               pPrt->PFlowCtrlMode == SK_FLOW_MODE_SYM_OR_REM) {
26931 +                               /* restore Asymmetric Pause bit */
26932 +                               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_AUNE_ADV,
26933 +                                       (SK_U16)(Word | PHY_M_AN_ASP));
26934 +                       }
26935 +
26936 +                       /* Signal to RLMT */
26937 +                       SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_LINK_DOWN, Para);
26938 +               }
26939 +               else {
26940 +                       if ((IStatus & PHY_M_IS_AN_COMPL) != 0) {
26941 +                               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26942 +                                       ("Auto-Negotiation completed\n"));
26943 +                       }
26944 +
26945 +                       if ((IStatus & PHY_M_IS_LSP_CHANGE) != 0) {
26946 +                               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26947 +                                       ("Link Speed changed\n"));
26948 +                       }
26949 +
26950 +                       SkEventQueue(pAC, SKGE_HWAC, SK_HWEV_WATIM, Para);
26951 +               }
26952         }
26953 -
26954 +
26955         if ((IStatus & PHY_M_IS_AN_ERROR) != 0) {
26956 -               /* Auto-Negotiation Error */
26957 -               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E023, SKERR_SIRQ_E023MSG);
26958 +               /* the copper PHY makes 1 retry */
26959 +               if (pAC->GIni.GICopperType) {
26960 +                       /* not logged as error, it might be the first attempt */
26961 +                       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
26962 +                               ("Auto-Negotiation Error\n"));
26963 +               }
26964 +               else {
26965 +                       /* Auto-Negotiation Error */
26966 +                       SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E023, SKERR_SIRQ_E023MSG);
26967 +               }
26968         }
26969 -
26970 +
26971         if ((IStatus & PHY_M_IS_FIFO_ERROR) != 0) {
26972                 /* FIFO Overflow/Underrun Error */
26973                 SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_SIRQ_E024, SKERR_SIRQ_E024MSG);
26974         }
26975 -
26976 +
26977  }      /* SkPhyIsrGmac */
26978  #endif /* YUKON */
26979
26980 @@ -2230,8 +2546,8 @@
26981   */
26982  static void SkPhyIsrLone(
26983  SK_AC  *pAC,           /* Adapter Context */
26984 -SK_IOC IoC,            /* Io Context */
26985 -int            Port,           /* Port Num = PHY Num */
26986 +SK_IOC IoC,            /* I/O Context */
26987 +int            Port,           /* Port Index (MAC_1 + n) */
26988  SK_U16 IStatus)        /* Interrupt Status */
26989  {
26990         SK_EVPARA       Para;
26991 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/ski2c.c linux-2.6.9.new/drivers/net/sk98lin/ski2c.c
26992 --- linux-2.6.9.old/drivers/net/sk98lin/ski2c.c 2004-10-19 05:53:05.000000000 +0800
26993 +++ linux-2.6.9.new/drivers/net/sk98lin/ski2c.c 1970-01-01 08:00:00.000000000 +0800
26994 @@ -1,1296 +0,0 @@
26995 -/******************************************************************************
26996 - *
26997 - * Name:       ski2c.c
26998 - * Project:    Gigabit Ethernet Adapters, TWSI-Module
26999 - * Version:    $Revision: 1.59 $
27000 - * Date:       $Date: 2003/10/20 09:07:25 $
27001 - * Purpose:    Functions to access Voltage and Temperature Sensor
27002 - *
27003 - ******************************************************************************/
27004 -
27005 -/******************************************************************************
27006 - *
27007 - *     (C)Copyright 1998-2002 SysKonnect.
27008 - *     (C)Copyright 2002-2003 Marvell.
27009 - *
27010 - *     This program is free software; you can redistribute it and/or modify
27011 - *     it under the terms of the GNU General Public License as published by
27012 - *     the Free Software Foundation; either version 2 of the License, or
27013 - *     (at your option) any later version.
27014 - *
27015 - *     The information in this file is provided "AS IS" without warranty.
27016 - *
27017 - ******************************************************************************/
27018 -
27019 -/*
27020 - *     I2C Protocol
27021 - */
27022 -#if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
27023 -static const char SysKonnectFileId[] =
27024 -       "@(#) $Id: ski2c.c,v 1.59 2003/10/20 09:07:25 rschmidt Exp $ (C) Marvell. ";
27025 -#endif
27026 -
27027 -#include "h/skdrv1st.h"                /* Driver Specific Definitions */
27028 -#include "h/lm80.h"
27029 -#include "h/skdrv2nd.h"                /* Adapter Control- and Driver specific Def. */
27030 -
27031 -#ifdef __C2MAN__
27032 -/*
27033 -       I2C protocol implementation.
27034 -
27035 -       General Description:
27036 -
27037 -       The I2C protocol is used for the temperature sensors and for
27038 -       the serial EEPROM which hold the configuration.
27039 -
27040 -       This file covers functions that allow to read write and do
27041 -       some bulk requests a specified I2C address.
27042 -
27043 -       The Genesis has 2 I2C buses. One for the EEPROM which holds
27044 -       the VPD Data and one for temperature and voltage sensor.
27045 -       The following picture shows the I2C buses, I2C devices and
27046 -       their control registers.
27047 -
27048 -       Note: The VPD functions are in skvpd.c
27049 -.
27050 -.      PCI Config I2C Bus for VPD Data:
27051 -.
27052 -.                    +------------+
27053 -.                    | VPD EEPROM |
27054 -.                    +------------+
27055 -.                           |
27056 -.                           | <-- I2C
27057 -.                           |
27058 -.               +-----------+-----------+
27059 -.               |                       |
27060 -.      +-----------------+     +-----------------+
27061 -.      | PCI_VPD_ADR_REG |     | PCI_VPD_DAT_REG |
27062 -.      +-----------------+     +-----------------+
27063 -.
27064 -.
27065 -.      I2C Bus for LM80 sensor:
27066 -.
27067 -.                      +-----------------+
27068 -.                      | Temperature and |
27069 -.                      | Voltage Sensor  |
27070 -.                      |       LM80      |
27071 -.                      +-----------------+
27072 -.                              |
27073 -.                              |
27074 -.                      I2C --> |
27075 -.                              |
27076 -.                           +----+
27077 -.           +-------------->| OR |<--+
27078 -.           |               +----+   |
27079 -.     +------+------+                |
27080 -.     |                    |                 |
27081 -. +--------+   +--------+      +----------+
27082 -. | B2_I2C |   | B2_I2C |      |  B2_I2C  |
27083 -. | _CTRL  |   | _DATA  |      |   _SW    |
27084 -. +--------+   +--------+      +----------+
27085 -.
27086 -       The I2C bus may be driven by the B2_I2C_SW or by the B2_I2C_CTRL
27087 -       and B2_I2C_DATA registers.
27088 -       For driver software it is recommended to use the I2C control and
27089 -       data register, because I2C bus timing is done by the ASIC and
27090 -       an interrupt may be received when the I2C request is completed.
27091 -
27092 -       Clock Rate Timing:                      MIN     MAX     generated by
27093 -               VPD EEPROM:                     50 kHz  100 kHz         HW
27094 -               LM80 over I2C Ctrl/Data reg.    50 kHz  100 kHz         HW
27095 -               LM80 over B2_I2C_SW register    0       400 kHz         SW
27096 -
27097 -       Note:   The clock generated by the hardware is dependend on the
27098 -               PCI clock. If the PCI bus clock is 33 MHz, the I2C/VPD
27099 -               clock is 50 kHz.
27100 - */
27101 -intro()
27102 -{}
27103 -#endif
27104 -
27105 -#ifdef SK_DIAG
27106 -/*
27107 - * I2C Fast Mode timing values used by the LM80.
27108 - * If new devices are added to the I2C bus the timing values have to be checked.
27109 - */
27110 -#ifndef I2C_SLOW_TIMING
27111 -#define        T_CLK_LOW                       1300L   /* clock low time in ns */
27112 -#define        T_CLK_HIGH                       600L   /* clock high time in ns */
27113 -#define T_DATA_IN_SETUP                 100L   /* data in Set-up Time */
27114 -#define T_START_HOLD            600L   /* start condition hold time */
27115 -#define T_START_SETUP           600L   /* start condition Set-up time */
27116 -#define        T_STOP_SETUP             600L   /* stop condition Set-up time */
27117 -#define T_BUS_IDLE                     1300L   /* time the bus must free after Tx */
27118 -#define        T_CLK_2_DATA_OUT         900L   /* max. clock low to data output valid */
27119 -#else  /* I2C_SLOW_TIMING */
27120 -/* I2C Standard Mode Timing */
27121 -#define        T_CLK_LOW                       4700L   /* clock low time in ns */
27122 -#define        T_CLK_HIGH                      4000L   /* clock high time in ns */
27123 -#define T_DATA_IN_SETUP                 250L   /* data in Set-up Time */
27124 -#define T_START_HOLD           4000L   /* start condition hold time */
27125 -#define T_START_SETUP          4700L   /* start condition Set-up time */
27126 -#define        T_STOP_SETUP            4000L   /* stop condition Set-up time */
27127 -#define T_BUS_IDLE                     4700L   /* time the bus must free after Tx */
27128 -#endif /* !I2C_SLOW_TIMING */
27129 -
27130 -#define NS2BCLK(x)     (((x)*125)/10000)
27131 -
27132 -/*
27133 - * I2C Wire Operations
27134 - *
27135 - * About I2C_CLK_LOW():
27136 - *
27137 - * The Data Direction bit (I2C_DATA_DIR) has to be set to input when setting
27138 - * clock to low, to prevent the ASIC and the I2C data client from driving the
27139 - * serial data line simultaneously (ASIC: last bit of a byte = '1', I2C client
27140 - * send an 'ACK'). See also Concentrator Bugreport No. 10192.
27141 - */
27142 -#define I2C_DATA_HIGH(IoC)     SK_I2C_SET_BIT(IoC, I2C_DATA)
27143 -#define        I2C_DATA_LOW(IoC)       SK_I2C_CLR_BIT(IoC, I2C_DATA)
27144 -#define        I2C_DATA_OUT(IoC)       SK_I2C_SET_BIT(IoC, I2C_DATA_DIR)
27145 -#define        I2C_DATA_IN(IoC)        SK_I2C_CLR_BIT(IoC, I2C_DATA_DIR | I2C_DATA)
27146 -#define        I2C_CLK_HIGH(IoC)       SK_I2C_SET_BIT(IoC, I2C_CLK)
27147 -#define        I2C_CLK_LOW(IoC)        SK_I2C_CLR_BIT(IoC, I2C_CLK | I2C_DATA_DIR)
27148 -#define        I2C_START_COND(IoC)     SK_I2C_CLR_BIT(IoC, I2C_CLK)
27149 -
27150 -#define NS2CLKT(x)     ((x*125L)/10000)
27151 -
27152 -/*--------------- I2C Interface Register Functions --------------- */
27153 -
27154 -/*
27155 - * sending one bit
27156 - */
27157 -void SkI2cSndBit(
27158 -SK_IOC IoC,    /* I/O Context */
27159 -SK_U8  Bit)    /* Bit to send */
27160 -{
27161 -       I2C_DATA_OUT(IoC);
27162 -       if (Bit) {
27163 -               I2C_DATA_HIGH(IoC);
27164 -       }
27165 -       else {
27166 -               I2C_DATA_LOW(IoC);
27167 -       }
27168 -       SkDgWaitTime(IoC, NS2BCLK(T_DATA_IN_SETUP));
27169 -       I2C_CLK_HIGH(IoC);
27170 -       SkDgWaitTime(IoC, NS2BCLK(T_CLK_HIGH));
27171 -       I2C_CLK_LOW(IoC);
27172 -}      /* SkI2cSndBit*/
27173 -
27174 -
27175 -/*
27176 - * Signal a start to the I2C Bus.
27177 - *
27178 - * A start is signaled when data goes to low in a high clock cycle.
27179 - *
27180 - * Ends with Clock Low.
27181 - *
27182 - * Status: not tested
27183 - */
27184 -void SkI2cStart(
27185 -SK_IOC IoC)    /* I/O Context */
27186 -{
27187 -       /* Init data and Clock to output lines */
27188 -       /* Set Data high */
27189 -       I2C_DATA_OUT(IoC);
27190 -       I2C_DATA_HIGH(IoC);
27191 -       /* Set Clock high */
27192 -       I2C_CLK_HIGH(IoC);
27193 -
27194 -       SkDgWaitTime(IoC, NS2BCLK(T_START_SETUP));
27195 -
27196 -       /* Set Data Low */
27197 -       I2C_DATA_LOW(IoC);
27198 -
27199 -       SkDgWaitTime(IoC, NS2BCLK(T_START_HOLD));
27200 -
27201 -       /* Clock low without Data to Input */
27202 -       I2C_START_COND(IoC);
27203 -
27204 -       SkDgWaitTime(IoC, NS2BCLK(T_CLK_LOW));
27205 -}      /* SkI2cStart */
27206 -
27207 -
27208 -void SkI2cStop(
27209 -SK_IOC IoC)    /* I/O Context */
27210 -{
27211 -       /* Init data and Clock to output lines */
27212 -       /* Set Data low */
27213 -       I2C_DATA_OUT(IoC);
27214 -       I2C_DATA_LOW(IoC);
27215 -
27216 -       SkDgWaitTime(IoC, NS2BCLK(T_CLK_2_DATA_OUT));
27217 -
27218 -       /* Set Clock high */
27219 -       I2C_CLK_HIGH(IoC);
27220 -
27221 -       SkDgWaitTime(IoC, NS2BCLK(T_STOP_SETUP));
27222 -
27223 -       /*
27224 -        * Set Data High:       Do it by setting the Data Line to Input.
27225 -        *                      Because of a pull up resistor the Data Line
27226 -        *                      floods to high.
27227 -        */
27228 -       I2C_DATA_IN(IoC);
27229 -
27230 -       /*
27231 -        *      When I2C activity is stopped
27232 -        *       o      DATA should be set to input and
27233 -        *       o      CLOCK should be set to high!
27234 -        */
27235 -       SkDgWaitTime(IoC, NS2BCLK(T_BUS_IDLE));
27236 -}      /* SkI2cStop */
27237 -
27238 -
27239 -/*
27240 - * Receive just one bit via the I2C bus.
27241 - *
27242 - * Note:       Clock must be set to LOW before calling this function.
27243 - *
27244 - * Returns The received bit.
27245 - */
27246 -int SkI2cRcvBit(
27247 -SK_IOC IoC)    /* I/O Context */
27248 -{
27249 -       int     Bit;
27250 -       SK_U8   I2cSwCtrl;
27251 -
27252 -       /* Init data as input line */
27253 -       I2C_DATA_IN(IoC);
27254 -
27255 -       SkDgWaitTime(IoC, NS2BCLK(T_CLK_2_DATA_OUT));
27256 -
27257 -       I2C_CLK_HIGH(IoC);
27258 -
27259 -       SkDgWaitTime(IoC, NS2BCLK(T_CLK_HIGH));
27260 -
27261 -       SK_I2C_GET_SW(IoC, &I2cSwCtrl);
27262 -
27263 -       Bit = (I2cSwCtrl & I2C_DATA) ? 1 : 0;
27264 -
27265 -       I2C_CLK_LOW(IoC);
27266 -       SkDgWaitTime(IoC, NS2BCLK(T_CLK_LOW-T_CLK_2_DATA_OUT));
27267 -
27268 -       return(Bit);
27269 -}      /* SkI2cRcvBit */
27270 -
27271 -
27272 -/*
27273 - * Receive an ACK.
27274 - *
27275 - * returns     0 If acknowledged
27276 - *             1 in case of an error
27277 - */
27278 -int SkI2cRcvAck(
27279 -SK_IOC IoC)    /* I/O Context */
27280 -{
27281 -       /*
27282 -        * Received bit must be zero.
27283 -        */
27284 -       return(SkI2cRcvBit(IoC) != 0);
27285 -}      /* SkI2cRcvAck */
27286 -
27287 -
27288 -/*
27289 - * Send an NACK.
27290 - */
27291 -void SkI2cSndNAck(
27292 -SK_IOC IoC)    /* I/O Context */
27293 -{
27294 -       /*
27295 -        * Received bit must be zero.
27296 -        */
27297 -       SkI2cSndBit(IoC, 1);
27298 -}      /* SkI2cSndNAck */
27299 -
27300 -
27301 -/*
27302 - * Send an ACK.
27303 - */
27304 -void SkI2cSndAck(
27305 -SK_IOC IoC)    /* I/O Context */
27306 -{
27307 -       /*
27308 -        * Received bit must be zero.
27309 -        */
27310 -       SkI2cSndBit(IoC, 0);
27311 -}      /* SkI2cSndAck */
27312 -
27313 -
27314 -/*
27315 - * Send one byte to the I2C device and wait for ACK.
27316 - *
27317 - * Return acknowleged status.
27318 - */
27319 -int SkI2cSndByte(
27320 -SK_IOC IoC,    /* I/O Context */
27321 -int            Byte)   /* byte to send */
27322 -{
27323 -       int     i;
27324 -
27325 -       for (i = 0; i < 8; i++) {
27326 -               if (Byte & (1<<(7-i))) {
27327 -                       SkI2cSndBit(IoC, 1);
27328 -               }
27329 -               else {
27330 -                       SkI2cSndBit(IoC, 0);
27331 -               }
27332 -       }
27333 -
27334 -       return(SkI2cRcvAck(IoC));
27335 -}      /* SkI2cSndByte */
27336 -
27337 -
27338 -/*
27339 - * Receive one byte and ack it.
27340 - *
27341 - * Return byte.
27342 - */
27343 -int SkI2cRcvByte(
27344 -SK_IOC IoC,    /* I/O Context */
27345 -int            Last)   /* Last Byte Flag */
27346 -{
27347 -       int     i;
27348 -       int     Byte = 0;
27349 -
27350 -       for (i = 0; i < 8; i++) {
27351 -               Byte <<= 1;
27352 -               Byte |= SkI2cRcvBit(IoC);
27353 -       }
27354 -
27355 -       if (Last) {
27356 -               SkI2cSndNAck(IoC);
27357 -       }
27358 -       else {
27359 -               SkI2cSndAck(IoC);
27360 -       }
27361 -
27362 -       return(Byte);
27363 -}      /* SkI2cRcvByte */
27364 -
27365 -
27366 -/*
27367 - * Start dialog and send device address
27368 - *
27369 - * Return 0 if acknowleged, 1 in case of an error
27370 - */
27371 -int    SkI2cSndDev(
27372 -SK_IOC IoC,    /* I/O Context */
27373 -int            Addr,   /* Device Address */
27374 -int            Rw)             /* Read / Write Flag */
27375 -{
27376 -       SkI2cStart(IoC);
27377 -       Rw = ~Rw;
27378 -       Rw &= I2C_WRITE;
27379 -       return(SkI2cSndByte(IoC, (Addr<<1) | Rw));
27380 -}      /* SkI2cSndDev */
27381 -
27382 -#endif /* SK_DIAG */
27383 -
27384 -/*----------------- I2C CTRL Register Functions ----------*/
27385 -
27386 -/*
27387 - * waits for a completion of an I2C transfer
27388 - *
27389 - * returns     0:      success, transfer completes
27390 - *                     1:      error,   transfer does not complete, I2C transfer
27391 - *                                              killed, wait loop terminated.
27392 - */
27393 -int    SkI2cWait(
27394 -SK_AC  *pAC,   /* Adapter Context */
27395 -SK_IOC IoC,    /* I/O Context */
27396 -int            Event)  /* complete event to wait for (I2C_READ or I2C_WRITE) */
27397 -{
27398 -       SK_U64  StartTime;
27399 -       SK_U64  CurrentTime;
27400 -       SK_U32  I2cCtrl;
27401 -
27402 -       StartTime = SkOsGetTime(pAC);
27403 -
27404 -       do {
27405 -               CurrentTime = SkOsGetTime(pAC);
27406 -
27407 -               if (CurrentTime - StartTime > SK_TICKS_PER_SEC / 8) {
27408 -
27409 -                       SK_I2C_STOP(IoC);
27410 -#ifndef SK_DIAG
27411 -                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_I2C_E002, SKERR_I2C_E002MSG);
27412 -#endif /* !SK_DIAG */
27413 -                       return(1);
27414 -               }
27415 -
27416 -               SK_I2C_GET_CTL(IoC, &I2cCtrl);
27417 -
27418 -#ifdef xYUKON_DBG
27419 -               printf("StartTime=%lu, CurrentTime=%lu\n",
27420 -                       StartTime, CurrentTime);
27421 -               if (kbhit()) {
27422 -                       return(1);
27423 -               }
27424 -#endif /* YUKON_DBG */
27425 -
27426 -       } while ((I2cCtrl & I2C_FLAG) == (SK_U32)Event << 31);
27427 -
27428 -       return(0);
27429 -}      /* SkI2cWait */
27430 -
27431 -
27432 -/*
27433 - * waits for a completion of an I2C transfer
27434 - *
27435 - * Returns
27436 - *     Nothing
27437 - */
27438 -void SkI2cWaitIrq(
27439 -SK_AC  *pAC,   /* Adapter Context */
27440 -SK_IOC IoC)    /* I/O Context */
27441 -{
27442 -       SK_SENSOR       *pSen;
27443 -       SK_U64          StartTime;
27444 -       SK_U32          IrqSrc;
27445 -
27446 -       pSen = &pAC->I2c.SenTable[pAC->I2c.CurrSens];
27447 -
27448 -       if (pSen->SenState == SK_SEN_IDLE) {
27449 -               return;
27450 -       }
27451 -
27452 -       StartTime = SkOsGetTime(pAC);
27453 -
27454 -       do {
27455 -               if (SkOsGetTime(pAC) - StartTime > SK_TICKS_PER_SEC / 8) {
27456 -
27457 -                       SK_I2C_STOP(IoC);
27458 -#ifndef SK_DIAG
27459 -                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_I2C_E016, SKERR_I2C_E016MSG);
27460 -#endif /* !SK_DIAG */
27461 -                       return;
27462 -               }
27463 -
27464 -               SK_IN32(IoC, B0_ISRC, &IrqSrc);
27465 -
27466 -       } while ((IrqSrc & IS_I2C_READY) == 0);
27467 -
27468 -       pSen->SenState = SK_SEN_IDLE;
27469 -       return;
27470 -}      /* SkI2cWaitIrq */
27471 -
27472 -/*
27473 - * writes a single byte or 4 bytes into the I2C device
27474 - *
27475 - * returns     0:      success
27476 - *                     1:      error
27477 - */
27478 -int SkI2cWrite(
27479 -SK_AC  *pAC,           /* Adapter Context */
27480 -SK_IOC IoC,            /* I/O Context */
27481 -SK_U32 I2cData,        /* I2C Data to write */
27482 -int            I2cDev,         /* I2C Device Address */
27483 -int            I2cDevSize, /* I2C Device Size (e.g. I2C_025K_DEV or I2C_2K_DEV) */
27484 -int            I2cReg,         /* I2C Device Register Address */
27485 -int            I2cBurst)       /* I2C Burst Flag */
27486 -{
27487 -       SK_OUT32(IoC, B2_I2C_DATA, I2cData);
27488 -
27489 -       SK_I2C_CTL(IoC, I2C_WRITE, I2cDev, I2cDevSize, I2cReg, I2cBurst);
27490 -
27491 -       return(SkI2cWait(pAC, IoC, I2C_WRITE));
27492 -}      /* SkI2cWrite*/
27493 -
27494 -
27495 -#ifdef SK_DIAG
27496 -/*
27497 - * reads a single byte or 4 bytes from the I2C device
27498 - *
27499 - * returns     the word read
27500 - */
27501 -SK_U32 SkI2cRead(
27502 -SK_AC  *pAC,           /* Adapter Context */
27503 -SK_IOC IoC,            /* I/O Context */
27504 -int            I2cDev,         /* I2C Device Address */
27505 -int            I2cDevSize, /* I2C Device Size (e.g. I2C_025K_DEV or I2C_2K_DEV) */
27506 -int            I2cReg,         /* I2C Device Register Address */
27507 -int            I2cBurst)       /* I2C Burst Flag */
27508 -{
27509 -       SK_U32  Data;
27510 -
27511 -       SK_OUT32(IoC, B2_I2C_DATA, 0);
27512 -       SK_I2C_CTL(IoC, I2C_READ, I2cDev, I2cDevSize, I2cReg, I2cBurst);
27513 -
27514 -       if (SkI2cWait(pAC, IoC, I2C_READ) != 0) {
27515 -               w_print("%s\n", SKERR_I2C_E002MSG);
27516 -       }
27517 -
27518 -       SK_IN32(IoC, B2_I2C_DATA, &Data);
27519 -
27520 -       return(Data);
27521 -}      /* SkI2cRead */
27522 -#endif /* SK_DIAG */
27523 -
27524 -
27525 -/*
27526 - * read a sensor's value
27527 - *
27528 - * This function reads a sensor's value from the I2C sensor chip. The sensor
27529 - * is defined by its index into the sensors database in the struct pAC points
27530 - * to.
27531 - * Returns
27532 - *             1 if the read is completed
27533 - *             0 if the read must be continued (I2C Bus still allocated)
27534 - */
27535 -int    SkI2cReadSensor(
27536 -SK_AC          *pAC,   /* Adapter Context */
27537 -SK_IOC         IoC,    /* I/O Context */
27538 -SK_SENSOR      *pSen)  /* Sensor to be read */
27539 -{
27540 -    if (pSen->SenRead != NULL) {
27541 -        return((*pSen->SenRead)(pAC, IoC, pSen));
27542 -    }
27543 -       else {
27544 -        return(0); /* no success */
27545 -       }
27546 -}      /* SkI2cReadSensor */
27547 -
27548 -/*
27549 - * Do the Init state 0 initialization
27550 - */
27551 -static int SkI2cInit0(
27552 -SK_AC  *pAC)   /* Adapter Context */
27553 -{
27554 -       int     i;
27555 -
27556 -       /* Begin with first sensor */
27557 -       pAC->I2c.CurrSens = 0;
27558 -
27559 -       /* Begin with timeout control for state machine */
27560 -       pAC->I2c.TimerMode = SK_TIMER_WATCH_SM;
27561 -
27562 -       /* Set sensor number to zero */
27563 -       pAC->I2c.MaxSens = 0;
27564 -
27565 -#ifndef SK_DIAG
27566 -       /* Initialize Number of Dummy Reads */
27567 -       pAC->I2c.DummyReads = SK_MAX_SENSORS;
27568 -#endif
27569 -
27570 -       for (i = 0; i < SK_MAX_SENSORS; i++) {
27571 -               pAC->I2c.SenTable[i].SenDesc = "unknown";
27572 -               pAC->I2c.SenTable[i].SenType = SK_SEN_UNKNOWN;
27573 -               pAC->I2c.SenTable[i].SenThreErrHigh = 0;
27574 -               pAC->I2c.SenTable[i].SenThreErrLow = 0;
27575 -               pAC->I2c.SenTable[i].SenThreWarnHigh = 0;
27576 -               pAC->I2c.SenTable[i].SenThreWarnLow = 0;
27577 -               pAC->I2c.SenTable[i].SenReg = LM80_FAN2_IN;
27578 -               pAC->I2c.SenTable[i].SenInit = SK_SEN_DYN_INIT_NONE;
27579 -               pAC->I2c.SenTable[i].SenValue = 0;
27580 -               pAC->I2c.SenTable[i].SenErrFlag = SK_SEN_ERR_NOT_PRESENT;
27581 -               pAC->I2c.SenTable[i].SenErrCts = 0;
27582 -               pAC->I2c.SenTable[i].SenBegErrTS = 0;
27583 -               pAC->I2c.SenTable[i].SenState = SK_SEN_IDLE;
27584 -               pAC->I2c.SenTable[i].SenRead = NULL;
27585 -               pAC->I2c.SenTable[i].SenDev = 0;
27586 -       }
27587 -
27588 -       /* Now we are "INIT data"ed */
27589 -       pAC->I2c.InitLevel = SK_INIT_DATA;
27590 -       return(0);
27591 -}      /* SkI2cInit0*/
27592 -
27593 -
27594 -/*
27595 - * Do the init state 1 initialization
27596 - *
27597 - * initialize the following register of the LM80:
27598 - * Configuration register:
27599 - * - START, noINT, activeLOW, noINT#Clear, noRESET, noCI, noGPO#, noINIT
27600 - *
27601 - * Interrupt Mask Register 1:
27602 - * - all interrupts are Disabled (0xff)
27603 - *
27604 - * Interrupt Mask Register 2:
27605 - * - all interrupts are Disabled (0xff) Interrupt modi doesn't matter.
27606 - *
27607 - * Fan Divisor/RST_OUT register:
27608 - * - Divisors set to 1 (bits 00), all others 0s.
27609 - *
27610 - * OS# Configuration/Temperature resolution Register:
27611 - * - all 0s
27612 - *
27613 - */
27614 -static int SkI2cInit1(
27615 -SK_AC  *pAC,   /* Adapter Context */
27616 -SK_IOC IoC)    /* I/O Context */
27617 -{
27618 -    int i;
27619 -    SK_U8 I2cSwCtrl;
27620 -       SK_GEPORT *pPrt;        /* GIni Port struct pointer */
27621 -
27622 -       if (pAC->I2c.InitLevel != SK_INIT_DATA) {
27623 -               /* ReInit not needed in I2C module */
27624 -               return(0);
27625 -       }
27626 -
27627 -    /* Set the Direction of I2C-Data Pin to IN */
27628 -    SK_I2C_CLR_BIT(IoC, I2C_DATA_DIR | I2C_DATA);
27629 -    /* Check for 32-Bit Yukon with Low at I2C-Data Pin */
27630 -       SK_I2C_GET_SW(IoC, &I2cSwCtrl);
27631 -
27632 -       if ((I2cSwCtrl & I2C_DATA) == 0) {
27633 -               /* this is a 32-Bit board */
27634 -               pAC->GIni.GIYukon32Bit = SK_TRUE;
27635 -        return(0);
27636 -    }
27637 -
27638 -       /* Check for 64 Bit Yukon without sensors */
27639 -       if (SkI2cWrite(pAC, IoC, 0, LM80_ADDR, I2C_025K_DEV, LM80_CFG, 0) != 0) {
27640 -        return(0);
27641 -    }
27642 -
27643 -       (void)SkI2cWrite(pAC, IoC, 0xffUL, LM80_ADDR, I2C_025K_DEV, LM80_IMSK_1, 0);
27644 -
27645 -       (void)SkI2cWrite(pAC, IoC, 0xffUL, LM80_ADDR, I2C_025K_DEV, LM80_IMSK_2, 0);
27646 -
27647 -       (void)SkI2cWrite(pAC, IoC, 0, LM80_ADDR, I2C_025K_DEV, LM80_FAN_CTRL, 0);
27648 -
27649 -       (void)SkI2cWrite(pAC, IoC, 0, LM80_ADDR, I2C_025K_DEV, LM80_TEMP_CTRL, 0);
27650 -
27651 -       (void)SkI2cWrite(pAC, IoC, (SK_U32)LM80_CFG_START, LM80_ADDR, I2C_025K_DEV,
27652 -               LM80_CFG, 0);
27653 -
27654 -       /*
27655 -        * MaxSens has to be updated here, because PhyType is not
27656 -        * set when performing Init Level 0
27657 -        */
27658 -    pAC->I2c.MaxSens = 5;
27659 -
27660 -       pPrt = &pAC->GIni.GP[0];
27661 -
27662 -       if (pAC->GIni.GIGenesis) {
27663 -               if (pPrt->PhyType == SK_PHY_BCOM) {
27664 -                       if (pAC->GIni.GIMacsFound == 1) {
27665 -                               pAC->I2c.MaxSens += 1;
27666 -                       }
27667 -                       else {
27668 -                               pAC->I2c.MaxSens += 3;
27669 -                       }
27670 -               }
27671 -       }
27672 -       else {
27673 -               pAC->I2c.MaxSens += 3;
27674 -       }
27675 -
27676 -       for (i = 0; i < pAC->I2c.MaxSens; i++) {
27677 -               switch (i) {
27678 -               case 0:
27679 -                       pAC->I2c.SenTable[i].SenDesc = "Temperature";
27680 -                       pAC->I2c.SenTable[i].SenType = SK_SEN_TEMP;
27681 -                       pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_TEMP_HIGH_ERR;
27682 -                       pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_TEMP_HIGH_WARN;
27683 -                       pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_TEMP_LOW_WARN;
27684 -                       pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_TEMP_LOW_ERR;
27685 -                       pAC->I2c.SenTable[i].SenReg = LM80_TEMP_IN;
27686 -                       break;
27687 -               case 1:
27688 -                       pAC->I2c.SenTable[i].SenDesc = "Voltage PCI";
27689 -                       pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT;
27690 -                       pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PCI_5V_HIGH_ERR;
27691 -                       pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PCI_5V_HIGH_WARN;
27692 -                       pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PCI_5V_LOW_WARN;
27693 -                       pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PCI_5V_LOW_ERR;
27694 -                       pAC->I2c.SenTable[i].SenReg = LM80_VT0_IN;
27695 -                       break;
27696 -               case 2:
27697 -                       pAC->I2c.SenTable[i].SenDesc = "Voltage PCI-IO";
27698 -                       pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT;
27699 -                       pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PCI_IO_5V_HIGH_ERR;
27700 -                       pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PCI_IO_5V_HIGH_WARN;
27701 -                       pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PCI_IO_3V3_LOW_WARN;
27702 -                       pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PCI_IO_3V3_LOW_ERR;
27703 -                       pAC->I2c.SenTable[i].SenReg = LM80_VT1_IN;
27704 -                       pAC->I2c.SenTable[i].SenInit = SK_SEN_DYN_INIT_PCI_IO;
27705 -                       break;
27706 -               case 3:
27707 -                       pAC->I2c.SenTable[i].SenDesc = "Voltage ASIC";
27708 -                       pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT;
27709 -                       pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_VDD_HIGH_ERR;
27710 -                       pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_VDD_HIGH_WARN;
27711 -                       pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_VDD_LOW_WARN;
27712 -                       pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_VDD_LOW_ERR;
27713 -                       pAC->I2c.SenTable[i].SenReg = LM80_VT2_IN;
27714 -                       break;
27715 -               case 4:
27716 -                       if (pAC->GIni.GIGenesis) {
27717 -                               if (pPrt->PhyType == SK_PHY_BCOM) {
27718 -                                       pAC->I2c.SenTable[i].SenDesc = "Voltage PHY A PLL";
27719 -                                       pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PLL_3V3_HIGH_ERR;
27720 -                                       pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PLL_3V3_HIGH_WARN;
27721 -                                       pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PLL_3V3_LOW_WARN;
27722 -                                       pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PLL_3V3_LOW_ERR;
27723 -                               }
27724 -                               else {
27725 -                                       pAC->I2c.SenTable[i].SenDesc = "Voltage PMA";
27726 -                                       pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PLL_3V3_HIGH_ERR;
27727 -                                       pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PLL_3V3_HIGH_WARN;
27728 -                                       pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PLL_3V3_LOW_WARN;
27729 -                                       pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PLL_3V3_LOW_ERR;
27730 -                               }
27731 -                       }
27732 -                       else {
27733 -                               pAC->I2c.SenTable[i].SenDesc = "Voltage VAUX";
27734 -                               pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_VAUX_3V3_HIGH_ERR;
27735 -                               pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_VAUX_3V3_HIGH_WARN;
27736 -                               if (pAC->GIni.GIVauxAvail) {
27737 -                                       pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_VAUX_3V3_LOW_WARN;
27738 -                                       pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_VAUX_3V3_LOW_ERR;
27739 -                               }
27740 -                               else {
27741 -                                       pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_VAUX_0V_WARN_ERR;
27742 -                                       pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_VAUX_0V_WARN_ERR;
27743 -                               }
27744 -                       }
27745 -                       pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT;
27746 -                       pAC->I2c.SenTable[i].SenReg = LM80_VT3_IN;
27747 -                       break;
27748 -               case 5:
27749 -                       if (pAC->GIni.GIGenesis) {
27750 -                               pAC->I2c.SenTable[i].SenDesc = "Voltage PHY 2V5";
27751 -                               pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PHY_2V5_HIGH_ERR;
27752 -                               pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PHY_2V5_HIGH_WARN;
27753 -                               pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PHY_2V5_LOW_WARN;
27754 -                               pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PHY_2V5_LOW_ERR;
27755 -                       }
27756 -                       else {
27757 -                               pAC->I2c.SenTable[i].SenDesc = "Voltage Core 1V5";
27758 -                               pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_CORE_1V5_HIGH_ERR;
27759 -                               pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_CORE_1V5_HIGH_WARN;
27760 -                               pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_CORE_1V5_LOW_WARN;
27761 -                               pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_CORE_1V5_LOW_ERR;
27762 -                       }
27763 -                       pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT;
27764 -                       pAC->I2c.SenTable[i].SenReg = LM80_VT4_IN;
27765 -                       break;
27766 -               case 6:
27767 -                       if (pAC->GIni.GIGenesis) {
27768 -                               pAC->I2c.SenTable[i].SenDesc = "Voltage PHY B PLL";
27769 -                       }
27770 -                       else {
27771 -                               pAC->I2c.SenTable[i].SenDesc = "Voltage PHY 3V3";
27772 -                       }
27773 -                       pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT;
27774 -                       pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PLL_3V3_HIGH_ERR;
27775 -                       pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PLL_3V3_HIGH_WARN;
27776 -                       pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PLL_3V3_LOW_WARN;
27777 -                       pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PLL_3V3_LOW_ERR;
27778 -                       pAC->I2c.SenTable[i].SenReg = LM80_VT5_IN;
27779 -                       break;
27780 -               case 7:
27781 -                       if (pAC->GIni.GIGenesis) {
27782 -                               pAC->I2c.SenTable[i].SenDesc = "Speed Fan";
27783 -                               pAC->I2c.SenTable[i].SenType = SK_SEN_FAN;
27784 -                               pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_FAN_HIGH_ERR;
27785 -                               pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_FAN_HIGH_WARN;
27786 -                               pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_FAN_LOW_WARN;
27787 -                               pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_FAN_LOW_ERR;
27788 -                               pAC->I2c.SenTable[i].SenReg = LM80_FAN2_IN;
27789 -                       }
27790 -                       else {
27791 -                               pAC->I2c.SenTable[i].SenDesc = "Voltage PHY 2V5";
27792 -                               pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT;
27793 -                               pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PHY_2V5_HIGH_ERR;
27794 -                               pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PHY_2V5_HIGH_WARN;
27795 -                               pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PHY_2V5_LOW_WARN;
27796 -                               pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PHY_2V5_LOW_ERR;
27797 -                               pAC->I2c.SenTable[i].SenReg = LM80_VT6_IN;
27798 -                       }
27799 -                       break;
27800 -               default:
27801 -                       SK_ERR_LOG(pAC, SK_ERRCL_INIT | SK_ERRCL_SW,
27802 -                               SKERR_I2C_E001, SKERR_I2C_E001MSG);
27803 -                       break;
27804 -               }
27805 -
27806 -               pAC->I2c.SenTable[i].SenValue = 0;
27807 -               pAC->I2c.SenTable[i].SenErrFlag = SK_SEN_ERR_OK;
27808 -               pAC->I2c.SenTable[i].SenErrCts = 0;
27809 -               pAC->I2c.SenTable[i].SenBegErrTS = 0;
27810 -               pAC->I2c.SenTable[i].SenState = SK_SEN_IDLE;
27811 -               pAC->I2c.SenTable[i].SenRead = SkLm80ReadSensor;
27812 -               pAC->I2c.SenTable[i].SenDev = LM80_ADDR;
27813 -       }
27814 -
27815 -#ifndef SK_DIAG
27816 -       pAC->I2c.DummyReads = pAC->I2c.MaxSens;
27817 -#endif /* !SK_DIAG */
27818 -
27819 -       /* Clear I2C IRQ */
27820 -       SK_OUT32(IoC, B2_I2C_IRQ, I2C_CLR_IRQ);
27821 -
27822 -       /* Now we are I/O initialized */
27823 -       pAC->I2c.InitLevel = SK_INIT_IO;
27824 -       return(0);
27825 -}      /* SkI2cInit1 */
27826 -
27827 -
27828 -/*
27829 - * Init level 2: Start first sensor read.
27830 - */
27831 -static int SkI2cInit2(
27832 -SK_AC  *pAC,   /* Adapter Context */
27833 -SK_IOC IoC)    /* I/O Context */
27834 -{
27835 -       int             ReadComplete;
27836 -       SK_SENSOR       *pSen;
27837 -
27838 -       if (pAC->I2c.InitLevel != SK_INIT_IO) {
27839 -               /* ReInit not needed in I2C module */
27840 -               /* Init0 and Init2 not permitted */
27841 -               return(0);
27842 -       }
27843 -
27844 -       pSen = &pAC->I2c.SenTable[pAC->I2c.CurrSens];
27845 -       ReadComplete = SkI2cReadSensor(pAC, IoC, pSen);
27846 -
27847 -       if (ReadComplete) {
27848 -               SK_ERR_LOG(pAC, SK_ERRCL_INIT, SKERR_I2C_E008, SKERR_I2C_E008MSG);
27849 -       }
27850 -
27851 -       /* Now we are correctly initialized */
27852 -       pAC->I2c.InitLevel = SK_INIT_RUN;
27853 -
27854 -       return(0);
27855 -}      /* SkI2cInit2*/
27856 -
27857 -
27858 -/*
27859 - * Initialize I2C devices
27860 - *
27861 - * Get the first voltage value and discard it.
27862 - * Go into temperature read mode. A default pointer is not set.
27863 - *
27864 - * The things to be done depend on the init level in the parameter list:
27865 - * Level 0:
27866 - *     Initialize only the data structures. Do NOT access hardware.
27867 - * Level 1:
27868 - *     Initialize hardware through SK_IN / SK_OUT commands. Do NOT use interrupts.
27869 - * Level 2:
27870 - *     Everything is possible. Interrupts may be used from now on.
27871 - *
27872 - * return:
27873 - *     0 = success
27874 - *     other = error.
27875 - */
27876 -int    SkI2cInit(
27877 -SK_AC  *pAC,   /* Adapter Context */
27878 -SK_IOC IoC,    /* I/O Context needed in levels 1 and 2 */
27879 -int            Level)  /* Init Level */
27880 -{
27881 -
27882 -       switch (Level) {
27883 -       case SK_INIT_DATA:
27884 -               return(SkI2cInit0(pAC));
27885 -       case SK_INIT_IO:
27886 -               return(SkI2cInit1(pAC, IoC));
27887 -       case SK_INIT_RUN:
27888 -               return(SkI2cInit2(pAC, IoC));
27889 -       default:
27890 -               break;
27891 -       }
27892 -
27893 -       return(0);
27894 -}      /* SkI2cInit */
27895 -
27896 -
27897 -#ifndef SK_DIAG
27898 -
27899 -/*
27900 - * Interrupt service function for the I2C Interface
27901 - *
27902 - * Clears the Interrupt source
27903 - *
27904 - * Reads the register and check it for sending a trap.
27905 - *
27906 - * Starts the timer if necessary.
27907 - */
27908 -void SkI2cIsr(
27909 -SK_AC  *pAC,   /* Adapter Context */
27910 -SK_IOC IoC)    /* I/O Context */
27911 -{
27912 -       SK_EVPARA       Para;
27913 -
27914 -       /* Clear I2C IRQ */
27915 -       SK_OUT32(IoC, B2_I2C_IRQ, I2C_CLR_IRQ);
27916 -
27917 -       Para.Para64 = 0;
27918 -       SkEventQueue(pAC, SKGE_I2C, SK_I2CEV_IRQ, Para);
27919 -}      /* SkI2cIsr */
27920 -
27921 -
27922 -/*
27923 - * Check this sensors Value against the threshold and send events.
27924 - */
27925 -static void SkI2cCheckSensor(
27926 -SK_AC          *pAC,   /* Adapter Context */
27927 -SK_SENSOR      *pSen)
27928 -{
27929 -       SK_EVPARA       ParaLocal;
27930 -       SK_BOOL         TooHigh;        /* Is sensor too high? */
27931 -       SK_BOOL         TooLow;         /* Is sensor too low? */
27932 -       SK_U64          CurrTime;       /* Current Time */
27933 -       SK_BOOL         DoTrapSend;     /* We need to send a trap */
27934 -       SK_BOOL         DoErrLog;       /* We need to log the error */
27935 -       SK_BOOL         IsError;        /* We need to log the error */
27936 -
27937 -       /* Check Dummy Reads first */
27938 -       if (pAC->I2c.DummyReads > 0) {
27939 -               pAC->I2c.DummyReads--;
27940 -               return;
27941 -       }
27942 -
27943 -       /* Get the current time */
27944 -       CurrTime = SkOsGetTime(pAC);
27945 -
27946 -       /* Set para to the most useful setting: The current sensor. */
27947 -       ParaLocal.Para64 = (SK_U64)pAC->I2c.CurrSens;
27948 -
27949 -       /* Check the Value against the thresholds. First: Error Thresholds */
27950 -       TooHigh = (pSen->SenValue > pSen->SenThreErrHigh);
27951 -       TooLow = (pSen->SenValue < pSen->SenThreErrLow);
27952 -
27953 -       IsError = SK_FALSE;
27954 -       if (TooHigh || TooLow) {
27955 -               /* Error condition is satisfied */
27956 -               DoTrapSend = SK_TRUE;
27957 -               DoErrLog = SK_TRUE;
27958 -
27959 -               /* Now error condition is satisfied */
27960 -               IsError = SK_TRUE;
27961 -
27962 -               if (pSen->SenErrFlag == SK_SEN_ERR_ERR) {
27963 -                       /* This state is the former one */
27964 -
27965 -                       /* So check first whether we have to send a trap */
27966 -                       if (pSen->SenLastErrTrapTS + SK_SEN_ERR_TR_HOLD >
27967 -                           CurrTime) {
27968 -                               /*
27969 -                                * Do NOT send the Trap. The hold back time
27970 -                                * has to run out first.
27971 -                                */
27972 -                               DoTrapSend = SK_FALSE;
27973 -                       }
27974 -
27975 -                       /* Check now whether we have to log an Error */
27976 -                       if (pSen->SenLastErrLogTS + SK_SEN_ERR_LOG_HOLD >
27977 -                           CurrTime) {
27978 -                               /*
27979 -                                * Do NOT log the error. The hold back time
27980 -                                * has to run out first.
27981 -                                */
27982 -                               DoErrLog = SK_FALSE;
27983 -                       }
27984 -               }
27985 -               else {
27986 -                       /* We came from a different state -> Set Begin Time Stamp */
27987 -                       pSen->SenBegErrTS = CurrTime;
27988 -                       pSen->SenErrFlag = SK_SEN_ERR_ERR;
27989 -               }
27990 -
27991 -               if (DoTrapSend) {
27992 -                       /* Set current Time */
27993 -                       pSen->SenLastErrTrapTS = CurrTime;
27994 -                       pSen->SenErrCts++;
27995 -
27996 -                       /* Queue PNMI Event */
27997 -                       SkEventQueue(pAC, SKGE_PNMI, (TooHigh ?
27998 -                               SK_PNMI_EVT_SEN_ERR_UPP :
27999 -                               SK_PNMI_EVT_SEN_ERR_LOW),
28000 -                               ParaLocal);
28001 -               }
28002 -
28003 -               if (DoErrLog) {
28004 -                       /* Set current Time */
28005 -                       pSen->SenLastErrLogTS = CurrTime;
28006 -
28007 -                       if (pSen->SenType == SK_SEN_TEMP) {
28008 -                               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E011, SKERR_I2C_E011MSG);
28009 -                       }
28010 -                       else if (pSen->SenType == SK_SEN_VOLT) {
28011 -                               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E012, SKERR_I2C_E012MSG);
28012 -                       }
28013 -                       else {
28014 -                               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E015, SKERR_I2C_E015MSG);
28015 -                       }
28016 -               }
28017 -       }
28018 -
28019 -       /* Check the Value against the thresholds */
28020 -       /* 2nd: Warning thresholds */
28021 -       TooHigh = (pSen->SenValue > pSen->SenThreWarnHigh);
28022 -       TooLow = (pSen->SenValue < pSen->SenThreWarnLow);
28023 -
28024 -       if (!IsError && (TooHigh || TooLow)) {
28025 -               /* Error condition is satisfied */
28026 -               DoTrapSend = SK_TRUE;
28027 -               DoErrLog = SK_TRUE;
28028 -
28029 -               if (pSen->SenErrFlag == SK_SEN_ERR_WARN) {
28030 -                       /* This state is the former one */
28031 -
28032 -                       /* So check first whether we have to send a trap */
28033 -                       if (pSen->SenLastWarnTrapTS + SK_SEN_WARN_TR_HOLD > CurrTime) {
28034 -                               /*
28035 -                                * Do NOT send the Trap. The hold back time
28036 -                                * has to run out first.
28037 -                                */
28038 -                               DoTrapSend = SK_FALSE;
28039 -                       }
28040 -
28041 -                       /* Check now whether we have to log an Error */
28042 -                       if (pSen->SenLastWarnLogTS + SK_SEN_WARN_LOG_HOLD > CurrTime) {
28043 -                               /*
28044 -                                * Do NOT log the error. The hold back time
28045 -                                * has to run out first.
28046 -                                */
28047 -                               DoErrLog = SK_FALSE;
28048 -                       }
28049 -               }
28050 -               else {
28051 -                       /* We came from a different state -> Set Begin Time Stamp */
28052 -                       pSen->SenBegWarnTS = CurrTime;
28053 -                       pSen->SenErrFlag = SK_SEN_ERR_WARN;
28054 -               }
28055 -
28056 -               if (DoTrapSend) {
28057 -                       /* Set current Time */
28058 -                       pSen->SenLastWarnTrapTS = CurrTime;
28059 -                       pSen->SenWarnCts++;
28060 -
28061 -                       /* Queue PNMI Event */
28062 -                       SkEventQueue(pAC, SKGE_PNMI, (TooHigh ?
28063 -                               SK_PNMI_EVT_SEN_WAR_UPP :
28064 -                               SK_PNMI_EVT_SEN_WAR_LOW),
28065 -                               ParaLocal);
28066 -               }
28067 -
28068 -               if (DoErrLog) {
28069 -                       /* Set current Time */
28070 -                       pSen->SenLastWarnLogTS = CurrTime;
28071 -
28072 -                       if (pSen->SenType == SK_SEN_TEMP) {
28073 -                               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E009, SKERR_I2C_E009MSG);
28074 -                       }
28075 -                       else if (pSen->SenType == SK_SEN_VOLT) {
28076 -                               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E010, SKERR_I2C_E010MSG);
28077 -                       }
28078 -                       else {
28079 -                               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E014, SKERR_I2C_E014MSG);
28080 -                       }
28081 -               }
28082 -       }
28083 -
28084 -       /* Check for NO error at all */
28085 -       if (!IsError && !TooHigh && !TooLow) {
28086 -               /* Set o.k. Status if no error and no warning condition */
28087 -               pSen->SenErrFlag = SK_SEN_ERR_OK;
28088 -       }
28089 -
28090 -       /* End of check against the thresholds */
28091 -
28092 -       /* Bug fix AF: 16.Aug.2001: Correct the init base
28093 -        * of LM80 sensor.
28094 -        */
28095 -       if (pSen->SenInit == SK_SEN_DYN_INIT_PCI_IO) {
28096 -
28097 -        pSen->SenInit = SK_SEN_DYN_INIT_NONE;
28098 -
28099 -               if (pSen->SenValue > SK_SEN_PCI_IO_RANGE_LIMITER) {
28100 -                       /* 5V PCI-IO Voltage */
28101 -                       pSen->SenThreWarnLow = SK_SEN_PCI_IO_5V_LOW_WARN;
28102 -                       pSen->SenThreErrLow = SK_SEN_PCI_IO_5V_LOW_ERR;
28103 -               }
28104 -               else {
28105 -                       /* 3.3V PCI-IO Voltage */
28106 -                       pSen->SenThreWarnHigh = SK_SEN_PCI_IO_3V3_HIGH_WARN;
28107 -                       pSen->SenThreErrHigh = SK_SEN_PCI_IO_3V3_HIGH_ERR;
28108 -               }
28109 -       }
28110 -
28111 -#ifdef TEST_ONLY
28112 -    /* Dynamic thresholds also for VAUX of LM80 sensor */
28113 -       if (pSen->SenInit == SK_SEN_DYN_INIT_VAUX) {
28114 -
28115 -        pSen->SenInit = SK_SEN_DYN_INIT_NONE;
28116 -
28117 -               /* 3.3V VAUX Voltage */
28118 -               if (pSen->SenValue > SK_SEN_VAUX_RANGE_LIMITER) {
28119 -                       pSen->SenThreWarnLow = SK_SEN_VAUX_3V3_LOW_WARN;
28120 -                       pSen->SenThreErrLow = SK_SEN_VAUX_3V3_LOW_ERR;
28121 -               }
28122 -               /* 0V VAUX Voltage */
28123 -               else {
28124 -                       pSen->SenThreWarnHigh = SK_SEN_VAUX_0V_WARN_ERR;
28125 -                       pSen->SenThreErrHigh = SK_SEN_VAUX_0V_WARN_ERR;
28126 -               }
28127 -       }
28128 -
28129 -       /*
28130 -        * Check initialization state:
28131 -        * The VIO Thresholds need adaption
28132 -        */
28133 -       if (!pSen->SenInit && pSen->SenReg == LM80_VT1_IN &&
28134 -            pSen->SenValue > SK_SEN_WARNLOW2C &&
28135 -            pSen->SenValue < SK_SEN_WARNHIGH2) {
28136 -               pSen->SenThreErrLow = SK_SEN_ERRLOW2C;
28137 -               pSen->SenThreWarnLow = SK_SEN_WARNLOW2C;
28138 -               pSen->SenInit = SK_TRUE;
28139 -       }
28140 -
28141 -       if (!pSen->SenInit && pSen->SenReg == LM80_VT1_IN &&
28142 -            pSen->SenValue > SK_SEN_WARNLOW2 &&
28143 -            pSen->SenValue < SK_SEN_WARNHIGH2C) {
28144 -               pSen->SenThreErrHigh = SK_SEN_ERRHIGH2C;
28145 -               pSen->SenThreWarnHigh = SK_SEN_WARNHIGH2C;
28146 -               pSen->SenInit = SK_TRUE;
28147 -       }
28148 -#endif
28149 -
28150 -       if (pSen->SenInit != SK_SEN_DYN_INIT_NONE) {
28151 -               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E013, SKERR_I2C_E013MSG);
28152 -       }
28153 -}      /* SkI2cCheckSensor */
28154 -
28155 -
28156 -/*
28157 - * The only Event to be served is the timeout event
28158 - *
28159 - */
28160 -int    SkI2cEvent(
28161 -SK_AC          *pAC,   /* Adapter Context */
28162 -SK_IOC         IoC,    /* I/O Context */
28163 -SK_U32         Event,  /* Module specific Event */
28164 -SK_EVPARA      Para)   /* Event specific Parameter */
28165 -{
28166 -       int                     ReadComplete;
28167 -       SK_SENSOR       *pSen;
28168 -       SK_U32          Time;
28169 -       SK_EVPARA       ParaLocal;
28170 -       int                     i;
28171 -
28172 -       /* New case: no sensors */
28173 -       if (pAC->I2c.MaxSens == 0) {
28174 -               return(0);
28175 -       }
28176 -
28177 -       switch (Event) {
28178 -       case SK_I2CEV_IRQ:
28179 -               pSen = &pAC->I2c.SenTable[pAC->I2c.CurrSens];
28180 -               ReadComplete = SkI2cReadSensor(pAC, IoC, pSen);
28181 -
28182 -               if (ReadComplete) {
28183 -                       /* Check sensor against defined thresholds */
28184 -                       SkI2cCheckSensor(pAC, pSen);
28185 -
28186 -                       /* Increment Current sensor and set appropriate Timeout */
28187 -                       pAC->I2c.CurrSens++;
28188 -                       if (pAC->I2c.CurrSens >= pAC->I2c.MaxSens) {
28189 -                               pAC->I2c.CurrSens = 0;
28190 -                               Time = SK_I2C_TIM_LONG;
28191 -                       }
28192 -                       else {
28193 -                               Time = SK_I2C_TIM_SHORT;
28194 -                       }
28195 -
28196 -                       /* Start Timer */
28197 -                       ParaLocal.Para64 = (SK_U64)0;
28198 -
28199 -                       pAC->I2c.TimerMode = SK_TIMER_NEW_GAUGING;
28200 -
28201 -                       SkTimerStart(pAC, IoC, &pAC->I2c.SenTimer, Time,
28202 -                               SKGE_I2C, SK_I2CEV_TIM, ParaLocal);
28203 -               }
28204 -        else {
28205 -                       /* Start Timer */
28206 -                       ParaLocal.Para64 = (SK_U64)0;
28207 -
28208 -                       pAC->I2c.TimerMode = SK_TIMER_WATCH_SM;
28209 -
28210 -            SkTimerStart(pAC, IoC, &pAC->I2c.SenTimer, SK_I2C_TIM_WATCH,
28211 -                               SKGE_I2C, SK_I2CEV_TIM, ParaLocal);
28212 -               }
28213 -               break;
28214 -       case SK_I2CEV_TIM:
28215 -               if (pAC->I2c.TimerMode == SK_TIMER_NEW_GAUGING) {
28216 -
28217 -                       ParaLocal.Para64 = (SK_U64)0;
28218 -                       SkTimerStop(pAC, IoC, &pAC->I2c.SenTimer);
28219 -
28220 -                       pSen = &pAC->I2c.SenTable[pAC->I2c.CurrSens];
28221 -                       ReadComplete = SkI2cReadSensor(pAC, IoC, pSen);
28222 -
28223 -                       if (ReadComplete) {
28224 -                               /* Check sensor against defined thresholds */
28225 -                               SkI2cCheckSensor(pAC, pSen);
28226 -
28227 -                               /* Increment Current sensor and set appropriate Timeout */
28228 -                               pAC->I2c.CurrSens++;
28229 -                               if (pAC->I2c.CurrSens == pAC->I2c.MaxSens) {
28230 -                                       pAC->I2c.CurrSens = 0;
28231 -                                       Time = SK_I2C_TIM_LONG;
28232 -                               }
28233 -                               else {
28234 -                                       Time = SK_I2C_TIM_SHORT;
28235 -                               }
28236 -
28237 -                               /* Start Timer */
28238 -                               ParaLocal.Para64 = (SK_U64)0;
28239 -
28240 -                               pAC->I2c.TimerMode = SK_TIMER_NEW_GAUGING;
28241 -
28242 -                               SkTimerStart(pAC, IoC, &pAC->I2c.SenTimer, Time,
28243 -                                       SKGE_I2C, SK_I2CEV_TIM, ParaLocal);
28244 -                       }
28245 -               }
28246 -               else {
28247 -                       pSen = &pAC->I2c.SenTable[pAC->I2c.CurrSens];
28248 -                       pSen->SenErrFlag = SK_SEN_ERR_FAULTY;
28249 -                       SK_I2C_STOP(IoC);
28250 -
28251 -                       /* Increment Current sensor and set appropriate Timeout */
28252 -                       pAC->I2c.CurrSens++;
28253 -                       if (pAC->I2c.CurrSens == pAC->I2c.MaxSens) {
28254 -                               pAC->I2c.CurrSens = 0;
28255 -                               Time = SK_I2C_TIM_LONG;
28256 -                       }
28257 -                       else {
28258 -                               Time = SK_I2C_TIM_SHORT;
28259 -                       }
28260 -
28261 -                       /* Start Timer */
28262 -                       ParaLocal.Para64 = (SK_U64)0;
28263 -
28264 -                       pAC->I2c.TimerMode = SK_TIMER_NEW_GAUGING;
28265 -
28266 -                       SkTimerStart(pAC, IoC, &pAC->I2c.SenTimer, Time,
28267 -                               SKGE_I2C, SK_I2CEV_TIM, ParaLocal);
28268 -               }
28269 -               break;
28270 -       case SK_I2CEV_CLEAR:
28271 -               for (i = 0; i < SK_MAX_SENSORS; i++) {
28272 -                       pAC->I2c.SenTable[i].SenErrFlag = SK_SEN_ERR_OK;
28273 -                       pAC->I2c.SenTable[i].SenErrCts = 0;
28274 -                       pAC->I2c.SenTable[i].SenWarnCts = 0;
28275 -                       pAC->I2c.SenTable[i].SenBegErrTS = 0;
28276 -                       pAC->I2c.SenTable[i].SenBegWarnTS = 0;
28277 -                       pAC->I2c.SenTable[i].SenLastErrTrapTS = (SK_U64)0;
28278 -                       pAC->I2c.SenTable[i].SenLastErrLogTS = (SK_U64)0;
28279 -                       pAC->I2c.SenTable[i].SenLastWarnTrapTS = (SK_U64)0;
28280 -                       pAC->I2c.SenTable[i].SenLastWarnLogTS = (SK_U64)0;
28281 -               }
28282 -               break;
28283 -       default:
28284 -               SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_I2C_E006, SKERR_I2C_E006MSG);
28285 -       }
28286 -
28287 -       return(0);
28288 -}      /* SkI2cEvent*/
28289 -
28290 -#endif /* !SK_DIAG */
28291 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/sklm80.c linux-2.6.9.new/drivers/net/sk98lin/sklm80.c
28292 --- linux-2.6.9.old/drivers/net/sk98lin/sklm80.c        2004-10-19 05:55:06.000000000 +0800
28293 +++ linux-2.6.9.new/drivers/net/sk98lin/sklm80.c        2006-12-07 14:35:03.000000000 +0800
28294 @@ -2,8 +2,8 @@
28295   *
28296   * Name:       sklm80.c
28297   * Project:    Gigabit Ethernet Adapters, TWSI-Module
28298 - * Version:    $Revision: 1.22 $
28299 - * Date:       $Date: 2003/10/20 09:08:21 $
28300 + * Version:    $Revision: 1.1 $
28301 + * Date:       $Date: 2003/12/19 14:02:31 $
28302   * Purpose:    Functions to access Voltage and Temperature Sensor (LM80)
28303   *
28304   ******************************************************************************/
28305 @@ -27,7 +27,7 @@
28306  */
28307  #if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
28308  static const char SysKonnectFileId[] =
28309 -       "@(#) $Id: sklm80.c,v 1.22 2003/10/20 09:08:21 rschmidt Exp $ (C) Marvell. ";
28310 +       "@(#) $Id: sklm80.c,v 1.1 2003/12/19 14:02:31 mschmid Exp $ (C) Marvell. ";
28311  #endif
28312
28313  #include "h/skdrv1st.h"                /* Driver Specific Definitions */
28314 @@ -111,12 +111,12 @@
28315  /*
28316   * read a sensors value (LM80 specific)
28317   *
28318 - * This function reads a sensors value from the I2C sensor chip LM80.
28319 + * This function reads a sensors value from the TWSI sensor chip LM80.
28320   * The sensor is defined by its index into the sensors database in the struct
28321   * pAC points to.
28322   *
28323   * Returns     1 if the read is completed
28324 - *             0 if the read must be continued (I2C Bus still allocated)
28325 + *             0 if the read must be continued (TWSI Bus still allocated)
28326   */
28327  int SkLm80ReadSensor(
28328  SK_AC          *pAC,   /* Adapter Context */
28329 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/skproc.c linux-2.6.9.new/drivers/net/sk98lin/skproc.c
28330 --- linux-2.6.9.old/drivers/net/sk98lin/skproc.c        2004-10-19 05:53:11.000000000 +0800
28331 +++ linux-2.6.9.new/drivers/net/sk98lin/skproc.c        2006-12-07 14:35:03.000000000 +0800
28332 @@ -2,28 +2,34 @@
28333   *
28334   * Name:       skproc.c
28335   * Project:    GEnesis, PCI Gigabit Ethernet Adapter
28336 - * Version:    $Revision: 1.11 $
28337 - * Date:       $Date: 2003/12/11 16:03:57 $
28338 - * Purpose:    Funktions to display statictic data
28339 + * Version:    $Revision: 1.14.2.4 $
28340 + * Date:       $Date: 2005/05/23 13:47:33 $
28341 + * Purpose:    Functions to display statictic data
28342   *
28343   ******************************************************************************/
28344
28345  /******************************************************************************
28346   *
28347   *     (C)Copyright 1998-2002 SysKonnect GmbH.
28348 - *     (C)Copyright 2002-2003 Marvell.
28349 + *     (C)Copyright 2002-2005 Marvell.
28350 + *
28351 + *     Driver for Marvell Yukon/2 chipset and SysKonnect Gigabit Ethernet
28352 + *      Server Adapters.
28353 + *
28354 + *     Author: Ralph Roesler (rroesler@syskonnect.de)
28355 + *             Mirko Lindner (mlindner@syskonnect.de)
28356 + *
28357 + *     Address all question to: linux@syskonnect.de
28358   *
28359   *     This program is free software; you can redistribute it and/or modify
28360   *     it under the terms of the GNU General Public License as published by
28361   *     the Free Software Foundation; either version 2 of the License, or
28362   *     (at your option) any later version.
28363   *
28364 - *     Created 22-Nov-2000
28365 - *     Author: Mirko Lindner (mlindner@syskonnect.de)
28366 - *
28367   *     The information in this file is provided "AS IS" without warranty.
28368   *
28369 - ******************************************************************************/
28370 + *****************************************************************************/
28371 +
28372  #include <linux/proc_fs.h>
28373  #include <linux/seq_file.h>
28374
28375 @@ -32,9 +38,16 @@
28376  #include "h/skversion.h"
28377
28378  extern struct SK_NET_DEVICE *SkGeRootDev;
28379 +
28380 +/******************************************************************************
28381 + *
28382 + * Local Function Prototypes and Local Variables
28383 + *
28384 + *****************************************************************************/
28385 +
28386  static int sk_proc_print(void *writePtr, char *format, ...);
28387  static void sk_gen_browse(void *buffer);
28388 -int len;
28389 +static int len;
28390
28391  static int sk_seq_show(struct seq_file *seq, void *v);
28392  static int sk_proc_open(struct inode *inode, struct file *file);
28393 @@ -52,16 +65,18 @@
28394   *     sk_gen_browse -generic  print "summaries" entry
28395   *
28396   * Description:
28397 - *  This function fills the proc entry with statistic data about
28398 - *  the ethernet device.
28399 + *     This function fills the proc entry with statistic data about
28400 + *     the ethernet device.
28401   *
28402 - * Returns: -
28403 + * Returns:    N/A
28404   *
28405   */
28406 -static void sk_gen_browse(void *buffer)
28407 +static void sk_gen_browse(
28408 +void *buffer)  /* buffer where the statistics will be stored in */
28409  {
28410         struct SK_NET_DEVICE    *SkgeProcDev = SkGeRootDev;
28411         struct SK_NET_DEVICE    *next;
28412 +       SK_BOOL                 DisableStatistic = 0;
28413         SK_PNMI_STRUCT_DATA     *pPnmiStruct;
28414         SK_PNMI_STAT            *pPnmiStat;
28415         unsigned long           Flags;
28416 @@ -69,6 +84,7 @@
28417         DEV_NET                 *pNet;
28418         SK_AC                   *pAC;
28419         char                    sens_msg[50];
28420 +       int                     card_type;
28421         int                     MaxSecurityCount = 0;
28422         int                     t;
28423         int                     i;
28424 @@ -91,7 +107,7 @@
28425
28426                         spin_lock_irqsave(&pAC->SlowPathLock, Flags);
28427                         Size = SK_PNMI_STRUCT_SIZE;
28428 -#ifdef SK_DIAG_SUPPORT
28429 +                       DisableStatistic = 0;
28430                         if (pAC->BoardLevel == SK_INIT_DATA) {
28431                                 SK_MEMCPY(&(pAC->PnmiStruct), &(pAC->PnmiBackup), sizeof(SK_PNMI_STRUCT_DATA));
28432                                 if (pAC->DiagModeActive == DIAG_NOTACTIVE) {
28433 @@ -100,13 +116,13 @@
28434                         } else {
28435                                 SkPnmiGetStruct(pAC, pAC->IoBase, pPnmiStruct, &Size, t-1);
28436                         }
28437 -#else
28438 -                       SkPnmiGetStruct(pAC, pAC->IoBase,
28439 -                               pPnmiStruct, &Size, t-1);
28440 -#endif
28441                         spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
28442 -
28443                         if (strcmp(pAC->dev[t-1]->name, currDev->name) == 0) {
28444 +                               if (!pAC->GIni.GIYukon32Bit)
28445 +                                       card_type = 64;
28446 +                               else
28447 +                                       card_type = 32;
28448 +
28449                                 pPnmiStat = &pPnmiStruct->Stat[0];
28450                                 len = sk_proc_print(buffer,
28451                                         "\nDetailed statistic for device %s\n",
28452 @@ -118,6 +134,17 @@
28453                                 len += sk_proc_print(buffer,
28454                                         "\nBoard statistics\n\n");
28455                                 len += sk_proc_print(buffer,
28456 +                                       "Card name                      %s\n",
28457 +                                       pAC->DeviceStr);
28458 +                               len += sk_proc_print(buffer,
28459 +                                       "Vendor/Device ID               %x/%x\n",
28460 +                                       pAC->PciDev->vendor,
28461 +                                       pAC->PciDev->device);
28462 +                               len += sk_proc_print(buffer,
28463 +                                       "Card type (Bit)                %d\n",
28464 +                                       card_type);
28465 +
28466 +                               len += sk_proc_print(buffer,
28467                                         "Active Port                    %c\n",
28468                                         'A' + pAC->Rlmt.Net[t-1].Port[pAC->Rlmt.
28469                                         Net[t-1].PrefPort]->PortNumber);
28470 @@ -126,177 +153,239 @@
28471                                         'A' + pAC->Rlmt.Net[t-1].Port[pAC->Rlmt.
28472                                         Net[t-1].PrefPort]->PortNumber);
28473
28474 -                               len += sk_proc_print(buffer,
28475 -                                       "Bus speed (MHz)                %d\n",
28476 -                                       pPnmiStruct->BusSpeed);
28477 -
28478 -                               len += sk_proc_print(buffer,
28479 -                                       "Bus width (Bit)                %d\n",
28480 -                                       pPnmiStruct->BusWidth);
28481 -                               len += sk_proc_print(buffer,
28482 -                                       "Driver version                 %s\n",
28483 -                                       VER_STRING);
28484 -                               len += sk_proc_print(buffer,
28485 -                                       "Hardware revision              v%d.%d\n",
28486 -                                       (pAC->GIni.GIPciHwRev >> 4) & 0x0F,
28487 -                                       pAC->GIni.GIPciHwRev & 0x0F);
28488 -
28489 -                               /* Print sensor informations */
28490 -                               for (i=0; i < pAC->I2c.MaxSens; i ++) {
28491 -                                       /* Check type */
28492 -                                       switch (pAC->I2c.SenTable[i].SenType) {
28493 -                                       case 1:
28494 -                                               strcpy(sens_msg, pAC->I2c.SenTable[i].SenDesc);
28495 -                                               strcat(sens_msg, " (C)");
28496 -                                               len += sk_proc_print(buffer,
28497 -                                                       "%-25s      %d.%02d\n",
28498 -                                                       sens_msg,
28499 -                                                       pAC->I2c.SenTable[i].SenValue / 10,
28500 -                                                       pAC->I2c.SenTable[i].SenValue % 10);
28501 +                               if (pAC->DynIrqModInfo.IntModTypeSelect == C_INT_MOD_STATIC) {
28502 +                                       len += sk_proc_print(buffer,
28503 +                                       "Interrupt Moderation           static (%d ints/sec)\n",
28504 +                                       pAC->DynIrqModInfo.MaxModIntsPerSec);
28505 +                               } else if (pAC->DynIrqModInfo.IntModTypeSelect == C_INT_MOD_DYNAMIC) {
28506 +                                       len += sk_proc_print(buffer,
28507 +                                       "Interrupt Moderation           dynamic (%d ints/sec)\n",
28508 +                                       pAC->DynIrqModInfo.MaxModIntsPerSec);
28509 +                               } else {
28510 +                                       len += sk_proc_print(buffer,
28511 +                                       "Interrupt Moderation           disabled\n");
28512 +                               }
28513
28514 -                                               strcpy(sens_msg, pAC->I2c.SenTable[i].SenDesc);
28515 -                                               strcat(sens_msg, " (F)");
28516 +                               if (pAC->GIni.GIPciBus == SK_PEX_BUS) {
28517 +                                       len += sk_proc_print(buffer,
28518 +                                               "Bus type                       PCI-Express\n");
28519 +                                       len += sk_proc_print(buffer,
28520 +                                               "Bus width (Lanes)              %d\n",
28521 +                                               pAC->GIni.GIPexWidth);
28522 +                               } else {
28523 +                                       if (pAC->GIni.GIPciBus == SK_PCIX_BUS) {
28524                                                 len += sk_proc_print(buffer,
28525 -                                                       "%-25s      %d.%02d\n",
28526 -                                                       sens_msg,
28527 -                                                       ((((pAC->I2c.SenTable[i].SenValue)
28528 -                                                       *10)*9)/5 + 3200)/100,
28529 -                                                       ((((pAC->I2c.SenTable[i].SenValue)
28530 -                                                       *10)*9)/5 + 3200) % 10);
28531 -                                               break;
28532 -                                       case 2:
28533 -                                               strcpy(sens_msg, pAC->I2c.SenTable[i].SenDesc);
28534 -                                               strcat(sens_msg, " (V)");
28535 +                                                       "Bus type                       PCI-X\n");
28536 +                                               if (pAC->GIni.GIPciMode == PCI_OS_SPD_X133) {
28537 +                                                       len += sk_proc_print(buffer,
28538 +                                                               "Bus speed (MHz)                133\n");
28539 +                                               } else if (pAC->GIni.GIPciMode == PCI_OS_SPD_X100) {
28540 +                                                       len += sk_proc_print(buffer,
28541 +                                                               "Bus speed (MHz)                100\n");
28542 +                                               } else if (pAC->GIni.GIPciMode == PCI_OS_SPD_X66) {
28543 +                                                       len += sk_proc_print(buffer,
28544 +                                                               "Bus speed (MHz)                66\n");
28545 +                                               } else {
28546 +                                                       len += sk_proc_print(buffer,
28547 +                                                               "Bus speed (MHz)                33\n");
28548 +                                               }
28549 +                                       } else {
28550                                                 len += sk_proc_print(buffer,
28551 -                                                       "%-25s      %d.%03d\n",
28552 -                                                       sens_msg,
28553 -                                                       pAC->I2c.SenTable[i].SenValue / 1000,
28554 -                                                       pAC->I2c.SenTable[i].SenValue % 1000);
28555 -                                               break;
28556 -                                       case 3:
28557 -                                               strcpy(sens_msg, pAC->I2c.SenTable[i].SenDesc);
28558 -                                               strcat(sens_msg, " (rpm)");
28559 +                                                       "Bus type                       PCI\n");
28560                                                 len += sk_proc_print(buffer,
28561 -                                                       "%-25s      %d\n",
28562 -                                                       sens_msg,
28563 -                                                       pAC->I2c.SenTable[i].SenValue);
28564 -                                               break;
28565 -                                       default:
28566 -                                               break;
28567 +                                                       "Bus speed (MHz)                %d\n",
28568 +                                                       pPnmiStruct->BusSpeed);
28569                                         }
28570 +                                       len += sk_proc_print(buffer,
28571 +                                               "Bus width (Bit)                %d\n",
28572 +                                               pPnmiStruct->BusWidth);
28573                                 }
28574 -
28575 -                               /*Receive statistics */
28576 -                               len += sk_proc_print(buffer,
28577 -                               "\nReceive statistics\n\n");
28578
28579                                 len += sk_proc_print(buffer,
28580 -                                       "Received bytes                 %Lu\n",
28581 -                                       (unsigned long long) pPnmiStat->StatRxOctetsOkCts);
28582 -                               len += sk_proc_print(buffer,
28583 -                                       "Received packets               %Lu\n",
28584 -                                       (unsigned long long) pPnmiStat->StatRxOkCts);
28585 -#if 0
28586 -                               if (pAC->GIni.GP[0].PhyType == SK_PHY_XMAC &&
28587 -                                       pAC->HWRevision < 12) {
28588 -                                       pPnmiStruct->InErrorsCts = pPnmiStruct->InErrorsCts -
28589 -                                               pPnmiStat->StatRxShortsCts;
28590 -                                       pPnmiStat->StatRxShortsCts = 0;
28591 -                               }
28592 -#endif
28593 -                               if (pNet->Mtu > 1500)
28594 -                                       pPnmiStruct->InErrorsCts = pPnmiStruct->InErrorsCts -
28595 -                                               pPnmiStat->StatRxTooLongCts;
28596 -
28597 -                               len += sk_proc_print(buffer,
28598 -                                       "Receive errors                 %Lu\n",
28599 -                                       (unsigned long long) pPnmiStruct->InErrorsCts);
28600 -                               len += sk_proc_print(buffer,
28601 -                                       "Receive dropped                %Lu\n",
28602 -                                       (unsigned long long) pPnmiStruct->RxNoBufCts);
28603 +                                       "Driver version                 %s (%s)\n",
28604 +                                       VER_STRING, PATCHLEVEL);
28605                                 len += sk_proc_print(buffer,
28606 -                                       "Received multicast             %Lu\n",
28607 -                                       (unsigned long long) pPnmiStat->StatRxMulticastOkCts);
28608 +                                       "Driver release date            %s\n",
28609 +                                       pAC->Pnmi.pDriverReleaseDate);
28610                                 len += sk_proc_print(buffer,
28611 -                                       "Receive error types\n");
28612 -                               len += sk_proc_print(buffer,
28613 -                                       "   length                      %Lu\n",
28614 -                                       (unsigned long long) pPnmiStat->StatRxRuntCts);
28615 -                               len += sk_proc_print(buffer,
28616 -                                       "   buffer overflow             %Lu\n",
28617 -                                       (unsigned long long) pPnmiStat->StatRxFifoOverflowCts);
28618 -                               len += sk_proc_print(buffer,
28619 -                                       "   bad crc                     %Lu\n",
28620 -                                       (unsigned long long) pPnmiStat->StatRxFcsCts);
28621 -                               len += sk_proc_print(buffer,
28622 -                                       "   framing                     %Lu\n",
28623 -                                       (unsigned long long) pPnmiStat->StatRxFramingCts);
28624 -                               len += sk_proc_print(buffer,
28625 -                                       "   missed frames               %Lu\n",
28626 -                                       (unsigned long long) pPnmiStat->StatRxMissedCts);
28627 -
28628 -                               if (pNet->Mtu > 1500)
28629 -                                       pPnmiStat->StatRxTooLongCts = 0;
28630 +                                       "Hardware revision              v%d.%d\n",
28631 +                                       (pAC->GIni.GIPciHwRev >> 4) & 0x0F,
28632 +                                       pAC->GIni.GIPciHwRev & 0x0F);
28633
28634 -                               len += sk_proc_print(buffer,
28635 -                                       "   too long                    %Lu\n",
28636 -                                       (unsigned long long) pPnmiStat->StatRxTooLongCts);
28637 -                               len += sk_proc_print(buffer,
28638 -                                       "   carrier extension           %Lu\n",
28639 -                                       (unsigned long long) pPnmiStat->StatRxCextCts);
28640 -                               len += sk_proc_print(buffer,
28641 -                                       "   too short                   %Lu\n",
28642 -                                       (unsigned long long) pPnmiStat->StatRxShortsCts);
28643 -                               len += sk_proc_print(buffer,
28644 -                                       "   symbol                      %Lu\n",
28645 -                                       (unsigned long long) pPnmiStat->StatRxSymbolCts);
28646 -                               len += sk_proc_print(buffer,
28647 -                                       "   LLC MAC size                %Lu\n",
28648 -                                       (unsigned long long) pPnmiStat->StatRxIRLengthCts);
28649 -                               len += sk_proc_print(buffer,
28650 -                                       "   carrier event               %Lu\n",
28651 -                                       (unsigned long long) pPnmiStat->StatRxCarrierCts);
28652 -                               len += sk_proc_print(buffer,
28653 -                                       "   jabber                      %Lu\n",
28654 -                                       (unsigned long long) pPnmiStat->StatRxJabberCts);
28655 +                               if (!netif_running(pAC->dev[t-1])) {
28656 +                                       len += sk_proc_print(buffer,
28657 +                                               "\n      Device %s is down.\n"
28658 +                                               "      Therefore no statistics are available.\n"
28659 +                                               "      After bringing the device up (ifconfig)"
28660 +                                               " statistics will\n"
28661 +                                               "      be displayed.\n",
28662 +                                               pAC->dev[t-1]->name);
28663 +                                       DisableStatistic = 1;
28664 +                               }
28665
28666 +                               /* Display only if statistic info available */
28667 +                               /* Print sensor informations */
28668 +                               if (!DisableStatistic) {
28669 +                                       for (i=0; i < pAC->I2c.MaxSens; i ++) {
28670 +                                               /* Check type */
28671 +                                               switch (pAC->I2c.SenTable[i].SenType) {
28672 +                                               case 1:
28673 +                                                       strcpy(sens_msg, pAC->I2c.SenTable[i].SenDesc);
28674 +                                                       strcat(sens_msg, " (C)");
28675 +                                                       len += sk_proc_print(buffer,
28676 +                                                               "%-25s      %d.%02d\n",
28677 +                                                               sens_msg,
28678 +                                                               pAC->I2c.SenTable[i].SenValue / 10,
28679 +                                                               pAC->I2c.SenTable[i].SenValue %
28680 +                                                               10);
28681 +
28682 +                                                       strcpy(sens_msg, pAC->I2c.SenTable[i].SenDesc);
28683 +                                                       strcat(sens_msg, " (F)");
28684 +                                                       len += sk_proc_print(buffer,
28685 +                                                               "%-25s      %d.%02d\n",
28686 +                                                               sens_msg,
28687 +                                                               ((((pAC->I2c.SenTable[i].SenValue)
28688 +                                                               *10)*9)/5 + 3200)/100,
28689 +                                                               ((((pAC->I2c.SenTable[i].SenValue)
28690 +                                                               *10)*9)/5 + 3200) % 10);
28691 +                                                       break;
28692 +                                               case 2:
28693 +                                                       strcpy(sens_msg, pAC->I2c.SenTable[i].SenDesc);
28694 +                                                       strcat(sens_msg, " (V)");
28695 +                                                       len += sk_proc_print(buffer,
28696 +                                                               "%-25s      %d.%03d\n",
28697 +                                                               sens_msg,
28698 +                                                               pAC->I2c.SenTable[i].SenValue / 1000,
28699 +                                                               pAC->I2c.SenTable[i].SenValue % 1000);
28700 +                                                       break;
28701 +                                               case 3:
28702 +                                                       strcpy(sens_msg, pAC->I2c.SenTable[i].SenDesc);
28703 +                                                       strcat(sens_msg, " (rpm)");
28704 +                                                       len += sk_proc_print(buffer,
28705 +                                                               "%-25s      %d\n",
28706 +                                                               sens_msg,
28707 +                                                               pAC->I2c.SenTable[i].SenValue);
28708 +                                                       break;
28709 +                                               default:
28710 +                                                       break;
28711 +                                               }
28712 +                                       }
28713 +
28714 +                                       /*Receive statistics */
28715 +                                       len += sk_proc_print(buffer,
28716 +                                       "\nReceive statistics\n\n");
28717 +
28718 +                                       len += sk_proc_print(buffer,
28719 +                                               "Received bytes                 %Lu\n",
28720 +                                               (unsigned long long) pPnmiStat->StatRxOctetsOkCts);
28721 +                                       len += sk_proc_print(buffer,
28722 +                                               "Received packets               %Lu\n",
28723 +                                               (unsigned long long) pPnmiStat->StatRxOkCts);
28724 +#if 0
28725 +                                       if (pAC->GIni.GP[0].PhyType == SK_PHY_XMAC &&
28726 +                                               pAC->HWRevision < 12) {
28727 +                                               pPnmiStruct->InErrorsCts = pPnmiStruct->InErrorsCts -
28728 +                                                       pPnmiStat->StatRxShortsCts;
28729 +                                               pPnmiStat->StatRxShortsCts = 0;
28730 +                                       }
28731 +#endif
28732 +                                       if (pAC->dev[t-1]->mtu > 1500)
28733 +                                               pPnmiStruct->InErrorsCts = pPnmiStruct->InErrorsCts -
28734 +                                                       pPnmiStat->StatRxTooLongCts;
28735 +
28736 +                                       len += sk_proc_print(buffer,
28737 +                                               "Receive errors                 %Lu\n",
28738 +                                               (unsigned long long) pPnmiStruct->InErrorsCts);
28739 +                                       len += sk_proc_print(buffer,
28740 +                                               "Receive dropped                %Lu\n",
28741 +                                               (unsigned long long) pPnmiStruct->RxNoBufCts);
28742 +                                       len += sk_proc_print(buffer,
28743 +                                               "Received multicast             %Lu\n",
28744 +                                               (unsigned long long) pPnmiStat->StatRxMulticastOkCts);
28745 +#ifdef ADVANCED_STATISTIC_OUTPUT
28746 +                                       len += sk_proc_print(buffer,
28747 +                                               "Receive error types\n");
28748 +                                       len += sk_proc_print(buffer,
28749 +                                               "   length                      %Lu\n",
28750 +                                               (unsigned long long) pPnmiStat->StatRxRuntCts);
28751 +                                       len += sk_proc_print(buffer,
28752 +                                               "   buffer overflow             %Lu\n",
28753 +                                               (unsigned long long) pPnmiStat->StatRxFifoOverflowCts);
28754 +                                       len += sk_proc_print(buffer,
28755 +                                               "   bad crc                     %Lu\n",
28756 +                                               (unsigned long long) pPnmiStat->StatRxFcsCts);
28757 +                                       len += sk_proc_print(buffer,
28758 +                                               "   framing                     %Lu\n",
28759 +                                               (unsigned long long) pPnmiStat->StatRxFramingCts);
28760 +                                       len += sk_proc_print(buffer,
28761 +                                               "   missed frames               %Lu\n",
28762 +                                               (unsigned long long) pPnmiStat->StatRxMissedCts);
28763 +
28764 +                                       if (pAC->dev[t-1]->mtu > 1500)
28765 +                                               pPnmiStat->StatRxTooLongCts = 0;
28766 +
28767 +                                       len += sk_proc_print(buffer,
28768 +                                               "   too long                    %Lu\n",
28769 +                                               (unsigned long long) pPnmiStat->StatRxTooLongCts);
28770 +                                       len += sk_proc_print(buffer,
28771 +                                               "   carrier extension           %Lu\n",
28772 +                                               (unsigned long long) pPnmiStat->StatRxCextCts);
28773 +                                       len += sk_proc_print(buffer,
28774 +                                               "   too short                   %Lu\n",
28775 +                                               (unsigned long long) pPnmiStat->StatRxShortsCts);
28776 +                                       len += sk_proc_print(buffer,
28777 +                                               "   symbol                      %Lu\n",
28778 +                                               (unsigned long long) pPnmiStat->StatRxSymbolCts);
28779 +                                       len += sk_proc_print(buffer,
28780 +                                               "   LLC MAC size                %Lu\n",
28781 +                                               (unsigned long long) pPnmiStat->StatRxIRLengthCts);
28782 +                                       len += sk_proc_print(buffer,
28783 +                                               "   carrier event               %Lu\n",
28784 +                                               (unsigned long long) pPnmiStat->StatRxCarrierCts);
28785 +                                       len += sk_proc_print(buffer,
28786 +                                               "   jabber                      %Lu\n",
28787 +                                               (unsigned long long) pPnmiStat->StatRxJabberCts);
28788 +#endif
28789
28790 -                               /*Transmit statistics */
28791 -                               len += sk_proc_print(buffer,
28792 -                               "\nTransmit statistics\n\n");
28793 +                                       /*Transmit statistics */
28794 +                                       len += sk_proc_print(buffer,
28795 +                                       "\nTransmit statistics\n\n");
28796
28797 -                               len += sk_proc_print(buffer,
28798 -                                       "Transmited bytes               %Lu\n",
28799 -                                       (unsigned long long) pPnmiStat->StatTxOctetsOkCts);
28800 -                               len += sk_proc_print(buffer,
28801 -                                       "Transmited packets             %Lu\n",
28802 -                                       (unsigned long long) pPnmiStat->StatTxOkCts);
28803 -                               len += sk_proc_print(buffer,
28804 -                                       "Transmit errors                %Lu\n",
28805 -                                       (unsigned long long) pPnmiStat->StatTxSingleCollisionCts);
28806 -                               len += sk_proc_print(buffer,
28807 -                                       "Transmit dropped               %Lu\n",
28808 -                                       (unsigned long long) pPnmiStruct->TxNoBufCts);
28809 -                               len += sk_proc_print(buffer,
28810 -                                       "Transmit collisions            %Lu\n",
28811 -                                       (unsigned long long) pPnmiStat->StatTxSingleCollisionCts);
28812 -                               len += sk_proc_print(buffer,
28813 -                                       "Transmit error types\n");
28814 -                               len += sk_proc_print(buffer,
28815 -                                       "   excessive collision         %ld\n",
28816 -                                       pAC->stats.tx_aborted_errors);
28817 -                               len += sk_proc_print(buffer,
28818 -                                       "   carrier                     %Lu\n",
28819 -                                       (unsigned long long) pPnmiStat->StatTxCarrierCts);
28820 -                               len += sk_proc_print(buffer,
28821 -                                       "   fifo underrun               %Lu\n",
28822 -                                       (unsigned long long) pPnmiStat->StatTxFifoUnderrunCts);
28823 -                               len += sk_proc_print(buffer,
28824 -                                       "   heartbeat                   %Lu\n",
28825 -                                       (unsigned long long) pPnmiStat->StatTxCarrierCts);
28826 -                               len += sk_proc_print(buffer,
28827 -                                       "   window                      %ld\n",
28828 -                                       pAC->stats.tx_window_errors);
28829 +                                       len += sk_proc_print(buffer,
28830 +                                               "Transmitted bytes              %Lu\n",
28831 +                                               (unsigned long long) pPnmiStat->StatTxOctetsOkCts);
28832 +                                       len += sk_proc_print(buffer,
28833 +                                               "Transmitted packets            %Lu\n",
28834 +                                               (unsigned long long) pPnmiStat->StatTxOkCts);
28835 +                                       len += sk_proc_print(buffer,
28836 +                                               "Transmit errors                %Lu\n",
28837 +                                               (unsigned long long) pPnmiStat->StatTxSingleCollisionCts);
28838 +                                       len += sk_proc_print(buffer,
28839 +                                               "Transmit dropped               %Lu\n",
28840 +                                               (unsigned long long) pPnmiStruct->TxNoBufCts);
28841 +                                       len += sk_proc_print(buffer,
28842 +                                               "Transmit collisions            %Lu\n",
28843 +                                               (unsigned long long) pPnmiStat->StatTxSingleCollisionCts);
28844 +#ifdef ADVANCED_STATISTIC_OUTPUT
28845 +                                       len += sk_proc_print(buffer,
28846 +                                               "Transmit error types\n");
28847 +                                       len += sk_proc_print(buffer,
28848 +                                               "   excessive collision         %ld\n",
28849 +                                               pAC->stats.tx_aborted_errors);
28850 +                                       len += sk_proc_print(buffer,
28851 +                                               "   carrier                     %Lu\n",
28852 +                                               (unsigned long long) pPnmiStat->StatTxCarrierCts);
28853 +                                       len += sk_proc_print(buffer,
28854 +                                               "   fifo underrun               %Lu\n",
28855 +                                               (unsigned long long) pPnmiStat->StatTxFifoUnderrunCts);
28856 +                                       len += sk_proc_print(buffer,
28857 +                                               "   heartbeat                   %Lu\n",
28858 +                                               (unsigned long long) pPnmiStat->StatTxCarrierCts);
28859 +                                       len += sk_proc_print(buffer,
28860 +                                               "   window                      %ld\n",
28861 +                                               pAC->stats.tx_window_errors);
28862 +#endif
28863 +                               } /* if (!DisableStatistic) */
28864
28865                         } /* if (strcmp(pACname, currDeviceName) == 0) */
28866                 }
28867 @@ -306,16 +395,20 @@
28868
28869  /*****************************************************************************
28870   *
28871 - *      sk_proc_print -generic line print
28872 + *      sk_proc_print - generic line print
28873   *
28874   * Description:
28875 - *  This function fills the proc entry with statistic data about
28876 - *  the ethernet device.
28877 + *     This function fills the proc entry with statistic data about the
28878 + *     ethernet device.
28879   *
28880 - * Returns: number of bytes written
28881 + * Returns:
28882 + *     the number of bytes written
28883   *
28884   */
28885 -static int sk_proc_print(void *writePtr, char *format, ...)
28886 +static int sk_proc_print(
28887 +void *writePtr, /* the buffer pointer         */
28888 +char *format,   /* the format of the string   */
28889 +...)            /* variable list of arguments */
28890  {
28891  #define MAX_LEN_SINGLE_LINE 256
28892         char     str[MAX_LEN_SINGLE_LINE];
28893 @@ -341,19 +434,22 @@
28894   *      sk_seq_show - show proc information of a particular adapter
28895   *
28896   * Description:
28897 - *  This function fills the proc entry with statistic data about
28898 - *  the ethernet device. It invokes the generic sk_gen_browse() to
28899 - *  print out all items one per one.
28900 + *     This function fills the proc entry with statistic data about the
28901 + *     ethernet device. It invokes the generic sk_gen_browse() to print
28902 + *     out all items one per one.
28903   *
28904 - * Returns: number of bytes written
28905 + * Returns:
28906 + *     the number of bytes written
28907   *
28908   */
28909 -static int sk_seq_show(struct seq_file *seq, void *v)
28910 +static int sk_seq_show(
28911 +struct seq_file *seq,  /* the sequence pointer */
28912 +void            *v)    /* additional pointer   */
28913  {
28914 -    void *castedBuffer = (void *) seq;
28915 -    currDev = seq->private;
28916 -    sk_gen_browse(castedBuffer);
28917 -    return 0;
28918 +       void *castedBuffer = (void *) seq;
28919 +       currDev = seq->private;
28920 +       sk_gen_browse(castedBuffer);
28921 +       return 0;
28922  }
28923
28924  /*****************************************************************************
28925 @@ -361,14 +457,17 @@
28926   *      sk_proc_open - register the show function when proc is open'ed
28927   *
28928   * Description:
28929 - *  This function is called whenever a sk98lin proc file is queried.
28930 + *     This function is called whenever a sk98lin proc file is queried.
28931   *
28932 - * Returns: the return value of single_open()
28933 + * Returns:
28934 + *     the return value of single_open()
28935   *
28936   */
28937 -static int sk_proc_open(struct inode *inode, struct file *file)
28938 +static int sk_proc_open(
28939 +struct inode *inode,  /* the inode of the file   */
28940 +struct file  *file)   /* the file pointer itself */
28941  {
28942 -    return single_open(file, sk_seq_show, PDE(inode)->data);
28943 +       return single_open(file, sk_seq_show, PDE(inode)->data);
28944  }
28945
28946  /*******************************************************************************
28947 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/skqueue.c linux-2.6.9.new/drivers/net/sk98lin/skqueue.c
28948 --- linux-2.6.9.old/drivers/net/sk98lin/skqueue.c       2004-10-19 05:53:43.000000000 +0800
28949 +++ linux-2.6.9.new/drivers/net/sk98lin/skqueue.c       2006-12-07 14:35:03.000000000 +0800
28950 @@ -2,8 +2,8 @@
28951   *
28952   * Name:       skqueue.c
28953   * Project:    Gigabit Ethernet Adapters, Event Scheduler Module
28954 - * Version:    $Revision: 1.20 $
28955 - * Date:       $Date: 2003/09/16 13:44:00 $
28956 + * Version:    $Revision: 2.3 $
28957 + * Date:       $Date: 2004/05/14 13:28:18 $
28958   * Purpose:    Management of an event queue.
28959   *
28960   ******************************************************************************/
28961 @@ -28,7 +28,7 @@
28962   */
28963  #if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
28964  static const char SysKonnectFileId[] =
28965 -       "@(#) $Id: skqueue.c,v 1.20 2003/09/16 13:44:00 rschmidt Exp $ (C) Marvell.";
28966 +       "@(#) $Id: skqueue.c,v 2.3 2004/05/14 13:28:18 malthoff Exp $ (C) Marvell.";
28967  #endif
28968
28969  #include "h/skdrv1st.h"                /* Driver Specific Definitions */
28970 @@ -48,10 +48,16 @@
28971
28972  #define PRINTF(a,b,c)
28973
28974 -/*
28975 - * init event queue management
28976 +/******************************************************************************
28977 + *
28978 + *     SkEventInit() - init event queue management
28979   *
28980 - * Must be called during init level 0.
28981 + * Description:
28982 + *     This function initializes event queue management.
28983 + *     It must be called during init level 0.
28984 + *
28985 + * Returns:
28986 + *     nothing
28987   */
28988  void   SkEventInit(
28989  SK_AC  *pAC,   /* Adapter context */
28990 @@ -67,8 +73,17 @@
28991         }
28992  }
28993
28994 -/*
28995 - * add event to queue
28996 +/******************************************************************************
28997 + *
28998 + *     SkEventQueue()  -       add event to queue
28999 + *
29000 + * Description:
29001 + *     This function adds an event to the event queue.
29002 + *     At least Init Level 1 is required to queue events,
29003 + *     but will be scheduled add Init Level 2.
29004 + *
29005 + * returns:
29006 + *     nothing
29007   */
29008  void   SkEventQueue(
29009  SK_AC          *pAC,   /* Adapters context */
29010 @@ -76,26 +91,45 @@
29011  SK_U32         Event,  /* Event to be queued */
29012  SK_EVPARA      Para)   /* Event parameter */
29013  {
29014 -       pAC->Event.EvPut->Class = Class;
29015 -       pAC->Event.EvPut->Event = Event;
29016 -       pAC->Event.EvPut->Para = Para;
29017 +
29018 +       if (pAC->GIni.GILevel == SK_INIT_DATA) {
29019 +               SK_ERR_LOG(pAC, SK_ERRCL_NORES, SKERR_Q_E003, SKERR_Q_E003MSG);
29020 +       }
29021 +       else {
29022 +               pAC->Event.EvPut->Class = Class;
29023 +               pAC->Event.EvPut->Event = Event;
29024 +               pAC->Event.EvPut->Para = Para;
29025
29026 -       if (++pAC->Event.EvPut == &pAC->Event.EvQueue[SK_MAX_EVENT])
29027 -               pAC->Event.EvPut = pAC->Event.EvQueue;
29028 +               if (++pAC->Event.EvPut == &pAC->Event.EvQueue[SK_MAX_EVENT])
29029 +                       pAC->Event.EvPut = pAC->Event.EvQueue;
29030
29031 -       if (pAC->Event.EvPut == pAC->Event.EvGet) {
29032 -               SK_ERR_LOG(pAC, SK_ERRCL_NORES, SKERR_Q_E001, SKERR_Q_E001MSG);
29033 +               if (pAC->Event.EvPut == pAC->Event.EvGet) {
29034 +                       SK_ERR_LOG(pAC, SK_ERRCL_NORES, SKERR_Q_E001, SKERR_Q_E001MSG);
29035 +               }
29036         }
29037  }
29038
29039 -/*
29040 - * event dispatcher
29041 - *     while event queue is not empty
29042 - *             get event from queue
29043 - *             send command to state machine
29044 - *     end
29045 - *     return error reported by individual Event function
29046 - *             0 if no error occured.
29047 +/******************************************************************************
29048 + *
29049 + *     SkEventDispatcher() -    Event Dispatcher
29050 + *
29051 + * Description:
29052 + *     The event dispatcher performs the following operations:
29053 + *             o while event queue is not empty
29054 + *                     - get event from queue
29055 + *                     - send event to state machine
29056 + *               end
29057 + *
29058 + * CAUTION:
29059 + *     The event functions MUST report an error if performing a reinitialization
29060 + *     of the event queue, e.g. performing level Init 0..2 while in dispatcher
29061 + *     call!
29062 + *  ANY OTHER return value delays scheduling the other events in the
29063 + *     queue. In this case the event blocks the queue until
29064 + *  the error condition is cleared!
29065 + *
29066 + * Returns:
29067 + *     The return value error reported by individual event function
29068   */
29069  int    SkEventDispatcher(
29070  SK_AC  *pAC,   /* Adapters Context */
29071 @@ -105,6 +139,10 @@
29072         SK_U32                  Class;
29073         int                     Rtv;
29074
29075 +       if (pAC->GIni.GILevel != SK_INIT_RUN) {
29076 +               SK_ERR_LOG(pAC, SK_ERRCL_NORES, SKERR_Q_E005, SKERR_Q_E005MSG);
29077 +       }
29078 +
29079         pEv = pAC->Event.EvGet;
29080
29081         PRINTF("dispatch get %x put %x\n", pEv, pAC->Event.ev_put);
29082 @@ -152,6 +190,11 @@
29083                         Rtv = SkFdEvent(pAC, Ioc, pEv->Event, pEv->Para);
29084                         break;
29085  #endif /* SK_USE_LAC_EV */
29086 +#ifdef SK_ASF
29087 +               case SKGE_ASF :
29088 +                       Rtv = SkAsfEvent(pAC,Ioc,pEv->Event,pEv->Para);
29089 +                       break ;
29090 +#endif
29091  #ifdef SK_USE_CSUM
29092                 case SKGE_CSUM :
29093                         Rtv = SkCsEvent(pAC, Ioc, pEv->Event, pEv->Para);
29094 @@ -163,6 +206,20 @@
29095                 }
29096
29097                 if (Rtv != 0) {
29098 +                       /*
29099 +                        * Special Case: See CAUTION statement above.
29100 +                        * We assume the event queue is reset.
29101 +                        */
29102 +                       if (pAC->Event.EvGet != pAC->Event.EvQueue &&
29103 +                               pAC->Event.EvGet != pEv) {
29104 +                               /*
29105 +                                * Create an error log entry if the
29106 +                                * event queue isn't reset.
29107 +                                * In this case it may be blocked.
29108 +                                */
29109 +                               SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_Q_E004, SKERR_Q_E004MSG);
29110 +                       }
29111 +
29112                         return(Rtv);
29113                 }
29114
29115 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/skrlmt.c linux-2.6.9.new/drivers/net/sk98lin/skrlmt.c
29116 --- linux-2.6.9.old/drivers/net/sk98lin/skrlmt.c        2004-10-19 05:54:37.000000000 +0800
29117 +++ linux-2.6.9.new/drivers/net/sk98lin/skrlmt.c        2006-12-07 14:35:03.000000000 +0800
29118 @@ -2,8 +2,8 @@
29119   *
29120   * Name:       skrlmt.c
29121   * Project:    GEnesis, PCI Gigabit Ethernet Adapter
29122 - * Version:    $Revision: 1.69 $
29123 - * Date:       $Date: 2003/04/15 09:39:22 $
29124 + * Version:    $Revision: 2.3 $
29125 + * Date:       $Date: 2005/05/04 09:47:53 $
29126   * Purpose:    Manage links on SK-NET Adapters, esp. redundant ones.
29127   *
29128   ******************************************************************************/
29129 @@ -39,7 +39,7 @@
29130
29131  #ifndef        lint
29132  static const char SysKonnectFileId[] =
29133 -       "@(#) $Id: skrlmt.c,v 1.69 2003/04/15 09:39:22 tschilli Exp $ (C) Marvell.";
29134 +       "@(#) $Id: skrlmt.c,v 2.3 2005/05/04 09:47:53 tschilli Exp $ (C) Marvell.";
29135  #endif /* !defined(lint) */
29136
29137  #define __SKRLMT_C
29138 @@ -350,7 +350,7 @@
29139      SK_BOOL            PhysicalAMacAddressSet;
29140
29141         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_INIT,
29142 -               ("RLMT Init level %d.\n", Level))
29143 +               ("RLMT Init level %d.\n", Level));
29144
29145         switch (Level) {
29146         case SK_INIT_DATA:      /* Initialize data structures. */
29147 @@ -390,7 +390,7 @@
29148
29149         case SK_INIT_IO:        /* GIMacsFound first available here. */
29150                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_INIT,
29151 -                       ("RLMT: %d MACs were detected.\n", pAC->GIni.GIMacsFound))
29152 +                       ("RLMT: %d MACs were detected.\n", pAC->GIni.GIMacsFound));
29153
29154                 pAC->Rlmt.Net[0].NumPorts = pAC->GIni.GIMacsFound;
29155
29156 @@ -512,7 +512,7 @@
29157         }
29158
29159         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29160 -               ("SkRlmtBuildCheckChain.\n"))
29161 +               ("SkRlmtBuildCheckChain.\n"));
29162
29163         NumMacsUp = 0;
29164
29165 @@ -558,7 +558,7 @@
29166                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29167                         ("Port %d checks %d other ports: %2X.\n", i,
29168                                 pAC->Rlmt.Net[NetIdx].Port[i]->PortsChecked,
29169 -                               pAC->Rlmt.Net[NetIdx].Port[i]->PortCheck[0].CheckAddr.a[5]))
29170 +                               pAC->Rlmt.Net[NetIdx].Port[i]->PortCheck[0].CheckAddr.a[5]));
29171         }
29172  #endif /* DEBUG */
29173
29174 @@ -604,7 +604,7 @@
29175         if ((CheckSrc == 0) || (CheckDest == 0)) {
29176                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_ERR,
29177                         ("SkRlmtBuildPacket: Invalid %s%saddr.\n",
29178 -                        (CheckSrc == 0 ? "Src" : ""), (CheckDest == 0 ? "Dest" : "")))
29179 +                        (CheckSrc == 0 ? "Src" : ""), (CheckDest == 0 ? "Dest" : "")));
29180         }
29181  #endif
29182
29183 @@ -796,7 +796,7 @@
29184
29185                         SkEventQueue(pAC, SKGE_DRV, SK_DRV_RLMT_SEND, Para);
29186                         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_TX,
29187 -                               ("SkRlmtSend: BPDU Packet on Port %u.\n", PortNumber))
29188 +                               ("SkRlmtSend: BPDU Packet on Port %u.\n", PortNumber));
29189                 }
29190         }
29191         return;
29192 @@ -835,7 +835,7 @@
29193                  * Bring it up.
29194                  */
29195                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
29196 -                       ("SkRlmtPacketReceive: Received on PortDown.\n"))
29197 +                       ("SkRlmtPacketReceive: Received on PortDown.\n"));
29198
29199                 pRPort->PortState = SK_RLMT_PS_GOING_UP;
29200                 pRPort->GuTimeStamp = SkOsGetTime(pAC);
29201 @@ -849,7 +849,7 @@
29202         }       /* PortDown && !SuspectTx */
29203         else if (pRPort->CheckingState & SK_RLMT_PCS_RX) {
29204                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
29205 -                       ("SkRlmtPacketReceive: Stop bringing port down.\n"))
29206 +                       ("SkRlmtPacketReceive: Stop bringing port down.\n"));
29207                 SkTimerStop(pAC, IoC, &pRPort->DownRxTimer);
29208                 pRPort->CheckingState &= ~SK_RLMT_PCS_RX;
29209                 /* pAC->Rlmt.CheckSwitch = SK_TRUE; */
29210 @@ -896,7 +896,7 @@
29211         pRPort = &pAC->Rlmt.Port[PortNumber];
29212
29213         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
29214 -               ("SkRlmtPacketReceive: PortNumber == %d.\n", PortNumber))
29215 +               ("SkRlmtPacketReceive: PortNumber == %d.\n", PortNumber));
29216
29217         pRPacket = (SK_RLMT_PACKET*)pMb->pData;
29218         pSPacket = (SK_SPTREE_PACKET*)pRPacket;
29219 @@ -917,7 +917,7 @@
29220
29221                 /* Not sent to current MAC or registered MC address => Trash it. */
29222                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
29223 -                       ("SkRlmtPacketReceive: Not for me.\n"))
29224 +                       ("SkRlmtPacketReceive: Not for me.\n"));
29225
29226                 SkDrvFreeRlmtMbuf(pAC, IoC, pMb);
29227                 return;
29228 @@ -955,7 +955,7 @@
29229                         pRPacket->Indicator[5] == SK_RLMT_INDICATOR5 &&
29230                         pRPacket->Indicator[6] == SK_RLMT_INDICATOR6) {
29231                         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
29232 -                               ("SkRlmtPacketReceive: Duplicate MAC Address.\n"))
29233 +                               ("SkRlmtPacketReceive: Duplicate MAC Address.\n"));
29234
29235                         /* Error Log entry. */
29236                         SK_ERR_LOG(pAC, SK_ERRCL_COMM, SKERR_RLMT_E006, SKERR_RLMT_E006_MSG);
29237 @@ -963,7 +963,7 @@
29238                 else {
29239                         /* Simply trash it. */
29240                         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
29241 -                               ("SkRlmtPacketReceive: Sent by me.\n"))
29242 +                               ("SkRlmtPacketReceive: Sent by me.\n"));
29243                 }
29244
29245                 SkDrvFreeRlmtMbuf(pAC, IoC, pMb);
29246 @@ -1007,7 +1007,7 @@
29247  #endif /* 0 */
29248
29249                         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
29250 -                               ("SkRlmtPacketReceive: Announce.\n"))
29251 +                               ("SkRlmtPacketReceive: Announce.\n"));
29252
29253                         SkDrvFreeRlmtMbuf(pAC, IoC, pMb);
29254                         break;
29255 @@ -1015,7 +1015,7 @@
29256                 case SK_PACKET_ALIVE:
29257                         if (pRPacket->SSap & LLC_COMMAND_RESPONSE_BIT) {
29258                                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
29259 -                                       ("SkRlmtPacketReceive: Alive Reply.\n"))
29260 +                                       ("SkRlmtPacketReceive: Alive Reply.\n"));
29261
29262                                 if (!(pAC->Addr.Port[PortNumber].PromMode & SK_PROM_MODE_LLC) ||
29263                                         SK_ADDR_EQUAL(
29264 @@ -1046,7 +1046,7 @@
29265                         }
29266                         else {  /* Alive Request Packet. */
29267                                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
29268 -                                       ("SkRlmtPacketReceive: Alive Request.\n"))
29269 +                                       ("SkRlmtPacketReceive: Alive Request.\n"));
29270
29271                                 pRPort->RxHelloCts++;
29272
29273 @@ -1065,7 +1065,7 @@
29274
29275                 case SK_PACKET_CHECK_TX:
29276                         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
29277 -                               ("SkRlmtPacketReceive: Check your tx line.\n"))
29278 +                               ("SkRlmtPacketReceive: Check your tx line.\n"));
29279
29280                         /* A port checking us requests us to check our tx line. */
29281                         pRPort->CheckingState |= SK_RLMT_PCS_TX;
29282 @@ -1088,7 +1088,7 @@
29283
29284                 case SK_PACKET_ADDR_CHANGED:
29285                         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
29286 -                               ("SkRlmtPacketReceive: Address Change.\n"))
29287 +                               ("SkRlmtPacketReceive: Address Change.\n"));
29288
29289                         /* Build the check chain. */
29290                         SkRlmtBuildCheckChain(pAC, pRPort->Net->NetNumber);
29291 @@ -1097,7 +1097,7 @@
29292
29293                 default:
29294                         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
29295 -                               ("SkRlmtPacketReceive: Unknown RLMT packet.\n"))
29296 +                               ("SkRlmtPacketReceive: Unknown RLMT packet.\n"));
29297
29298                         /* RA;:;: ??? */
29299                         SkDrvFreeRlmtMbuf(pAC, IoC, pMb);
29300 @@ -1107,7 +1107,7 @@
29301                 pSPacket->Ctrl == SK_RLMT_SPT_CTRL &&
29302                 (pSPacket->SSap & ~LLC_COMMAND_RESPONSE_BIT) == SK_RLMT_SPT_SSAP) {
29303                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
29304 -                       ("SkRlmtPacketReceive: BPDU Packet.\n"))
29305 +                       ("SkRlmtPacketReceive: BPDU Packet.\n"));
29306
29307                 /* Spanning Tree packet. */
29308                 pRPort->RxSpHelloCts++;
29309 @@ -1139,7 +1139,7 @@
29310                                         pRPort->Root.Id[0], pRPort->Root.Id[1],
29311                                         pRPort->Root.Id[2], pRPort->Root.Id[3],
29312                                         pRPort->Root.Id[4], pRPort->Root.Id[5],
29313 -                                       pRPort->Root.Id[6], pRPort->Root.Id[7]))
29314 +                                       pRPort->Root.Id[6], pRPort->Root.Id[7]));
29315                 }
29316
29317                 SkDrvFreeRlmtMbuf(pAC, IoC, pMb);
29318 @@ -1150,7 +1150,7 @@
29319         }
29320         else {
29321                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_RX,
29322 -                       ("SkRlmtPacketReceive: Unknown Packet Type.\n"))
29323 +                       ("SkRlmtPacketReceive: Unknown Packet Type.\n"));
29324
29325                 /* Unknown packet. */
29326                 SkDrvFreeRlmtMbuf(pAC, IoC, pMb);
29327 @@ -1232,7 +1232,7 @@
29328         if ((pRPort->PacketsPerTimeSlot - pRPort->BpduPacketsPerTimeSlot) == 0) {
29329                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29330                         ("SkRlmtCheckPort %d: No (%d) receives in last time slot.\n",
29331 -                               PortNumber, pRPort->PacketsPerTimeSlot))
29332 +                               PortNumber, pRPort->PacketsPerTimeSlot));
29333
29334                 /*
29335                  * Check segmentation if there was no receive at least twice
29336 @@ -1249,7 +1249,7 @@
29337
29338                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29339                         ("SkRlmtCheckPort: PortsSuspect %d, PcsRx %d.\n",
29340 -                               pRPort->PortsSuspect, pRPort->CheckingState & SK_RLMT_PCS_RX))
29341 +                               pRPort->PortsSuspect, pRPort->CheckingState & SK_RLMT_PCS_RX));
29342
29343                 if (pRPort->PortState != SK_RLMT_PS_DOWN) {
29344                         NewTimeout = TO_SHORTEN(pAC->Rlmt.Port[PortNumber].Net->TimeoutValue);
29345 @@ -1295,7 +1295,7 @@
29346                         ("SkRlmtCheckPort %d: %d (%d) receives in last time slot.\n",
29347                                 PortNumber,
29348                                 pRPort->PacketsPerTimeSlot - pRPort->BpduPacketsPerTimeSlot,
29349 -                               pRPort->PacketsPerTimeSlot))
29350 +                               pRPort->PacketsPerTimeSlot));
29351
29352                 SkRlmtPortReceives(pAC, IoC, PortNumber);
29353                 if (pAC->Rlmt.CheckSwitch) {
29354 @@ -1345,7 +1345,7 @@
29355                                 i,
29356                                 pAC->Rlmt.Port[i].PortDown, pAC->Rlmt.Port[i].PortNoRx,
29357                                 *((SK_U32*)(&pAC->Rlmt.Port[i].BcTimeStamp) + OFFS_HI32),
29358 -                               *((SK_U32*)(&pAC->Rlmt.Port[i].BcTimeStamp) + OFFS_LO32)))
29359 +                               *((SK_U32*)(&pAC->Rlmt.Port[i].BcTimeStamp) + OFFS_LO32)));
29360
29361                 if (!pAC->Rlmt.Port[i].PortDown && !pAC->Rlmt.Port[i].PortNoRx) {
29362                         if (!PortFound || pAC->Rlmt.Port[i].BcTimeStamp > BcTimeStamp) {
29363 @@ -1358,7 +1358,7 @@
29364
29365         if (PortFound) {
29366                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29367 -                       ("Port %d received the last broadcast.\n", *pSelect))
29368 +                       ("Port %d received the last broadcast.\n", *pSelect));
29369
29370                 /* Look if another port's time stamp is similar. */
29371                 for (i = 0; i < (SK_U32)pAC->GIni.GIMacsFound; i++) {
29372 @@ -1373,7 +1373,7 @@
29373                                 PortFound = SK_FALSE;
29374
29375                                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29376 -                                       ("Port %d received a broadcast at a similar time.\n", i))
29377 +                                       ("Port %d received a broadcast at a similar time.\n", i));
29378                                 break;
29379                         }
29380                 }
29381 @@ -1385,7 +1385,7 @@
29382                         ("SK_RLMT_SELECT_BCRX found Port %d receiving the substantially "
29383                          "latest broadcast (%u).\n",
29384                                 *pSelect,
29385 -                               BcTimeStamp - pAC->Rlmt.Port[1 - *pSelect].BcTimeStamp))
29386 +                               BcTimeStamp - pAC->Rlmt.Port[1 - *pSelect].BcTimeStamp));
29387         }
29388  #endif /* DEBUG */
29389
29390 @@ -1434,7 +1434,7 @@
29391                         PortFound = SK_TRUE;
29392                         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29393                                 ("SK_RLMT_SELECT_NOTSUSPECT found Port %d up and not check RX.\n",
29394 -                                       *pSelect))
29395 +                                       *pSelect));
29396                         break;
29397                 }
29398         }
29399 @@ -1483,7 +1483,7 @@
29400                         }
29401                         PortFound = SK_TRUE;
29402                         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29403 -                               ("SK_RLMT_SELECT_UP found Port %d up.\n", *pSelect))
29404 +                               ("SK_RLMT_SELECT_UP found Port %d up.\n", *pSelect));
29405                         break;
29406                 }
29407         }
29408 @@ -1544,7 +1544,7 @@
29409         }
29410
29411         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29412 -               ("SK_RLMT_SELECT_GOINGUP found Port %d going up.\n", *pSelect))
29413 +               ("SK_RLMT_SELECT_GOINGUP found Port %d going up.\n", *pSelect));
29414         return (SK_TRUE);
29415  }      /* SkRlmtSelectGoingUp */
29416
29417 @@ -1590,7 +1590,7 @@
29418                         }
29419                         PortFound = SK_TRUE;
29420                         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29421 -                               ("SK_RLMT_SELECT_DOWN found Port %d down.\n", *pSelect))
29422 +                               ("SK_RLMT_SELECT_DOWN found Port %d down.\n", *pSelect));
29423                         break;
29424                 }
29425         }
29426 @@ -1680,16 +1680,19 @@
29427                         Para.Para32[1] = NetIdx;
29428                         SkEventQueue(pAC, SKGE_DRV, SK_DRV_NET_UP, Para);
29429
29430 -                       if ((pAC->Rlmt.Net[NetIdx].RlmtMode & SK_RLMT_TRANSPARENT) == 0 &&
29431 -                               (Para.pParaPtr = SkRlmtBuildPacket(pAC, IoC,
29432 -                               pAC->Rlmt.Net[NetIdx].Port[i]->PortNumber,
29433 -                               SK_PACKET_ANNOUNCE, &pAC->Addr.Net[NetIdx].
29434 -                               CurrentMacAddress, &SkRlmtMcAddr)) != NULL) {
29435 -                               /*
29436 -                                * Send announce packet to RLMT multicast address to force
29437 -                                * switches to learn the new location of the logical MAC address.
29438 -                                */
29439 -                               SkEventQueue(pAC, SKGE_DRV, SK_DRV_RLMT_SEND, Para);
29440 +                       if (pAC->Rlmt.NumNets == 1) {
29441 +                               if ((pAC->Rlmt.Net[NetIdx].RlmtMode & SK_RLMT_TRANSPARENT) == 0 &&
29442 +                                       (Para.pParaPtr = SkRlmtBuildPacket(pAC, IoC,
29443 +                                       pAC->Rlmt.Net[NetIdx].Port[i]->PortNumber,
29444 +                                       SK_PACKET_ANNOUNCE, &pAC->Addr.Net[NetIdx].
29445 +                                       CurrentMacAddress, &SkRlmtMcAddr)) != NULL) {
29446 +
29447 +                                       /*
29448 +                                        * Send announce packet to RLMT multicast address to force
29449 +                                        * switches to learn the new location of the logical MAC address.
29450 +                                        */
29451 +                                       SkEventQueue(pAC, SKGE_DRV, SK_DRV_RLMT_SEND, Para);
29452 +                               }
29453                         }
29454                 }
29455                 else {
29456 @@ -1788,7 +1791,7 @@
29457
29458                         if (Para.Para32[1] != Active) {
29459                                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29460 -                                       ("Active: %d, Para1: %d.\n", Active, Para.Para32[1]))
29461 +                                       ("Active: %d, Para1: %d.\n", Active, Para.Para32[1]));
29462                                 pAC->Rlmt.Net[NetIdx].ActivePort = Para.Para32[1];
29463                                 Para.Para32[0] = pAC->Rlmt.Net[NetIdx].
29464                                         Port[Para.Para32[0]]->PortNumber;
29465 @@ -1868,7 +1871,7 @@
29466                                 pNet->Port[i]->Root.Id[0], pNet->Port[i]->Root.Id[1],
29467                                 pNet->Port[i]->Root.Id[2], pNet->Port[i]->Root.Id[3],
29468                                 pNet->Port[i]->Root.Id[4], pNet->Port[i]->Root.Id[5],
29469 -                               pNet->Port[i]->Root.Id[6], pNet->Port[i]->Root.Id[7]))
29470 +                               pNet->Port[i]->Root.Id[6], pNet->Port[i]->Root.Id[7]));
29471
29472                 if (!pNet->RootIdSet) {
29473                         pNet->Root = pNet->Port[i]->Root;
29474 @@ -1963,13 +1966,13 @@
29475         SK_U32                  i;
29476
29477         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29478 -               ("SK_RLMT_PORTSTART_TIMEOUT Port %d Event BEGIN.\n", Para.Para32[0]))
29479 +               ("SK_RLMT_PORTSTART_TIMEOUT Port %d Event BEGIN.\n", Para.Para32[0]));
29480
29481                 if (Para.Para32[1] != (SK_U32)-1) {
29482                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29483 -                       ("Bad Parameter.\n"))
29484 +                       ("Bad Parameter.\n"));
29485                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29486 -                       ("SK_RLMT_PORTSTART_TIMEOUT Event EMPTY.\n"))
29487 +                       ("SK_RLMT_PORTSTART_TIMEOUT Event EMPTY.\n"));
29488                 return;
29489         }
29490
29491 @@ -1990,7 +1993,7 @@
29492         }
29493
29494         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29495 -               ("SK_RLMT_PORTSTART_TIMEOUT Event END.\n"))
29496 +               ("SK_RLMT_PORTSTART_TIMEOUT Event END.\n"));
29497  }      /* SkRlmtEvtPortStartTim */
29498
29499
29500 @@ -2018,21 +2021,21 @@
29501         SK_EVPARA               Para2;
29502
29503         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29504 -               ("SK_RLMT_LINK_UP Port %d Event BEGIN.\n", Para.Para32[0]))
29505 +               ("SK_RLMT_LINK_UP Port %d Event BEGIN.\n", Para.Para32[0]));
29506
29507         pRPort = &pAC->Rlmt.Port[Para.Para32[0]];
29508         if (!pRPort->PortStarted) {
29509                 SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_RLMT_E008, SKERR_RLMT_E008_MSG);
29510
29511                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29512 -                               ("SK_RLMT_LINK_UP Event EMPTY.\n"))
29513 +                               ("SK_RLMT_LINK_UP Event EMPTY.\n"));
29514                 return;
29515         }
29516
29517         if (!pRPort->LinkDown) {
29518                 /* RA;:;: Any better solution? */
29519                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29520 -                       ("SK_RLMT_LINK_UP Event EMPTY.\n"))
29521 +                       ("SK_RLMT_LINK_UP Event EMPTY.\n"));
29522                 return;
29523         }
29524
29525 @@ -2082,16 +2085,19 @@
29526         Para2.Para32[1] = (SK_U32)-1;
29527         SkTimerStart(pAC, IoC, &pRPort->UpTimer, SK_RLMT_PORTUP_TIM_VAL,
29528                 SKGE_RLMT, SK_RLMT_PORTUP_TIM, Para2);
29529 -
29530 +
29531         /* Later: if (pAC->Rlmt.RlmtMode & SK_RLMT_CHECK_LOC_LINK) && */
29532 -       if ((pRPort->Net->RlmtMode & SK_RLMT_TRANSPARENT) == 0 &&
29533 -               (pRPort->Net->RlmtMode & SK_RLMT_CHECK_LINK) != 0 &&
29534 -               (Para2.pParaPtr =
29535 -                       SkRlmtBuildPacket(pAC, IoC, Para.Para32[0], SK_PACKET_ANNOUNCE,
29536 -                       &pAC->Addr.Port[Para.Para32[0]].CurrentMacAddress, &SkRlmtMcAddr)
29537 -               ) != NULL) {
29538 -               /* Send "new" packet to RLMT multicast address. */
29539 -               SkEventQueue(pAC, SKGE_DRV, SK_DRV_RLMT_SEND, Para2);
29540 +       if (pAC->Rlmt.NumNets == 1) {
29541 +               if ((pRPort->Net->RlmtMode & SK_RLMT_TRANSPARENT) == 0 &&
29542 +                       (pRPort->Net->RlmtMode & SK_RLMT_CHECK_LINK) != 0 &&
29543 +                       (Para2.pParaPtr =
29544 +                               SkRlmtBuildPacket(pAC, IoC, Para.Para32[0], SK_PACKET_ANNOUNCE,
29545 +                               &pAC->Addr.Port[Para.Para32[0]].CurrentMacAddress, &SkRlmtMcAddr)
29546 +                       ) != NULL) {
29547 +
29548 +                       /* Send "new" packet to RLMT multicast address. */
29549 +                       SkEventQueue(pAC, SKGE_DRV, SK_DRV_RLMT_SEND, Para2);
29550 +               }
29551         }
29552
29553         if (pRPort->Net->RlmtMode & SK_RLMT_CHECK_SEG) {
29554 @@ -2110,7 +2116,7 @@
29555         }
29556
29557         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29558 -               ("SK_RLMT_LINK_UP Event END.\n"))
29559 +               ("SK_RLMT_LINK_UP Event END.\n"));
29560  }      /* SkRlmtEvtLinkUp */
29561
29562
29563 @@ -2136,20 +2142,20 @@
29564         SK_RLMT_PORT    *pRPort;
29565
29566         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29567 -               ("SK_RLMT_PORTUP_TIM Port %d Event BEGIN.\n", Para.Para32[0]))
29568 +               ("SK_RLMT_PORTUP_TIM Port %d Event BEGIN.\n", Para.Para32[0]));
29569
29570         if (Para.Para32[1] != (SK_U32)-1) {
29571                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29572 -                       ("Bad Parameter.\n"))
29573 +                       ("Bad Parameter.\n"));
29574                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29575 -                       ("SK_RLMT_PORTUP_TIM Event EMPTY.\n"))
29576 +                       ("SK_RLMT_PORTUP_TIM Event EMPTY.\n"));
29577                 return;
29578         }
29579
29580         pRPort = &pAC->Rlmt.Port[Para.Para32[0]];
29581         if (pRPort->LinkDown || (pRPort->PortState == SK_RLMT_PS_UP)) {
29582                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29583 -                       ("SK_RLMT_PORTUP_TIM Port %d Event EMPTY.\n", Para.Para32[0]))
29584 +                       ("SK_RLMT_PORTUP_TIM Port %d Event EMPTY.\n", Para.Para32[0]));
29585                 return;
29586         }
29587
29588 @@ -2164,7 +2170,7 @@
29589         }
29590
29591         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29592 -               ("SK_RLMT_PORTUP_TIM Event END.\n"))
29593 +               ("SK_RLMT_PORTUP_TIM Event END.\n"));
29594  }      /* SkRlmtEvtPortUpTim */
29595
29596
29597 @@ -2192,13 +2198,13 @@
29598
29599         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29600                 ("SK_RLMT_PORTDOWN* Port %d Event (%d) BEGIN.\n",
29601 -                       Para.Para32[0], Event))
29602 +                       Para.Para32[0], Event));
29603
29604         if (Para.Para32[1] != (SK_U32)-1) {
29605                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29606 -                       ("Bad Parameter.\n"))
29607 +                       ("Bad Parameter.\n"));
29608                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29609 -                       ("SK_RLMT_PORTDOWN* Event EMPTY.\n"))
29610 +                       ("SK_RLMT_PORTDOWN* Event EMPTY.\n"));
29611                 return;
29612         }
29613
29614 @@ -2206,7 +2212,7 @@
29615         if (!pRPort->PortStarted || (Event == SK_RLMT_PORTDOWN_TX_TIM &&
29616                 !(pRPort->CheckingState & SK_RLMT_PCS_TX))) {
29617                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29618 -                       ("SK_RLMT_PORTDOWN* Event (%d) EMPTY.\n", Event))
29619 +                       ("SK_RLMT_PORTDOWN* Event (%d) EMPTY.\n", Event));
29620                 return;
29621         }
29622
29623 @@ -2243,7 +2249,7 @@
29624         }
29625
29626         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29627 -               ("SK_RLMT_PORTDOWN* Event (%d) END.\n", Event))
29628 +               ("SK_RLMT_PORTDOWN* Event (%d) END.\n", Event));
29629  }      /* SkRlmtEvtPortDownX */
29630
29631
29632 @@ -2270,7 +2276,7 @@
29633
29634         pRPort = &pAC->Rlmt.Port[Para.Para32[0]];
29635         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29636 -               ("SK_RLMT_LINK_DOWN Port %d Event BEGIN.\n", Para.Para32[0]))
29637 +               ("SK_RLMT_LINK_DOWN Port %d Event BEGIN.\n", Para.Para32[0]));
29638
29639         if (!pAC->Rlmt.Port[Para.Para32[0]].LinkDown) {
29640                 pRPort->Net->LinksUp--;
29641 @@ -2289,7 +2295,7 @@
29642         }
29643
29644         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29645 -               ("SK_RLMT_LINK_DOWN Event END.\n"))
29646 +               ("SK_RLMT_LINK_DOWN Event END.\n"));
29647  }      /* SkRlmtEvtLinkDown */
29648
29649
29650 @@ -2318,13 +2324,13 @@
29651         SK_MAC_ADDR             *pNewMacAddr;
29652
29653         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29654 -               ("SK_RLMT_PORT_ADDR Port %d Event BEGIN.\n", Para.Para32[0]))
29655 +               ("SK_RLMT_PORT_ADDR Port %d Event BEGIN.\n", Para.Para32[0]));
29656
29657         if (Para.Para32[1] != (SK_U32)-1) {
29658                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29659 -                       ("Bad Parameter.\n"))
29660 +                       ("Bad Parameter.\n"));
29661                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29662 -                       ("SK_RLMT_PORT_ADDR Event EMPTY.\n"))
29663 +                       ("SK_RLMT_PORT_ADDR Event EMPTY.\n"));
29664                 return;
29665         }
29666
29667 @@ -2348,7 +2354,7 @@
29668         }
29669
29670         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29671 -                       ("SK_RLMT_PORT_ADDR Event END.\n"))
29672 +                       ("SK_RLMT_PORT_ADDR Event END.\n"));
29673  }      /* SkRlmtEvtPortAddr */
29674
29675
29676 @@ -2376,35 +2382,35 @@
29677         SK_U32          PortNumber;
29678
29679         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29680 -               ("SK_RLMT_START Net %d Event BEGIN.\n", Para.Para32[0]))
29681 +               ("SK_RLMT_START Net %d Event BEGIN.\n", Para.Para32[0]));
29682
29683         if (Para.Para32[1] != (SK_U32)-1) {
29684                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29685 -                       ("Bad Parameter.\n"))
29686 +                       ("Bad Parameter.\n"));
29687                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29688 -                       ("SK_RLMT_START Event EMPTY.\n"))
29689 +                       ("SK_RLMT_START Event EMPTY.\n"));
29690                 return;
29691         }
29692
29693         if (Para.Para32[0] >= pAC->Rlmt.NumNets) {
29694                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29695 -                       ("Bad NetNumber %d.\n", Para.Para32[0]))
29696 +                       ("Bad NetNumber %d.\n", Para.Para32[0]));
29697                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29698 -                       ("SK_RLMT_START Event EMPTY.\n"))
29699 +                       ("SK_RLMT_START Event EMPTY.\n"));
29700                 return;
29701         }
29702
29703         if (pAC->Rlmt.Net[Para.Para32[0]].RlmtState != SK_RLMT_RS_INIT) {
29704                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29705 -                       ("SK_RLMT_START Event EMPTY.\n"))
29706 +                       ("SK_RLMT_START Event EMPTY.\n"));
29707                 return;
29708         }
29709
29710         if (pAC->Rlmt.NetsStarted >= pAC->Rlmt.NumNets) {
29711                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29712 -                       ("All nets should have been started.\n"))
29713 +                       ("All nets should have been started.\n"));
29714                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29715 -                       ("SK_RLMT_START Event EMPTY.\n"))
29716 +                       ("SK_RLMT_START Event EMPTY.\n"));
29717                 return;
29718         }
29719
29720 @@ -2438,7 +2444,7 @@
29721         pAC->Rlmt.NetsStarted++;
29722
29723         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29724 -                       ("SK_RLMT_START Event END.\n"))
29725 +                       ("SK_RLMT_START Event END.\n"));
29726  }      /* SkRlmtEvtStart */
29727
29728
29729 @@ -2466,35 +2472,35 @@
29730         SK_U32          i;
29731
29732         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29733 -               ("SK_RLMT_STOP Net %d Event BEGIN.\n", Para.Para32[0]))
29734 +               ("SK_RLMT_STOP Net %d Event BEGIN.\n", Para.Para32[0]));
29735
29736         if (Para.Para32[1] != (SK_U32)-1) {
29737                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29738 -                       ("Bad Parameter.\n"))
29739 +                       ("Bad Parameter.\n"));
29740                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29741 -                       ("SK_RLMT_STOP Event EMPTY.\n"))
29742 +                       ("SK_RLMT_STOP Event EMPTY.\n"));
29743                 return;
29744         }
29745
29746         if (Para.Para32[0] >= pAC->Rlmt.NumNets) {
29747                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29748 -                       ("Bad NetNumber %d.\n", Para.Para32[0]))
29749 +                       ("Bad NetNumber %d.\n", Para.Para32[0]));
29750                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29751 -                       ("SK_RLMT_STOP Event EMPTY.\n"))
29752 +                       ("SK_RLMT_STOP Event EMPTY.\n"));
29753                 return;
29754         }
29755
29756         if (pAC->Rlmt.Net[Para.Para32[0]].RlmtState == SK_RLMT_RS_INIT) {
29757                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29758 -                       ("SK_RLMT_STOP Event EMPTY.\n"))
29759 +                       ("SK_RLMT_STOP Event EMPTY.\n"));
29760                 return;
29761         }
29762
29763         if (pAC->Rlmt.NetsStarted == 0) {
29764                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29765 -                       ("All nets are stopped.\n"))
29766 +                       ("All nets are stopped.\n"));
29767                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29768 -                       ("SK_RLMT_STOP Event EMPTY.\n"))
29769 +                       ("SK_RLMT_STOP Event EMPTY.\n"));
29770                 return;
29771         }
29772
29773 @@ -2529,7 +2535,7 @@
29774         pAC->Rlmt.NetsStarted--;
29775
29776         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29777 -               ("SK_RLMT_STOP Event END.\n"))
29778 +               ("SK_RLMT_STOP Event END.\n"));
29779  }      /* SkRlmtEvtStop */
29780
29781
29782 @@ -2559,13 +2565,13 @@
29783         SK_U32                  i;
29784
29785         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29786 -               ("SK_RLMT_TIM Event BEGIN.\n"))
29787 +               ("SK_RLMT_TIM Event BEGIN.\n"));
29788
29789         if (Para.Para32[1] != (SK_U32)-1) {
29790                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29791 -                       ("Bad Parameter.\n"))
29792 +                       ("Bad Parameter.\n"));
29793                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29794 -                       ("SK_RLMT_TIM Event EMPTY.\n"))
29795 +                       ("SK_RLMT_TIM Event EMPTY.\n"));
29796                 return;
29797         }
29798
29799 @@ -2637,7 +2643,7 @@
29800         }
29801
29802         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29803 -                       ("SK_RLMT_TIM Event END.\n"))
29804 +                       ("SK_RLMT_TIM Event END.\n"));
29805  }      /* SkRlmtEvtTim */
29806
29807
29808 @@ -2665,13 +2671,13 @@
29809  #endif /* DEBUG */
29810
29811         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29812 -               ("SK_RLMT_SEG_TIM Event BEGIN.\n"))
29813 +               ("SK_RLMT_SEG_TIM Event BEGIN.\n"));
29814
29815         if (Para.Para32[1] != (SK_U32)-1) {
29816                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29817 -                       ("Bad Parameter.\n"))
29818 +                       ("Bad Parameter.\n"));
29819                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29820 -                       ("SK_RLMT_SEG_TIM Event EMPTY.\n"))
29821 +                       ("SK_RLMT_SEG_TIM Event EMPTY.\n"));
29822                 return;
29823         }
29824
29825 @@ -2695,7 +2701,7 @@
29826                                         InAddr8[3], InAddr8[4], InAddr8[5],
29827                                         pAPort->Exact[k].a[0], pAPort->Exact[k].a[1],
29828                                         pAPort->Exact[k].a[2], pAPort->Exact[k].a[3],
29829 -                                       pAPort->Exact[k].a[4], pAPort->Exact[k].a[5]))
29830 +                                       pAPort->Exact[k].a[4], pAPort->Exact[k].a[5]));
29831                 }
29832         }
29833  #endif /* xDEBUG */
29834 @@ -2703,7 +2709,7 @@
29835         SkRlmtCheckSeg(pAC, IoC, Para.Para32[0]);
29836
29837         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29838 -                       ("SK_RLMT_SEG_TIM Event END.\n"))
29839 +                       ("SK_RLMT_SEG_TIM Event END.\n"));
29840  }      /* SkRlmtEvtSegTim */
29841
29842
29843 @@ -2732,18 +2738,18 @@
29844
29845
29846         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29847 -               ("SK_RLMT_PACKET_RECEIVED Event BEGIN.\n"))
29848 +               ("SK_RLMT_PACKET_RECEIVED Event BEGIN.\n"));
29849
29850         /* Should we ignore frames during port switching? */
29851
29852  #ifdef DEBUG
29853         pMb = Para.pParaPtr;
29854         if (pMb == NULL) {
29855 -               SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL, ("No mbuf.\n"))
29856 +               SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL, ("No mbuf.\n"));
29857         }
29858         else if (pMb->pNext != NULL) {
29859                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29860 -                       ("More than one mbuf or pMb->pNext not set.\n"))
29861 +                       ("More than one mbuf or pMb->pNext not set.\n"));
29862         }
29863  #endif /* DEBUG */
29864
29865 @@ -2761,7 +2767,7 @@
29866         }
29867
29868         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29869 -               ("SK_RLMT_PACKET_RECEIVED Event END.\n"))
29870 +               ("SK_RLMT_PACKET_RECEIVED Event END.\n"));
29871  }      /* SkRlmtEvtPacketRx */
29872
29873
29874 @@ -2788,21 +2794,21 @@
29875         SK_RLMT_PORT    *pRPort;
29876
29877         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29878 -               ("SK_RLMT_STATS_CLEAR Event BEGIN.\n"))
29879 +               ("SK_RLMT_STATS_CLEAR Event BEGIN.\n"));
29880
29881         if (Para.Para32[1] != (SK_U32)-1) {
29882                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29883 -                       ("Bad Parameter.\n"))
29884 +                       ("Bad Parameter.\n"));
29885                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29886 -                       ("SK_RLMT_STATS_CLEAR Event EMPTY.\n"))
29887 +                       ("SK_RLMT_STATS_CLEAR Event EMPTY.\n"));
29888                 return;
29889         }
29890
29891         if (Para.Para32[0] >= pAC->Rlmt.NumNets) {
29892                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29893 -                       ("Bad NetNumber %d.\n", Para.Para32[0]))
29894 +                       ("Bad NetNumber %d.\n", Para.Para32[0]));
29895                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29896 -                       ("SK_RLMT_STATS_CLEAR Event EMPTY.\n"))
29897 +                       ("SK_RLMT_STATS_CLEAR Event EMPTY.\n"));
29898                 return;
29899         }
29900
29901 @@ -2817,7 +2823,7 @@
29902         }
29903
29904         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29905 -               ("SK_RLMT_STATS_CLEAR Event END.\n"))
29906 +               ("SK_RLMT_STATS_CLEAR Event END.\n"));
29907  }      /* SkRlmtEvtStatsClear */
29908
29909
29910 @@ -2841,28 +2847,28 @@
29911  SK_EVPARA      Para)   /* SK_U32 NetNumber; SK_U32 -1 */
29912  {
29913         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29914 -               ("SK_RLMT_STATS_UPDATE Event BEGIN.\n"))
29915 +               ("SK_RLMT_STATS_UPDATE Event BEGIN.\n"));
29916
29917         if (Para.Para32[1] != (SK_U32)-1) {
29918                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29919 -                       ("Bad Parameter.\n"))
29920 +                       ("Bad Parameter.\n"));
29921                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29922 -                       ("SK_RLMT_STATS_UPDATE Event EMPTY.\n"))
29923 +                       ("SK_RLMT_STATS_UPDATE Event EMPTY.\n"));
29924                 return;
29925         }
29926
29927         if (Para.Para32[0] >= pAC->Rlmt.NumNets) {
29928                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29929 -                       ("Bad NetNumber %d.\n", Para.Para32[0]))
29930 +                       ("Bad NetNumber %d.\n", Para.Para32[0]));
29931                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29932 -                       ("SK_RLMT_STATS_UPDATE Event EMPTY.\n"))
29933 +                       ("SK_RLMT_STATS_UPDATE Event EMPTY.\n"));
29934                 return;
29935         }
29936
29937         /* Update statistics - currently always up-to-date. */
29938
29939         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29940 -               ("SK_RLMT_STATS_UPDATE Event END.\n"))
29941 +               ("SK_RLMT_STATS_UPDATE Event END.\n"));
29942  }      /* SkRlmtEvtStatsUpdate */
29943
29944
29945 @@ -2886,13 +2892,13 @@
29946  SK_EVPARA      Para)   /* SK_U32 PortIndex; SK_U32 NetNumber */
29947  {
29948         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29949 -               ("SK_RLMT_PREFPORT_CHANGE to Port %d Event BEGIN.\n", Para.Para32[0]))
29950 +               ("SK_RLMT_PREFPORT_CHANGE to Port %d Event BEGIN.\n", Para.Para32[0]));
29951
29952         if (Para.Para32[1] >= pAC->Rlmt.NumNets) {
29953                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29954 -                       ("Bad NetNumber %d.\n", Para.Para32[1]))
29955 +                       ("Bad NetNumber %d.\n", Para.Para32[1]));
29956                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29957 -                       ("SK_RLMT_PREFPORT_CHANGE Event EMPTY.\n"))
29958 +                       ("SK_RLMT_PREFPORT_CHANGE Event EMPTY.\n"));
29959                 return;
29960         }
29961
29962 @@ -2905,7 +2911,7 @@
29963                         SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_RLMT_E010, SKERR_RLMT_E010_MSG);
29964
29965                         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29966 -                               ("SK_RLMT_PREFPORT_CHANGE Event EMPTY.\n"))
29967 +                               ("SK_RLMT_PREFPORT_CHANGE Event EMPTY.\n"));
29968                         return;
29969                 }
29970
29971 @@ -2919,7 +2925,7 @@
29972         }
29973
29974         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29975 -               ("SK_RLMT_PREFPORT_CHANGE Event END.\n"))
29976 +               ("SK_RLMT_PREFPORT_CHANGE Event END.\n"));
29977  }      /* SkRlmtEvtPrefportChange */
29978
29979
29980 @@ -2945,37 +2951,37 @@
29981         int i;
29982
29983         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29984 -               ("SK_RLMT_SET_NETS Event BEGIN.\n"))
29985 +               ("SK_RLMT_SET_NETS Event BEGIN.\n"));
29986
29987         if (Para.Para32[1] != (SK_U32)-1) {
29988                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29989 -                       ("Bad Parameter.\n"))
29990 +                       ("Bad Parameter.\n"));
29991                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
29992 -                       ("SK_RLMT_SET_NETS Event EMPTY.\n"))
29993 +                       ("SK_RLMT_SET_NETS Event EMPTY.\n"));
29994                 return;
29995         }
29996
29997         if (Para.Para32[0] == 0 || Para.Para32[0] > SK_MAX_NETS ||
29998                 Para.Para32[0] > (SK_U32)pAC->GIni.GIMacsFound) {
29999                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
30000 -                       ("Bad number of nets: %d.\n", Para.Para32[0]))
30001 +                       ("Bad number of nets: %d.\n", Para.Para32[0]));
30002                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
30003 -                       ("SK_RLMT_SET_NETS Event EMPTY.\n"))
30004 +                       ("SK_RLMT_SET_NETS Event EMPTY.\n"));
30005                 return;
30006         }
30007
30008         if (Para.Para32[0] == pAC->Rlmt.NumNets) {      /* No change. */
30009                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
30010 -                       ("SK_RLMT_SET_NETS Event EMPTY.\n"))
30011 +                       ("SK_RLMT_SET_NETS Event EMPTY.\n"));
30012                 return;
30013         }
30014
30015         /* Entering and leaving dual mode only allowed while nets are stopped. */
30016         if (pAC->Rlmt.NetsStarted > 0) {
30017                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
30018 -                       ("Changing dual mode only allowed while all nets are stopped.\n"))
30019 +                       ("Changing dual mode only allowed while all nets are stopped.\n"));
30020                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
30021 -                       ("SK_RLMT_SET_NETS Event EMPTY.\n"))
30022 +                       ("SK_RLMT_SET_NETS Event EMPTY.\n"));
30023                 return;
30024         }
30025
30026 @@ -3006,9 +3012,10 @@
30027                 SkEventQueue(pAC, SKGE_PNMI, SK_PNMI_EVT_RLMT_SET_NETS, Para);
30028
30029                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
30030 -                       ("RLMT: Changed to one net with two ports.\n"))
30031 +                       ("RLMT: Changed to one net with two ports.\n"));
30032         }
30033         else if (Para.Para32[0] == 2) {
30034 +               pAC->Rlmt.RlmtOff = SK_TRUE;
30035                 pAC->Rlmt.Port[1].Net= &pAC->Rlmt.Net[1];
30036                 pAC->Rlmt.Net[1].NumPorts = pAC->GIni.GIMacsFound - 1;
30037                 pAC->Rlmt.Net[0].NumPorts =
30038 @@ -3035,19 +3042,19 @@
30039                 SkEventQueue(pAC, SKGE_PNMI, SK_PNMI_EVT_RLMT_SET_NETS, Para);
30040
30041                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
30042 -                       ("RLMT: Changed to two nets with one port each.\n"))
30043 +                       ("RLMT: Changed to two nets with one port each.\n"));
30044         }
30045         else {
30046                 /* Not implemented for more than two nets. */
30047                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
30048 -                       ("SetNets not implemented for more than two nets.\n"))
30049 +                       ("SetNets not implemented for more than two nets.\n"));
30050                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
30051 -                       ("SK_RLMT_SET_NETS Event EMPTY.\n"))
30052 +                       ("SK_RLMT_SET_NETS Event EMPTY.\n"));
30053                 return;
30054         }
30055
30056         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
30057 -               ("SK_RLMT_SET_NETS Event END.\n"))
30058 +               ("SK_RLMT_SET_NETS Event END.\n"));
30059  }      /* SkRlmtSetNets */
30060
30061
30062 @@ -3075,13 +3082,13 @@
30063         SK_U32          PrevRlmtMode;
30064
30065         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
30066 -               ("SK_RLMT_MODE_CHANGE Event BEGIN.\n"))
30067 +               ("SK_RLMT_MODE_CHANGE Event BEGIN.\n"));
30068
30069         if (Para.Para32[1] >= pAC->Rlmt.NumNets) {
30070                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
30071 -                       ("Bad NetNumber %d.\n", Para.Para32[1]))
30072 +                       ("Bad NetNumber %d.\n", Para.Para32[1]));
30073                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
30074 -                       ("SK_RLMT_MODE_CHANGE Event EMPTY.\n"))
30075 +                       ("SK_RLMT_MODE_CHANGE Event EMPTY.\n"));
30076                 return;
30077         }
30078
30079 @@ -3091,9 +3098,9 @@
30080                 Para.Para32[0] != SK_RLMT_MODE_CLS) {
30081                 pAC->Rlmt.Net[Para.Para32[1]].RlmtMode = SK_RLMT_MODE_CLS;
30082                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
30083 -                       ("Forced RLMT mode to CLS on single port net.\n"))
30084 +                       ("Forced RLMT mode to CLS on single port net.\n"));
30085                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
30086 -                       ("SK_RLMT_MODE_CHANGE Event EMPTY.\n"))
30087 +                       ("SK_RLMT_MODE_CHANGE Event EMPTY.\n"));
30088                 return;
30089         }
30090
30091 @@ -3159,7 +3166,7 @@
30092         }       /* SK_RLMT_CHECK_SEG bit changed. */
30093
30094         SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
30095 -                       ("SK_RLMT_MODE_CHANGE Event END.\n"))
30096 +                       ("SK_RLMT_MODE_CHANGE Event END.\n"));
30097  }      /* SkRlmtEvtModeChange */
30098
30099
30100 @@ -3245,7 +3252,7 @@
30101
30102         default:        /* Create error log entry. */
30103                 SK_DBG_MSG(pAC, SK_DBGMOD_RLMT, SK_DBGCAT_CTRL,
30104 -                       ("Unknown RLMT Event %d.\n", Event))
30105 +                       ("Unknown RLMT Event %d.\n", Event));
30106                 SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_RLMT_E003, SKERR_RLMT_E003_MSG);
30107                 break;
30108         }       /* switch() */
30109 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/sktimer.c linux-2.6.9.new/drivers/net/sk98lin/sktimer.c
30110 --- linux-2.6.9.old/drivers/net/sk98lin/sktimer.c       2004-10-19 05:53:13.000000000 +0800
30111 +++ linux-2.6.9.new/drivers/net/sk98lin/sktimer.c       2006-12-07 14:35:03.000000000 +0800
30112 @@ -2,8 +2,8 @@
30113   *
30114   * Name:       sktimer.c
30115   * Project:    Gigabit Ethernet Adapters, Event Scheduler Module
30116 - * Version:    $Revision: 1.14 $
30117 - * Date:       $Date: 2003/09/16 13:46:51 $
30118 + * Version:    $Revision: 2.2 $
30119 + * Date:       $Date: 2004/05/28 13:44:39 $
30120   * Purpose:    High level timer functions.
30121   *
30122   ******************************************************************************/
30123 @@ -11,7 +11,7 @@
30124  /******************************************************************************
30125   *
30126   *     (C)Copyright 1998-2002 SysKonnect GmbH.
30127 - *     (C)Copyright 2002-2003 Marvell.
30128 + *     (C)Copyright 2002-2004 Marvell.
30129   *
30130   *     This program is free software; you can redistribute it and/or modify
30131   *     it under the terms of the GNU General Public License as published by
30132 @@ -22,13 +22,12 @@
30133   *
30134   ******************************************************************************/
30135
30136 -
30137  /*
30138   *     Event queue and dispatcher
30139   */
30140  #if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
30141  static const char SysKonnectFileId[] =
30142 -       "@(#) $Id: sktimer.c,v 1.14 2003/09/16 13:46:51 rschmidt Exp $ (C) Marvell.";
30143 +       "@(#) $Id: sktimer.c,v 2.2 2004/05/28 13:44:39 rschmidt Exp $ (C) Marvell.";
30144  #endif
30145
30146  #include "h/skdrv1st.h"                /* Driver Specific Definitions */
30147 @@ -62,7 +61,7 @@
30148  {
30149         switch (Level) {
30150         case SK_INIT_DATA:
30151 -               pAC->Tim.StQueue = NULL;
30152 +               pAC->Tim.StQueue = 0;
30153                 break;
30154         case SK_INIT_IO:
30155                 SkHwtInit(pAC, Ioc);
30156 @@ -85,22 +84,20 @@
30157         SK_TIMER        **ppTimPrev;
30158         SK_TIMER        *pTm;
30159
30160 -       /*
30161 -        * remove timer from queue
30162 -        */
30163 +       /* remove timer from queue */
30164         pTimer->TmActive = SK_FALSE;
30165 -
30166 +
30167         if (pAC->Tim.StQueue == pTimer && !pTimer->TmNext) {
30168                 SkHwtStop(pAC, Ioc);
30169         }
30170 -
30171 +
30172         for (ppTimPrev = &pAC->Tim.StQueue; (pTm = *ppTimPrev);
30173                 ppTimPrev = &pTm->TmNext ) {
30174 -
30175 +
30176                 if (pTm == pTimer) {
30177                         /*
30178                          * Timer found in queue
30179 -                        * - dequeue it and
30180 +                        * - dequeue it
30181                          * - correct delta of the next timer
30182                          */
30183                         *ppTimPrev = pTm->TmNext;
30184 @@ -121,7 +118,7 @@
30185  SK_AC          *pAC,           /* Adapters context */
30186  SK_IOC         Ioc,            /* IoContext */
30187  SK_TIMER       *pTimer,        /* Timer Pointer to be started */
30188 -SK_U32         Time,           /* Time value */
30189 +SK_U32         Time,           /* Time Value (in microsec.) */
30190  SK_U32         Class,          /* Event Class for this timer */
30191  SK_U32         Event,          /* Event Value for this timer */
30192  SK_EVPARA      Para)           /* Event Parameter for this timer */
30193 @@ -130,11 +127,6 @@
30194         SK_TIMER        *pTm;
30195         SK_U32          Delta;
30196
30197 -       Time /= 16;             /* input is uS, clock ticks are 16uS */
30198 -
30199 -       if (!Time)
30200 -               Time = 1;
30201 -
30202         SkTimerStop(pAC, Ioc, pTimer);
30203
30204         pTimer->TmClass = Class;
30205 @@ -143,31 +135,26 @@
30206         pTimer->TmActive = SK_TRUE;
30207
30208         if (!pAC->Tim.StQueue) {
30209 -               /* First Timer to be started */
30210 +               /* first Timer to be started */
30211                 pAC->Tim.StQueue = pTimer;
30212 -               pTimer->TmNext = NULL;
30213 +               pTimer->TmNext = 0;
30214                 pTimer->TmDelta = Time;
30215 -
30216 +
30217                 SkHwtStart(pAC, Ioc, Time);
30218 -
30219 +
30220                 return;
30221         }
30222
30223 -       /*
30224 -        * timer correction
30225 -        */
30226 +       /* timer correction */
30227         timer_done(pAC, Ioc, 0);
30228
30229 -       /*
30230 -        * find position in queue
30231 -        */
30232 +       /* find position in queue */
30233         Delta = 0;
30234         for (ppTimPrev = &pAC->Tim.StQueue; (pTm = *ppTimPrev);
30235                 ppTimPrev = &pTm->TmNext ) {
30236 -
30237 +
30238                 if (Delta + pTm->TmDelta > Time) {
30239 -                       /* Position found */
30240 -                       /* Here the timer needs to be inserted. */
30241 +                       /* the timer needs to be inserted here */
30242                         break;
30243                 }
30244                 Delta += pTm->TmDelta;
30245 @@ -179,9 +166,7 @@
30246         pTimer->TmDelta = Time - Delta;
30247
30248         if (pTm) {
30249 -               /* There is a next timer
30250 -                * -> correct its Delta value.
30251 -                */
30252 +               /* there is a next timer:  correct its Delta value */
30253                 pTm->TmDelta -= pTimer->TmDelta;
30254         }
30255
30256 @@ -210,7 +195,7 @@
30257         int             Done = 0;
30258
30259         Delta = SkHwtRead(pAC, Ioc);
30260 -
30261 +
30262         ppLast = &pAC->Tim.StQueue;
30263         pTm = pAC->Tim.StQueue;
30264         while (pTm && !Done) {
30265 @@ -228,13 +213,13 @@
30266                         Done = 1;
30267                 }
30268         }
30269 -       *ppLast = NULL;
30270 +       *ppLast = 0;
30271         /*
30272          * pTm points to the first Timer that did not run out.
30273          * StQueue points to the first Timer that run out.
30274          */
30275
30276 -       for ( pTComp = pAC->Tim.StQueue; pTComp; pTComp = pTComp->TmNext) {
30277 +       for (pTComp = pAC->Tim.StQueue; pTComp; pTComp = pTComp->TmNext) {
30278                 SkEventQueue(pAC,pTComp->TmClass, pTComp->TmEvent, pTComp->TmPara);
30279         }
30280
30281 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/sktwsi.c linux-2.6.9.new/drivers/net/sk98lin/sktwsi.c
30282 --- linux-2.6.9.old/drivers/net/sk98lin/sktwsi.c        1970-01-01 08:00:00.000000000 +0800
30283 +++ linux-2.6.9.new/drivers/net/sk98lin/sktwsi.c        2006-12-07 14:35:03.000000000 +0800
30284 @@ -0,0 +1,1355 @@
30285 +/******************************************************************************
30286 + *
30287 + * Name:       sktwsi.c
30288 + * Project:    Gigabit Ethernet Adapters, TWSI-Module
30289 + * Version:    $Revision: 1.9 $
30290 + * Date:       $Date: 2004/12/20 15:10:30 $
30291 + * Purpose:    Functions to access Voltage and Temperature Sensor
30292 + *
30293 + ******************************************************************************/
30294 +
30295 +/******************************************************************************
30296 + *
30297 + *     (C)Copyright 1998-2002 SysKonnect.
30298 + *     (C)Copyright 2002-2004 Marvell.
30299 + *
30300 + *     This program is free software; you can redistribute it and/or modify
30301 + *     it under the terms of the GNU General Public License as published by
30302 + *     the Free Software Foundation; either version 2 of the License, or
30303 + *     (at your option) any later version.
30304 + *     The information in this file is provided "AS IS" without warranty.
30305 + *
30306 + ******************************************************************************/
30307 +
30308 +/*
30309 + *     TWSI Protocol
30310 + */
30311 +#if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
30312 +static const char SysKonnectFileId[] =
30313 +       "@(#) $Id: sktwsi.c,v 1.9 2004/12/20 15:10:30 rschmidt Exp $ (C) Marvell.";
30314 +#endif
30315 +
30316 +#include "h/skdrv1st.h"                /* Driver Specific Definitions */
30317 +#include "h/lm80.h"
30318 +#include "h/skdrv2nd.h"                /* Adapter Control- and Driver specific Def. */
30319 +
30320 +#ifdef __C2MAN__
30321 +/*
30322 +       TWSI protocol implementation.
30323 +
30324 +       General Description:
30325 +
30326 +       The TWSI protocol is used for the temperature sensors and for
30327 +       the serial EEPROM which hold the configuration.
30328 +
30329 +       This file covers functions that allow to read write and do
30330 +       some bulk requests a specified TWSI address.
30331 +
30332 +       The Genesis has 2 TWSI buses. One for the EEPROM which holds
30333 +       the VPD Data and one for temperature and voltage sensor.
30334 +       The following picture shows the TWSI buses, TWSI devices and
30335 +       their control registers.
30336 +
30337 +       Note: The VPD functions are in skvpd.c
30338 +.
30339 +.      PCI Config TWSI Bus for VPD Data:
30340 +.
30341 +.                    +------------+
30342 +.                    | VPD EEPROM |
30343 +.                    +------------+
30344 +.                           |
30345 +.                           | <-- TWSI
30346 +.                           |
30347 +.               +-----------+-----------+
30348 +.               |                       |
30349 +.      +-----------------+     +-----------------+
30350 +.      | PCI_VPD_ADR_REG |     | PCI_VPD_DAT_REG |
30351 +.      +-----------------+     +-----------------+
30352 +.
30353 +.
30354 +.      TWSI Bus for LM80 sensor:
30355 +.
30356 +.                      +-----------------+
30357 +.                      | Temperature and |
30358 +.                      | Voltage Sensor  |
30359 +.                      |       LM80      |
30360 +.                      +-----------------+
30361 +.                              |
30362 +.                              |
30363 +.                      TWSI --> |
30364 +.                              |
30365 +.                           +----+
30366 +.           +-------------->| OR |<--+
30367 +.           |               +----+   |
30368 +.     +------+------+                |
30369 +.     |                    |                 |
30370 +. +--------+   +--------+      +----------+
30371 +. | B2_I2C |   | B2_I2C |      |  B2_I2C  |
30372 +. | _CTRL  |   | _DATA  |      |   _SW    |
30373 +. +--------+   +--------+      +----------+
30374 +.
30375 +       The TWSI bus may be driven by the B2_I2C_SW or by the B2_I2C_CTRL
30376 +       and B2_I2C_DATA registers.
30377 +       For driver software it is recommended to use the TWSI control and
30378 +       data register, because TWSI bus timing is done by the ASIC and
30379 +       an interrupt may be received when the TWSI request is completed.
30380 +
30381 +       Clock Rate Timing:                      MIN     MAX     generated by
30382 +               VPD EEPROM:                     50 kHz  100 kHz         HW
30383 +               LM80 over TWSI Ctrl/Data reg.   50 kHz  100 kHz         HW
30384 +               LM80 over B2_I2C_SW register    0       400 kHz         SW
30385 +
30386 +       Note:   The clock generated by the hardware is dependend on the
30387 +               PCI clock. If the PCI bus clock is 33 MHz, the I2C/VPD
30388 +               clock is 50 kHz.
30389 + */
30390 +intro()
30391 +{}
30392 +#endif
30393 +
30394 +#ifdef SK_DIAG
30395 +/*
30396 + * TWSI Fast Mode timing values used by the LM80.
30397 + * If new devices are added to the TWSI bus the timing values have to be checked.
30398 + */
30399 +#ifndef I2C_SLOW_TIMING
30400 +#define T_CLK_LOW                      1300L   /* clock low time in ns */
30401 +#define T_CLK_HIGH                      600L   /* clock high time in ns */
30402 +#define T_DATA_IN_SETUP                 100L   /* data in Set-up Time */
30403 +#define T_START_HOLD            600L   /* start condition hold time */
30404 +#define T_START_SETUP           600L   /* start condition Set-up time */
30405 +#define T_STOP_SETUP            600L   /* stop condition Set-up time */
30406 +#define T_BUS_IDLE                     1300L   /* time the bus must free after Tx */
30407 +#define T_CLK_2_DATA_OUT        900L   /* max. clock low to data output valid */
30408 +#else  /* I2C_SLOW_TIMING */
30409 +/* TWSI Standard Mode Timing */
30410 +#define T_CLK_LOW                      4700L   /* clock low time in ns */
30411 +#define T_CLK_HIGH                     4000L   /* clock high time in ns */
30412 +#define T_DATA_IN_SETUP                 250L   /* data in Set-up Time */
30413 +#define T_START_HOLD           4000L   /* start condition hold time */
30414 +#define T_START_SETUP          4700L   /* start condition Set-up time */
30415 +#define T_STOP_SETUP           4000L   /* stop condition Set-up time */
30416 +#define T_BUS_IDLE                     4700L   /* time the bus must free after Tx */
30417 +#endif /* !I2C_SLOW_TIMING */
30418 +
30419 +#define NS2BCLK(x)     (((x)*125)/10000)
30420 +
30421 +/*
30422 + * TWSI Wire Operations
30423 + *
30424 + * About I2C_CLK_LOW():
30425 + *
30426 + * The Data Direction bit (I2C_DATA_DIR) has to be set to input when setting
30427 + * clock to low, to prevent the ASIC and the TWSI data client from driving the
30428 + * serial data line simultaneously (ASIC: last bit of a byte = '1', TWSI client
30429 + * send an 'ACK'). See also Concentrator Bugreport No. 10192.
30430 + */
30431 +#define I2C_DATA_HIGH(IoC)     SK_I2C_SET_BIT(IoC, I2C_DATA)
30432 +#define I2C_DATA_LOW(IoC)      SK_I2C_CLR_BIT(IoC, I2C_DATA)
30433 +#define I2C_DATA_OUT(IoC)      SK_I2C_SET_BIT(IoC, I2C_DATA_DIR)
30434 +#define I2C_DATA_IN(IoC)       SK_I2C_CLR_BIT(IoC, I2C_DATA_DIR | I2C_DATA)
30435 +#define I2C_CLK_HIGH(IoC)      SK_I2C_SET_BIT(IoC, I2C_CLK)
30436 +#define I2C_CLK_LOW(IoC)       SK_I2C_CLR_BIT(IoC, I2C_CLK | I2C_DATA_DIR)
30437 +#define I2C_START_COND(IoC)    SK_I2C_CLR_BIT(IoC, I2C_CLK)
30438 +
30439 +#define NS2CLKT(x)     ((x*125L)/10000)
30440 +
30441 +/*--------------- TWSI Interface Register Functions --------------- */
30442 +
30443 +/*
30444 + * sending one bit
30445 + */
30446 +void SkI2cSndBit(
30447 +SK_IOC IoC,    /* I/O Context */
30448 +SK_U8  Bit)    /* Bit to send */
30449 +{
30450 +       I2C_DATA_OUT(IoC);
30451 +       if (Bit) {
30452 +               I2C_DATA_HIGH(IoC);
30453 +       }
30454 +       else {
30455 +               I2C_DATA_LOW(IoC);
30456 +       }
30457 +       SkDgWaitTime(IoC, NS2BCLK(T_DATA_IN_SETUP));
30458 +       I2C_CLK_HIGH(IoC);
30459 +       SkDgWaitTime(IoC, NS2BCLK(T_CLK_HIGH));
30460 +       I2C_CLK_LOW(IoC);
30461 +}      /* SkI2cSndBit*/
30462 +
30463 +
30464 +/*
30465 + * Signal a start to the TWSI Bus.
30466 + *
30467 + * A start is signaled when data goes to low in a high clock cycle.
30468 + *
30469 + * Ends with Clock Low.
30470 + *
30471 + * Status: not tested
30472 + */
30473 +void SkI2cStart(
30474 +SK_IOC IoC)    /* I/O Context */
30475 +{
30476 +       /* Init data and Clock to output lines */
30477 +       /* Set Data high */
30478 +       I2C_DATA_OUT(IoC);
30479 +       I2C_DATA_HIGH(IoC);
30480 +       /* Set Clock high */
30481 +       I2C_CLK_HIGH(IoC);
30482 +
30483 +       SkDgWaitTime(IoC, NS2BCLK(T_START_SETUP));
30484 +
30485 +       /* Set Data Low */
30486 +       I2C_DATA_LOW(IoC);
30487 +
30488 +       SkDgWaitTime(IoC, NS2BCLK(T_START_HOLD));
30489 +
30490 +       /* Clock low without Data to Input */
30491 +       I2C_START_COND(IoC);
30492 +
30493 +       SkDgWaitTime(IoC, NS2BCLK(T_CLK_LOW));
30494 +}      /* SkI2cStart */
30495 +
30496 +
30497 +void SkI2cStop(
30498 +SK_IOC IoC)    /* I/O Context */
30499 +{
30500 +       /* Init data and Clock to output lines */
30501 +       /* Set Data low */
30502 +       I2C_DATA_OUT(IoC);
30503 +       I2C_DATA_LOW(IoC);
30504 +
30505 +       SkDgWaitTime(IoC, NS2BCLK(T_CLK_2_DATA_OUT));
30506 +
30507 +       /* Set Clock high */
30508 +       I2C_CLK_HIGH(IoC);
30509 +
30510 +       SkDgWaitTime(IoC, NS2BCLK(T_STOP_SETUP));
30511 +
30512 +       /*
30513 +        * Set Data High:       Do it by setting the Data Line to Input.
30514 +        *                      Because of a pull up resistor the Data Line
30515 +        *                      floods to high.
30516 +        */
30517 +       I2C_DATA_IN(IoC);
30518 +
30519 +       /*
30520 +        *      When TWSI activity is stopped
30521 +        *       o      DATA should be set to input and
30522 +        *       o      CLOCK should be set to high!
30523 +        */
30524 +       SkDgWaitTime(IoC, NS2BCLK(T_BUS_IDLE));
30525 +}      /* SkI2cStop */
30526 +
30527 +
30528 +/*
30529 + * Receive just one bit via the TWSI bus.
30530 + *
30531 + * Note:       Clock must be set to LOW before calling this function.
30532 + *
30533 + * Returns The received bit.
30534 + */
30535 +int SkI2cRcvBit(
30536 +SK_IOC IoC)    /* I/O Context */
30537 +{
30538 +       int     Bit;
30539 +       SK_U8   I2cSwCtrl;
30540 +
30541 +       /* Init data as input line */
30542 +       I2C_DATA_IN(IoC);
30543 +
30544 +       SkDgWaitTime(IoC, NS2BCLK(T_CLK_2_DATA_OUT));
30545 +
30546 +       I2C_CLK_HIGH(IoC);
30547 +
30548 +       SkDgWaitTime(IoC, NS2BCLK(T_CLK_HIGH));
30549 +
30550 +       SK_I2C_GET_SW(IoC, &I2cSwCtrl);
30551 +
30552 +       Bit = (I2cSwCtrl & I2C_DATA) ? 1 : 0;
30553 +
30554 +       I2C_CLK_LOW(IoC);
30555 +       SkDgWaitTime(IoC, NS2BCLK(T_CLK_LOW-T_CLK_2_DATA_OUT));
30556 +
30557 +       return(Bit);
30558 +}      /* SkI2cRcvBit */
30559 +
30560 +
30561 +/*
30562 + * Receive an ACK.
30563 + *
30564 + * returns     0 If acknowledged
30565 + *             1 in case of an error
30566 + */
30567 +int SkI2cRcvAck(
30568 +SK_IOC IoC)    /* I/O Context */
30569 +{
30570 +       /*
30571 +        * Received bit must be zero.
30572 +        */
30573 +       return(SkI2cRcvBit(IoC) != 0);
30574 +}      /* SkI2cRcvAck */
30575 +
30576 +
30577 +/*
30578 + * Send an NACK.
30579 + */
30580 +void SkI2cSndNAck(
30581 +SK_IOC IoC)    /* I/O Context */
30582 +{
30583 +       /*
30584 +        * Received bit must be zero.
30585 +        */
30586 +       SkI2cSndBit(IoC, 1);
30587 +}      /* SkI2cSndNAck */
30588 +
30589 +
30590 +/*
30591 + * Send an ACK.
30592 + */
30593 +void SkI2cSndAck(
30594 +SK_IOC IoC)    /* I/O Context */
30595 +{
30596 +       /*
30597 +        * Received bit must be zero.
30598 +        */
30599 +       SkI2cSndBit(IoC, 0);
30600 +}      /* SkI2cSndAck */
30601 +
30602 +
30603 +/*
30604 + * Send one byte to the TWSI device and wait for ACK.
30605 + *
30606 + * Return acknowleged status.
30607 + */
30608 +int SkI2cSndByte(
30609 +SK_IOC IoC,    /* I/O Context */
30610 +int            Byte)   /* byte to send */
30611 +{
30612 +       int     i;
30613 +
30614 +       for (i = 0; i < 8; i++) {
30615 +               if (Byte & (1<<(7-i))) {
30616 +                       SkI2cSndBit(IoC, 1);
30617 +               }
30618 +               else {
30619 +                       SkI2cSndBit(IoC, 0);
30620 +               }
30621 +       }
30622 +
30623 +       return(SkI2cRcvAck(IoC));
30624 +}      /* SkI2cSndByte */
30625 +
30626 +
30627 +/*
30628 + * Receive one byte and ack it.
30629 + *
30630 + * Return byte.
30631 + */
30632 +int SkI2cRcvByte(
30633 +SK_IOC IoC,    /* I/O Context */
30634 +int            Last)   /* Last Byte Flag */
30635 +{
30636 +       int     i;
30637 +       int     Byte = 0;
30638 +
30639 +       for (i = 0; i < 8; i++) {
30640 +               Byte <<= 1;
30641 +               Byte |= SkI2cRcvBit(IoC);
30642 +       }
30643 +
30644 +       if (Last) {
30645 +               SkI2cSndNAck(IoC);
30646 +       }
30647 +       else {
30648 +               SkI2cSndAck(IoC);
30649 +       }
30650 +
30651 +       return(Byte);
30652 +}      /* SkI2cRcvByte */
30653 +
30654 +
30655 +/*
30656 + * Start dialog and send device address
30657 + *
30658 + * Return 0 if acknowleged, 1 in case of an error
30659 + */
30660 +int    SkI2cSndDev(
30661 +SK_IOC IoC,    /* I/O Context */
30662 +int            Addr,   /* Device Address */
30663 +int            Rw)             /* Read / Write Flag */
30664 +{
30665 +       SkI2cStart(IoC);
30666 +       Rw = ~Rw;
30667 +       Rw &= I2C_WRITE;
30668 +       return(SkI2cSndByte(IoC, (Addr << 1) | Rw));
30669 +}      /* SkI2cSndDev */
30670 +
30671 +#endif /* SK_DIAG */
30672 +
30673 +/*----------------- TWSI CTRL Register Functions ----------*/
30674 +
30675 +/*
30676 + * waits for a completion of an TWSI transfer
30677 + *
30678 + * returns     0:      success, transfer completes
30679 + *                     1:      error,   transfer does not complete, TWSI transfer
30680 + *                                              killed, wait loop terminated.
30681 + */
30682 +int    SkI2cWait(
30683 +SK_AC  *pAC,   /* Adapter Context */
30684 +SK_IOC IoC,    /* I/O Context */
30685 +int            Event)  /* complete event to wait for (I2C_READ or I2C_WRITE) */
30686 +{
30687 +       SK_U64  StartTime;
30688 +       SK_U64  CurrentTime;
30689 +       SK_U32  I2cCtrl;
30690 +
30691 +       StartTime = SkOsGetTime(pAC);
30692 +
30693 +       do {
30694 +               CurrentTime = SkOsGetTime(pAC);
30695 +
30696 +               if (CurrentTime - StartTime > SK_TICKS_PER_SEC / 8) {
30697 +
30698 +                       SK_I2C_STOP(IoC);
30699 +#ifndef SK_DIAG
30700 +                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_I2C_E002, SKERR_I2C_E002MSG);
30701 +#endif /* !SK_DIAG */
30702 +                       return(1);
30703 +               }
30704 +
30705 +               SK_I2C_GET_CTL(IoC, &I2cCtrl);
30706 +
30707 +#ifdef xYUKON_DBG
30708 +               printf("StartTime=%lu, CurrentTime=%lu\n",
30709 +                       StartTime, CurrentTime);
30710 +               if (kbhit()) {
30711 +                       return(1);
30712 +               }
30713 +#endif /* YUKON_DBG */
30714 +
30715 +       } while ((I2cCtrl & I2C_FLAG) == (SK_U32)Event << 31);
30716 +
30717 +       return(0);
30718 +}      /* SkI2cWait */
30719 +
30720 +
30721 +/*
30722 + * waits for a completion of an TWSI transfer
30723 + *
30724 + * Returns
30725 + *     Nothing
30726 + */
30727 +void SkI2cWaitIrq(
30728 +SK_AC  *pAC,   /* Adapter Context */
30729 +SK_IOC IoC)    /* I/O Context */
30730 +{
30731 +       SK_SENSOR       *pSen;
30732 +       SK_U64          StartTime;
30733 +       SK_U32          IrqSrc;
30734 +       SK_U32          IsTwsiReadyBit;
30735 +
30736 +       IsTwsiReadyBit = CHIP_ID_YUKON_2(pAC) ? Y2_IS_TWSI_RDY : IS_I2C_READY;
30737 +
30738 +       pSen = &pAC->I2c.SenTable[pAC->I2c.CurrSens];
30739 +
30740 +       if (pSen->SenState == SK_SEN_IDLE) {
30741 +               return;
30742 +       }
30743 +
30744 +       StartTime = SkOsGetTime(pAC);
30745 +
30746 +       do {
30747 +               if (SkOsGetTime(pAC) - StartTime > SK_TICKS_PER_SEC / 8) {
30748 +
30749 +                       SK_I2C_STOP(IoC);
30750 +#ifndef SK_DIAG
30751 +                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_I2C_E016, SKERR_I2C_E016MSG);
30752 +#endif /* !SK_DIAG */
30753 +                       return;
30754 +               }
30755 +
30756 +               SK_IN32(IoC, B0_ISRC, &IrqSrc);
30757 +
30758 +       } while ((IrqSrc & IsTwsiReadyBit) == 0);
30759 +
30760 +       pSen->SenState = SK_SEN_IDLE;
30761 +       return;
30762 +}      /* SkI2cWaitIrq */
30763 +
30764 +/*
30765 + * writes a single byte or 4 bytes into the TWSI device
30766 + *
30767 + * returns     0:      success
30768 + *                     1:      error
30769 + */
30770 +int SkI2cWrite(
30771 +SK_AC  *pAC,           /* Adapter Context */
30772 +SK_IOC IoC,            /* I/O Context */
30773 +SK_U32 I2cData,        /* TWSI Data to write */
30774 +int            I2cDev,         /* TWSI Device Address */
30775 +int            I2cDevSize,     /* TWSI Device Size (e.g. I2C_025K_DEV or I2C_2K_DEV) */
30776 +int            I2cReg,         /* TWSI Device Register Address */
30777 +int            I2cBurst)       /* TWSI Burst Flag */
30778 +{
30779 +       SK_OUT32(IoC, B2_I2C_DATA, I2cData);
30780 +
30781 +       SK_I2C_CTL(IoC, I2C_WRITE, I2cDev, I2cDevSize, I2cReg, I2cBurst);
30782 +
30783 +       return(SkI2cWait(pAC, IoC, I2C_WRITE));
30784 +}      /* SkI2cWrite*/
30785 +
30786 +
30787 +#ifdef SK_DIAG
30788 +/*
30789 + * reads a single byte or 4 bytes from the TWSI device
30790 + *
30791 + * returns     the word read
30792 + */
30793 +SK_U32 SkI2cRead(
30794 +SK_AC  *pAC,           /* Adapter Context */
30795 +SK_IOC IoC,            /* I/O Context */
30796 +int            I2cDev,         /* TWSI Device Address */
30797 +int            I2cDevSize,     /* TWSI Device Size (e.g. I2C_025K_DEV or I2C_2K_DEV) */
30798 +int            I2cReg,         /* TWSI Device Register Address */
30799 +int            I2cBurst)       /* TWSI Burst Flag */
30800 +{
30801 +       SK_U32  Data;
30802 +
30803 +       SK_OUT32(IoC, B2_I2C_DATA, 0);
30804 +       SK_I2C_CTL(IoC, I2C_READ, I2cDev, I2cDevSize, I2cReg, I2cBurst);
30805 +
30806 +       if (SkI2cWait(pAC, IoC, I2C_READ) != 0) {
30807 +               w_print("%s\n", SKERR_I2C_E002MSG);
30808 +       }
30809 +
30810 +       SK_IN32(IoC, B2_I2C_DATA, &Data);
30811 +
30812 +       return(Data);
30813 +}      /* SkI2cRead */
30814 +#endif /* SK_DIAG */
30815 +
30816 +
30817 +/*
30818 + * read a sensor's value
30819 + *
30820 + * This function reads a sensor's value from the TWSI sensor chip. The sensor
30821 + * is defined by its index into the sensors database in the struct pAC points
30822 + * to.
30823 + * Returns
30824 + *             1 if the read is completed
30825 + *             0 if the read must be continued (TWSI Bus still allocated)
30826 + */
30827 +int    SkI2cReadSensor(
30828 +SK_AC          *pAC,   /* Adapter Context */
30829 +SK_IOC         IoC,    /* I/O Context */
30830 +SK_SENSOR      *pSen)  /* Sensor to be read */
30831 +{
30832 +       if (pSen->SenRead != NULL) {
30833 +               return((*pSen->SenRead)(pAC, IoC, pSen));
30834 +       }
30835 +
30836 +       return(0); /* no success */
30837 +}      /* SkI2cReadSensor */
30838 +
30839 +/*
30840 + * Do the Init state 0 initialization
30841 + */
30842 +static int SkI2cInit0(
30843 +SK_AC  *pAC)   /* Adapter Context */
30844 +{
30845 +       int                     i;
30846 +       SK_SENSOR       *pSen;
30847 +
30848 +       /* Begin with first sensor */
30849 +       pAC->I2c.CurrSens = 0;
30850 +
30851 +       /* Begin with timeout control for state machine */
30852 +       pAC->I2c.TimerMode = SK_TIMER_WATCH_SM;
30853 +
30854 +       /* Set sensor number to zero */
30855 +       pAC->I2c.MaxSens = 0;
30856 +
30857 +#ifndef SK_DIAG
30858 +       /* Initialize Number of Dummy Reads */
30859 +       pAC->I2c.DummyReads = SK_MAX_SENSORS;
30860 +#endif /* !SK_DIAG */
30861 +
30862 +       for (i = 0; i < SK_MAX_SENSORS; i++) {
30863 +               pSen = &pAC->I2c.SenTable[i];
30864 +
30865 +               pSen->SenDesc = "unknown";
30866 +               pSen->SenType = SK_SEN_UNKNOWN;
30867 +               pSen->SenThreErrHigh = 0;
30868 +               pSen->SenThreErrLow = 0;
30869 +               pSen->SenThreWarnHigh = 0;
30870 +               pSen->SenThreWarnLow = 0;
30871 +               pSen->SenReg = LM80_FAN2_IN;
30872 +               pSen->SenInit = SK_SEN_DYN_INIT_NONE;
30873 +               pSen->SenValue = 0;
30874 +               pSen->SenErrFlag = SK_SEN_ERR_NOT_PRESENT;
30875 +               pSen->SenErrCts = 0;
30876 +               pSen->SenBegErrTS = 0;
30877 +               pSen->SenState = SK_SEN_IDLE;
30878 +               pSen->SenRead = NULL;
30879 +               pSen->SenDev = 0;
30880 +       }
30881 +
30882 +       /* Now we are "INIT data"ed */
30883 +       pAC->I2c.InitLevel = SK_INIT_DATA;
30884 +       return(0);
30885 +}      /* SkI2cInit0*/
30886 +
30887 +
30888 +/*
30889 + * Do the init state 1 initialization
30890 + *
30891 + * initialize the following register of the LM80:
30892 + * Configuration register:
30893 + * - START, noINT, activeLOW, noINT#Clear, noRESET, noCI, noGPO#, noINIT
30894 + *
30895 + * Interrupt Mask Register 1:
30896 + * - all interrupts are Disabled (0xff)
30897 + *
30898 + * Interrupt Mask Register 2:
30899 + * - all interrupts are Disabled (0xff) Interrupt modi doesn't matter.
30900 + *
30901 + * Fan Divisor/RST_OUT register:
30902 + * - Divisors set to 1 (bits 00), all others 0s.
30903 + *
30904 + * OS# Configuration/Temperature resolution Register:
30905 + * - all 0s
30906 + *
30907 + */
30908 +static int SkI2cInit1(
30909 +SK_AC  *pAC,   /* Adapter Context */
30910 +SK_IOC IoC)    /* I/O Context */
30911 +{
30912 +       int                     i;
30913 +       SK_U8           I2cSwCtrl;
30914 +       SK_GEPORT       *pPrt;  /* GIni Port struct pointer */
30915 +       SK_SENSOR       *pSen;
30916 +
30917 +       if (pAC->I2c.InitLevel != SK_INIT_DATA) {
30918 +               /* Re-init not needed in TWSI module */
30919 +               return(0);
30920 +       }
30921 +
30922 +       if (pAC->GIni.GIChipId == CHIP_ID_YUKON_EC ||
30923 +               pAC->GIni.GIChipId == CHIP_ID_YUKON_FE) {
30924 +               /* No sensors on Yukon-EC and Yukon-FE */
30925 +               return(0);
30926 +       }
30927 +
30928 +       /* Set the Direction of TWSI-Data Pin to IN */
30929 +       SK_I2C_CLR_BIT(IoC, I2C_DATA_DIR | I2C_DATA);
30930 +       /* Check for 32-Bit Yukon with Low at TWSI-Data Pin */
30931 +       SK_I2C_GET_SW(IoC, &I2cSwCtrl);
30932 +
30933 +       if ((I2cSwCtrl & I2C_DATA) == 0) {
30934 +               /* this is a 32-Bit board */
30935 +               pAC->GIni.GIYukon32Bit = SK_TRUE;
30936 +               return(0);
30937 +       }
30938 +
30939 +       /* Check for 64 Bit Yukon without sensors */
30940 +       if (SkI2cWrite(pAC, IoC, 0, LM80_ADDR, I2C_025K_DEV, LM80_CFG, 0) != 0) {
30941 +               return(0);
30942 +       }
30943 +
30944 +       (void)SkI2cWrite(pAC, IoC, 0xffUL, LM80_ADDR, I2C_025K_DEV, LM80_IMSK_1, 0);
30945 +
30946 +       (void)SkI2cWrite(pAC, IoC, 0xffUL, LM80_ADDR, I2C_025K_DEV, LM80_IMSK_2, 0);
30947 +
30948 +       (void)SkI2cWrite(pAC, IoC, 0, LM80_ADDR, I2C_025K_DEV, LM80_FAN_CTRL, 0);
30949 +
30950 +       (void)SkI2cWrite(pAC, IoC, 0, LM80_ADDR, I2C_025K_DEV, LM80_TEMP_CTRL, 0);
30951 +
30952 +       (void)SkI2cWrite(pAC, IoC, (SK_U32)LM80_CFG_START, LM80_ADDR, I2C_025K_DEV,
30953 +               LM80_CFG, 0);
30954 +
30955 +       /*
30956 +        * MaxSens has to be updated here, because PhyType is not
30957 +        * set when performing Init Level 0
30958 +        */
30959 +       pAC->I2c.MaxSens = 5;
30960 +
30961 +       pPrt = &pAC->GIni.GP[0];
30962 +
30963 +       if (pAC->GIni.GIGenesis) {
30964 +               if (pPrt->PhyType == SK_PHY_BCOM) {
30965 +                       if (pAC->GIni.GIMacsFound == 1) {
30966 +                               pAC->I2c.MaxSens += 1;
30967 +                       }
30968 +                       else {
30969 +                               pAC->I2c.MaxSens += 3;
30970 +                       }
30971 +               }
30972 +       }
30973 +       else {
30974 +               pAC->I2c.MaxSens += 3;
30975 +       }
30976 +
30977 +       for (i = 0; i < pAC->I2c.MaxSens; i++) {
30978 +               pSen = &pAC->I2c.SenTable[i];
30979 +               switch (i) {
30980 +               case 0:
30981 +                       pSen->SenDesc = "Temperature";
30982 +                       pSen->SenType = SK_SEN_TEMP;
30983 +                       pSen->SenThreErrHigh = SK_SEN_TEMP_HIGH_ERR;
30984 +                       pSen->SenThreWarnHigh = SK_SEN_TEMP_HIGH_WARN;
30985 +                       pSen->SenThreWarnLow = SK_SEN_TEMP_LOW_WARN;
30986 +                       pSen->SenThreErrLow = SK_SEN_TEMP_LOW_ERR;
30987 +                       pSen->SenReg = LM80_TEMP_IN;
30988 +                       break;
30989 +               case 1:
30990 +                       pSen->SenDesc = "Voltage PCI";
30991 +                       pSen->SenType = SK_SEN_VOLT;
30992 +                       pSen->SenThreErrHigh = SK_SEN_PCI_5V_HIGH_ERR;
30993 +                       pSen->SenThreWarnHigh = SK_SEN_PCI_5V_HIGH_WARN;
30994 +                       if (pAC->GIni.GIPciBus != SK_PEX_BUS) {
30995 +                               pSen->SenThreWarnLow = SK_SEN_PCI_5V_LOW_WARN;
30996 +                               pSen->SenThreErrLow = SK_SEN_PCI_5V_LOW_ERR;
30997 +                       }
30998 +                       else {
30999 +                               pSen->SenThreWarnLow = 0;
31000 +                               pSen->SenThreErrLow = 0;
31001 +                       }
31002 +                       pSen->SenReg = LM80_VT0_IN;
31003 +                       break;
31004 +               case 2:
31005 +                       pSen->SenDesc = "Voltage PCI-IO";
31006 +                       pSen->SenType = SK_SEN_VOLT;
31007 +                       pSen->SenThreErrHigh = SK_SEN_PCI_IO_5V_HIGH_ERR;
31008 +                       pSen->SenThreWarnHigh = SK_SEN_PCI_IO_5V_HIGH_WARN;
31009 +                       if (pAC->GIni.GIPciBus != SK_PEX_BUS) {
31010 +                               pSen->SenThreWarnLow = SK_SEN_PCI_IO_3V3_LOW_WARN;
31011 +                               pSen->SenThreErrLow = SK_SEN_PCI_IO_3V3_LOW_ERR;
31012 +                       }
31013 +                       else {
31014 +                               pSen->SenThreWarnLow = 0;
31015 +                               pSen->SenThreErrLow = 0;
31016 +                       }
31017 +                       pSen->SenReg = LM80_VT1_IN;
31018 +                       pSen->SenInit = SK_SEN_DYN_INIT_PCI_IO;
31019 +                       break;
31020 +               case 3:
31021 +                       if (pAC->GIni.GIGenesis) {
31022 +                               pSen->SenDesc = "Voltage ASIC";
31023 +                       }
31024 +                       else {
31025 +                               pSen->SenDesc = "Voltage VMAIN";
31026 +                       }
31027 +                       pSen->SenType = SK_SEN_VOLT;
31028 +                       pSen->SenThreErrHigh = SK_SEN_VDD_HIGH_ERR;
31029 +                       pSen->SenThreWarnHigh = SK_SEN_VDD_HIGH_WARN;
31030 +                       pSen->SenThreWarnLow = SK_SEN_VDD_LOW_WARN;
31031 +                       pSen->SenThreErrLow = SK_SEN_VDD_LOW_ERR;
31032 +                       pSen->SenReg = LM80_VT2_IN;
31033 +                       break;
31034 +               case 4:
31035 +                       if (pAC->GIni.GIGenesis) {
31036 +                               if (pPrt->PhyType == SK_PHY_BCOM) {
31037 +                                       pSen->SenDesc = "Voltage PHY A PLL";
31038 +                                       pSen->SenThreErrHigh = SK_SEN_PLL_3V3_HIGH_ERR;
31039 +                                       pSen->SenThreWarnHigh = SK_SEN_PLL_3V3_HIGH_WARN;
31040 +                                       pSen->SenThreWarnLow = SK_SEN_PLL_3V3_LOW_WARN;
31041 +                                       pSen->SenThreErrLow = SK_SEN_PLL_3V3_LOW_ERR;
31042 +                               }
31043 +                               else {
31044 +                                       pSen->SenDesc = "Voltage PMA";
31045 +                                       pSen->SenThreErrHigh = SK_SEN_PLL_3V3_HIGH_ERR;
31046 +                                       pSen->SenThreWarnHigh = SK_SEN_PLL_3V3_HIGH_WARN;
31047 +                                       pSen->SenThreWarnLow = SK_SEN_PLL_3V3_LOW_WARN;
31048 +                                       pSen->SenThreErrLow = SK_SEN_PLL_3V3_LOW_ERR;
31049 +                               }
31050 +                       }
31051 +                       else {
31052 +                               pSen->SenDesc = "Voltage VAUX";
31053 +                               pSen->SenThreErrHigh = SK_SEN_VAUX_3V3_HIGH_ERR;
31054 +                               pSen->SenThreWarnHigh = SK_SEN_VAUX_3V3_HIGH_WARN;
31055 +                               if (pAC->GIni.GIVauxAvail) {
31056 +                                       pSen->SenThreWarnLow = SK_SEN_VAUX_3V3_LOW_WARN;
31057 +                                       pSen->SenThreErrLow = SK_SEN_VAUX_3V3_LOW_ERR;
31058 +                               }
31059 +                               else {
31060 +                                       pSen->SenThreErrLow = 0;
31061 +                                       pSen->SenThreWarnLow = 0;
31062 +                               }
31063 +                       }
31064 +                       pSen->SenType = SK_SEN_VOLT;
31065 +                       pSen->SenReg = LM80_VT3_IN;
31066 +                       break;
31067 +               case 5:
31068 +                       if (CHIP_ID_YUKON_2(pAC)) {
31069 +                               if (pAC->GIni.GIChipRev == 0) {
31070 +                                       pSen->SenDesc = "Voltage Core 1V3";
31071 +                                       pSen->SenThreErrHigh = SK_SEN_CORE_1V3_HIGH_ERR;
31072 +                                       pSen->SenThreWarnHigh = SK_SEN_CORE_1V3_HIGH_WARN;
31073 +                                       pSen->SenThreWarnLow = SK_SEN_CORE_1V3_LOW_WARN;
31074 +                                       pSen->SenThreErrLow = SK_SEN_CORE_1V3_LOW_ERR;
31075 +                               }
31076 +                               else {
31077 +                                       pSen->SenDesc = "Voltage Core 1V2";
31078 +                                       pSen->SenThreErrHigh = SK_SEN_CORE_1V2_HIGH_ERR;
31079 +                                       pSen->SenThreWarnHigh = SK_SEN_CORE_1V2_HIGH_WARN;
31080 +                                       pSen->SenThreWarnLow = SK_SEN_CORE_1V2_LOW_WARN;
31081 +                                       pSen->SenThreErrLow = SK_SEN_CORE_1V2_LOW_ERR;
31082 +                               }
31083 +                       }
31084 +                       else {
31085 +                               if (pAC->GIni.GIGenesis) {
31086 +                                       pSen->SenDesc = "Voltage PHY 2V5";
31087 +                                       pSen->SenThreErrHigh = SK_SEN_PHY_2V5_HIGH_ERR;
31088 +                                       pSen->SenThreWarnHigh = SK_SEN_PHY_2V5_HIGH_WARN;
31089 +                                       pSen->SenThreWarnLow = SK_SEN_PHY_2V5_LOW_WARN;
31090 +                                       pSen->SenThreErrLow = SK_SEN_PHY_2V5_LOW_ERR;
31091 +                               }
31092 +                               else {
31093 +                                       pSen->SenDesc = "Voltage Core 1V5";
31094 +                                       pSen->SenThreErrHigh = SK_SEN_CORE_1V5_HIGH_ERR;
31095 +                                       pSen->SenThreWarnHigh = SK_SEN_CORE_1V5_HIGH_WARN;
31096 +                                       pSen->SenThreWarnLow = SK_SEN_CORE_1V5_LOW_WARN;
31097 +                                       pSen->SenThreErrLow = SK_SEN_CORE_1V5_LOW_ERR;
31098 +                               }
31099 +                       }
31100 +                       pSen->SenType = SK_SEN_VOLT;
31101 +                       pSen->SenReg = LM80_VT4_IN;
31102 +                       break;
31103 +               case 6:
31104 +                       if (CHIP_ID_YUKON_2(pAC)) {
31105 +                               pSen->SenDesc = "Voltage PHY 1V5";
31106 +                               pSen->SenThreErrHigh = SK_SEN_CORE_1V5_HIGH_ERR;
31107 +                               pSen->SenThreWarnHigh = SK_SEN_CORE_1V5_HIGH_WARN;
31108 +                               if (pAC->GIni.GIPciBus == SK_PEX_BUS) {
31109 +                                       pSen->SenThreWarnLow = SK_SEN_CORE_1V5_LOW_WARN;
31110 +                                       pSen->SenThreErrLow = SK_SEN_CORE_1V5_LOW_ERR;
31111 +                               }
31112 +                               else {
31113 +                                       pSen->SenThreWarnLow = 0;
31114 +                                       pSen->SenThreErrLow = 0;
31115 +                               }
31116 +                       }
31117 +                       else {
31118 +                               if (pAC->GIni.GIGenesis) {
31119 +                                       pSen->SenDesc = "Voltage PHY B PLL";
31120 +                               }
31121 +                               else {
31122 +                                       pSen->SenDesc = "Voltage PHY 3V3";
31123 +                               }
31124 +                               pSen->SenThreErrHigh = SK_SEN_PLL_3V3_HIGH_ERR;
31125 +                               pSen->SenThreWarnHigh = SK_SEN_PLL_3V3_HIGH_WARN;
31126 +                               pSen->SenThreWarnLow = SK_SEN_PLL_3V3_LOW_WARN;
31127 +                               pSen->SenThreErrLow = SK_SEN_PLL_3V3_LOW_ERR;
31128 +                       }
31129 +                       pSen->SenType = SK_SEN_VOLT;
31130 +                       pSen->SenReg = LM80_VT5_IN;
31131 +                       break;
31132 +               case 7:
31133 +                       if (pAC->GIni.GIGenesis) {
31134 +                               pSen->SenDesc = "Speed Fan";
31135 +                               pSen->SenType = SK_SEN_FAN;
31136 +                               pSen->SenThreErrHigh = SK_SEN_FAN_HIGH_ERR;
31137 +                               pSen->SenThreWarnHigh = SK_SEN_FAN_HIGH_WARN;
31138 +                               pSen->SenThreWarnLow = SK_SEN_FAN_LOW_WARN;
31139 +                               pSen->SenThreErrLow = SK_SEN_FAN_LOW_ERR;
31140 +                               pSen->SenReg = LM80_FAN2_IN;
31141 +                       }
31142 +                       else {
31143 +                               pSen->SenDesc = "Voltage PHY 2V5";
31144 +                               pSen->SenType = SK_SEN_VOLT;
31145 +                               pSen->SenThreErrHigh = SK_SEN_PHY_2V5_HIGH_ERR;
31146 +                               pSen->SenThreWarnHigh = SK_SEN_PHY_2V5_HIGH_WARN;
31147 +                               pSen->SenThreWarnLow = SK_SEN_PHY_2V5_LOW_WARN;
31148 +                               pSen->SenThreErrLow = SK_SEN_PHY_2V5_LOW_ERR;
31149 +                               pSen->SenReg = LM80_VT6_IN;
31150 +                       }
31151 +                       break;
31152 +               default:
31153 +                       SK_ERR_LOG(pAC, SK_ERRCL_INIT | SK_ERRCL_SW,
31154 +                               SKERR_I2C_E001, SKERR_I2C_E001MSG);
31155 +                       break;
31156 +               }
31157 +
31158 +               pSen->SenValue = 0;
31159 +               pSen->SenErrFlag = SK_SEN_ERR_OK;
31160 +               pSen->SenErrCts = 0;
31161 +               pSen->SenBegErrTS = 0;
31162 +               pSen->SenState = SK_SEN_IDLE;
31163 +               if (pSen->SenThreWarnLow != 0) {
31164 +                       pSen->SenRead = SkLm80ReadSensor;
31165 +               }
31166 +               pSen->SenDev = LM80_ADDR;
31167 +       }
31168 +
31169 +#ifndef SK_DIAG
31170 +       pAC->I2c.DummyReads = pAC->I2c.MaxSens;
31171 +#endif /* !SK_DIAG */
31172 +
31173 +       /* Clear TWSI IRQ */
31174 +       SK_OUT32(IoC, B2_I2C_IRQ, I2C_CLR_IRQ);
31175 +
31176 +       /* Now we are I/O initialized */
31177 +       pAC->I2c.InitLevel = SK_INIT_IO;
31178 +       return(0);
31179 +}      /* SkI2cInit1 */
31180 +
31181 +
31182 +/*
31183 + * Init level 2: Start first sensor read.
31184 + */
31185 +static int SkI2cInit2(
31186 +SK_AC  *pAC,   /* Adapter Context */
31187 +SK_IOC IoC)    /* I/O Context */
31188 +{
31189 +       int                     ReadComplete;
31190 +       SK_SENSOR       *pSen;
31191 +
31192 +       if (pAC->I2c.InitLevel != SK_INIT_IO) {
31193 +               /* ReInit not needed in TWSI module */
31194 +               /* Init0 and Init2 not permitted */
31195 +               return(0);
31196 +       }
31197 +
31198 +       pSen = &pAC->I2c.SenTable[pAC->I2c.CurrSens];
31199 +
31200 +       ReadComplete = SkI2cReadSensor(pAC, IoC, pSen);
31201 +
31202 +       if (ReadComplete) {
31203 +               SK_ERR_LOG(pAC, SK_ERRCL_INIT, SKERR_I2C_E008, SKERR_I2C_E008MSG);
31204 +       }
31205 +
31206 +       /* Now we are correctly initialized */
31207 +       pAC->I2c.InitLevel = SK_INIT_RUN;
31208 +
31209 +       return(0);
31210 +}      /* SkI2cInit2*/
31211 +
31212 +
31213 +/*
31214 + * Initialize TWSI devices
31215 + *
31216 + * Get the first voltage value and discard it.
31217 + * Go into temperature read mode. A default pointer is not set.
31218 + *
31219 + * The things to be done depend on the init level in the parameter list:
31220 + * Level 0:
31221 + *     Initialize only the data structures. Do NOT access hardware.
31222 + * Level 1:
31223 + *     Initialize hardware through SK_IN / SK_OUT commands. Do NOT use interrupts.
31224 + * Level 2:
31225 + *     Everything is possible. Interrupts may be used from now on.
31226 + *
31227 + * return:
31228 + *     0 = success
31229 + *     other = error.
31230 + */
31231 +int    SkI2cInit(
31232 +SK_AC  *pAC,   /* Adapter Context */
31233 +SK_IOC IoC,    /* I/O Context needed in levels 1 and 2 */
31234 +int            Level)  /* Init Level */
31235 +{
31236 +
31237 +       switch (Level) {
31238 +       case SK_INIT_DATA:
31239 +               return(SkI2cInit0(pAC));
31240 +       case SK_INIT_IO:
31241 +               return(SkI2cInit1(pAC, IoC));
31242 +       case SK_INIT_RUN:
31243 +               return(SkI2cInit2(pAC, IoC));
31244 +       default:
31245 +               break;
31246 +       }
31247 +
31248 +       return(0);
31249 +}      /* SkI2cInit */
31250 +
31251 +
31252 +#ifndef SK_DIAG
31253 +/*
31254 + * Interrupt service function for the TWSI Interface
31255 + *
31256 + * Clears the Interrupt source
31257 + *
31258 + * Reads the register and check it for sending a trap.
31259 + *
31260 + * Starts the timer if necessary.
31261 + */
31262 +void SkI2cIsr(
31263 +SK_AC  *pAC,   /* Adapter Context */
31264 +SK_IOC IoC)    /* I/O Context */
31265 +{
31266 +       SK_EVPARA       Para;
31267 +
31268 +       /* Clear TWSI IRQ */
31269 +       SK_OUT32(IoC, B2_I2C_IRQ, I2C_CLR_IRQ);
31270 +
31271 +       Para.Para64 = 0;
31272 +       SkEventQueue(pAC, SKGE_I2C, SK_I2CEV_IRQ, Para);
31273 +}      /* SkI2cIsr */
31274 +
31275 +
31276 +/*
31277 + * Check this sensors Value against the threshold and send events.
31278 + */
31279 +static void SkI2cCheckSensor(
31280 +SK_AC          *pAC,   /* Adapter Context */
31281 +SK_SENSOR      *pSen)
31282 +{
31283 +       SK_EVPARA       ParaLocal;
31284 +       SK_BOOL         TooHigh;        /* Is sensor too high? */
31285 +       SK_BOOL         TooLow;         /* Is sensor too low? */
31286 +       SK_U64          CurrTime;       /* Current Time */
31287 +       SK_BOOL         DoTrapSend;     /* We need to send a trap */
31288 +       SK_BOOL         DoErrLog;       /* We need to log the error */
31289 +       SK_BOOL         IsError;        /* Error occured */
31290 +
31291 +       /* Check Dummy Reads first */
31292 +       if (pAC->I2c.DummyReads > 0) {
31293 +               pAC->I2c.DummyReads--;
31294 +               return;
31295 +       }
31296 +
31297 +       /* Get the current time */
31298 +       CurrTime = SkOsGetTime(pAC);
31299 +
31300 +       /* Set para to the most useful setting: The current sensor. */
31301 +       ParaLocal.Para64 = (SK_U64)pAC->I2c.CurrSens;
31302 +
31303 +       /* Check the Value against the thresholds. First: Error Thresholds */
31304 +       TooHigh = pSen->SenValue > pSen->SenThreErrHigh;
31305 +       TooLow  = pSen->SenValue < pSen->SenThreErrLow;
31306 +
31307 +       IsError = SK_FALSE;
31308 +
31309 +       if (TooHigh || TooLow) {
31310 +               /* Error condition is satisfied */
31311 +               DoTrapSend = SK_TRUE;
31312 +               DoErrLog = SK_TRUE;
31313 +
31314 +               /* Now error condition is satisfied */
31315 +               IsError = SK_TRUE;
31316 +
31317 +               if (pSen->SenErrFlag == SK_SEN_ERR_ERR) {
31318 +                       /* This state is the former one */
31319 +
31320 +                       /* So check first whether we have to send a trap */
31321 +                       if (pSen->SenLastErrTrapTS + SK_SEN_ERR_TR_HOLD > CurrTime) {
31322 +                               /*
31323 +                                * Do NOT send the Trap. The hold back time
31324 +                                * has to run out first.
31325 +                                */
31326 +                               DoTrapSend = SK_FALSE;
31327 +                       }
31328 +
31329 +                       /* Check now whether we have to log an Error */
31330 +                       if (pSen->SenLastErrLogTS + SK_SEN_ERR_LOG_HOLD > CurrTime) {
31331 +                               /*
31332 +                                * Do NOT log the error. The hold back time
31333 +                                * has to run out first.
31334 +                                */
31335 +                               DoErrLog = SK_FALSE;
31336 +                       }
31337 +               }
31338 +               else {
31339 +                       /* We came from a different state -> Set Begin Time Stamp */
31340 +                       pSen->SenBegErrTS = CurrTime;
31341 +                       pSen->SenErrFlag = SK_SEN_ERR_ERR;
31342 +               }
31343 +
31344 +               if (DoTrapSend) {
31345 +                       /* Set current Time */
31346 +                       pSen->SenLastErrTrapTS = CurrTime;
31347 +                       pSen->SenErrCts++;
31348 +
31349 +                       /* Queue PNMI Event */
31350 +                       SkEventQueue(pAC, SKGE_PNMI, TooHigh ?
31351 +                               SK_PNMI_EVT_SEN_ERR_UPP : SK_PNMI_EVT_SEN_ERR_LOW,
31352 +                               ParaLocal);
31353 +               }
31354 +
31355 +               if (DoErrLog) {
31356 +                       /* Set current Time */
31357 +                       pSen->SenLastErrLogTS = CurrTime;
31358 +
31359 +                       if (pSen->SenType == SK_SEN_TEMP) {
31360 +                               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E011, SKERR_I2C_E011MSG);
31361 +                       }
31362 +                       else if (pSen->SenType == SK_SEN_VOLT) {
31363 +                               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E012, SKERR_I2C_E012MSG);
31364 +                       }
31365 +                       else {
31366 +                               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E015, SKERR_I2C_E015MSG);
31367 +                       }
31368 +               }
31369 +       }
31370 +
31371 +       /* Check the Value against the thresholds */
31372 +       /* 2nd: Warning thresholds */
31373 +       TooHigh = pSen->SenValue > pSen->SenThreWarnHigh;
31374 +       TooLow  = pSen->SenValue < pSen->SenThreWarnLow;
31375 +
31376 +       if (!IsError && (TooHigh || TooLow)) {
31377 +               /* Error condition is satisfied */
31378 +               DoTrapSend = SK_TRUE;
31379 +               DoErrLog = SK_TRUE;
31380 +
31381 +               if (pSen->SenErrFlag == SK_SEN_ERR_WARN) {
31382 +                       /* This state is the former one */
31383 +
31384 +                       /* So check first whether we have to send a trap */
31385 +                       if (pSen->SenLastWarnTrapTS + SK_SEN_WARN_TR_HOLD > CurrTime) {
31386 +                               /*
31387 +                                * Do NOT send the Trap. The hold back time
31388 +                                * has to run out first.
31389 +                                */
31390 +                               DoTrapSend = SK_FALSE;
31391 +                       }
31392 +
31393 +                       /* Check now whether we have to log an Error */
31394 +                       if (pSen->SenLastWarnLogTS + SK_SEN_WARN_LOG_HOLD > CurrTime) {
31395 +                               /*
31396 +                                * Do NOT log the error. The hold back time
31397 +                                * has to run out first.
31398 +                                */
31399 +                               DoErrLog = SK_FALSE;
31400 +                       }
31401 +               }
31402 +               else {
31403 +                       /* We came from a different state -> Set Begin Time Stamp */
31404 +                       pSen->SenBegWarnTS = CurrTime;
31405 +                       pSen->SenErrFlag = SK_SEN_ERR_WARN;
31406 +               }
31407 +
31408 +               if (DoTrapSend) {
31409 +                       /* Set current Time */
31410 +                       pSen->SenLastWarnTrapTS = CurrTime;
31411 +                       pSen->SenWarnCts++;
31412 +
31413 +                       /* Queue PNMI Event */
31414 +                       SkEventQueue(pAC, SKGE_PNMI, TooHigh ?
31415 +                               SK_PNMI_EVT_SEN_WAR_UPP : SK_PNMI_EVT_SEN_WAR_LOW, ParaLocal);
31416 +               }
31417 +
31418 +               if (DoErrLog) {
31419 +                       /* Set current Time */
31420 +                       pSen->SenLastWarnLogTS = CurrTime;
31421 +
31422 +                       if (pSen->SenType == SK_SEN_TEMP) {
31423 +                               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E009, SKERR_I2C_E009MSG);
31424 +                       }
31425 +                       else if (pSen->SenType == SK_SEN_VOLT) {
31426 +                               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E010, SKERR_I2C_E010MSG);
31427 +                       }
31428 +                       else {
31429 +                               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E014, SKERR_I2C_E014MSG);
31430 +                       }
31431 +               }
31432 +       }
31433 +
31434 +       /* Check for NO error at all */
31435 +       if (!IsError && !TooHigh && !TooLow) {
31436 +               /* Set o.k. Status if no error and no warning condition */
31437 +               pSen->SenErrFlag = SK_SEN_ERR_OK;
31438 +       }
31439 +
31440 +       /* End of check against the thresholds */
31441 +
31442 +       if (pSen->SenInit == SK_SEN_DYN_INIT_PCI_IO) {
31443 +               /* Bug fix AF: 16.Aug.2001: Correct the init base of LM80 sensor */
31444 +               pSen->SenInit = SK_SEN_DYN_INIT_NONE;
31445 +
31446 +               if (pSen->SenValue > SK_SEN_PCI_IO_RANGE_LIMITER) {
31447 +                       /* 5V PCI-IO Voltage */
31448 +                       pSen->SenThreWarnLow = SK_SEN_PCI_IO_5V_LOW_WARN;
31449 +                       pSen->SenThreErrLow = SK_SEN_PCI_IO_5V_LOW_ERR;
31450 +               }
31451 +               else {
31452 +                       /* 3.3V PCI-IO Voltage */
31453 +                       pSen->SenThreWarnHigh = SK_SEN_PCI_IO_3V3_HIGH_WARN;
31454 +                       pSen->SenThreErrHigh = SK_SEN_PCI_IO_3V3_HIGH_ERR;
31455 +               }
31456 +       }
31457 +
31458 +#ifdef TEST_ONLY
31459 +       /* Dynamic thresholds also for VAUX of LM80 sensor */
31460 +       if (pSen->SenInit == SK_SEN_DYN_INIT_VAUX) {
31461 +
31462 +               pSen->SenInit = SK_SEN_DYN_INIT_NONE;
31463 +
31464 +               /* 3.3V VAUX Voltage */
31465 +               if (pSen->SenValue > SK_SEN_VAUX_RANGE_LIMITER) {
31466 +                       pSen->SenThreWarnLow = SK_SEN_VAUX_3V3_LOW_WARN;
31467 +                       pSen->SenThreErrLow = SK_SEN_VAUX_3V3_LOW_ERR;
31468 +               }
31469 +               /* 0V VAUX Voltage */
31470 +               else {
31471 +                       pSen->SenThreWarnHigh = SK_SEN_VAUX_0V_WARN_ERR;
31472 +                       pSen->SenThreErrHigh = SK_SEN_VAUX_0V_WARN_ERR;
31473 +               }
31474 +       }
31475 +
31476 +       /* Check initialization state: the VIO Thresholds need adaption */
31477 +       if (!pSen->SenInit && pSen->SenReg == LM80_VT1_IN &&
31478 +                pSen->SenValue > SK_SEN_WARNLOW2C &&
31479 +                pSen->SenValue < SK_SEN_WARNHIGH2) {
31480 +
31481 +               pSen->SenThreErrLow = SK_SEN_ERRLOW2C;
31482 +               pSen->SenThreWarnLow = SK_SEN_WARNLOW2C;
31483 +               pSen->SenInit = SK_TRUE;
31484 +       }
31485 +
31486 +       if (!pSen->SenInit && pSen->SenReg == LM80_VT1_IN &&
31487 +                pSen->SenValue > SK_SEN_WARNLOW2 &&
31488 +                pSen->SenValue < SK_SEN_WARNHIGH2C) {
31489 +
31490 +               pSen->SenThreErrHigh = SK_SEN_ERRHIGH2C;
31491 +               pSen->SenThreWarnHigh = SK_SEN_WARNHIGH2C;
31492 +               pSen->SenInit = SK_TRUE;
31493 +       }
31494 +#endif
31495 +
31496 +       if (pSen->SenInit != SK_SEN_DYN_INIT_NONE) {
31497 +               SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_I2C_E013, SKERR_I2C_E013MSG);
31498 +       }
31499 +}      /* SkI2cCheckSensor */
31500 +
31501 +
31502 +/*
31503 + * The only Event to be served is the timeout event
31504 + *
31505 + */
31506 +int    SkI2cEvent(
31507 +SK_AC          *pAC,   /* Adapter Context */
31508 +SK_IOC         IoC,    /* I/O Context */
31509 +SK_U32         Event,  /* Module specific Event */
31510 +SK_EVPARA      Para)   /* Event specific Parameter */
31511 +{
31512 +       int                     ReadComplete;
31513 +       SK_SENSOR       *pSen;
31514 +       SK_U32          Time;
31515 +       SK_EVPARA       ParaLocal;
31516 +       int                     i;
31517 +
31518 +       /* New case: no sensors */
31519 +       if (pAC->I2c.MaxSens == 0) {
31520 +               return(0);
31521 +       }
31522 +
31523 +       switch (Event) {
31524 +       case SK_I2CEV_IRQ:
31525 +               pSen = &pAC->I2c.SenTable[pAC->I2c.CurrSens];
31526 +               ReadComplete = SkI2cReadSensor(pAC, IoC, pSen);
31527 +
31528 +               if (ReadComplete) {
31529 +                       /* Check sensor against defined thresholds */
31530 +                       SkI2cCheckSensor(pAC, pSen);
31531 +
31532 +                       /* Increment Current sensor and set appropriate Timeout */
31533 +                       pAC->I2c.CurrSens++;
31534 +                       if (pAC->I2c.CurrSens >= pAC->I2c.MaxSens) {
31535 +                               pAC->I2c.CurrSens = 0;
31536 +                               Time = SK_I2C_TIM_LONG;
31537 +                       }
31538 +                       else {
31539 +                               Time = SK_I2C_TIM_SHORT;
31540 +                       }
31541 +
31542 +                       /* Start Timer */
31543 +                       ParaLocal.Para64 = (SK_U64)0;
31544 +
31545 +                       pAC->I2c.TimerMode = SK_TIMER_NEW_GAUGING;
31546 +
31547 +                       SkTimerStart(pAC, IoC, &pAC->I2c.SenTimer, Time,
31548 +                               SKGE_I2C, SK_I2CEV_TIM, ParaLocal);
31549 +               }
31550 +               else {
31551 +                       /* Start Timer */
31552 +                       ParaLocal.Para64 = (SK_U64)0;
31553 +
31554 +                       pAC->I2c.TimerMode = SK_TIMER_WATCH_SM;
31555 +
31556 +                       SkTimerStart(pAC, IoC, &pAC->I2c.SenTimer, SK_I2C_TIM_WATCH,
31557 +                               SKGE_I2C, SK_I2CEV_TIM, ParaLocal);
31558 +               }
31559 +               break;
31560 +       case SK_I2CEV_TIM:
31561 +               if (pAC->I2c.TimerMode == SK_TIMER_NEW_GAUGING) {
31562 +
31563 +                       ParaLocal.Para64 = (SK_U64)0;
31564 +                       SkTimerStop(pAC, IoC, &pAC->I2c.SenTimer);
31565 +
31566 +                       pSen = &pAC->I2c.SenTable[pAC->I2c.CurrSens];
31567 +                       ReadComplete = SkI2cReadSensor(pAC, IoC, pSen);
31568 +
31569 +                       if (ReadComplete) {
31570 +                               /* Check sensor against defined thresholds */
31571 +                               SkI2cCheckSensor(pAC, pSen);
31572 +
31573 +                               /* Increment Current sensor and set appropriate Timeout */
31574 +                               pAC->I2c.CurrSens++;
31575 +                               if (pAC->I2c.CurrSens == pAC->I2c.MaxSens) {
31576 +                                       pAC->I2c.CurrSens = 0;
31577 +                                       Time = SK_I2C_TIM_LONG;
31578 +                               }
31579 +                               else {
31580 +                                       Time = SK_I2C_TIM_SHORT;
31581 +                               }
31582 +
31583 +                               /* Start Timer */
31584 +                               ParaLocal.Para64 = (SK_U64)0;
31585 +
31586 +                               pAC->I2c.TimerMode = SK_TIMER_NEW_GAUGING;
31587 +
31588 +                               SkTimerStart(pAC, IoC, &pAC->I2c.SenTimer, Time,
31589 +                                       SKGE_I2C, SK_I2CEV_TIM, ParaLocal);
31590 +                       }
31591 +               }
31592 +               else {
31593 +                       pSen = &pAC->I2c.SenTable[pAC->I2c.CurrSens];
31594 +                       pSen->SenErrFlag = SK_SEN_ERR_FAULTY;
31595 +                       SK_I2C_STOP(IoC);
31596 +
31597 +                       /* Increment Current sensor and set appropriate Timeout */
31598 +                       pAC->I2c.CurrSens++;
31599 +                       if (pAC->I2c.CurrSens == pAC->I2c.MaxSens) {
31600 +                               pAC->I2c.CurrSens = 0;
31601 +                               Time = SK_I2C_TIM_LONG;
31602 +                       }
31603 +                       else {
31604 +                               Time = SK_I2C_TIM_SHORT;
31605 +                       }
31606 +
31607 +                       /* Start Timer */
31608 +                       ParaLocal.Para64 = (SK_U64)0;
31609 +
31610 +                       pAC->I2c.TimerMode = SK_TIMER_NEW_GAUGING;
31611 +
31612 +                       SkTimerStart(pAC, IoC, &pAC->I2c.SenTimer, Time,
31613 +                               SKGE_I2C, SK_I2CEV_TIM, ParaLocal);
31614 +               }
31615 +               break;
31616 +       case SK_I2CEV_CLEAR:
31617 +               for (i = 0; i < SK_MAX_SENSORS; i++) {
31618 +                       pSen = &pAC->I2c.SenTable[i];
31619 +
31620 +                       pSen->SenErrFlag = SK_SEN_ERR_OK;
31621 +                       pSen->SenErrCts = 0;
31622 +                       pSen->SenWarnCts = 0;
31623 +                       pSen->SenBegErrTS = 0;
31624 +                       pSen->SenBegWarnTS = 0;
31625 +                       pSen->SenLastErrTrapTS = (SK_U64)0;
31626 +                       pSen->SenLastErrLogTS = (SK_U64)0;
31627 +                       pSen->SenLastWarnTrapTS = (SK_U64)0;
31628 +                       pSen->SenLastWarnLogTS = (SK_U64)0;
31629 +               }
31630 +               break;
31631 +       default:
31632 +               SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_I2C_E006, SKERR_I2C_E006MSG);
31633 +       }
31634 +
31635 +       return(0);
31636 +}      /* SkI2cEvent*/
31637 +
31638 +#endif /* !SK_DIAG */
31639 +
31640 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/skvpd.c linux-2.6.9.new/drivers/net/sk98lin/skvpd.c
31641 --- linux-2.6.9.old/drivers/net/sk98lin/skvpd.c 2004-10-19 05:54:32.000000000 +0800
31642 +++ linux-2.6.9.new/drivers/net/sk98lin/skvpd.c 2006-12-07 14:35:03.000000000 +0800
31643 @@ -1,22 +1,22 @@
31644  /******************************************************************************
31645   *
31646   * Name:       skvpd.c
31647 - * Project:    GEnesis, PCI Gigabit Ethernet Adapter
31648 - * Version:    $Revision: 1.37 $
31649 - * Date:       $Date: 2003/01/13 10:42:45 $
31650 - * Purpose:    Shared software to read and write VPD data
31651 + * Project:    Gigabit Ethernet Adapters, VPD-Module
31652 + * Version:    $Revision: 2.6 $
31653 + * Date:       $Date: 2004/11/02 10:47:39 $
31654 + * Purpose:    Shared software to read and write VPD
31655   *
31656   ******************************************************************************/
31657
31658  /******************************************************************************
31659   *
31660 - *     (C)Copyright 1998-2003 SysKonnect GmbH.
31661 + *     (C)Copyright 1998-2002 SysKonnect.
31662 + *     (C)Copyright 2002-2004 Marvell.
31663   *
31664   *     This program is free software; you can redistribute it and/or modify
31665   *     it under the terms of the GNU General Public License as published by
31666   *     the Free Software Foundation; either version 2 of the License, or
31667   *     (at your option) any later version.
31668 - *
31669   *     The information in this file is provided "AS IS" without warranty.
31670   *
31671   ******************************************************************************/
31672 @@ -25,7 +25,7 @@
31673         Please refer skvpd.txt for infomation how to include this module
31674   */
31675  static const char SysKonnectFileId[] =
31676 -       "@(#)$Id: skvpd.c,v 1.37 2003/01/13 10:42:45 rschmidt Exp $ (C) SK";
31677 +       "@(#) $Id: skvpd.c,v 2.6 2004/11/02 10:47:39 rschmidt Exp $ (C) Marvell.";
31678
31679  #include "h/skdrv1st.h"
31680  #include "h/sktypes.h"
31681 @@ -59,9 +59,10 @@
31682         SK_U64  start_time;
31683         SK_U16  state;
31684
31685 -       SK_DBG_MSG(pAC,SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
31686 +       SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
31687                 ("VPD wait for %s\n", event?"Write":"Read"));
31688         start_time = SkOsGetTime(pAC);
31689 +
31690         do {
31691                 if (SkOsGetTime(pAC) - start_time > SK_TICKS_PER_SEC) {
31692
31693 @@ -81,17 +82,18 @@
31694                                 ("ERROR:VPD wait timeout\n"));
31695                         return(1);
31696                 }
31697 -
31698 +
31699                 VPD_IN16(pAC, IoC, PCI_VPD_ADR_REG, &state);
31700 -
31701 +
31702                 SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
31703                         ("state = %x, event %x\n",state,event));
31704 -       } while((int)(state & PCI_VPD_FLAG) == event);
31705 +       } while ((int)(state & PCI_VPD_FLAG) == event);
31706
31707         return(0);
31708  }
31709
31710 -#ifdef SKDIAG
31711 +
31712 +#ifdef SK_DIAG
31713
31714  /*
31715   * Read the dword at address 'addr' from the VPD EEPROM.
31716 @@ -124,16 +126,15 @@
31717         Rtv = 0;
31718
31719         VPD_IN32(pAC, IoC, PCI_VPD_DAT_REG, &Rtv);
31720 -
31721 +
31722         SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
31723                 ("VPD read dword data = 0x%x\n",Rtv));
31724         return(Rtv);
31725  }
31726 +#endif /* SK_DIAG */
31727
31728 -#endif /* SKDIAG */
31729 -
31730 -#if 0
31731
31732 +#ifdef XXX
31733  /*
31734         Write the dword 'data' at address 'addr' into the VPD EEPROM, and
31735         verify that the data is written.
31736 @@ -151,7 +152,6 @@
31737  . over all                     3.8 ms          13.2 ms
31738  .
31739
31740 -
31741   Returns       0:      success
31742                         1:      error,  I2C transfer does not terminate
31743                         2:      error,  data verify error
31744 @@ -189,7 +189,8 @@
31745         return(0);
31746  }      /* VpdWriteDWord */
31747
31748 -#endif /* 0 */
31749 +#endif /* XXX */
31750 +
31751
31752  /*
31753   *     Read one Stream of 'len' bytes of VPD data, starting at 'addr' from
31754 @@ -215,7 +216,7 @@
31755         pComp = (SK_U8 *) buf;
31756
31757         for (i = 0; i < Len; i++, buf++) {
31758 -               if ((i%sizeof(SK_U32)) == 0) {
31759 +               if ((i % SZ_LONG) == 0) {
31760                         /*
31761                          * At the begin of each cycle read the Data Reg
31762                          * So it is initialized even if only a few bytes
31763 @@ -233,14 +234,13 @@
31764                         }
31765                 }
31766
31767 -               /* Write current Byte */
31768 -               VPD_OUT8(pAC, IoC, PCI_VPD_DAT_REG + (i%sizeof(SK_U32)),
31769 -                               *(SK_U8*)buf);
31770 +               /* Write current byte */
31771 +               VPD_OUT8(pAC, IoC, PCI_VPD_DAT_REG + (i % SZ_LONG), *(SK_U8*)buf);
31772
31773 -               if (((i%sizeof(SK_U32)) == 3) || (i == (Len - 1))) {
31774 +               if (((i % SZ_LONG) == 3) || (i == (Len - 1))) {
31775                         /* New Address needs to be written to VPD_ADDR reg */
31776                         AdrReg = (SK_U16) Addr;
31777 -                       Addr += sizeof(SK_U32);
31778 +                       Addr += SZ_LONG;
31779                         AdrReg |= VPD_WRITE;    /* WRITE operation */
31780
31781                         VPD_OUT16(pAC, IoC, PCI_VPD_ADR_REG, AdrReg);
31782 @@ -250,7 +250,7 @@
31783                         if (Rtv != 0) {
31784                                 SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
31785                                         ("Write Timed Out\n"));
31786 -                               return(i - (i%sizeof(SK_U32)));
31787 +                               return(i - (i % SZ_LONG));
31788                         }
31789
31790                         /*
31791 @@ -265,18 +265,18 @@
31792                         if (Rtv != 0) {
31793                                 SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
31794                                         ("Verify Timed Out\n"));
31795 -                               return(i - (i%sizeof(SK_U32)));
31796 +                               return(i - (i % SZ_LONG));
31797                         }
31798
31799 -                       for (j = 0; j <= (int)(i%sizeof(SK_U32)); j++, pComp++) {
31800 -
31801 +                       for (j = 0; j <= (int)(i % SZ_LONG); j++, pComp++) {
31802 +
31803                                 VPD_IN8(pAC, IoC, PCI_VPD_DAT_REG + j, &Data);
31804 -
31805 +
31806                                 if (Data != *pComp) {
31807                                         /* Verify Error */
31808                                         SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
31809                                                 ("WriteStream Verify Error\n"));
31810 -                                       return(i - (i%sizeof(SK_U32)) + j);
31811 +                                       return(i - (i % SZ_LONG) + j);
31812                                 }
31813                         }
31814                 }
31815 @@ -284,7 +284,7 @@
31816
31817         return(Len);
31818  }
31819 -
31820 +
31821
31822  /*
31823   *     Read one Stream of 'len' bytes of VPD data, starting at 'addr' from
31824 @@ -304,10 +304,10 @@
31825         int             Rtv;
31826
31827         for (i = 0; i < Len; i++, buf++) {
31828 -               if ((i%sizeof(SK_U32)) == 0) {
31829 +               if ((i % SZ_LONG) == 0) {
31830                         /* New Address needs to be written to VPD_ADDR reg */
31831                         AdrReg = (SK_U16) Addr;
31832 -                       Addr += sizeof(SK_U32);
31833 +                       Addr += SZ_LONG;
31834                         AdrReg &= ~VPD_WRITE;   /* READ operation */
31835
31836                         VPD_OUT16(pAC, IoC, PCI_VPD_ADR_REG, AdrReg);
31837 @@ -318,13 +318,13 @@
31838                                 return(i);
31839                         }
31840                 }
31841 -               VPD_IN8(pAC, IoC, PCI_VPD_DAT_REG + (i%sizeof(SK_U32)),
31842 -                       (SK_U8 *)buf);
31843 +               VPD_IN8(pAC, IoC, PCI_VPD_DAT_REG + (i % SZ_LONG), (SK_U8 *)buf);
31844         }
31845
31846         return(Len);
31847  }
31848
31849 +
31850  /*
31851   *     Read ore writes 'len' bytes of VPD data, starting at 'addr' from
31852   *     or to the I2C EEPROM.
31853 @@ -350,14 +350,14 @@
31854                 return(0);
31855
31856         vpd_rom_size = pAC->vpd.rom_size;
31857 -
31858 +
31859         if (addr > vpd_rom_size - 4) {
31860                 SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
31861                         ("Address error: 0x%x, exp. < 0x%x\n",
31862                         addr, vpd_rom_size - 4));
31863                 return(0);
31864         }
31865 -
31866 +
31867         if (addr + len > vpd_rom_size) {
31868                 len = vpd_rom_size - addr;
31869                 SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
31870 @@ -374,8 +374,8 @@
31871         return(Rtv);
31872  }
31873
31874 -#ifdef SKDIAG
31875
31876 +#if defined (SK_DIAG) || defined (SK_ASF)
31877  /*
31878   *     Read 'len' bytes of VPD data, starting at 'addr'.
31879   *
31880 @@ -391,6 +391,7 @@
31881         return(VpdTransferBlock(pAC, IoC, buf, addr, len, VPD_READ));
31882  }
31883
31884 +
31885  /*
31886   *     Write 'len' bytes of *but to the VPD EEPROM, starting at 'addr'.
31887   *
31888 @@ -405,18 +406,27 @@
31889  {
31890         return(VpdTransferBlock(pAC, IoC, buf, addr, len, VPD_WRITE));
31891  }
31892 -#endif /* SKDIAG */
31893 +#endif /* SK_DIAG */
31894
31895 -/*
31896 - * (re)initialize the VPD buffer
31897 +
31898 +/******************************************************************************
31899   *
31900 - * Reads the VPD data from the EEPROM into the VPD buffer.
31901 - * Get the remaining read only and read / write space.
31902 + *     VpdInit() - (re)initialize the VPD buffer
31903   *
31904 - * return      0:      success
31905 - *             1:      fatal VPD error
31906 + * Description:
31907 + *     Reads the VPD data from the EEPROM into the VPD buffer.
31908 + *     Get the remaining read only and read / write space.
31909 + *
31910 + * Note:
31911 + *     This is a local function and should be used locally only.
31912 + *     However, the ASF module needs to use this function also.
31913 + *     Therfore it has been published.
31914 + *
31915 + * Returns:
31916 + *     0:      success
31917 + *     1:      fatal VPD error
31918   */
31919 -static int VpdInit(
31920 +int VpdInit(
31921  SK_AC  *pAC,   /* Adapters context */
31922  SK_IOC IoC)    /* IO Context */
31923  {
31924 @@ -427,14 +437,14 @@
31925         SK_U16  dev_id;
31926         SK_U32  our_reg2;
31927
31928 -       SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_INIT, ("VpdInit .. "));
31929 -
31930 +       SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_INIT, ("VpdInit ... "));
31931 +
31932         VPD_IN16(pAC, IoC, PCI_DEVICE_ID, &dev_id);
31933 -
31934 +
31935         VPD_IN32(pAC, IoC, PCI_OUR_REG_2, &our_reg2);
31936 -
31937 +
31938         pAC->vpd.rom_size = 256 << ((our_reg2 & PCI_VPD_ROM_SZ) >> 14);
31939 -
31940 +
31941         /*
31942          * this function might get used before the hardware is initialized
31943          * therefore we cannot always trust in GIChipId
31944 @@ -465,19 +475,15 @@
31945                         ("Block Read Error\n"));
31946                 return(1);
31947         }
31948 -
31949 +
31950         pAC->vpd.vpd_size = vpd_size;
31951
31952         /* Asus K8V Se Deluxe bugfix. Correct VPD content */
31953 -       /* MBo April 2004 */
31954 -       if (((unsigned char)pAC->vpd.vpd_buf[0x3f] == 0x38) &&
31955 -           ((unsigned char)pAC->vpd.vpd_buf[0x40] == 0x3c) &&
31956 -           ((unsigned char)pAC->vpd.vpd_buf[0x41] == 0x45)) {
31957 -               printk("sk98lin: Asus mainboard with buggy VPD? "
31958 -                               "Correcting data.\n");
31959 -               pAC->vpd.vpd_buf[0x40] = 0x38;
31960 -       }
31961 +       i = 62;
31962 +       if (!SK_STRNCMP(pAC->vpd.vpd_buf + i, " 8<E", 4)) {
31963
31964 +               pAC->vpd.vpd_buf[i + 2] = '8';
31965 +       }
31966
31967         /* find the end tag of the RO area */
31968         if (!(r = vpd_find_para(pAC, VPD_RV, &rp))) {
31969 @@ -485,9 +491,9 @@
31970                         ("Encoding Error: RV Tag not found\n"));
31971                 return(1);
31972         }
31973 -
31974 +
31975         if (r->p_val + r->p_len > pAC->vpd.vpd_buf + vpd_size/2) {
31976 -               SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
31977 +               SK_DBG_MSG(pAC, SK_DBGMOD_VPD,SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
31978                         ("Encoding Error: Invalid VPD struct size\n"));
31979                 return(1);
31980         }
31981 @@ -497,7 +503,7 @@
31982         for (i = 0, x = 0; (unsigned)i <= (unsigned)vpd_size/2 - r->p_len; i++) {
31983                 x += pAC->vpd.vpd_buf[i];
31984         }
31985 -
31986 +
31987         if (x != 0) {
31988                 /* checksum error */
31989                 SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
31990 @@ -511,7 +517,7 @@
31991                         ("Encoding Error: RV Tag not found\n"));
31992                 return(1);
31993         }
31994 -
31995 +
31996         if (r->p_val < pAC->vpd.vpd_buf + vpd_size/2) {
31997                 SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
31998                         ("Encoding Error: Invalid VPD struct size\n"));
31999 @@ -531,6 +537,7 @@
32000         return(0);
32001  }
32002
32003 +
32004  /*
32005   *     find the Keyword 'key' in the VPD buffer and fills the
32006   *     parameter struct 'p' with it's values
32007 @@ -541,7 +548,7 @@
32008  static SK_VPD_PARA *vpd_find_para(
32009  SK_AC          *pAC,   /* common data base */
32010  const char     *key,   /* keyword to find (e.g. "MN") */
32011 -SK_VPD_PARA *p)                /* parameter description struct */
32012 +SK_VPD_PARA    *p)             /* parameter description struct */
32013  {
32014         char *v ;       /* points to VPD buffer */
32015         int max;        /* Maximum Number of Iterations */
32016 @@ -556,10 +563,10 @@
32017         if (*v != (char)RES_ID) {
32018                 SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
32019                         ("Error: 0x%x missing\n", RES_ID));
32020 -               return NULL;
32021 +               return(0);
32022         }
32023
32024 -       if (strcmp(key, VPD_NAME) == 0) {
32025 +       if (SK_STRCMP(key, VPD_NAME) == 0) {
32026                 p->p_len = VPD_GET_RES_LEN(v);
32027                 p->p_val = VPD_GET_VAL(v);
32028                 SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
32029 @@ -569,7 +576,7 @@
32030
32031         v += 3 + VPD_GET_RES_LEN(v) + 3;
32032         for (;; ) {
32033 -               if (SK_MEMCMP(key,v,2) == 0) {
32034 +               if (SK_MEMCMP(key, v, 2) == 0) {
32035                         p->p_len = VPD_GET_VPD_LEN(v);
32036                         p->p_val = VPD_GET_VAL(v);
32037                         SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
32038 @@ -579,11 +586,11 @@
32039
32040                 /* exit when reaching the "RW" Tag or the maximum of itera. */
32041                 max--;
32042 -               if (SK_MEMCMP(VPD_RW,v,2) == 0 || max == 0) {
32043 +               if (SK_MEMCMP(VPD_RW, v, 2) == 0 || max == 0) {
32044                         break;
32045                 }
32046
32047 -               if (SK_MEMCMP(VPD_RV,v,2) == 0) {
32048 +               if (SK_MEMCMP(VPD_RV, v, 2) == 0) {
32049                         v += 3 + VPD_GET_VPD_LEN(v) + 3;        /* skip VPD-W */
32050                 }
32051                 else {
32052 @@ -600,9 +607,10 @@
32053                         ("Key/Len Encoding error\n"));
32054         }
32055  #endif /* DEBUG */
32056 -       return NULL;
32057 +       return(0);
32058  }
32059
32060 +
32061  /*
32062   *     Move 'n' bytes. Begin with the last byte if 'n' is > 0,
32063   *     Start with the last byte if n is < 0.
32064 @@ -637,6 +645,7 @@
32065         }
32066  }
32067
32068 +
32069  /*
32070   *     setup the VPD keyword 'key' at 'ip'.
32071   *
32072 @@ -653,10 +662,11 @@
32073         p = (SK_VPD_KEY *) ip;
32074         p->p_key[0] = key[0];
32075         p->p_key[1] = key[1];
32076 -       p->p_len = (unsigned char) len;
32077 -       SK_MEMCPY(&p->p_val,buf,len);
32078 +       p->p_len = (unsigned char)len;
32079 +       SK_MEMCPY(&p->p_val, buf, len);
32080  }
32081
32082 +
32083  /*
32084   *     Setup the VPD end tag "RV" / "RW".
32085   *     Also correct the remaining space variables vpd_free_ro / vpd_free_rw.
32086 @@ -682,7 +692,7 @@
32087
32088         if (p->p_key[0] != 'R' || (p->p_key[1] != 'V' && p->p_key[1] != 'W')) {
32089                 /* something wrong here, encoding error */
32090 -               SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
32091 +               SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
32092                         ("Encoding Error: invalid end tag\n"));
32093                 return(1);
32094         }
32095 @@ -714,6 +724,7 @@
32096         return(0);
32097  }
32098
32099 +
32100  /*
32101   *     Insert a VPD keyword into the VPD buffer.
32102   *
32103 @@ -747,11 +758,11 @@
32104
32105         SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
32106                 ("VPD setup para key = %s, val = %s\n",key,buf));
32107 -
32108 +
32109         vpd_size = pAC->vpd.vpd_size;
32110
32111         rtv = 0;
32112 -       ip = NULL;
32113 +       ip = 0;
32114         if (type == VPD_RW_KEY) {
32115                 /* end tag is "RW" */
32116                 free = pAC->vpd.v.vpd_free_rw;
32117 @@ -875,18 +886,18 @@
32118                 }
32119         }
32120
32121 -       if ((signed)strlen(VPD_NAME) + 1 <= *len) {
32122 +       if ((signed)SK_STRLEN(VPD_NAME) + 1 <= *len) {
32123                 v = pAC->vpd.vpd_buf;
32124 -               strcpy(buf,VPD_NAME);
32125 -               n = strlen(VPD_NAME) + 1;
32126 +               SK_STRCPY(buf, VPD_NAME);
32127 +               n = SK_STRLEN(VPD_NAME) + 1;
32128                 buf += n;
32129                 *elements = 1;
32130                 SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_RX,
32131 -                       ("'%c%c' ",v[0],v[1]));
32132 +                       ("'%c%c' ", v[0], v[1]));
32133         }
32134         else {
32135                 *len = 0;
32136 -               SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_ERR,
32137 +               SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
32138                         ("buffer overflow\n"));
32139                 return(2);
32140         }
32141 @@ -894,17 +905,17 @@
32142         v += 3 + VPD_GET_RES_LEN(v) + 3;
32143         for (;; ) {
32144                 /* exit when reaching the "RW" Tag */
32145 -               if (SK_MEMCMP(VPD_RW,v,2) == 0) {
32146 +               if (SK_MEMCMP(VPD_RW, v, 2) == 0) {
32147                         break;
32148                 }
32149
32150 -               if (SK_MEMCMP(VPD_RV,v,2) == 0) {
32151 +               if (SK_MEMCMP(VPD_RV, v, 2) == 0) {
32152                         v += 3 + VPD_GET_VPD_LEN(v) + 3;        /* skip VPD-W */
32153                         continue;
32154                 }
32155
32156                 if (n+3 <= *len) {
32157 -                       SK_MEMCPY(buf,v,2);
32158 +                       SK_MEMCPY(buf, v, 2);
32159                         buf += 2;
32160                         *buf++ = '\0';
32161                         n += 3;
32162 @@ -991,13 +1002,14 @@
32163  {
32164         if ((*key != 'Y' && *key != 'V') ||
32165                 key[1] < '0' || key[1] > 'Z' ||
32166 -               (key[1] > '9' && key[1] < 'A') || strlen(key) != 2) {
32167 +               (key[1] > '9' && key[1] < 'A') || SK_STRLEN(key) != 2) {
32168
32169                 return(SK_FALSE);
32170         }
32171         return(SK_TRUE);
32172  }
32173
32174 +
32175  /*
32176   *     Read the contents of the VPD EEPROM and copy it to the VPD
32177   *     buffer if not already done. Insert/overwrite the keyword 'key'
32178 @@ -1026,7 +1038,7 @@
32179
32180         if ((*key != 'Y' && *key != 'V') ||
32181                 key[1] < '0' || key[1] > 'Z' ||
32182 -               (key[1] > '9' && key[1] < 'A') || strlen(key) != 2) {
32183 +               (key[1] > '9' && key[1] < 'A') || SK_STRLEN(key) != 2) {
32184
32185                 SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
32186                         ("illegal key tag, keyword not written\n"));
32187 @@ -1042,13 +1054,13 @@
32188         }
32189
32190         rtv = 0;
32191 -       len = strlen(buf);
32192 +       len = SK_STRLEN(buf);
32193         if (len > VPD_MAX_LEN) {
32194                 /* cut it */
32195                 len = VPD_MAX_LEN;
32196                 rtv = 2;
32197                 SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
32198 -                       ("keyword too long, cut after %d bytes\n",VPD_MAX_LEN));
32199 +                       ("keyword too long, cut after %d bytes\n", VPD_MAX_LEN));
32200         }
32201         if ((rtv2 = VpdSetupPara(pAC, key, buf, len, VPD_RW_KEY, OWR_KEY)) != 0) {
32202                 SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
32203 @@ -1059,6 +1071,7 @@
32204         return(rtv);
32205  }
32206
32207 +
32208  /*
32209   *     Read the contents of the VPD EEPROM and copy it to the
32210   *     VPD buffer if not already done. Remove the VPD keyword
32211 @@ -1082,7 +1095,7 @@
32212
32213         vpd_size = pAC->vpd.vpd_size;
32214
32215 -       SK_DBG_MSG(pAC,SK_DBGMOD_VPD,SK_DBGCAT_TX,("VPD delete key %s\n",key));
32216 +       SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX, ("VPD delete key %s\n", key));
32217         if ((pAC->vpd.v.vpd_status & VPD_VALID) == 0) {
32218                 if (VpdInit(pAC, IoC) != 0) {
32219                         SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
32220 @@ -1119,6 +1132,7 @@
32221         return(0);
32222  }
32223
32224 +
32225  /*
32226   *     If the VPD buffer contains valid data write the VPD
32227   *     read/write area back to the VPD EEPROM.
32228 @@ -1149,7 +1163,6 @@
32229  }
32230
32231
32232 -
32233  /*
32234   *     Read the contents of the VPD EEPROM and copy it to the VPD buffer
32235   *     if not already done. If the keyword "VF" is not present it will be
32236 @@ -1178,7 +1191,7 @@
32237                 }
32238         }
32239
32240 -       len = strlen(msg);
32241 +       len = SK_STRLEN(msg);
32242         if (len > VPD_MAX_LEN) {
32243                 /* cut it */
32244                 len = VPD_MAX_LEN;
32245 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/skxmac2.c linux-2.6.9.new/drivers/net/sk98lin/skxmac2.c
32246 --- linux-2.6.9.old/drivers/net/sk98lin/skxmac2.c       2004-10-19 05:55:28.000000000 +0800
32247 +++ linux-2.6.9.new/drivers/net/sk98lin/skxmac2.c       2006-12-07 14:35:03.000000000 +0800
32248 @@ -2,8 +2,8 @@
32249   *
32250   * Name:       skxmac2.c
32251   * Project:    Gigabit Ethernet Adapters, Common Modules
32252 - * Version:    $Revision: 1.102 $
32253 - * Date:       $Date: 2003/10/02 16:53:58 $
32254 + * Version:    $Revision: 2.35 $
32255 + * Date:       $Date: 2005/05/24 08:35:04 $
32256   * Purpose:    Contains functions to initialize the MACs and PHYs
32257   *
32258   ******************************************************************************/
32259 @@ -11,13 +11,12 @@
32260  /******************************************************************************
32261   *
32262   *     (C)Copyright 1998-2002 SysKonnect.
32263 - *     (C)Copyright 2002-2003 Marvell.
32264 + *     (C)Copyright 2002-2005 Marvell.
32265   *
32266   *     This program is free software; you can redistribute it and/or modify
32267   *     it under the terms of the GNU General Public License as published by
32268   *     the Free Software Foundation; either version 2 of the License, or
32269   *     (at your option) any later version.
32270 - *
32271   *     The information in this file is provided "AS IS" without warranty.
32272   *
32273   ******************************************************************************/
32274 @@ -37,7 +36,7 @@
32275
32276  #if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
32277  static const char SysKonnectFileId[] =
32278 -       "@(#) $Id: skxmac2.c,v 1.102 2003/10/02 16:53:58 rschmidt Exp $ (C) Marvell.";
32279 +       "@(#) $Id: skxmac2.c,v 2.35 2005/05/24 08:35:04 rschmidt Exp $ (C) Marvell.";
32280  #endif
32281
32282  #ifdef GENESIS
32283 @@ -83,7 +82,7 @@
32284   * Returns:
32285   *     nothing
32286   */
32287 -void SkXmPhyRead(
32288 +int SkXmPhyRead(
32289  SK_AC  *pAC,                   /* Adapter Context */
32290  SK_IOC IoC,                    /* I/O Context */
32291  int            Port,                   /* Port Index (MAC_1 + n) */
32292 @@ -94,13 +93,13 @@
32293         SK_GEPORT       *pPrt;
32294
32295         pPrt = &pAC->GIni.GP[Port];
32296 -
32297 +
32298         /* write the PHY register's address */
32299         XM_OUT16(IoC, Port, XM_PHY_ADDR, PhyReg | pPrt->PhyAddr);
32300 -
32301 +
32302         /* get the PHY register's value */
32303         XM_IN16(IoC, Port, XM_PHY_DATA, pVal);
32304 -
32305 +
32306         if (pPrt->PhyType != SK_PHY_XMAC) {
32307                 do {
32308                         XM_IN16(IoC, Port, XM_MMU_CMD, &Mmu);
32309 @@ -110,6 +109,8 @@
32310                 /* get the PHY register's value */
32311                 XM_IN16(IoC, Port, XM_PHY_DATA, pVal);
32312         }
32313 +
32314 +       return(0);
32315  }      /* SkXmPhyRead */
32316
32317
32318 @@ -122,7 +123,7 @@
32319   * Returns:
32320   *     nothing
32321   */
32322 -void SkXmPhyWrite(
32323 +int SkXmPhyWrite(
32324  SK_AC  *pAC,           /* Adapter Context */
32325  SK_IOC IoC,            /* I/O Context */
32326  int            Port,           /* Port Index (MAC_1 + n) */
32327 @@ -133,26 +134,28 @@
32328         SK_GEPORT       *pPrt;
32329
32330         pPrt = &pAC->GIni.GP[Port];
32331 -
32332 +
32333         if (pPrt->PhyType != SK_PHY_XMAC) {
32334                 do {
32335                         XM_IN16(IoC, Port, XM_MMU_CMD, &Mmu);
32336                         /* wait until 'Busy' is cleared */
32337                 } while ((Mmu & XM_MMU_PHY_BUSY) != 0);
32338         }
32339 -
32340 +
32341         /* write the PHY register's address */
32342         XM_OUT16(IoC, Port, XM_PHY_ADDR, PhyReg | pPrt->PhyAddr);
32343 -
32344 +
32345         /* write the PHY register's value */
32346         XM_OUT16(IoC, Port, XM_PHY_DATA, Val);
32347 -
32348 +
32349         if (pPrt->PhyType != SK_PHY_XMAC) {
32350                 do {
32351                         XM_IN16(IoC, Port, XM_MMU_CMD, &Mmu);
32352                         /* wait until 'Busy' is cleared */
32353                 } while ((Mmu & XM_MMU_PHY_BUSY) != 0);
32354         }
32355 +
32356 +       return(0);
32357  }      /* SkXmPhyWrite */
32358  #endif /* GENESIS */
32359
32360 @@ -167,7 +170,7 @@
32361   * Returns:
32362   *     nothing
32363   */
32364 -void SkGmPhyRead(
32365 +int SkGmPhyRead(
32366  SK_AC  *pAC,                   /* Adapter Context */
32367  SK_IOC IoC,                    /* I/O Context */
32368  int            Port,                   /* Port Index (MAC_1 + n) */
32369 @@ -176,52 +179,72 @@
32370  {
32371         SK_U16  Ctrl;
32372         SK_GEPORT       *pPrt;
32373 -#ifdef VCPU
32374 -       u_long SimCyle;
32375 -       u_long SimLowTime;
32376 -
32377 -       VCPUgetTime(&SimCyle, &SimLowTime);
32378 -       VCPUprintf(0, "SkGmPhyRead(%u), SimCyle=%u, SimLowTime=%u\n",
32379 -               PhyReg, SimCyle, SimLowTime);
32380 -#endif /* VCPU */
32381 -
32382 +       SK_U32  StartTime;
32383 +       SK_U32  CurrTime;
32384 +       SK_U32  Delta;
32385 +
32386         pPrt = &pAC->GIni.GP[Port];
32387 -
32388 +
32389         /* set PHY-Register offset and 'Read' OpCode (= 1) */
32390         *pVal = (SK_U16)(GM_SMI_CT_PHY_AD(pPrt->PhyAddr) |
32391                 GM_SMI_CT_REG_AD(PhyReg) | GM_SMI_CT_OP_RD);
32392
32393         GM_OUT16(IoC, Port, GM_SMI_CTRL, *pVal);
32394
32395 -       GM_IN16(IoC, Port, GM_SMI_CTRL, &Ctrl);
32396 -
32397 +#ifdef DEBUG
32398         /* additional check for MDC/MDIO activity */
32399 -       if ((Ctrl & GM_SMI_CT_BUSY) == 0) {
32400 +       GM_IN16(IoC, Port, GM_SMI_CTRL, &Ctrl);
32401 +
32402 +       if ((Ctrl & GM_SMI_CT_OP_RD) == 0) {
32403 +
32404 +               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
32405 +                       ("PHY read impossible on Port %d (Ctrl=0x%04x)\n", Port, Ctrl));
32406 +
32407                 *pVal = 0;
32408 -               return;
32409 +               return(1);
32410         }
32411 +#endif /* DEBUG */
32412
32413         *pVal |= GM_SMI_CT_BUSY;
32414 -
32415 -       do {
32416 +
32417 +       SK_IN32(IoC, GMAC_TI_ST_VAL, &StartTime);
32418 +
32419 +       do {    /* wait until 'Busy' is cleared and 'ReadValid' is set */
32420  #ifdef VCPU
32421                 VCPUwaitTime(1000);
32422  #endif /* VCPU */
32423
32424 +               SK_IN32(IoC, GMAC_TI_ST_VAL, &CurrTime);
32425 +
32426 +               if (CurrTime >= StartTime) {
32427 +                       Delta = CurrTime - StartTime;
32428 +               }
32429 +               else {
32430 +                       Delta = CurrTime + ~StartTime + 1;
32431 +               }
32432 +
32433 +               if (Delta > SK_PHY_ACC_TO) {
32434 +
32435 +                       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
32436 +                               ("PHY read timeout on Port %d (Ctrl=0x%04x)\n", Port, Ctrl));
32437 +                       return(1);
32438 +               }
32439 +
32440                 GM_IN16(IoC, Port, GM_SMI_CTRL, &Ctrl);
32441
32442 -       /* wait until 'ReadValid' is set */
32443 -       } while (Ctrl == *pVal);
32444 -
32445 -       /* get the PHY register's value */
32446 +               /* Error on reading SMI Control Register */
32447 +               if (Ctrl == 0xffff) {
32448 +                       return(1);
32449 +               }
32450 +
32451 +       } while ((Ctrl ^ *pVal) != (GM_SMI_CT_RD_VAL | GM_SMI_CT_BUSY));
32452 +
32453         GM_IN16(IoC, Port, GM_SMI_DATA, pVal);
32454
32455 -#ifdef VCPU
32456 -       VCPUgetTime(&SimCyle, &SimLowTime);
32457 -       VCPUprintf(0, "VCPUgetTime(), SimCyle=%u, SimLowTime=%u\n",
32458 -               SimCyle, SimLowTime);
32459 -#endif /* VCPU */
32460 +       /* dummy read after GM_IN16() */
32461 +       SK_IN32(IoC, GMAC_TI_ST_VAL, &CurrTime);
32462
32463 +       return(0);
32464  }      /* SkGmPhyRead */
32465
32466
32467 @@ -234,7 +257,7 @@
32468   * Returns:
32469   *     nothing
32470   */
32471 -void SkGmPhyWrite(
32472 +int SkGmPhyWrite(
32473  SK_AC  *pAC,           /* Adapter Context */
32474  SK_IOC IoC,            /* I/O Context */
32475  int            Port,           /* Port Index (MAC_1 + n) */
32476 @@ -243,54 +266,74 @@
32477  {
32478         SK_U16  Ctrl;
32479         SK_GEPORT       *pPrt;
32480 -#ifdef VCPU
32481 -       SK_U32  DWord;
32482 -       u_long  SimCyle;
32483 -       u_long  SimLowTime;
32484 -
32485 -       VCPUgetTime(&SimCyle, &SimLowTime);
32486 -       VCPUprintf(0, "SkGmPhyWrite(Reg=%u, Val=0x%04x), SimCyle=%u, SimLowTime=%u\n",
32487 -               PhyReg, Val, SimCyle, SimLowTime);
32488 -#endif /* VCPU */
32489 -
32490 +       SK_U32  StartTime;
32491 +       SK_U32  CurrTime;
32492 +       SK_U32  Delta;
32493 +
32494 +       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
32495 +               ("SkGmPhyWrite Port:%d, Reg=%d, Val=0x%04X\n",
32496 +                Port, PhyReg, Val));
32497 +
32498         pPrt = &pAC->GIni.GP[Port];
32499 -
32500 +
32501         /* write the PHY register's value */
32502         GM_OUT16(IoC, Port, GM_SMI_DATA, Val);
32503 -
32504 -       /* set PHY-Register offset and 'Write' OpCode (= 0) */
32505 -       Val = GM_SMI_CT_PHY_AD(pPrt->PhyAddr) | GM_SMI_CT_REG_AD(PhyReg);
32506
32507 -       GM_OUT16(IoC, Port, GM_SMI_CTRL, Val);
32508 -
32509 -       GM_IN16(IoC, Port, GM_SMI_CTRL, &Ctrl);
32510 -
32511 +#ifdef DEBUG
32512         /* additional check for MDC/MDIO activity */
32513 -       if ((Ctrl & GM_SMI_CT_BUSY) == 0) {
32514 -               return;
32515 +       GM_IN16(IoC, Port, GM_SMI_DATA, &Ctrl);
32516 +
32517 +       if (Ctrl != Val) {
32518 +
32519 +               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
32520 +                       ("PHY write impossible on Port %d (Val=0x%04x)\n", Port, Ctrl));
32521 +
32522 +               return(1);
32523         }
32524 -
32525 -       Val |= GM_SMI_CT_BUSY;
32526 +#endif /* DEBUG */
32527
32528 -       do {
32529 -#ifdef VCPU
32530 -               /* read Timer value */
32531 -               SK_IN32(IoC, B2_TI_VAL, &DWord);
32532 +       /* set PHY-Register offset and 'Write' OpCode (= 0) */
32533 +       Ctrl = (SK_U16)(GM_SMI_CT_PHY_AD(pPrt->PhyAddr) |
32534 +               GM_SMI_CT_REG_AD(PhyReg));
32535
32536 +       GM_OUT16(IoC, Port, GM_SMI_CTRL, Ctrl);
32537 +
32538 +       SK_IN32(IoC, GMAC_TI_ST_VAL, &StartTime);
32539 +
32540 +       do {    /* wait until 'Busy' is cleared */
32541 +#ifdef VCPU
32542                 VCPUwaitTime(1000);
32543  #endif /* VCPU */
32544
32545 +               SK_IN32(IoC, GMAC_TI_ST_VAL, &CurrTime);
32546 +
32547 +               if (CurrTime >= StartTime) {
32548 +                       Delta = CurrTime - StartTime;
32549 +               }
32550 +               else {
32551 +                       Delta = CurrTime + ~StartTime + 1;
32552 +               }
32553 +
32554 +               if (Delta > SK_PHY_ACC_TO) {
32555 +
32556 +                       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
32557 +                               ("PHY write timeout on Port %d (Ctrl=0x%04x)\n", Port, Ctrl));
32558 +                       return(1);
32559 +               }
32560 +
32561                 GM_IN16(IoC, Port, GM_SMI_CTRL, &Ctrl);
32562
32563 -       /* wait until 'Busy' is cleared */
32564 -       } while (Ctrl == Val);
32565 +               /* Error on reading SMI Control Register */
32566 +               if (Ctrl == 0xffff) {
32567 +                       return(1);
32568 +               }
32569
32570 -#ifdef VCPU
32571 -       VCPUgetTime(&SimCyle, &SimLowTime);
32572 -       VCPUprintf(0, "VCPUgetTime(), SimCyle=%u, SimLowTime=%u\n",
32573 -               SimCyle, SimLowTime);
32574 -#endif /* VCPU */
32575 +       } while ((Ctrl & GM_SMI_CT_BUSY) != 0);
32576
32577 +       /* dummy read after GM_IN16() */
32578 +       SK_IN32(IoC, GMAC_TI_ST_VAL, &CurrTime);
32579 +
32580 +       return(0);
32581  }      /* SkGmPhyWrite */
32582  #endif /* YUKON */
32583
32584 @@ -312,16 +355,8 @@
32585  int            PhyReg,         /* Register Address (Offset) */
32586  SK_U16 *pVal)          /* Pointer to Value */
32587  {
32588 -       void (*r_func)(SK_AC *pAC, SK_IOC IoC, int Port, int Reg, SK_U16 *pVal);
32589
32590 -       if (pAC->GIni.GIGenesis) {
32591 -               r_func = SkXmPhyRead;
32592 -       }
32593 -       else {
32594 -               r_func = SkGmPhyRead;
32595 -       }
32596 -
32597 -       r_func(pAC, IoC, Port, PhyReg, pVal);
32598 +       pAC->GIni.GIFunc.pFnMacPhyRead(pAC, IoC, Port, PhyReg, pVal);
32599  }      /* SkGePhyRead */
32600
32601
32602 @@ -341,16 +376,8 @@
32603  int            PhyReg,         /* Register Address (Offset) */
32604  SK_U16 Val)            /* Value */
32605  {
32606 -       void (*w_func)(SK_AC *pAC, SK_IOC IoC, int Port, int Reg, SK_U16 Val);
32607
32608 -       if (pAC->GIni.GIGenesis) {
32609 -               w_func = SkXmPhyWrite;
32610 -       }
32611 -       else {
32612 -               w_func = SkGmPhyWrite;
32613 -       }
32614 -
32615 -       w_func(pAC, IoC, Port, PhyReg, Val);
32616 +       pAC->GIni.GIFunc.pFnMacPhyWrite(pAC, IoC, Port, PhyReg, Val);
32617  }      /* SkGePhyWrite */
32618  #endif /* SK_DIAG */
32619
32620 @@ -360,15 +387,15 @@
32621   *     SkMacPromiscMode() - Enable / Disable Promiscuous Mode
32622   *
32623   * Description:
32624 - *   enables / disables promiscuous mode by setting Mode Register (XMAC) or
32625 - *   Receive Control Register (GMAC) dep. on board type
32626 + *     enables / disables promiscuous mode by setting Mode Register (XMAC) or
32627 + *     Receive Control Register (GMAC) dep. on board type
32628   *
32629   * Returns:
32630   *     nothing
32631   */
32632  void SkMacPromiscMode(
32633 -SK_AC  *pAC,   /* adapter context */
32634 -SK_IOC IoC,    /* IO context */
32635 +SK_AC  *pAC,   /* Adapter Context */
32636 +SK_IOC IoC,    /* I/O Context */
32637  int            Port,   /* Port Index (MAC_1 + n) */
32638  SK_BOOL        Enable) /* Enable / Disable */
32639  {
32640 @@ -377,11 +404,11 @@
32641  #endif
32642  #ifdef GENESIS
32643         SK_U32  MdReg;
32644 -#endif
32645 +#endif
32646
32647  #ifdef GENESIS
32648         if (pAC->GIni.GIGenesis) {
32649 -
32650 +
32651                 XM_IN32(IoC, Port, XM_MODE, &MdReg);
32652                 /* enable or disable promiscuous mode */
32653                 if (Enable) {
32654 @@ -394,12 +421,12 @@
32655                 XM_OUT32(IoC, Port, XM_MODE, MdReg);
32656         }
32657  #endif /* GENESIS */
32658 -
32659 +
32660  #ifdef YUKON
32661         if (pAC->GIni.GIYukon) {
32662 -
32663 +
32664                 GM_IN16(IoC, Port, GM_RX_CTRL, &RcReg);
32665 -
32666 +
32667                 /* enable or disable unicast and multicast filtering */
32668                 if (Enable) {
32669                         RcReg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
32670 @@ -420,28 +447,28 @@
32671   *     SkMacHashing() - Enable / Disable Hashing
32672   *
32673   * Description:
32674 - *   enables / disables hashing by setting Mode Register (XMAC) or
32675 - *   Receive Control Register (GMAC) dep. on board type
32676 + *     enables / disables hashing by setting Mode Register (XMAC) or
32677 + *     Receive Control Register (GMAC) dep. on board type
32678   *
32679   * Returns:
32680   *     nothing
32681   */
32682  void SkMacHashing(
32683 -SK_AC  *pAC,   /* adapter context */
32684 -SK_IOC IoC,    /* IO context */
32685 +SK_AC  *pAC,   /* Adapter Context */
32686 +SK_IOC IoC,    /* I/O Context */
32687  int            Port,   /* Port Index (MAC_1 + n) */
32688  SK_BOOL        Enable) /* Enable / Disable */
32689  {
32690  #ifdef YUKON
32691         SK_U16  RcReg;
32692 -#endif
32693 +#endif
32694  #ifdef GENESIS
32695         SK_U32  MdReg;
32696  #endif
32697
32698  #ifdef GENESIS
32699         if (pAC->GIni.GIGenesis) {
32700 -
32701 +
32702                 XM_IN32(IoC, Port, XM_MODE, &MdReg);
32703                 /* enable or disable hashing */
32704                 if (Enable) {
32705 @@ -454,12 +481,12 @@
32706                 XM_OUT32(IoC, Port, XM_MODE, MdReg);
32707         }
32708  #endif /* GENESIS */
32709 -
32710 +
32711  #ifdef YUKON
32712         if (pAC->GIni.GIYukon) {
32713 -
32714 +
32715                 GM_IN16(IoC, Port, GM_RX_CTRL, &RcReg);
32716 -
32717 +
32718                 /* enable or disable multicast filtering */
32719                 if (Enable) {
32720                         RcReg |= GM_RXCR_MCF_ENA;
32721 @@ -487,8 +514,8 @@
32722   *      - don't set XMR_FS_ERR in status       SK_LENERR_OK_ON/OFF
32723   *        for inrange length error frames
32724   *      - don't set XMR_FS_ERR in status       SK_BIG_PK_OK_ON/OFF
32725 - *        for frames > 1514 bytes
32726 - *   - enable Rx of own packets         SK_SELF_RX_ON/OFF
32727 + *             for frames > 1514 bytes
32728 + *     - enable Rx of own packets                      SK_SELF_RX_ON/OFF
32729   *
32730   *     for incoming packets may be enabled/disabled by this function.
32731   *     Additional modes may be added later.
32732 @@ -499,11 +526,11 @@
32733   *     nothing
32734   */
32735  static void SkXmSetRxCmd(
32736 -SK_AC  *pAC,           /* adapter context */
32737 -SK_IOC IoC,            /* IO context */
32738 +SK_AC  *pAC,           /* Adapter Context */
32739 +SK_IOC IoC,            /* I/O Context */
32740  int            Port,           /* Port Index (MAC_1 + n) */
32741  int            Mode)           /* Mode is SK_STRIP_FCS_ON/OFF, SK_STRIP_PAD_ON/OFF,
32742 -                                          SK_LENERR_OK_ON/OFF, or SK_BIG_PK_OK_ON/OFF */
32743 +                                               SK_LENERR_OK_ON/OFF, or SK_BIG_PK_OK_ON/OFF */
32744  {
32745         SK_U16  OldRxCmd;
32746         SK_U16  RxCmd;
32747 @@ -511,7 +538,7 @@
32748         XM_IN16(IoC, Port, XM_RX_CMD, &OldRxCmd);
32749
32750         RxCmd = OldRxCmd;
32751 -
32752 +
32753         switch (Mode & (SK_STRIP_FCS_ON | SK_STRIP_FCS_OFF)) {
32754         case SK_STRIP_FCS_ON:
32755                 RxCmd |= XM_RX_STRIP_FCS;
32756 @@ -572,8 +599,8 @@
32757   *     The features
32758   *      - FCS (CRC) stripping,                         SK_STRIP_FCS_ON/OFF
32759   *      - don't set GMR_FS_LONG_ERR            SK_BIG_PK_OK_ON/OFF
32760 - *        for frames > 1514 bytes
32761 - *   - enable Rx of own packets         SK_SELF_RX_ON/OFF
32762 + *             for frames > 1514 bytes
32763 + *     - enable Rx of own packets                      SK_SELF_RX_ON/OFF
32764   *
32765   *     for incoming packets may be enabled/disabled by this function.
32766   *     Additional modes may be added later.
32767 @@ -584,20 +611,17 @@
32768   *     nothing
32769   */
32770  static void SkGmSetRxCmd(
32771 -SK_AC  *pAC,           /* adapter context */
32772 -SK_IOC IoC,            /* IO context */
32773 +SK_AC  *pAC,           /* Adapter Context */
32774 +SK_IOC IoC,            /* I/O Context */
32775  int            Port,           /* Port Index (MAC_1 + n) */
32776  int            Mode)           /* Mode is SK_STRIP_FCS_ON/OFF, SK_STRIP_PAD_ON/OFF,
32777 -                                          SK_LENERR_OK_ON/OFF, or SK_BIG_PK_OK_ON/OFF */
32778 +                                               SK_LENERR_OK_ON/OFF, or SK_BIG_PK_OK_ON/OFF */
32779  {
32780 -       SK_U16  OldRxCmd;
32781         SK_U16  RxCmd;
32782
32783         if ((Mode & (SK_STRIP_FCS_ON | SK_STRIP_FCS_OFF)) != 0) {
32784 -
32785 -               GM_IN16(IoC, Port, GM_RX_CTRL, &OldRxCmd);
32786
32787 -               RxCmd = OldRxCmd;
32788 +               GM_IN16(IoC, Port, GM_RX_CTRL, &RxCmd);
32789
32790                 if ((Mode & SK_STRIP_FCS_ON) != 0) {
32791                         RxCmd |= GM_RXCR_CRC_DIS;
32792 @@ -605,17 +629,13 @@
32793                 else {
32794                         RxCmd &= ~GM_RXCR_CRC_DIS;
32795                 }
32796 -               /* Write the new mode to the Rx control register if required */
32797 -               if (OldRxCmd != RxCmd) {
32798 -                       GM_OUT16(IoC, Port, GM_RX_CTRL, RxCmd);
32799 -               }
32800 +               /* Write the new mode to the Rx Control register */
32801 +               GM_OUT16(IoC, Port, GM_RX_CTRL, RxCmd);
32802         }
32803
32804         if ((Mode & (SK_BIG_PK_OK_ON | SK_BIG_PK_OK_OFF)) != 0) {
32805 -
32806 -               GM_IN16(IoC, Port, GM_SERIAL_MODE, &OldRxCmd);
32807
32808 -               RxCmd = OldRxCmd;
32809 +               GM_IN16(IoC, Port, GM_SERIAL_MODE, &RxCmd);
32810
32811                 if ((Mode & SK_BIG_PK_OK_ON) != 0) {
32812                         RxCmd |= GM_SMOD_JUMBO_ENA;
32813 @@ -623,10 +643,8 @@
32814                 else {
32815                         RxCmd &= ~GM_SMOD_JUMBO_ENA;
32816                 }
32817 -               /* Write the new mode to the Rx control register if required */
32818 -               if (OldRxCmd != RxCmd) {
32819 -                       GM_OUT16(IoC, Port, GM_SERIAL_MODE, RxCmd);
32820 -               }
32821 +               /* Write the new mode to the Serial Mode register */
32822 +               GM_OUT16(IoC, Port, GM_SERIAL_MODE, RxCmd);
32823         }
32824  }      /* SkGmSetRxCmd */
32825
32826 @@ -641,17 +659,17 @@
32827   *     nothing
32828   */
32829  void SkMacSetRxCmd(
32830 -SK_AC  *pAC,           /* adapter context */
32831 -SK_IOC IoC,            /* IO context */
32832 +SK_AC  *pAC,           /* Adapter Context */
32833 +SK_IOC IoC,            /* I/O Context */
32834  int            Port,           /* Port Index (MAC_1 + n) */
32835  int            Mode)           /* Rx Mode */
32836  {
32837         if (pAC->GIni.GIGenesis) {
32838 -
32839 +
32840                 SkXmSetRxCmd(pAC, IoC, Port, Mode);
32841         }
32842         else {
32843 -
32844 +
32845                 SkGmSetRxCmd(pAC, IoC, Port, Mode);
32846         }
32847
32848 @@ -668,15 +686,15 @@
32849   *     nothing
32850   */
32851  void SkMacCrcGener(
32852 -SK_AC  *pAC,   /* adapter context */
32853 -SK_IOC IoC,    /* IO context */
32854 +SK_AC  *pAC,   /* Adapter Context */
32855 +SK_IOC IoC,    /* I/O Context */
32856  int            Port,   /* Port Index (MAC_1 + n) */
32857  SK_BOOL        Enable) /* Enable / Disable */
32858  {
32859         SK_U16  Word;
32860
32861         if (pAC->GIni.GIGenesis) {
32862 -
32863 +
32864                 XM_IN16(IoC, Port, XM_TX_CMD, &Word);
32865
32866                 if (Enable) {
32867 @@ -689,9 +707,9 @@
32868                 XM_OUT16(IoC, Port, XM_TX_CMD, Word);
32869         }
32870         else {
32871 -
32872 +
32873                 GM_IN16(IoC, Port, GM_TX_CTRL, &Word);
32874 -
32875 +
32876                 if (Enable) {
32877                         Word &= ~GM_TXCR_CRC_DIS;
32878                 }
32879 @@ -721,14 +739,14 @@
32880   *     nothing
32881   */
32882  void SkXmClrExactAddr(
32883 -SK_AC  *pAC,           /* adapter context */
32884 -SK_IOC IoC,            /* IO context */
32885 +SK_AC  *pAC,           /* Adapter Context */
32886 +SK_IOC IoC,            /* I/O Context */
32887  int            Port,           /* Port Index (MAC_1 + n) */
32888  int            StartNum,       /* Begin with this Address Register Index (0..15) */
32889  int            StopNum)        /* Stop after finished with this Register Idx (0..15) */
32890  {
32891         int             i;
32892 -       SK_U16  ZeroAddr[3] = {0x0000, 0x0000, 0x0000};
32893 +       SK_U16  ZeroAddr[3] = {0, 0, 0};
32894
32895         if ((unsigned)StartNum > 15 || (unsigned)StopNum > 15 ||
32896                 StartNum > StopNum) {
32897 @@ -738,7 +756,7 @@
32898         }
32899
32900         for (i = StartNum; i <= StopNum; i++) {
32901 -               XM_OUTADDR(IoC, Port, XM_EXM(i), &ZeroAddr[0]);
32902 +               XM_OUTADDR(IoC, Port, XM_EXM(i), ZeroAddr);
32903         }
32904  }      /* SkXmClrExactAddr */
32905  #endif /* GENESIS */
32906 @@ -755,21 +773,21 @@
32907   *     nothing
32908   */
32909  void SkMacFlushTxFifo(
32910 -SK_AC  *pAC,   /* adapter context */
32911 -SK_IOC IoC,    /* IO context */
32912 +SK_AC  *pAC,   /* Adapter Context */
32913 +SK_IOC IoC,    /* I/O Context */
32914  int            Port)   /* Port Index (MAC_1 + n) */
32915  {
32916  #ifdef GENESIS
32917         SK_U32  MdReg;
32918
32919         if (pAC->GIni.GIGenesis) {
32920 -
32921 +
32922                 XM_IN32(IoC, Port, XM_MODE, &MdReg);
32923
32924                 XM_OUT32(IoC, Port, XM_MODE, MdReg | XM_MD_FTF);
32925         }
32926  #endif /* GENESIS */
32927 -
32928 +
32929  #ifdef YUKON
32930         if (pAC->GIni.GIYukon) {
32931                 /* no way to flush the FIFO we have to issue a reset */
32932 @@ -791,8 +809,8 @@
32933   *     nothing
32934   */
32935  void SkMacFlushRxFifo(
32936 -SK_AC  *pAC,   /* adapter context */
32937 -SK_IOC IoC,    /* IO context */
32938 +SK_AC  *pAC,   /* Adapter Context */
32939 +SK_IOC IoC,    /* I/O Context */
32940  int            Port)   /* Port Index (MAC_1 + n) */
32941  {
32942  #ifdef GENESIS
32943 @@ -805,7 +823,7 @@
32944                 XM_OUT32(IoC, Port, XM_MODE, MdReg | XM_MD_FRF);
32945         }
32946  #endif /* GENESIS */
32947 -
32948 +
32949  #ifdef YUKON
32950         if (pAC->GIni.GIYukon) {
32951                 /* no way to flush the FIFO we have to issue a reset */
32952 @@ -853,23 +871,23 @@
32953   *     nothing
32954   */
32955  static void SkXmSoftRst(
32956 -SK_AC  *pAC,   /* adapter context */
32957 -SK_IOC IoC,    /* IO context */
32958 +SK_AC  *pAC,   /* Adapter Context */
32959 +SK_IOC IoC,    /* I/O Context */
32960  int            Port)   /* Port Index (MAC_1 + n) */
32961  {
32962 -       SK_U16  ZeroAddr[4] = {0x0000, 0x0000, 0x0000, 0x0000};
32963 -
32964 +       SK_U16  ZeroAddr[4] = {0, 0, 0, 0};
32965 +
32966         /* reset the statistics module */
32967         XM_OUT32(IoC, Port, XM_GP_PORT, XM_GP_RES_STAT);
32968
32969         /* disable all XMAC IRQs */
32970         XM_OUT16(IoC, Port, XM_IMSK, 0xffff);
32971 -
32972 +
32973         XM_OUT32(IoC, Port, XM_MODE, 0);                /* clear Mode Reg */
32974 -
32975 +
32976         XM_OUT16(IoC, Port, XM_TX_CMD, 0);              /* reset TX CMD Reg */
32977         XM_OUT16(IoC, Port, XM_RX_CMD, 0);              /* reset RX CMD Reg */
32978 -
32979 +
32980         /* disable all PHY IRQs */
32981         switch (pAC->GIni.GP[Port].PhyType) {
32982         case SK_PHY_BCOM:
32983 @@ -887,13 +905,13 @@
32984         }
32985
32986         /* clear the Hash Register */
32987 -       XM_OUTHASH(IoC, Port, XM_HSM, &ZeroAddr);
32988 +       XM_OUTHASH(IoC, Port, XM_HSM, ZeroAddr);
32989
32990         /* clear the Exact Match Address registers */
32991         SkXmClrExactAddr(pAC, IoC, Port, 0, 15);
32992 -
32993 +
32994         /* clear the Source Check Address registers */
32995 -       XM_OUTHASH(IoC, Port, XM_SRC_CHK, &ZeroAddr);
32996 +       XM_OUTHASH(IoC, Port, XM_SRC_CHK, ZeroAddr);
32997
32998  }      /* SkXmSoftRst */
32999
33000 @@ -916,8 +934,8 @@
33001   *     nothing
33002   */
33003  static void SkXmHardRst(
33004 -SK_AC  *pAC,   /* adapter context */
33005 -SK_IOC IoC,    /* IO context */
33006 +SK_AC  *pAC,   /* Adapter Context */
33007 +SK_IOC IoC,    /* I/O Context */
33008  int            Port)   /* Port Index (MAC_1 + n) */
33009  {
33010         SK_U32  Reg;
33011 @@ -940,19 +958,19 @@
33012                         }
33013
33014                         SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), MFF_SET_MAC_RST);
33015 -
33016 +
33017                         SK_IN16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), &Word);
33018 -
33019 +
33020                 } while ((Word & MFF_SET_MAC_RST) == 0);
33021         }
33022
33023         /* For external PHYs there must be special handling */
33024         if (pAC->GIni.GP[Port].PhyType != SK_PHY_XMAC) {
33025 -
33026 +
33027                 SK_IN32(IoC, B2_GP_IO, &Reg);
33028 -
33029 +
33030                 if (Port == 0) {
33031 -                       Reg |= GP_DIR_0;        /* set to output */
33032 +                       Reg |= GP_DIR_0;        /* set to output */
33033                         Reg &= ~GP_IO_0;        /* set PHY reset (active low) */
33034                 }
33035                 else {
33036 @@ -978,12 +996,12 @@
33037   *     nothing
33038   */
33039  static void SkXmClearRst(
33040 -SK_AC  *pAC,   /* adapter context */
33041 -SK_IOC IoC,    /* IO context */
33042 +SK_AC  *pAC,   /* Adapter Context */
33043 +SK_IOC IoC,    /* I/O Context */
33044  int            Port)   /* Port Index (MAC_1 + n) */
33045  {
33046         SK_U32  DWord;
33047 -
33048 +
33049         /* clear HW reset */
33050         SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), MFF_CLR_MAC_RST);
33051
33052 @@ -1000,7 +1018,7 @@
33053                 /* Clear PHY reset */
33054                 SK_OUT32(IoC, B2_GP_IO, DWord);
33055
33056 -               /* Enable GMII interface */
33057 +               /* enable GMII interface */
33058                 XM_OUT16(IoC, Port, XM_HW_CFG, XM_HW_GMII_MD);
33059         }
33060  }      /* SkXmClearRst */
33061 @@ -1020,8 +1038,8 @@
33062   *     nothing
33063   */
33064  static void SkGmSoftRst(
33065 -SK_AC  *pAC,   /* adapter context */
33066 -SK_IOC IoC,    /* IO context */
33067 +SK_AC  *pAC,   /* Adapter Context */
33068 +SK_IOC IoC,    /* I/O Context */
33069  int            Port)   /* Port Index (MAC_1 + n) */
33070  {
33071         SK_U16  EmptyHash[4] = {0x0000, 0x0000, 0x0000, 0x0000};
33072 @@ -1030,19 +1048,18 @@
33073         /* reset the statistics module */
33074
33075         /* disable all GMAC IRQs */
33076 -       SK_OUT8(IoC, GMAC_IRQ_MSK, 0);
33077 -
33078 +       SK_OUT8(IoC, MR_ADDR(Port, GMAC_IRQ_MSK), 0);
33079 +
33080         /* disable all PHY IRQs */
33081         SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_INT_MASK, 0);
33082 -
33083 +
33084         /* clear the Hash Register */
33085         GM_OUTHASH(IoC, Port, GM_MC_ADDR_H1, EmptyHash);
33086
33087 -       /* Enable Unicast and Multicast filtering */
33088 +       /* enable Unicast and Multicast filtering */
33089         GM_IN16(IoC, Port, GM_RX_CTRL, &RxCtrl);
33090 -
33091 -       GM_OUT16(IoC, Port, GM_RX_CTRL,
33092 -               (SK_U16)(RxCtrl | GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA));
33093 +
33094 +       GM_OUT16(IoC, Port, GM_RX_CTRL, RxCtrl | GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
33095
33096  }      /* SkGmSoftRst */
33097
33098 @@ -1057,16 +1074,16 @@
33099   *     nothing
33100   */
33101  static void SkGmHardRst(
33102 -SK_AC  *pAC,   /* adapter context */
33103 -SK_IOC IoC,    /* IO context */
33104 +SK_AC  *pAC,   /* Adapter Context */
33105 +SK_IOC IoC,    /* I/O Context */
33106  int            Port)   /* Port Index (MAC_1 + n) */
33107  {
33108         SK_U32  DWord;
33109 -
33110 +
33111         /* WA code for COMA mode */
33112         if (pAC->GIni.GIYukonLite &&
33113 -               pAC->GIni.GIChipRev == CHIP_REV_YU_LITE_A3) {
33114 -
33115 +               pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) {
33116 +
33117                 SK_IN32(IoC, B2_GP_IO, &DWord);
33118
33119                 DWord |= (GP_DIR_9 | GP_IO_9);
33120 @@ -1076,10 +1093,10 @@
33121         }
33122
33123         /* set GPHY Control reset */
33124 -       SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), GPC_RST_SET);
33125 +       SK_OUT8(IoC, MR_ADDR(Port, GPHY_CTRL), (SK_U8)GPC_RST_SET);
33126
33127         /* set GMAC Control reset */
33128 -       SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_RST_SET);
33129 +       SK_OUT8(IoC, MR_ADDR(Port, GMAC_CTRL), (SK_U8)GMC_RST_SET);
33130
33131  }      /* SkGmHardRst */
33132
33133 @@ -1094,24 +1111,27 @@
33134   *     nothing
33135   */
33136  static void SkGmClearRst(
33137 -SK_AC  *pAC,   /* adapter context */
33138 -SK_IOC IoC,    /* IO context */
33139 +SK_AC  *pAC,   /* Adapter Context */
33140 +SK_IOC IoC,    /* I/O Context */
33141  int            Port)   /* Port Index (MAC_1 + n) */
33142  {
33143         SK_U32  DWord;
33144 -
33145 +       SK_U16  PhyId0;
33146 +       SK_U16  PhyId1;
33147 +       SK_U16  Word;
33148 +
33149  #ifdef XXX
33150 -               /* clear GMAC Control reset */
33151 -               SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_RST_CLR);
33152 +       /* clear GMAC Control reset */
33153 +       SK_OUT8(IoC, MR_ADDR(Port, GMAC_CTRL), (SK_U8)GMC_RST_CLR);
33154
33155 -               /* set GMAC Control reset */
33156 -               SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_RST_SET);
33157 +       /* set GMAC Control reset */
33158 +       SK_OUT8(IoC, MR_ADDR(Port, GMAC_CTRL), (SK_U8)GMC_RST_SET);
33159  #endif /* XXX */
33160
33161         /* WA code for COMA mode */
33162         if (pAC->GIni.GIYukonLite &&
33163 -               pAC->GIni.GIChipRev == CHIP_REV_YU_LITE_A3) {
33164 -
33165 +               pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) {
33166 +
33167                 SK_IN32(IoC, B2_GP_IO, &DWord);
33168
33169                 DWord |= GP_DIR_9;              /* set to output */
33170 @@ -1121,30 +1141,74 @@
33171                 SK_OUT32(IoC, B2_GP_IO, DWord);
33172         }
33173
33174 -       /* set HWCFG_MODE */
33175 -       DWord = GPC_INT_POL_HI | GPC_DIS_FC | GPC_DIS_SLEEP |
33176 -               GPC_ENA_XC | GPC_ANEG_ADV_ALL_M | GPC_ENA_PAUSE |
33177 -               (pAC->GIni.GICopperType ? GPC_HWCFG_GMII_COP :
33178 -               GPC_HWCFG_GMII_FIB);
33179 +#ifdef VCPU
33180 +       /* set MAC Reset before PHY reset is set */
33181 +       SK_OUT8(IoC, MR_ADDR(Port, GMAC_CTRL), (SK_U8)GMC_RST_SET);
33182 +#endif /* VCPU */
33183 +
33184 +       if (CHIP_ID_YUKON_2(pAC)) {
33185 +               /* set GPHY Control reset */
33186 +               SK_OUT8(IoC, MR_ADDR(Port, GPHY_CTRL), (SK_U8)GPC_RST_SET);
33187
33188 -       /* set GPHY Control reset */
33189 -       SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), DWord | GPC_RST_SET);
33190 +               /* release GPHY Control reset */
33191 +               SK_OUT8(IoC, MR_ADDR(Port, GPHY_CTRL), (SK_U8)GPC_RST_CLR);
33192 +       }
33193 +       else {
33194 +               /* set HWCFG_MODE */
33195 +               DWord = GPC_INT_POL | GPC_DIS_FC | GPC_DIS_SLEEP |
33196 +                       GPC_ENA_XC | GPC_ANEG_ADV_ALL_M | GPC_ENA_PAUSE |
33197 +                       (pAC->GIni.GICopperType ? GPC_HWCFG_GMII_COP :
33198 +                       GPC_HWCFG_GMII_FIB);
33199
33200 -       /* release GPHY Control reset */
33201 -       SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), DWord | GPC_RST_CLR);
33202 +               /* set GPHY Control reset */
33203 +               SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), DWord | GPC_RST_SET);
33204 +
33205 +               /* release GPHY Control reset */
33206 +               SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), DWord | GPC_RST_CLR);
33207 +       }
33208
33209  #ifdef VCPU
33210 +       /* wait for internal initialization of GPHY */
33211 +       VCPUprintf(0, "Waiting until PHY %d is ready to initialize\n", Port);
33212 +       VCpuWait(10000);
33213 +
33214 +       /* release GMAC reset */
33215 +       SK_OUT8(IoC, MR_ADDR(Port, GMAC_CTRL), (SK_U8)GMC_RST_CLR);
33216 +
33217 +       /* wait for stable GMAC clock */
33218         VCpuWait(9000);
33219  #endif /* VCPU */
33220
33221         /* clear GMAC Control reset */
33222 -       SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_PAUSE_ON | GMC_RST_CLR);
33223 +       SK_OUT8(IoC, MR_ADDR(Port, GMAC_CTRL), (SK_U8)GMC_RST_CLR);
33224 +
33225 +       if (HW_FEATURE(pAC, HWF_WA_DEV_472) && Port == MAC_2) {
33226 +
33227 +               /* clear GMAC 1 Control reset */
33228 +               SK_OUT8(IoC, MR_ADDR(MAC_1, GMAC_CTRL), (SK_U8)GMC_RST_CLR);
33229 +
33230 +               do {
33231 +                       /* set GMAC 2 Control reset */
33232 +                       SK_OUT8(IoC, MR_ADDR(MAC_2, GMAC_CTRL), (SK_U8)GMC_RST_SET);
33233 +
33234 +                       /* clear GMAC 2 Control reset */
33235 +                       SK_OUT8(IoC, MR_ADDR(MAC_2, GMAC_CTRL), (SK_U8)GMC_RST_CLR);
33236 +
33237 +                       SkGmPhyRead(pAC, IoC, MAC_2, PHY_MARV_ID0, &PhyId0);
33238 +
33239 +                       SkGmPhyRead(pAC, IoC, MAC_2, PHY_MARV_ID1, &PhyId1);
33240 +
33241 +                       SkGmPhyRead(pAC, IoC, MAC_2, PHY_MARV_INT_MASK, &Word);
33242 +
33243 +               } while (Word != 0 || PhyId0 != PHY_MARV_ID0_VAL ||
33244 +                                PhyId1 != PHY_MARV_ID1_Y2);
33245 +       }
33246
33247  #ifdef VCPU
33248         VCpuWait(2000);
33249 -
33250 +
33251         SK_IN32(IoC, MR_ADDR(Port, GPHY_CTRL), &DWord);
33252 -
33253 +
33254         SK_IN32(IoC, B0_ISRC, &DWord);
33255  #endif /* VCPU */
33256
33257 @@ -1162,37 +1226,33 @@
33258   *     nothing
33259   */
33260  void SkMacSoftRst(
33261 -SK_AC  *pAC,   /* adapter context */
33262 -SK_IOC IoC,    /* IO context */
33263 +SK_AC  *pAC,   /* Adapter Context */
33264 +SK_IOC IoC,    /* I/O Context */
33265  int            Port)   /* Port Index (MAC_1 + n) */
33266  {
33267 -       SK_GEPORT       *pPrt;
33268 -
33269 -       pPrt = &pAC->GIni.GP[Port];
33270 -
33271         /* disable receiver and transmitter */
33272         SkMacRxTxDisable(pAC, IoC, Port);
33273
33274  #ifdef GENESIS
33275         if (pAC->GIni.GIGenesis) {
33276 -
33277 +
33278                 SkXmSoftRst(pAC, IoC, Port);
33279         }
33280  #endif /* GENESIS */
33281 -
33282 +
33283  #ifdef YUKON
33284         if (pAC->GIni.GIYukon) {
33285 -
33286 +
33287                 SkGmSoftRst(pAC, IoC, Port);
33288         }
33289  #endif /* YUKON */
33290
33291         /* flush the MAC's Rx and Tx FIFOs */
33292         SkMacFlushTxFifo(pAC, IoC, Port);
33293 -
33294 +
33295         SkMacFlushRxFifo(pAC, IoC, Port);
33296
33297 -       pPrt->PState = SK_PRT_STOP;
33298 +       pAC->GIni.GP[Port].PState = SK_PRT_STOP;
33299
33300  }      /* SkMacSoftRst */
33301
33302 @@ -1207,25 +1267,27 @@
33303   *     nothing
33304   */
33305  void SkMacHardRst(
33306 -SK_AC  *pAC,   /* adapter context */
33307 -SK_IOC IoC,    /* IO context */
33308 +SK_AC  *pAC,   /* Adapter Context */
33309 +SK_IOC IoC,    /* I/O Context */
33310  int            Port)   /* Port Index (MAC_1 + n) */
33311  {
33312 -
33313 +
33314  #ifdef GENESIS
33315         if (pAC->GIni.GIGenesis) {
33316 -
33317 +
33318                 SkXmHardRst(pAC, IoC, Port);
33319         }
33320  #endif /* GENESIS */
33321 -
33322 +
33323  #ifdef YUKON
33324         if (pAC->GIni.GIYukon) {
33325 -
33326 +
33327                 SkGmHardRst(pAC, IoC, Port);
33328         }
33329  #endif /* YUKON */
33330
33331 +       pAC->GIni.GP[Port].PHWLinkUp = SK_FALSE;
33332 +
33333         pAC->GIni.GP[Port].PState = SK_PRT_RESET;
33334
33335  }      /* SkMacHardRst */
33336 @@ -1241,21 +1303,21 @@
33337   *     nothing
33338   */
33339  void SkMacClearRst(
33340 -SK_AC  *pAC,   /* adapter context */
33341 -SK_IOC IoC,    /* IO context */
33342 +SK_AC  *pAC,   /* Adapter Context */
33343 +SK_IOC IoC,    /* I/O Context */
33344  int            Port)   /* Port Index (MAC_1 + n) */
33345  {
33346 -
33347 +
33348  #ifdef GENESIS
33349         if (pAC->GIni.GIGenesis) {
33350 -
33351 +
33352                 SkXmClearRst(pAC, IoC, Port);
33353         }
33354  #endif /* GENESIS */
33355 -
33356 +
33357  #ifdef YUKON
33358         if (pAC->GIni.GIYukon) {
33359 -
33360 +
33361                 SkGmClearRst(pAC, IoC, Port);
33362         }
33363  #endif /* YUKON */
33364 @@ -1279,8 +1341,8 @@
33365   *     nothing
33366   */
33367  void SkXmInitMac(
33368 -SK_AC  *pAC,           /* adapter context */
33369 -SK_IOC IoC,            /* IO context */
33370 +SK_AC  *pAC,           /* Adapter Context */
33371 +SK_IOC IoC,            /* I/O Context */
33372  int            Port)           /* Port Index (MAC_1 + n) */
33373  {
33374         SK_GEPORT       *pPrt;
33375 @@ -1290,13 +1352,13 @@
33376         pPrt = &pAC->GIni.GP[Port];
33377
33378         if (pPrt->PState == SK_PRT_STOP) {
33379 -               /* Port State: SK_PRT_STOP */
33380                 /* Verify that the reset bit is cleared */
33381                 SK_IN16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), &SWord);
33382
33383                 if ((SWord & MFF_SET_MAC_RST) != 0) {
33384                         /* PState does not match HW state */
33385 -                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E006, SKERR_HWI_E006MSG);
33386 +                       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
33387 +                               ("SkXmInitMac: PState does not match HW state"));
33388                         /* Correct it */
33389                         pPrt->PState = SK_PRT_RESET;
33390                 }
33391 @@ -1315,7 +1377,7 @@
33392                          * Must be done AFTER first access to BCOM chip.
33393                          */
33394                         XM_IN16(IoC, Port, XM_MMU_CMD, &SWord);
33395 -
33396 +
33397                         XM_OUT16(IoC, Port, XM_MMU_CMD, SWord | XM_MMU_NO_PRE);
33398
33399                         if (pPrt->PhyId1 == PHY_BCOM_ID1_C0) {
33400 @@ -1348,7 +1410,7 @@
33401                          * Disable Power Management after reset.
33402                          */
33403                         SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_CTRL, &SWord);
33404 -
33405 +
33406                         SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_AUX_CTRL,
33407                                 (SK_U16)(SWord | PHY_B_AC_DIS_PM));
33408
33409 @@ -1357,7 +1419,7 @@
33410
33411                 /* Dummy read the Interrupt source register */
33412                 XM_IN16(IoC, Port, XM_ISRC, &SWord);
33413 -
33414 +
33415                 /*
33416                  * The auto-negotiation process starts immediately after
33417                  * clearing the reset. The auto-negotiation process should be
33418 @@ -1383,7 +1445,7 @@
33419                  * independent. Remember this when changing.
33420                  */
33421                 SK_IN16(IoC, (B2_MAC_2 + Port * 8 + i * 2), &SWord);
33422 -
33423 +
33424                 XM_OUT16(IoC, Port, (XM_SA + i * 2), SWord);
33425         }
33426
33427 @@ -1401,7 +1463,7 @@
33428         SWord = SK_XM_THR_SL;                           /* for single port */
33429
33430         if (pAC->GIni.GIMacsFound > 1) {
33431 -               switch (pAC->GIni.GIPortUsage) {
33432 +               switch (pPrt->PPortUsage) {
33433                 case SK_RED_LINK:
33434                         SWord = SK_XM_THR_REDL;         /* redundant link */
33435                         break;
33436 @@ -1424,7 +1486,7 @@
33437         /* setup register defaults for the Rx Command Register */
33438         SWord = XM_RX_STRIP_FCS | XM_RX_LENERR_OK;
33439
33440 -       if (pAC->GIni.GIPortUsage == SK_JUMBO_LINK) {
33441 +       if (pPrt->PPortUsage == SK_JUMBO_LINK) {
33442                 SWord |= XM_RX_BIG_PK_OK;
33443         }
33444
33445 @@ -1436,7 +1498,7 @@
33446                  */
33447                 SWord |= XM_RX_DIS_CEXT;
33448         }
33449 -
33450 +
33451         XM_OUT16(IoC, Port, XM_RX_CMD, SWord);
33452
33453         /*
33454 @@ -1493,8 +1555,8 @@
33455   *     nothing
33456   */
33457  void SkGmInitMac(
33458 -SK_AC  *pAC,           /* adapter context */
33459 -SK_IOC IoC,            /* IO context */
33460 +SK_AC  *pAC,           /* Adapter Context */
33461 +SK_IOC IoC,            /* I/O Context */
33462  int            Port)           /* Port Index (MAC_1 + n) */
33463  {
33464         SK_GEPORT       *pPrt;
33465 @@ -1505,24 +1567,29 @@
33466         pPrt = &pAC->GIni.GP[Port];
33467
33468         if (pPrt->PState == SK_PRT_STOP) {
33469 -               /* Port State: SK_PRT_STOP */
33470                 /* Verify that the reset bit is cleared */
33471                 SK_IN32(IoC, MR_ADDR(Port, GMAC_CTRL), &DWord);
33472 -
33473 +
33474                 if ((DWord & GMC_RST_SET) != 0) {
33475                         /* PState does not match HW state */
33476 -                       SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E006, SKERR_HWI_E006MSG);
33477 +                       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
33478 +                               ("SkGmInitMac: PState does not match HW state"));
33479                         /* Correct it */
33480                         pPrt->PState = SK_PRT_RESET;
33481                 }
33482 +               else {
33483 +                       /* enable all PHY interrupts */
33484 +                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_INT_MASK,
33485 +                               (SK_U16)PHY_M_DEF_MSK);
33486 +               }
33487         }
33488
33489         if (pPrt->PState == SK_PRT_RESET) {
33490 -
33491 +
33492                 SkGmHardRst(pAC, IoC, Port);
33493
33494                 SkGmClearRst(pAC, IoC, Port);
33495 -
33496 +
33497                 /* Auto-negotiation ? */
33498                 if (pPrt->PLinkMode == SK_LMODE_HALF || pPrt->PLinkMode == SK_LMODE_FULL) {
33499                         /* Auto-negotiation disabled */
33500 @@ -1532,10 +1599,10 @@
33501
33502                         /* disable auto-update for speed, duplex and flow-control */
33503                         SWord |= GM_GPCR_AU_ALL_DIS;
33504 -
33505 +
33506                         /* setup General Purpose Control Register */
33507                         GM_OUT16(IoC, Port, GM_GP_CTRL, SWord);
33508 -
33509 +
33510                         SWord = GM_GPCR_AU_ALL_DIS;
33511                 }
33512                 else {
33513 @@ -1546,7 +1613,10 @@
33514                 switch (pPrt->PLinkSpeed) {
33515                 case SK_LSPEED_AUTO:
33516                 case SK_LSPEED_1000MBPS:
33517 -                       SWord |= GM_GPCR_SPEED_1000 | GM_GPCR_SPEED_100;
33518 +                       if ((pPrt->PLinkSpeedCap & SK_LSPEED_CAP_1000MBPS) != 0) {
33519 +
33520 +                               SWord |= GM_GPCR_SPEED_1000 | GM_GPCR_SPEED_100;
33521 +                       }
33522                         break;
33523                 case SK_LSPEED_100MBPS:
33524                         SWord |= GM_GPCR_SPEED_100;
33525 @@ -1564,8 +1634,6 @@
33526                 /* flow-control settings */
33527                 switch (pPrt->PFlowCtrlMode) {
33528                 case SK_FLOW_MODE_NONE:
33529 -                       /* set Pause Off */
33530 -                       SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_PAUSE_OFF);
33531                         /* disable Tx & Rx flow-control */
33532                         SWord |= GM_GPCR_FC_TX_DIS | GM_GPCR_FC_RX_DIS | GM_GPCR_AU_FCT_DIS;
33533                         break;
33534 @@ -1583,24 +1651,25 @@
33535                 GM_OUT16(IoC, Port, GM_GP_CTRL, SWord);
33536
33537                 /* dummy read the Interrupt Source Register */
33538 -               SK_IN16(IoC, GMAC_IRQ_SRC, &SWord);
33539 -
33540 +               SK_IN16(IoC, MR_ADDR(Port, GMAC_IRQ_SRC), &SWord);
33541 +
33542  #ifndef VCPU
33543                 /* read Id from PHY */
33544                 SkGmPhyRead(pAC, IoC, Port, PHY_MARV_ID1, &pPrt->PhyId1);
33545 -
33546 +
33547                 SkGmInitPhyMarv(pAC, IoC, Port, SK_FALSE);
33548 -#endif /* VCPU */
33549 +#endif /* !VCPU */
33550         }
33551
33552         (void)SkGmResetCounter(pAC, IoC, Port);
33553
33554         /* setup Transmit Control Register */
33555 -       GM_OUT16(IoC, Port, GM_TX_CTRL, TX_COL_THR(pPrt->PMacColThres));
33556 +       GM_OUT16(IoC, Port, GM_TX_CTRL, (SK_U16)TX_COL_THR(pPrt->PMacColThres));
33557
33558         /* setup Receive Control Register */
33559 -       GM_OUT16(IoC, Port, GM_RX_CTRL, GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA |
33560 -               GM_RXCR_CRC_DIS);
33561 +       SWord = GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA | GM_RXCR_CRC_DIS;
33562 +
33563 +       GM_OUT16(IoC, Port, GM_RX_CTRL, SWord);
33564
33565         /* setup Transmit Flow Control Register */
33566         GM_OUT16(IoC, Port, GM_TX_FLOW_CTRL, 0xffff);
33567 @@ -1610,31 +1679,29 @@
33568         GM_IN16(IoC, Port, GM_TX_PARAM, &SWord);
33569  #endif /* VCPU */
33570
33571 -    SWord = TX_JAM_LEN_VAL(pPrt->PMacJamLen) |
33572 -                       TX_JAM_IPG_VAL(pPrt->PMacJamIpgVal) |
33573 -                       TX_IPG_JAM_DATA(pPrt->PMacJamIpgData);
33574 -
33575 +       SWord = (SK_U16)(TX_JAM_LEN_VAL(pPrt->PMacJamLen) |
33576 +               TX_JAM_IPG_VAL(pPrt->PMacJamIpgVal) |
33577 +               TX_IPG_JAM_DATA(pPrt->PMacJamIpgData) |
33578 +               TX_BACK_OFF_LIM(pPrt->PMacBackOffLim));
33579 +
33580         GM_OUT16(IoC, Port, GM_TX_PARAM, SWord);
33581
33582         /* configure the Serial Mode Register */
33583 -#ifdef VCPU
33584 -       GM_IN16(IoC, Port, GM_SERIAL_MODE, &SWord);
33585 -#endif /* VCPU */
33586 -
33587 -       SWord = GM_SMOD_VLAN_ENA | IPG_DATA_VAL(pPrt->PMacIpgData);
33588 +       SWord = (SK_U16)(DATA_BLIND_VAL(pPrt->PMacDataBlind) |
33589 +               GM_SMOD_VLAN_ENA | IPG_DATA_VAL(pPrt->PMacIpgData));
33590
33591         if (pPrt->PMacLimit4) {
33592                 /* reset of collision counter after 4 consecutive collisions */
33593                 SWord |= GM_SMOD_LIMIT_4;
33594         }
33595
33596 -       if (pAC->GIni.GIPortUsage == SK_JUMBO_LINK) {
33597 +       if (pPrt->PPortUsage == SK_JUMBO_LINK) {
33598                 /* enable jumbo mode (Max. Frame Length = 9018) */
33599                 SWord |= GM_SMOD_JUMBO_ENA;
33600         }
33601 -
33602 +
33603         GM_OUT16(IoC, Port, GM_SERIAL_MODE, SWord);
33604 -
33605 +
33606         /*
33607          * configure the GMACs Station Addresses
33608          * in PROM you can find our addresses at:
33609 @@ -1663,15 +1730,15 @@
33610                 else {
33611                         GM_OUT16(IoC, Port, (GM_SRC_ADDR_1L + i * 4), SWord);
33612                 }
33613 -#else
33614 +#else
33615                 GM_OUT16(IoC, Port, (GM_SRC_ADDR_1L + i * 4), SWord);
33616  #endif /* WA_DEV_16 */
33617 -
33618 +
33619                 /* virtual address: will be used for data */
33620                 SK_IN16(IoC, (B2_MAC_1 + Port * 8 + i * 2), &SWord);
33621
33622                 GM_OUT16(IoC, Port, (GM_SRC_ADDR_2L + i * 4), SWord);
33623 -
33624 +
33625                 /* reset Multicast filtering Hash registers 1-3 */
33626                 GM_OUT16(IoC, Port, GM_MC_ADDR_H1 + 4*i, 0);
33627         }
33628 @@ -1684,18 +1751,6 @@
33629         GM_OUT16(IoC, Port, GM_RX_IRQ_MSK, 0);
33630         GM_OUT16(IoC, Port, GM_TR_IRQ_MSK, 0);
33631
33632 -#if defined(SK_DIAG) || defined(DEBUG)
33633 -       /* read General Purpose Status */
33634 -       GM_IN16(IoC, Port, GM_GP_STAT, &SWord);
33635 -
33636 -       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
33637 -               ("MAC Stat Reg.=0x%04X\n", SWord));
33638 -#endif /* SK_DIAG || DEBUG */
33639 -
33640 -#ifdef SK_DIAG
33641 -       c_print("MAC Stat Reg=0x%04X\n", SWord);
33642 -#endif /* SK_DIAG */
33643 -
33644  }      /* SkGmInitMac */
33645  #endif /* YUKON */
33646
33647 @@ -1714,8 +1769,8 @@
33648   *     nothing
33649   */
33650  void SkXmInitDupMd(
33651 -SK_AC  *pAC,           /* adapter context */
33652 -SK_IOC IoC,            /* IO context */
33653 +SK_AC  *pAC,           /* Adapter Context */
33654 +SK_IOC IoC,            /* I/O Context */
33655  int            Port)           /* Port Index (MAC_1 + n) */
33656  {
33657         switch (pAC->GIni.GP[Port].PLinkModeStatus) {
33658 @@ -1762,8 +1817,8 @@
33659   *     nothing
33660   */
33661  void SkXmInitPauseMd(
33662 -SK_AC  *pAC,           /* adapter context */
33663 -SK_IOC IoC,            /* IO context */
33664 +SK_AC  *pAC,           /* Adapter Context */
33665 +SK_IOC IoC,            /* I/O Context */
33666  int            Port)           /* Port Index (MAC_1 + n) */
33667  {
33668         SK_GEPORT       *pPrt;
33669 @@ -1773,11 +1828,11 @@
33670         pPrt = &pAC->GIni.GP[Port];
33671
33672         XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
33673 -
33674 +
33675         if (pPrt->PFlowCtrlStatus == SK_FLOW_STAT_NONE ||
33676                 pPrt->PFlowCtrlStatus == SK_FLOW_STAT_LOC_SEND) {
33677
33678 -               /* Disable Pause Frame Reception */
33679 +               /* disable Pause Frame Reception */
33680                 Word |= XM_MMU_IGN_PF;
33681         }
33682         else {
33683 @@ -1785,10 +1840,10 @@
33684                  * enabling pause frame reception is required for 1000BT
33685                  * because the XMAC is not reset if the link is going down
33686                  */
33687 -               /* Enable Pause Frame Reception */
33688 +               /* enable Pause Frame Reception */
33689                 Word &= ~XM_MMU_IGN_PF;
33690 -       }
33691 -
33692 +       }
33693 +
33694         XM_OUT16(IoC, Port, XM_MMU_CMD, Word);
33695
33696         XM_IN32(IoC, Port, XM_MODE, &DWord);
33697 @@ -1811,10 +1866,10 @@
33698                 /* remember this value is defined in big endian (!) */
33699                 XM_OUT16(IoC, Port, XM_MAC_PTIME, 0xffff);
33700
33701 -               /* Set Pause Mode in Mode Register */
33702 +               /* set Pause Mode in Mode Register */
33703                 DWord |= XM_PAUSE_MODE;
33704
33705 -               /* Set Pause Mode in MAC Rx FIFO */
33706 +               /* set Pause Mode in MAC Rx FIFO */
33707                 SK_OUT16(IoC, MR_ADDR(Port, RX_MFF_CTRL1), MFF_ENA_PAUSE);
33708         }
33709         else {
33710 @@ -1822,13 +1877,13 @@
33711                  * disable pause frame generation is required for 1000BT
33712                  * because the XMAC is not reset if the link is going down
33713                  */
33714 -               /* Disable Pause Mode in Mode Register */
33715 +               /* disable Pause Mode in Mode Register */
33716                 DWord &= ~XM_PAUSE_MODE;
33717
33718 -               /* Disable Pause Mode in MAC Rx FIFO */
33719 +               /* disable Pause Mode in MAC Rx FIFO */
33720                 SK_OUT16(IoC, MR_ADDR(Port, RX_MFF_CTRL1), MFF_DIS_PAUSE);
33721         }
33722 -
33723 +
33724         XM_OUT32(IoC, Port, XM_MODE, DWord);
33725  }      /* SkXmInitPauseMd*/
33726
33727 @@ -1845,8 +1900,8 @@
33728   *     nothing
33729   */
33730  static void SkXmInitPhyXmac(
33731 -SK_AC  *pAC,           /* adapter context */
33732 -SK_IOC IoC,            /* IO context */
33733 +SK_AC  *pAC,           /* Adapter Context */
33734 +SK_IOC IoC,            /* I/O Context */
33735  int            Port,           /* Port Index (MAC_1 + n) */
33736  SK_BOOL        DoLoop)         /* Should a Phy LoopBack be set-up? */
33737  {
33738 @@ -1855,12 +1910,12 @@
33739
33740         pPrt = &pAC->GIni.GP[Port];
33741         Ctrl = 0;
33742 -
33743 +
33744         /* Auto-negotiation ? */
33745         if (pPrt->PLinkMode == SK_LMODE_HALF || pPrt->PLinkMode == SK_LMODE_FULL) {
33746                 SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
33747                         ("InitPhyXmac: no auto-negotiation Port %d\n", Port));
33748 -               /* Set DuplexMode in Config register */
33749 +               /* set DuplexMode in Config register */
33750                 if (pPrt->PLinkMode == SK_LMODE_FULL) {
33751                         Ctrl |= PHY_CT_DUP_MD;
33752                 }
33753 @@ -1873,9 +1928,9 @@
33754         else {
33755                 SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
33756                         ("InitPhyXmac: with auto-negotiation Port %d\n", Port));
33757 -               /* Set Auto-negotiation advertisement */
33758 +               /* set Auto-negotiation advertisement */
33759
33760 -               /* Set Full/half duplex capabilities */
33761 +               /* set Full/half duplex capabilities */
33762                 switch (pPrt->PLinkMode) {
33763                 case SK_LMODE_AUTOHALF:
33764                         Ctrl |= PHY_X_AN_HD;
33765 @@ -1891,7 +1946,7 @@
33766                                 SKERR_HWI_E015MSG);
33767                 }
33768
33769 -               /* Set Flow-control capabilities */
33770 +               /* set Flow-control capabilities */
33771                 switch (pPrt->PFlowCtrlMode) {
33772                 case SK_FLOW_MODE_NONE:
33773                         Ctrl |= PHY_X_P_NO_PAUSE;
33774 @@ -1918,7 +1973,7 @@
33775         }
33776
33777         if (DoLoop) {
33778 -               /* Set the Phy Loopback bit, too */
33779 +               /* set the Phy Loopback bit, too */
33780                 Ctrl |= PHY_CT_LOOP;
33781         }
33782
33783 @@ -1939,8 +1994,8 @@
33784   *     nothing
33785   */
33786  static void SkXmInitPhyBcom(
33787 -SK_AC  *pAC,           /* adapter context */
33788 -SK_IOC IoC,            /* IO context */
33789 +SK_AC  *pAC,           /* Adapter Context */
33790 +SK_IOC IoC,            /* I/O Context */
33791  int            Port,           /* Port Index (MAC_1 + n) */
33792  SK_BOOL        DoLoop)         /* Should a Phy LoopBack be set-up? */
33793  {
33794 @@ -1962,7 +2017,7 @@
33795         /* manually Master/Slave ? */
33796         if (pPrt->PMSMode != SK_MS_MODE_AUTO) {
33797                 Ctrl2 |= PHY_B_1000C_MSE;
33798 -
33799 +
33800                 if (pPrt->PMSMode == SK_MS_MODE_MASTER) {
33801                         Ctrl2 |= PHY_B_1000C_MSC;
33802                 }
33803 @@ -1971,7 +2026,7 @@
33804         if (pPrt->PLinkMode == SK_LMODE_HALF || pPrt->PLinkMode == SK_LMODE_FULL) {
33805                 SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
33806                         ("InitPhyBcom: no auto-negotiation Port %d\n", Port));
33807 -               /* Set DuplexMode in Config register */
33808 +               /* set DuplexMode in Config register */
33809                 if (pPrt->PLinkMode == SK_LMODE_FULL) {
33810                         Ctrl1 |= PHY_CT_DUP_MD;
33811                 }
33812 @@ -1989,7 +2044,7 @@
33813         else {
33814                 SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
33815                         ("InitPhyBcom: with auto-negotiation Port %d\n", Port));
33816 -               /* Set Auto-negotiation advertisement */
33817 +               /* set Auto-negotiation advertisement */
33818
33819                 /*
33820                  * Workaround BCOM Errata #1 for the C5 type.
33821 @@ -1997,8 +2052,8 @@
33822                  * Set Repeater/DTE bit 10 of the 1000Base-T Control Register
33823                  */
33824                 Ctrl2 |= PHY_B_1000C_RD;
33825 -
33826 -                /* Set Full/half duplex capabilities */
33827 +
33828 +                /* set Full/half duplex capabilities */
33829                 switch (pPrt->PLinkMode) {
33830                 case SK_LMODE_AUTOHALF:
33831                         Ctrl2 |= PHY_B_1000C_AHD;
33832 @@ -2014,7 +2069,7 @@
33833                                 SKERR_HWI_E015MSG);
33834                 }
33835
33836 -               /* Set Flow-control capabilities */
33837 +               /* set Flow-control capabilities */
33838                 switch (pPrt->PFlowCtrlMode) {
33839                 case SK_FLOW_MODE_NONE:
33840                         Ctrl3 |= PHY_B_P_NO_PAUSE;
33841 @@ -2036,27 +2091,27 @@
33842                 /* Restart Auto-negotiation */
33843                 Ctrl1 |= PHY_CT_ANE | PHY_CT_RE_CFG;
33844         }
33845 -
33846 +
33847         /* Initialize LED register here? */
33848         /* No. Please do it in SkDgXmitLed() (if required) and swap
33849 -          init order of LEDs and XMAC. (MAl) */
33850 -
33851 +               init order of LEDs and XMAC. (MAl) */
33852 +
33853         /* Write 1000Base-T Control Register */
33854         SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_1000T_CTRL, Ctrl2);
33855         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
33856                 ("Set 1000B-T Ctrl Reg=0x%04X\n", Ctrl2));
33857 -
33858 +
33859         /* Write AutoNeg Advertisement Register */
33860         SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_AUNE_ADV, Ctrl3);
33861         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
33862                 ("Set Auto-Neg.Adv.Reg=0x%04X\n", Ctrl3));
33863 -
33864 +
33865         if (DoLoop) {
33866 -               /* Set the Phy Loopback bit, too */
33867 +               /* set the Phy Loopback bit, too */
33868                 Ctrl1 |= PHY_CT_LOOP;
33869         }
33870
33871 -       if (pAC->GIni.GIPortUsage == SK_JUMBO_LINK) {
33872 +       if (pPrt->PPortUsage == SK_JUMBO_LINK) {
33873                 /* configure FIFO to high latency for transmission of ext. packets */
33874                 Ctrl4 |= PHY_B_PEC_HIGH_LA;
33875
33876 @@ -2068,7 +2123,7 @@
33877
33878         /* Configure LED Traffic Mode and Jumbo Frame usage if specified */
33879         SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_P_EXT_CTRL, Ctrl4);
33880 -
33881 +
33882         /* Write to the Phy control register */
33883         SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_CTRL, Ctrl1);
33884         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
33885 @@ -2078,17 +2133,17 @@
33886
33887
33888  #ifdef YUKON
33889 -#ifndef SK_SLIM
33890 +#ifdef SK_PHY_LP_MODE
33891  /******************************************************************************
33892   *
33893   *     SkGmEnterLowPowerMode()
33894   *
33895 - * Description:
33896 + * Description:
33897   *     This function sets the Marvell Alaska PHY to the low power mode
33898   *     given by parameter mode.
33899   *     The following low power modes are available:
33900 - *
33901 - *             - Coma Mode (Deep Sleep):
33902 + *
33903 + *             - COMA Mode (Deep Sleep):
33904   *                     Power consumption: ~15 - 30 mW
33905   *                     The PHY cannot wake up on its own.
33906   *
33907 @@ -2115,114 +2170,203 @@
33908   *             1: error
33909   */
33910  int SkGmEnterLowPowerMode(
33911 -SK_AC  *pAC,           /* adapter context */
33912 -SK_IOC IoC,            /* IO context */
33913 +SK_AC  *pAC,           /* Adapter Context */
33914 +SK_IOC IoC,            /* I/O Context */
33915  int            Port,           /* Port Index (e.g. MAC_1) */
33916  SK_U8  Mode)           /* low power mode */
33917  {
33918 +       SK_U8   LastMode;
33919 +       SK_U8   Byte;
33920         SK_U16  Word;
33921 +       SK_U16  ClkDiv;
33922         SK_U32  DWord;
33923 -       SK_U8   LastMode;
33924 +       SK_U32  PowerDownBit;
33925         int             Ret = 0;
33926
33927 -       if (pAC->GIni.GIYukonLite &&
33928 -           pAC->GIni.GIChipRev == CHIP_REV_YU_LITE_A3) {
33929 +       if (!(CHIP_ID_YUKON_2(pAC) || (pAC->GIni.GIYukonLite &&
33930 +               pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3))) {
33931
33932 -               /* save current power mode */
33933 -               LastMode = pAC->GIni.GP[Port].PPhyPowerState;
33934 -               pAC->GIni.GP[Port].PPhyPowerState = Mode;
33935 -
33936 -               switch (Mode) {
33937 -                       /* coma mode (deep sleep) */
33938 -                       case PHY_PM_DEEP_SLEEP:
33939 -                               /* setup General Purpose Control Register */
33940 -                               GM_OUT16(IoC, 0, GM_GP_CTRL, GM_GPCR_FL_PASS |
33941 -                                       GM_GPCR_SPEED_100 | GM_GPCR_AU_ALL_DIS);
33942 -
33943 -                               /* apply COMA mode workaround */
33944 -                               SkGmPhyWrite(pAC, IoC, Port, 29, 0x001f);
33945 -                               SkGmPhyWrite(pAC, IoC, Port, 30, 0xfff3);
33946 -
33947 -                               SK_IN32(IoC, PCI_C(PCI_OUR_REG_1), &DWord);
33948 -
33949 -                               SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
33950 -
33951 -                               /* Set PHY to Coma Mode */
33952 -                               SK_OUT32(IoC, PCI_C(PCI_OUR_REG_1), DWord | PCI_PHY_COMA);
33953 -
33954 -                               SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
33955 -
33956 -                       break;
33957 -
33958 -                       /* IEEE 22.2.4.1.5 compatible power down mode */
33959 -                       case PHY_PM_IEEE_POWER_DOWN:
33960 -                               /*
33961 -                                * - disable MAC 125 MHz clock
33962 -                                * - allow MAC power down
33963 -                                */
33964 -                               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
33965 -                               Word |= PHY_M_PC_DIS_125CLK;
33966 -                               Word &= ~PHY_M_PC_MAC_POW_UP;
33967 -                               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
33968 +               return(1);
33969 +       }
33970
33971 -                               /*
33972 -                                * register changes must be followed by a software
33973 -                                * reset to take effect
33974 -                                */
33975 -                               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
33976 -                               Word |= PHY_CT_RESET;
33977 -                               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
33978 -
33979 -                               /* switch IEEE compatible power down mode on */
33980 -                               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
33981 -                               Word |= PHY_CT_PDOWN;
33982 -                               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
33983 -                       break;
33984 +       /* save current power mode */
33985 +       LastMode = pAC->GIni.GP[Port].PPhyPowerState;
33986 +       pAC->GIni.GP[Port].PPhyPowerState = Mode;
33987 +
33988 +       SK_DBG_MSG(pAC, SK_DBGMOD_POWM, SK_DBGCAT_CTRL,
33989 +               ("SkGmEnterLowPowerMode: %u\n", Mode));
33990 +
33991 +       switch (Mode) {
33992 +       /* COMA mode (deep sleep) */
33993 +       case PHY_PM_DEEP_SLEEP:
33994 +               /* clear PHY & MAC reset first */
33995 +               SkGmClearRst(pAC, IoC, Port);
33996
33997 -                       /* energy detect and energy detect plus mode */
33998 -                       case PHY_PM_ENERGY_DETECT:
33999 -                       case PHY_PM_ENERGY_DETECT_PLUS:
34000 -                               /*
34001 -                                * - disable MAC 125 MHz clock
34002 -                                */
34003 -                               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
34004 -                               Word |= PHY_M_PC_DIS_125CLK;
34005 -                               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
34006 -
34007 -                               /* activate energy detect mode 1 */
34008 -                               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
34009 -
34010 -                               /* energy detect mode */
34011 -                               if (Mode == PHY_PM_ENERGY_DETECT) {
34012 -                                       Word |= PHY_M_PC_EN_DET;
34013 -                               }
34014 -                               /* energy detect plus mode */
34015 -                               else {
34016 -                                       Word |= PHY_M_PC_EN_DET_PLUS;
34017 +               /* setup General Purpose Control Register */
34018 +               GM_OUT16(IoC, Port, GM_GP_CTRL, GM_GPCR_FL_PASS |
34019 +                       GM_GPCR_SPEED_100 | GM_GPCR_AU_ALL_DIS);
34020 +
34021 +               SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
34022 +
34023 +               if (CHIP_ID_YUKON_2(pAC)) {
34024 +                       /* set power down bit */
34025 +                       PowerDownBit = (Port == MAC_1) ? PCI_Y2_PHY1_POWD :
34026 +                               PCI_Y2_PHY2_POWD;
34027 +
34028 +                       /* no COMA mode on Yukon-FE and Yukon-2 PHY */
34029 +                       if (pAC->GIni.GIChipId == CHIP_ID_YUKON_FE ||
34030 +                               pAC->GIni.GIChipId == CHIP_ID_YUKON_XL) {
34031 +
34032 +                               /* set IEEE compatible Power Down Mode */
34033 +                               Ret = SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, PHY_CT_PDOWN);
34034 +
34035 +                               ClkDiv = 0;     /* divide clock by 2 */
34036 +                       }
34037 +                       else {
34038 +                               ClkDiv = 1;     /* divide clock by 4 */
34039 +                       }
34040 +               }
34041 +               else {
34042 +                       /* apply COMA mode workaround */
34043 +                       (void)SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PAGE_ADDR, 0x001f);
34044 +
34045 +                       Ret = SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PAGE_DATA, 0xfff3);
34046 +
34047 +                       PowerDownBit = PCI_PHY_COMA;
34048 +               }
34049 +
34050 +               SK_IN32(IoC, PCI_C(pAC, PCI_OUR_REG_1), &DWord);
34051 +
34052 +               /* set PHY to PowerDown/COMA Mode */
34053 +               SK_OUT32(IoC, PCI_C(pAC, PCI_OUR_REG_1), DWord | PowerDownBit);
34054 +
34055 +               /* check if this routine was called from a for() loop */
34056 +               if (pAC->GIni.GIMacsFound == 1 || Port == MAC_2) {
34057 +
34058 +                       /* ASF system clock stopped */
34059 +                       SK_OUT8(IoC, B28_Y2_ASF_STAT_CMD, Y2_ASF_CLK_HALT);
34060 +
34061 +                       if (HW_FEATURE(pAC, HWF_RED_CORE_CLK_SUP)) {
34062 +                               /* on Yukon-2 clock select value is 31 */
34063 +                               DWord = (pAC->GIni.GIChipId == CHIP_ID_YUKON_XL) ?
34064 +                                       (Y2_CLK_DIV_VAL_2(0) | Y2_CLK_SEL_VAL_2(31)) :
34065 +                                        Y2_CLK_DIV_VAL(ClkDiv);
34066 +
34067 +                               /* check for Yukon-2 dual port PCI-Express adapter */
34068 +                               if (!(pAC->GIni.GIMacsFound == 2 &&
34069 +                                         pAC->GIni.GIPciBus == SK_PEX_BUS)) {
34070 +                                       /* enable Core Clock Division */
34071 +                                       DWord |= Y2_CLK_DIV_ENA;
34072                                 }
34073
34074 -                               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
34075 +                               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
34076 +                                       ("Set Core Clock: 0x%08X\n", DWord));
34077
34078 -                               /*
34079 -                                * reinitialize the PHY to force a software reset
34080 -                                * which is necessary after the register settings
34081 -                                * for the energy detect modes.
34082 -                                * Furthermore reinitialisation prevents that the
34083 -                                * PHY is running out of a stable state.
34084 -                                */
34085 -                               SkGmInitPhyMarv(pAC, IoC, Port, SK_FALSE);
34086 -                       break;
34087 +                               /* reduce Core Clock Frequency */
34088 +                               SK_OUT32(IoC, B2_Y2_CLK_CTRL, DWord);
34089 +                       }
34090
34091 -                       /* don't change current power mode */
34092 -                       default:
34093 -                               pAC->GIni.GP[Port].PPhyPowerState = LastMode;
34094 -                               Ret = 1;
34095 -                       break;
34096 +                       if (pAC->GIni.GIChipId == CHIP_ID_YUKON_XL &&
34097 +                               pAC->GIni.GIChipRev > 1) {
34098 +                               /* enable bits are inverted */
34099 +                               Byte = 0;
34100 +                       }
34101 +                       else {
34102 +                               Byte = (SK_U8)(Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
34103 +                                       Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
34104 +                                       Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
34105 +                       }
34106 +
34107 +                       /* disable PCI & Core Clock, disable clock gating for both Links */
34108 +                       SK_OUT8(IoC, B2_Y2_CLK_GATE, Byte);
34109 +
34110 +                       if (pAC->GIni.GIVauxAvail) {
34111 +                               /* switch power to VAUX */
34112 +                               SK_OUT8(IoC, B0_POWER_CTRL, (SK_U8)(PC_VAUX_ENA | PC_VCC_ENA |
34113 +                                       PC_VAUX_ON | PC_VCC_OFF));
34114 +                       }
34115 +#ifdef DEBUG
34116 +                       SK_IN32(IoC, B0_CTST, &DWord);
34117 +
34118 +                       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
34119 +                               ("Ctrl/Stat & Switch: 0x%08x\n", DWord));
34120 +#endif /* DEBUG */
34121 +
34122 +                       if (pAC->GIni.GIMacsFound == 1 &&
34123 +                               pAC->GIni.GIPciBus == SK_PEX_BUS) {
34124 +
34125 +                               /* switch to D1 state */
34126 +                               SK_OUT8(IoC, PCI_C(pAC, PCI_PM_CTL_STS), PCI_PM_STATE_D1);
34127 +                       }
34128                 }
34129 -       }
34130 -       /* low power modes are not supported by this chip */
34131 -       else {
34132 +
34133 +               break;
34134 +
34135 +       /* IEEE 22.2.4.1.5 compatible power down mode */
34136 +       case PHY_PM_IEEE_POWER_DOWN:
34137 +
34138 +               Ret = SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
34139 +
34140 +               Word |= PHY_M_PC_POL_R_DIS;
34141 +
34142 +               if (!CHIP_ID_YUKON_2(pAC)) {
34143 +                       /* disable MAC 125 MHz clock */
34144 +                       Word |= PHY_M_PC_DIS_125CLK;
34145 +                       Word &= ~PHY_M_PC_MAC_POW_UP;
34146 +               }
34147 +               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
34148 +
34149 +               /* these register changes must be followed by a software reset */
34150 +               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
34151 +               Word |= PHY_CT_RESET;
34152 +               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
34153 +
34154 +               /* switch IEEE compatible power down mode on */
34155 +               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
34156 +               Word |= PHY_CT_PDOWN;
34157 +               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
34158 +
34159 +               break;
34160 +
34161 +       /* energy detect and energy detect plus mode */
34162 +       case PHY_PM_ENERGY_DETECT:
34163 +       case PHY_PM_ENERGY_DETECT_PLUS:
34164 +
34165 +               Ret = SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
34166 +
34167 +               Word |= PHY_M_PC_POL_R_DIS;
34168 +
34169 +               if (!CHIP_ID_YUKON_2(pAC)) {
34170 +                       /* disable MAC 125 MHz clock */
34171 +                       Word |= PHY_M_PC_DIS_125CLK;
34172 +               }
34173 +
34174 +               if (pAC->GIni.GIChipId == CHIP_ID_YUKON_FE) {
34175 +                       /* enable Energy Detect (sense & pulse) */
34176 +                       Word |= PHY_M_PC_ENA_ENE_DT;
34177 +               }
34178 +               else {
34179 +                       /* clear energy detect mode bits */
34180 +                       Word &= ~PHY_M_PC_EN_DET_MSK;
34181 +
34182 +                       Word |= (Mode == PHY_PM_ENERGY_DETECT) ? PHY_M_PC_EN_DET :
34183 +                               PHY_M_PC_EN_DET_PLUS;
34184 +               }
34185 +
34186 +               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
34187 +
34188 +               /* these register changes must be followed by a software reset */
34189 +               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
34190 +               Word |= PHY_CT_RESET;
34191 +               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
34192 +
34193 +               break;
34194 +
34195 +       /* don't change current power mode */
34196 +       default:
34197 +               pAC->GIni.GP[Port].PPhyPowerState = LastMode;
34198                 Ret = 1;
34199 +               break;
34200         }
34201
34202         return(Ret);
34203 @@ -2233,7 +2377,7 @@
34204   *
34205   *     SkGmLeaveLowPowerMode()
34206   *
34207 - * Description:
34208 + * Description:
34209   *     Leave the current low power mode and switch to normal mode
34210   *
34211   * Note:
34212 @@ -2243,115 +2387,146 @@
34213   *             1:      error
34214   */
34215  int SkGmLeaveLowPowerMode(
34216 -SK_AC  *pAC,           /* adapter context */
34217 -SK_IOC IoC,            /* IO context */
34218 +SK_AC  *pAC,           /* Adapter Context */
34219 +SK_IOC IoC,            /* I/O Context */
34220  int            Port)           /* Port Index (e.g. MAC_1) */
34221  {
34222         SK_U32  DWord;
34223 +       SK_U32  PowerDownBit;
34224         SK_U16  Word;
34225         SK_U8   LastMode;
34226         int             Ret = 0;
34227
34228 -       if (pAC->GIni.GIYukonLite &&
34229 -               pAC->GIni.GIChipRev == CHIP_REV_YU_LITE_A3) {
34230 +       if (!(CHIP_ID_YUKON_2(pAC) || (pAC->GIni.GIYukonLite &&
34231 +               pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3))) {
34232
34233 -               /* save current power mode */
34234 -               LastMode = pAC->GIni.GP[Port].PPhyPowerState;
34235 -               pAC->GIni.GP[Port].PPhyPowerState = PHY_PM_OPERATIONAL_MODE;
34236 -
34237 -               switch (LastMode) {
34238 -                       /* coma mode (deep sleep) */
34239 -                       case PHY_PM_DEEP_SLEEP:
34240 -                               SK_IN32(IoC, PCI_C(PCI_OUR_REG_1), &DWord);
34241 -
34242 -                               SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
34243 -
34244 -                               /* Release PHY from Coma Mode */
34245 -                               SK_OUT32(IoC, PCI_C(PCI_OUR_REG_1), DWord & ~PCI_PHY_COMA);
34246 -
34247 -                               SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
34248 -
34249 -                               SK_IN32(IoC, B2_GP_IO, &DWord);
34250 -
34251 -                               /* set to output */
34252 -                               DWord |= (GP_DIR_9 | GP_IO_9);
34253 -
34254 -                               /* set PHY reset */
34255 -                               SK_OUT32(IoC, B2_GP_IO, DWord);
34256 -
34257 -                               DWord &= ~GP_IO_9; /* clear PHY reset (active high) */
34258 -
34259 -                               /* clear PHY reset */
34260 -                               SK_OUT32(IoC, B2_GP_IO, DWord);
34261 -                       break;
34262 -
34263 -                       /* IEEE 22.2.4.1.5 compatible power down mode */
34264 -                       case PHY_PM_IEEE_POWER_DOWN:
34265 -                               /*
34266 -                                * - enable MAC 125 MHz clock
34267 -                                * - set MAC power up
34268 -                                */
34269 -                               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
34270 -                               Word &= ~PHY_M_PC_DIS_125CLK;
34271 -                               Word |= PHY_M_PC_MAC_POW_UP;
34272 -                               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
34273 +               return(1);
34274 +       }
34275
34276 -                               /*
34277 -                                * register changes must be followed by a software
34278 -                                * reset to take effect
34279 -                                */
34280 -                               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
34281 -                               Word |= PHY_CT_RESET;
34282 -                               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
34283 -
34284 -                               /* switch IEEE compatible power down mode off */
34285 -                               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
34286 -                               Word &= ~PHY_CT_PDOWN;
34287 -                               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
34288 -                       break;
34289 +       /* save current power mode */
34290 +       LastMode = pAC->GIni.GP[Port].PPhyPowerState;
34291 +       pAC->GIni.GP[Port].PPhyPowerState = PHY_PM_OPERATIONAL_MODE;
34292
34293 -                       /* energy detect and energy detect plus mode */
34294 -                       case PHY_PM_ENERGY_DETECT:
34295 -                       case PHY_PM_ENERGY_DETECT_PLUS:
34296 -                               /*
34297 -                                * - enable MAC 125 MHz clock
34298 -                                */
34299 -                               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
34300 -                               Word &= ~PHY_M_PC_DIS_125CLK;
34301 -                               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
34302 -
34303 -                               /* disable energy detect mode */
34304 -                               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
34305 -                               Word &= ~PHY_M_PC_EN_DET_MSK;
34306 -                               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
34307 +       SK_DBG_MSG(pAC, SK_DBGMOD_POWM, SK_DBGCAT_CTRL,
34308 +               ("SkGmLeaveLowPowerMode: %u\n", LastMode));
34309
34310 -                               /*
34311 -                                * reinitialize the PHY to force a software reset
34312 -                                * which is necessary after the register settings
34313 -                                * for the energy detect modes.
34314 -                                * Furthermore reinitialisation prevents that the
34315 -                                * PHY is running out of a stable state.
34316 -                                */
34317 -                               SkGmInitPhyMarv(pAC, IoC, Port, SK_FALSE);
34318 -                       break;
34319 +       switch (LastMode) {
34320 +       /* COMA mode (deep sleep) */
34321 +       case PHY_PM_DEEP_SLEEP:
34322
34323 -                       /* don't change current power mode */
34324 -                       default:
34325 -                               pAC->GIni.GP[Port].PPhyPowerState = LastMode;
34326 -                               Ret = 1;
34327 -                       break;
34328 +               SkPciReadCfgWord(pAC, PCI_PM_CTL_STS, &Word);
34329 +
34330 +               /* reset all DState bits */
34331 +               Word &= ~(PCI_PM_STATE_MSK);
34332 +
34333 +               /* switch to D0 state */
34334 +               SkPciWriteCfgWord(pAC, PCI_PM_CTL_STS, Word);
34335 +
34336 +               SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
34337 +
34338 +               if (CHIP_ID_YUKON_2(pAC)) {
34339 +                       /* disable Core Clock Division */
34340 +                       SK_OUT32(IoC, B2_Y2_CLK_CTRL, Y2_CLK_DIV_DIS);
34341 +
34342 +                       /* set power down bit */
34343 +                       PowerDownBit = (Port == MAC_1) ? PCI_Y2_PHY1_POWD :
34344 +                               PCI_Y2_PHY2_POWD;
34345                 }
34346 -       }
34347 -       /* low power modes are not supported by this chip */
34348 -       else {
34349 +               else {
34350 +                       PowerDownBit = PCI_PHY_COMA;
34351 +               }
34352 +
34353 +               SK_IN32(IoC, PCI_C(pAC, PCI_OUR_REG_1), &DWord);
34354 +
34355 +               /* Release PHY from PowerDown/COMA Mode */
34356 +               SK_OUT32(IoC, PCI_C(pAC, PCI_OUR_REG_1), DWord & ~PowerDownBit);
34357 +
34358 +               SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
34359 +
34360 +               if (CHIP_ID_YUKON_2(pAC)) {
34361 +                       /* no COMA mode on Yukon-FE */
34362 +                       if (pAC->GIni.GIChipId == CHIP_ID_YUKON_FE) {
34363 +                               /* release IEEE compatible Power Down Mode */
34364 +                               Ret = SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, PHY_CT_ANE);
34365 +                       }
34366 +               }
34367 +               else {
34368 +                       SK_IN32(IoC, B2_GP_IO, &DWord);
34369 +
34370 +                       /* set to output */
34371 +                       DWord |= (GP_DIR_9 | GP_IO_9);
34372 +
34373 +                       /* set PHY reset */
34374 +                       SK_OUT32(IoC, B2_GP_IO, DWord);
34375 +
34376 +                       DWord &= ~GP_IO_9; /* clear PHY reset (active high) */
34377 +
34378 +                       /* clear PHY reset */
34379 +                       SK_OUT32(IoC, B2_GP_IO, DWord);
34380 +               }
34381 +
34382 +               break;
34383 +
34384 +       /* IEEE 22.2.4.1.5 compatible power down mode */
34385 +       case PHY_PM_IEEE_POWER_DOWN:
34386 +
34387 +               if (pAC->GIni.GIChipId != CHIP_ID_YUKON_XL) {
34388 +
34389 +                       Ret = SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
34390 +                       Word &= ~PHY_M_PC_DIS_125CLK;   /* enable MAC 125 MHz clock */
34391 +                       Word |= PHY_M_PC_MAC_POW_UP;    /* set MAC power up */
34392 +                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
34393 +
34394 +                       /* these register changes must be followed by a software reset */
34395 +                       SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
34396 +                       Word |= PHY_CT_RESET;
34397 +                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
34398 +               }
34399 +
34400 +               /* switch IEEE compatible power down mode off */
34401 +               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
34402 +               Word &= ~PHY_CT_PDOWN;
34403 +               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
34404 +
34405 +               break;
34406 +
34407 +       /* energy detect and energy detect plus mode */
34408 +       case PHY_PM_ENERGY_DETECT:
34409 +       case PHY_PM_ENERGY_DETECT_PLUS:
34410 +
34411 +               if (pAC->GIni.GIChipId != CHIP_ID_YUKON_XL) {
34412 +
34413 +                       Ret = SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
34414 +
34415 +                       if (pAC->GIni.GIChipId == CHIP_ID_YUKON_FE) {
34416 +                               /* disable Energy Detect */
34417 +                               Word &= ~PHY_M_PC_ENA_ENE_DT;
34418 +                       }
34419 +                       else {
34420 +                               /* disable energy detect mode & enable MAC 125 MHz clock */
34421 +                               Word &= ~(PHY_M_PC_EN_DET_MSK | PHY_M_PC_DIS_125CLK);
34422 +                       }
34423 +
34424 +                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
34425 +
34426 +                       /* these register changes must be followed by a software reset */
34427 +                       SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
34428 +                       Word |= PHY_CT_RESET;
34429 +                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
34430 +               }
34431 +               break;
34432 +
34433 +       /* don't change current power mode */
34434 +       default:
34435 +               pAC->GIni.GP[Port].PPhyPowerState = LastMode;
34436                 Ret = 1;
34437 +               break;
34438         }
34439
34440         return(Ret);
34441
34442  }      /* SkGmLeaveLowPowerMode */
34443 -#endif /* !SK_SLIM */
34444 -
34445 +#endif /* SK_PHY_LP_MODE */
34446
34447  /******************************************************************************
34448   *
34449 @@ -2365,74 +2540,168 @@
34450   *     nothing
34451   */
34452  static void SkGmInitPhyMarv(
34453 -SK_AC  *pAC,           /* adapter context */
34454 -SK_IOC IoC,            /* IO context */
34455 +SK_AC  *pAC,           /* Adapter Context */
34456 +SK_IOC IoC,            /* I/O Context */
34457  int            Port,           /* Port Index (MAC_1 + n) */
34458  SK_BOOL        DoLoop)         /* Should a Phy LoopBack be set-up? */
34459  {
34460         SK_GEPORT       *pPrt;
34461 +       SK_BOOL         AutoNeg;
34462         SK_U16          PhyCtrl;
34463         SK_U16          C1000BaseT;
34464         SK_U16          AutoNegAdv;
34465 +       SK_U8           PauseMode;
34466 +#ifndef VCPU
34467 +       SK_U16          SWord;
34468 +       SK_U16          PageReg;
34469 +       SK_U16          LoopSpeed;
34470         SK_U16          ExtPhyCtrl;
34471         SK_U16          LedCtrl;
34472 -       SK_BOOL         AutoNeg;
34473 +       SK_U16          LedOver;
34474  #if defined(SK_DIAG) || defined(DEBUG)
34475         SK_U16          PhyStat;
34476         SK_U16          PhyStat1;
34477         SK_U16          PhySpecStat;
34478  #endif /* SK_DIAG || DEBUG */
34479 +#endif /* !VCPU */
34480 +
34481 +       /* set Pause On */
34482 +       PauseMode = (SK_U8)GMC_PAUSE_ON;
34483
34484         pPrt = &pAC->GIni.GP[Port];
34485
34486         /* Auto-negotiation ? */
34487 -       if (pPrt->PLinkMode == SK_LMODE_HALF || pPrt->PLinkMode == SK_LMODE_FULL) {
34488 -               AutoNeg = SK_FALSE;
34489 -       }
34490 -       else {
34491 -               AutoNeg = SK_TRUE;
34492 -       }
34493 -
34494 +       AutoNeg = pPrt->PLinkMode != SK_LMODE_HALF &&
34495 +                         pPrt->PLinkMode != SK_LMODE_FULL;
34496 +
34497         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
34498 -               ("InitPhyMarv: Port %d, auto-negotiation %s\n",
34499 -                Port, AutoNeg ? "ON" : "OFF"));
34500 +               ("InitPhyMarv: Port %d, Auto-neg. %s, LMode %d, LSpeed %d, FlowC %d\n",
34501 +                Port, AutoNeg ? "ON" : "OFF",
34502 +                pPrt->PLinkMode, pPrt->PLinkSpeed, pPrt->PFlowCtrlMode));
34503
34504 -#ifdef VCPU
34505 -       VCPUprintf(0, "SkGmInitPhyMarv(), Port=%u, DoLoop=%u\n",
34506 -               Port, DoLoop);
34507 -#else /* VCPU */
34508 -       if (DoLoop) {
34509 -               /* Set 'MAC Power up'-bit, set Manual MDI configuration */
34510 -               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL,
34511 -                       PHY_M_PC_MAC_POW_UP);
34512 +#ifndef VCPU
34513 +       if ((pPrt->PLinkSpeedCap & SK_LSPEED_CAP_1000MBPS) != 0) {
34514 +
34515 +               if (DoLoop) {
34516 +                       /* special setup for PHY 88E1112 */
34517 +                       if (pAC->GIni.GIChipId == CHIP_ID_YUKON_XL) {
34518 +
34519 +                               LoopSpeed = pPrt->PLinkSpeed;
34520 +
34521 +                               if (LoopSpeed == SK_LSPEED_AUTO) {
34522 +                                       /* force 1000 Mbps */
34523 +                                       LoopSpeed = SK_LSPEED_1000MBPS;
34524 +                               }
34525 +                               LoopSpeed += 2;
34526 +
34527 +                               /* save page register */
34528 +                               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_EXT_ADR, &PageReg);
34529 +
34530 +                               /* select page 2 to access MAC control register */
34531 +                               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, 2);
34532 +
34533 +                               /* set MAC interface speed */
34534 +                               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, LoopSpeed << 4);
34535 +
34536 +                               /* restore page register */
34537 +                               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, PageReg);
34538 +
34539 +                               /* disable link pulses */
34540 +                               SWord = PHY_M_PC_DIS_LINK_P;
34541 +                       }
34542 +                       else {
34543 +                               /* set 'MAC Power up'-bit, set Manual MDI configuration */
34544 +                               SWord = PHY_M_PC_MAC_POW_UP;
34545 +                       }
34546 +
34547 +                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, SWord);
34548 +               }
34549 +               else if (AutoNeg && pPrt->PLinkSpeed == SK_LSPEED_AUTO &&
34550 +                                pAC->GIni.GIChipId != CHIP_ID_YUKON_XL) {
34551 +                       /* Read Ext. PHY Specific Control */
34552 +                       SkGmPhyRead(pAC, IoC, Port, PHY_MARV_EXT_CTRL, &ExtPhyCtrl);
34553 +
34554 +                       ExtPhyCtrl &= ~(PHY_M_EC_M_DSC_MSK | PHY_M_EC_S_DSC_MSK |
34555 +                               PHY_M_EC_MAC_S_MSK);
34556 +
34557 +                       ExtPhyCtrl |= PHY_M_EC_MAC_S(MAC_TX_CLK_25_MHZ);
34558 +
34559 +                       if (pAC->GIni.GIChipId == CHIP_ID_YUKON_EC) {
34560 +                               /* on PHY 88E1111 there is a change for downshift control */
34561 +                               ExtPhyCtrl |= PHY_M_EC_DSC_2(2) | PHY_M_EC_DOWN_S_ENA;
34562 +                       }
34563 +                       else {
34564 +                               ExtPhyCtrl |= PHY_M_EC_M_DSC(2) | PHY_M_EC_S_DSC(3);
34565 +                       }
34566 +
34567 +                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_CTRL, ExtPhyCtrl);
34568 +                       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
34569 +                               ("Set Ext. PHY Ctrl=0x%04X\n", ExtPhyCtrl));
34570 +               }
34571         }
34572 -       else if (AutoNeg && pPrt->PLinkSpeed == SK_LSPEED_AUTO) {
34573 -               /* Read Ext. PHY Specific Control */
34574 -               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_EXT_CTRL, &ExtPhyCtrl);
34575 -
34576 -               ExtPhyCtrl &= ~(PHY_M_EC_M_DSC_MSK | PHY_M_EC_S_DSC_MSK |
34577 -                       PHY_M_EC_MAC_S_MSK);
34578 -
34579 -               ExtPhyCtrl |= PHY_M_EC_MAC_S(MAC_TX_CLK_25_MHZ) |
34580 -                       PHY_M_EC_M_DSC(0) | PHY_M_EC_S_DSC(1);
34581 -
34582 -               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_CTRL, ExtPhyCtrl);
34583 -               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
34584 -                       ("Set Ext. PHY Ctrl=0x%04X\n", ExtPhyCtrl));
34585 +
34586 +       if (CHIP_ID_YUKON_2(pAC)) {
34587 +               /* Read PHY Specific Control */
34588 +               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &PhyCtrl);
34589 +
34590 +               if (!DoLoop && pAC->GIni.GICopperType) {
34591 +
34592 +                       if (pAC->GIni.GIChipId == CHIP_ID_YUKON_FE) {
34593 +                               /* enable Automatic Crossover (!!! Bits 5..4) */
34594 +                               PhyCtrl |= (SK_U16)(PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO) >> 1);
34595 +                       }
34596 +                       else {
34597 +                               /* disable Energy Detect Mode */
34598 +                               PhyCtrl &= ~PHY_M_PC_EN_DET_MSK;
34599 +
34600 +                               /* enable Automatic Crossover */
34601 +                               PhyCtrl |= (SK_U16)PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO);
34602 +
34603 +                               if (AutoNeg && pPrt->PLinkSpeed == SK_LSPEED_AUTO &&
34604 +                                       pAC->GIni.GIChipId == CHIP_ID_YUKON_XL) {
34605 +                                       /* on PHY 88E1112 there is a change for downshift control */
34606 +                                       PhyCtrl &= ~PHY_M_PC_DSC_MSK;
34607 +                                       PhyCtrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA;
34608 +                               }
34609 +                       }
34610 +               }
34611 +               /* workaround for deviation #4.88 (CRC errors) */
34612 +               else {
34613 +                       /* disable Automatic Crossover */
34614 +                       PhyCtrl &= ~PHY_M_PC_MDIX_MSK;
34615 +               }
34616 +
34617 +               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, PhyCtrl);
34618 +       }
34619 +
34620 +       /* special setup for PHY 88E1112 Fiber */
34621 +       if (pAC->GIni.GIChipId == CHIP_ID_YUKON_XL && !pAC->GIni.GICopperType) {
34622 +               /* Fiber: select 1000BASE-X only mode MAC Specific Ctrl Reg. */
34623 +               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, 2);
34624 +
34625 +               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &SWord);
34626 +
34627 +               SWord &= ~PHY_M_MAC_MD_MSK;
34628 +               SWord |= PHY_M_MAC_MODE_SEL(PHY_M_MAC_MD_1000BX);
34629 +
34630 +               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, SWord);
34631 +
34632 +               /* select page 1 to access Fiber registers */
34633 +               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, 1);
34634         }
34635
34636         /* Read PHY Control */
34637         SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &PhyCtrl);
34638
34639         if (!AutoNeg) {
34640 -               /* Disable Auto-negotiation */
34641 +               /* disable Auto-negotiation */
34642                 PhyCtrl &= ~PHY_CT_ANE;
34643         }
34644
34645         PhyCtrl |= PHY_CT_RESET;
34646 -       /* Assert software reset */
34647 +       /* assert software reset */
34648         SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, PhyCtrl);
34649 -#endif /* VCPU */
34650 +#endif /* !VCPU */
34651
34652         PhyCtrl = 0 /* PHY_CT_COL_TST */;
34653         C1000BaseT = 0;
34654 @@ -2442,30 +2711,31 @@
34655         if (pPrt->PMSMode != SK_MS_MODE_AUTO) {
34656                 /* enable Manual Master/Slave */
34657                 C1000BaseT |= PHY_M_1000C_MSE;
34658 -
34659 +
34660                 if (pPrt->PMSMode == SK_MS_MODE_MASTER) {
34661                         C1000BaseT |= PHY_M_1000C_MSC;  /* set it to Master */
34662                 }
34663         }
34664 -
34665 +
34666         /* Auto-negotiation ? */
34667         if (!AutoNeg) {
34668 -
34669 +
34670                 if (pPrt->PLinkMode == SK_LMODE_FULL) {
34671 -                       /* Set Full Duplex Mode */
34672 +                       /* set Full Duplex Mode */
34673                         PhyCtrl |= PHY_CT_DUP_MD;
34674                 }
34675
34676 -               /* Set Master/Slave manually if not already done */
34677 +               /* set Master/Slave manually if not already done */
34678                 if (pPrt->PMSMode == SK_MS_MODE_AUTO) {
34679                         C1000BaseT |= PHY_M_1000C_MSE;  /* set it to Slave */
34680                 }
34681
34682 -               /* Set Speed */
34683 +               /* set Speed */
34684                 switch (pPrt->PLinkSpeed) {
34685                 case SK_LSPEED_AUTO:
34686                 case SK_LSPEED_1000MBPS:
34687 -                       PhyCtrl |= PHY_CT_SP1000;
34688 +                       PhyCtrl |= (((pPrt->PLinkSpeedCap & SK_LSPEED_CAP_1000MBPS) != 0) ?
34689 +                                               PHY_CT_SP1000 : PHY_CT_SP100);
34690                         break;
34691                 case SK_LSPEED_100MBPS:
34692                         PhyCtrl |= PHY_CT_SP100;
34693 @@ -2477,38 +2747,65 @@
34694                                 SKERR_HWI_E019MSG);
34695                 }
34696
34697 +               if ((pPrt->PFlowCtrlMode == SK_FLOW_STAT_NONE) ||
34698 +                       /* disable Pause also for 10/100 Mbps in half duplex mode */
34699 +                       ((pPrt->PLinkMode == SK_LMODE_HALF) &&
34700 +                        ((pPrt->PLinkSpeed == SK_LSPEED_STAT_100MBPS) ||
34701 +                         (pPrt->PLinkSpeed == SK_LSPEED_STAT_10MBPS)))) {
34702 +
34703 +                       /* set Pause Off */
34704 +                       PauseMode = (SK_U8)GMC_PAUSE_OFF;
34705 +               }
34706 +
34707 +               SK_OUT8(IoC, MR_ADDR(Port, GMAC_CTRL), PauseMode);
34708 +
34709                 if (!DoLoop) {
34710 +                       /* assert software reset */
34711                         PhyCtrl |= PHY_CT_RESET;
34712                 }
34713         }
34714         else {
34715 -               /* Set Auto-negotiation advertisement */
34716 -
34717 +               /* set Auto-negotiation advertisement */
34718 +
34719                 if (pAC->GIni.GICopperType) {
34720 -                       /* Set Speed capabilities */
34721 +                       /* set Speed capabilities */
34722                         switch (pPrt->PLinkSpeed) {
34723                         case SK_LSPEED_AUTO:
34724 -                               C1000BaseT |= PHY_M_1000C_AHD | PHY_M_1000C_AFD;
34725 +                               if ((pPrt->PLinkSpeedCap & SK_LSPEED_CAP_1000MBPS) != 0) {
34726 +                                       C1000BaseT |= PHY_M_1000C_AFD;
34727 +#ifdef xSK_DIAG
34728 +                                       C1000BaseT |= PHY_M_1000C_AHD;
34729 +#endif /* SK_DIAG */
34730 +                               }
34731                                 AutoNegAdv |= PHY_M_AN_100_FD | PHY_M_AN_100_HD |
34732                                         PHY_M_AN_10_FD | PHY_M_AN_10_HD;
34733                                 break;
34734                         case SK_LSPEED_1000MBPS:
34735 -                               C1000BaseT |= PHY_M_1000C_AHD | PHY_M_1000C_AFD;
34736 +                               if ((pPrt->PLinkSpeedCap & SK_LSPEED_CAP_1000MBPS) != 0) {
34737 +                                       C1000BaseT |= PHY_M_1000C_AFD;
34738 +#ifdef xSK_DIAG
34739 +                                       C1000BaseT |= PHY_M_1000C_AHD;
34740 +#endif /* SK_DIAG */
34741 +                               }
34742                                 break;
34743                         case SK_LSPEED_100MBPS:
34744 -                               AutoNegAdv |= PHY_M_AN_100_FD | PHY_M_AN_100_HD |
34745 -                                       /* advertise 10Base-T also */
34746 -                                       PHY_M_AN_10_FD | PHY_M_AN_10_HD;
34747 +                               if ((pPrt->PLinkSpeedCap & SK_LSPEED_CAP_100MBPS) != 0) {
34748 +                                       AutoNegAdv |= PHY_M_AN_100_FD | PHY_M_AN_100_HD |
34749 +                                               /* advertise 10Base-T also */
34750 +                                               PHY_M_AN_10_FD | PHY_M_AN_10_HD;
34751 +                               }
34752                                 break;
34753                         case SK_LSPEED_10MBPS:
34754 -                               AutoNegAdv |= PHY_M_AN_10_FD | PHY_M_AN_10_HD;
34755 +                               if ((pPrt->PLinkSpeedCap & SK_LSPEED_CAP_10MBPS) != 0) {
34756 +                                       AutoNegAdv |= PHY_M_AN_10_FD | PHY_M_AN_10_HD;
34757 +                               }
34758                                 break;
34759                         default:
34760                                 SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E019,
34761                                         SKERR_HWI_E019MSG);
34762                         }
34763
34764 -                       /* Set Full/half duplex capabilities */
34765 +                       /* set Full/half duplex capabilities */
34766                         switch (pPrt->PLinkMode) {
34767                         case SK_LMODE_AUTOHALF:
34768                                 C1000BaseT &= ~PHY_M_1000C_AFD;
34769 @@ -2524,8 +2821,8 @@
34770                                 SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E015,
34771                                         SKERR_HWI_E015MSG);
34772                         }
34773 -
34774 -                       /* Set Flow-control capabilities */
34775 +
34776 +                       /* set Flow-control capabilities */
34777                         switch (pPrt->PFlowCtrlMode) {
34778                         case SK_FLOW_MODE_NONE:
34779                                 AutoNegAdv |= PHY_B_P_NO_PAUSE;
34780 @@ -2545,8 +2842,8 @@
34781                         }
34782                 }
34783                 else {  /* special defines for FIBER (88E1011S only) */
34784 -
34785 -                       /* Set Full/half duplex capabilities */
34786 +
34787 +                       /* set Full/half duplex capabilities */
34788                         switch (pPrt->PLinkMode) {
34789                         case SK_LMODE_AUTOHALF:
34790                                 AutoNegAdv |= PHY_M_AN_1000X_AHD;
34791 @@ -2561,8 +2858,8 @@
34792                                 SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E015,
34793                                         SKERR_HWI_E015MSG);
34794                         }
34795 -
34796 -                       /* Set Flow-control capabilities */
34797 +
34798 +                       /* set Flow-control capabilities */
34799                         switch (pPrt->PFlowCtrlMode) {
34800                         case SK_FLOW_MODE_NONE:
34801                                 AutoNegAdv |= PHY_M_P_NO_PAUSE_X;
34802 @@ -2587,52 +2884,51 @@
34803                         PhyCtrl |= PHY_CT_ANE | PHY_CT_RE_CFG;
34804                 }
34805         }
34806 -
34807 +
34808  #ifdef VCPU
34809         /*
34810          * E-mail from Gu Lin (08-03-2002):
34811          */
34812 -
34813 +
34814         /* Program PHY register 30 as 16'h0708 for simulation speed up */
34815         SkGmPhyWrite(pAC, IoC, Port, 30, 0x0700 /* 0x0708 */);
34816 -
34817 +
34818         VCpuWait(2000);
34819
34820  #else /* VCPU */
34821 -
34822 -       /* Write 1000Base-T Control Register */
34823 -       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_1000T_CTRL, C1000BaseT);
34824 -       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
34825 -               ("Set 1000B-T Ctrl =0x%04X\n", C1000BaseT));
34826 -
34827 +
34828 +       if (pAC->GIni.GIChipId != CHIP_ID_YUKON_FE) {
34829 +               /* Write 1000Base-T Control Register */
34830 +               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_1000T_CTRL, C1000BaseT);
34831 +               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
34832 +                       ("Set 1000B-T Ctrl =0x%04X\n", C1000BaseT));
34833 +       }
34834 +
34835         /* Write AutoNeg Advertisement Register */
34836         SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_AUNE_ADV, AutoNegAdv);
34837         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
34838                 ("Set Auto-Neg.Adv.=0x%04X\n", AutoNegAdv));
34839  #endif /* VCPU */
34840 -
34841 +
34842         if (DoLoop) {
34843 -               /* Set the PHY Loopback bit */
34844 +               /* set the PHY Loopback bit */
34845                 PhyCtrl |= PHY_CT_LOOP;
34846
34847  #ifdef XXX
34848                 /* Program PHY register 16 as 16'h0400 to force link good */
34849                 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, PHY_M_PC_FL_GOOD);
34850 -#endif /* XXX */
34851
34852 -#ifndef VCPU
34853                 if (pPrt->PLinkSpeed != SK_LSPEED_AUTO) {
34854                         /* Write Ext. PHY Specific Control */
34855                         SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_CTRL,
34856                                 (SK_U16)((pPrt->PLinkSpeed + 2) << 4));
34857                 }
34858 -#endif /* VCPU */
34859 +#endif /* XXX */
34860         }
34861  #ifdef TEST_ONLY
34862         else if (pPrt->PLinkSpeed == SK_LSPEED_10MBPS) {
34863 -                       /* Write PHY Specific Control */
34864 -                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL,
34865 -                               PHY_M_PC_EN_DET_MSK);
34866 +               /* Write PHY Specific Control */
34867 +               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, PHY_M_PC_EN_DET_MSK);
34868         }
34869  #endif
34870
34871 @@ -2645,27 +2941,83 @@
34872         VCpuWait(2000);
34873  #else
34874
34875 -       LedCtrl = PHY_M_LED_PULS_DUR(PULS_170MS) | PHY_M_LED_BLINK_RT(BLINK_84MS);
34876 +       LedCtrl = PHY_M_LED_PULS_DUR(PULS_170MS);
34877 +
34878 +       LedOver = 0;
34879 +
34880 +       if ((pAC->GIni.GILedBlinkCtrl & SK_ACT_LED_BLINK) != 0)  {
34881 +
34882 +               if (pAC->GIni.GIChipId == CHIP_ID_YUKON_FE) {
34883 +                       /* on 88E3082 these bits are at 11..9 (shifted left) */
34884 +                       LedCtrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) << 1;
34885 +
34886 +                       SkGmPhyRead(pAC, IoC, Port, PHY_MARV_FE_LED_PAR, &SWord);
34887
34888 -       if ((pAC->GIni.GILedBlinkCtrl & SK_ACT_LED_BLINK) != 0) {
34889 -               LedCtrl |= PHY_M_LEDC_RX_CTRL | PHY_M_LEDC_TX_CTRL;
34890 +                       /* delete ACT LED control bits */
34891 +                       SWord &= ~PHY_M_FELP_LED1_MSK;
34892 +                       /* change ACT LED control to blink mode */
34893 +                       SWord |= PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_ACT_BL);
34894 +
34895 +                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_FE_LED_PAR, SWord);
34896 +               }
34897 +               else if (pAC->GIni.GIChipId == CHIP_ID_YUKON_XL) {
34898 +                       /* save page register */
34899 +                       SkGmPhyRead(pAC, IoC, Port, PHY_MARV_EXT_ADR, &PageReg);
34900 +
34901 +                       /* select page 3 to access LED control register */
34902 +                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, 3);
34903 +
34904 +                       /* set LED Function Control register */
34905 +                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, (SK_U16)
34906 +                               (PHY_M_LEDC_LOS_CTRL(1) |               /* LINK/ACT */
34907 +                                PHY_M_LEDC_INIT_CTRL(7) |              /* 10 Mbps */
34908 +                                PHY_M_LEDC_STA1_CTRL(7) |              /* 100 Mbps */
34909 +                                PHY_M_LEDC_STA0_CTRL(7)));             /* 1000 Mbps */
34910 +
34911 +                       /* set Polarity Control register */
34912 +                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_STAT, (SK_U16)
34913 +                               (PHY_M_POLC_LS1_P_MIX(4) | PHY_M_POLC_IS0_P_MIX(4) |
34914 +                                PHY_M_POLC_LOS_CTRL(2) | PHY_M_POLC_INIT_CTRL(2) |
34915 +                                PHY_M_POLC_STA1_CTRL(2) | PHY_M_POLC_STA0_CTRL(2)));
34916 +
34917 +                       /* restore page register */
34918 +                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, PageReg);
34919 +               }
34920 +               else {
34921 +                       /* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */
34922 +                       LedCtrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL;
34923 +
34924 +                       /* on PHY 88E1111 there is a change for LED control */
34925 +                       if (pAC->GIni.GIChipId == CHIP_ID_YUKON_EC &&
34926 +                               (pAC->GIni.GILedBlinkCtrl & SK_DUAL_LED_ACT_LNK) != 0)  {
34927 +                               /* Yukon-EC needs setting of 2 bits: 0,6=11) */
34928 +                               LedCtrl |= PHY_M_LEDC_TX_C_LSB;
34929 +                       }
34930 +                       /* turn off the Rx LED (LED_RX) */
34931 +                       LedOver |= PHY_M_LED_MO_RX(MO_LED_OFF);
34932 +               }
34933         }
34934
34935         if ((pAC->GIni.GILedBlinkCtrl & SK_DUP_LED_NORMAL) != 0) {
34936 +               /* disable blink mode (LED_DUPLEX) on collisions */
34937                 LedCtrl |= PHY_M_LEDC_DP_CTRL;
34938         }
34939 -
34940 +
34941         SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_LED_CTRL, LedCtrl);
34942
34943         if ((pAC->GIni.GILedBlinkCtrl & SK_LED_LINK100_ON) != 0) {
34944                 /* only in forced 100 Mbps mode */
34945                 if (!AutoNeg && pPrt->PLinkSpeed == SK_LSPEED_100MBPS) {
34946 -
34947 -                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_LED_OVER,
34948 -                               PHY_M_LED_MO_100(MO_LED_ON));
34949 +                       /* turn on 100 Mbps LED (LED_LINK100) */
34950 +                       LedOver |= PHY_M_LED_MO_100(MO_LED_ON);
34951                 }
34952         }
34953
34954 +       if (LedOver != 0) {
34955 +               /* set Manual LED Override */
34956 +               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_LED_OVER, LedOver);
34957 +       }
34958 +
34959  #ifdef SK_DIAG
34960         c_print("Set PHY Ctrl=0x%04X\n", PhyCtrl);
34961         c_print("Set 1000 B-T=0x%04X\n", C1000BaseT);
34962 @@ -2678,30 +3030,33 @@
34963         SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &PhyCtrl);
34964         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
34965                 ("PHY Ctrl Reg.=0x%04X\n", PhyCtrl));
34966 -
34967 -       /* Read 1000Base-T Control Register */
34968 -       SkGmPhyRead(pAC, IoC, Port, PHY_MARV_1000T_CTRL, &C1000BaseT);
34969 -       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
34970 -               ("1000B-T Ctrl =0x%04X\n", C1000BaseT));
34971 -
34972 +
34973         /* Read AutoNeg Advertisement Register */
34974         SkGmPhyRead(pAC, IoC, Port, PHY_MARV_AUNE_ADV, &AutoNegAdv);
34975         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
34976                 ("Auto-Neg.Adv.=0x%04X\n", AutoNegAdv));
34977 -
34978 -       /* Read Ext. PHY Specific Control */
34979 -       SkGmPhyRead(pAC, IoC, Port, PHY_MARV_EXT_CTRL, &ExtPhyCtrl);
34980 -       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
34981 -               ("Ext. PHY Ctrl=0x%04X\n", ExtPhyCtrl));
34982 -
34983 +
34984 +       if (pAC->GIni.GIChipId != CHIP_ID_YUKON_FE) {
34985 +               /* Read 1000Base-T Control Register */
34986 +               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_1000T_CTRL, &C1000BaseT);
34987 +               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
34988 +                       ("1000B-T Ctrl =0x%04X\n", C1000BaseT));
34989 +
34990 +               /* Read Ext. PHY Specific Control */
34991 +               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_EXT_CTRL, &ExtPhyCtrl);
34992 +               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
34993 +                       ("Ext. PHY Ctrl=0x%04X\n", ExtPhyCtrl));
34994 +       }
34995 +
34996         /* Read PHY Status */
34997         SkGmPhyRead(pAC, IoC, Port, PHY_MARV_STAT, &PhyStat);
34998         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
34999                 ("PHY Stat Reg.=0x%04X\n", PhyStat));
35000 +
35001         SkGmPhyRead(pAC, IoC, Port, PHY_MARV_STAT, &PhyStat1);
35002         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
35003                 ("PHY Stat Reg.=0x%04X\n", PhyStat1));
35004 -
35005 +
35006         /* Read PHY Specific Status */
35007         SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_STAT, &PhySpecStat);
35008         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
35009 @@ -2718,6 +3073,8 @@
35010         c_print("PHY Spec Reg=0x%04X\n", PhySpecStat);
35011  #endif /* SK_DIAG */
35012
35013 +       /* enable all PHY interrupts */
35014 +       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_INT_MASK, (SK_U16)PHY_M_DEF_MSK);
35015  #endif /* VCPU */
35016
35017  }      /* SkGmInitPhyMarv */
35018 @@ -2737,8 +3094,8 @@
35019   *     nothing
35020   */
35021  static void SkXmInitPhyLone(
35022 -SK_AC  *pAC,           /* adapter context */
35023 -SK_IOC IoC,            /* IO context */
35024 +SK_AC  *pAC,           /* Adapter Context */
35025 +SK_IOC IoC,            /* I/O Context */
35026  int            Port,           /* Port Index (MAC_1 + n) */
35027  SK_BOOL        DoLoop)         /* Should a Phy LoopBack be set-up? */
35028  {
35029 @@ -2756,7 +3113,7 @@
35030         /* manually Master/Slave ? */
35031         if (pPrt->PMSMode != SK_MS_MODE_AUTO) {
35032                 Ctrl2 |= PHY_L_1000C_MSE;
35033 -
35034 +
35035                 if (pPrt->PMSMode == SK_MS_MODE_MASTER) {
35036                         Ctrl2 |= PHY_L_1000C_MSC;
35037                 }
35038 @@ -2769,7 +3126,7 @@
35039                  */
35040                 SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
35041                         ("InitPhyLone: no auto-negotiation Port %d\n", Port));
35042 -               /* Set DuplexMode in Config register */
35043 +               /* set DuplexMode in Config register */
35044                 if (pPrt->PLinkMode == SK_LMODE_FULL) {
35045                         Ctrl1 |= PHY_CT_DUP_MD;
35046                 }
35047 @@ -2778,7 +3135,6 @@
35048                 if (pPrt->PMSMode == SK_MS_MODE_AUTO) {
35049                         Ctrl2 |= PHY_L_1000C_MSE;       /* set it to Slave */
35050                 }
35051 -
35052                 /*
35053                  * Do NOT enable Auto-negotiation here. This would hold
35054                  * the link down because no IDLES are transmitted
35055 @@ -2787,9 +3143,9 @@
35056         else {
35057                 SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
35058                         ("InitPhyLone: with auto-negotiation Port %d\n", Port));
35059 -               /* Set Auto-negotiation advertisement */
35060 +               /* set Auto-negotiation advertisement */
35061
35062 -               /* Set Full/half duplex capabilities */
35063 +               /* set Full/half duplex capabilities */
35064                 switch (pPrt->PLinkMode) {
35065                 case SK_LMODE_AUTOHALF:
35066                         Ctrl2 |= PHY_L_1000C_AHD;
35067 @@ -2805,7 +3161,7 @@
35068                                 SKERR_HWI_E015MSG);
35069                 }
35070
35071 -               /* Set Flow-control capabilities */
35072 +               /* set Flow-control capabilities */
35073                 switch (pPrt->PFlowCtrlMode) {
35074                 case SK_FLOW_MODE_NONE:
35075                         Ctrl3 |= PHY_L_P_NO_PAUSE;
35076 @@ -2827,19 +3183,19 @@
35077                 /* Restart Auto-negotiation */
35078                 Ctrl1 = PHY_CT_ANE | PHY_CT_RE_CFG;
35079         }
35080 -
35081 +
35082         /* Write 1000Base-T Control Register */
35083         SkXmPhyWrite(pAC, IoC, Port, PHY_LONE_1000T_CTRL, Ctrl2);
35084         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
35085                 ("1000B-T Ctrl Reg=0x%04X\n", Ctrl2));
35086 -
35087 +
35088         /* Write AutoNeg Advertisement Register */
35089         SkXmPhyWrite(pAC, IoC, Port, PHY_LONE_AUNE_ADV, Ctrl3);
35090         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
35091                 ("Auto-Neg.Adv.Reg=0x%04X\n", Ctrl3));
35092
35093         if (DoLoop) {
35094 -               /* Set the Phy Loopback bit, too */
35095 +               /* set the Phy Loopback bit, too */
35096                 Ctrl1 |= PHY_CT_LOOP;
35097         }
35098
35099 @@ -2862,8 +3218,8 @@
35100   *     nothing
35101   */
35102  static void SkXmInitPhyNat(
35103 -SK_AC  *pAC,           /* adapter context */
35104 -SK_IOC IoC,            /* IO context */
35105 +SK_AC  *pAC,           /* Adapter Context */
35106 +SK_IOC IoC,            /* I/O Context */
35107  int            Port,           /* Port Index (MAC_1 + n) */
35108  SK_BOOL        DoLoop)         /* Should a Phy LoopBack be set-up? */
35109  {
35110 @@ -2884,8 +3240,8 @@
35111   *     nothing
35112   */
35113  void SkMacInitPhy(
35114 -SK_AC  *pAC,           /* adapter context */
35115 -SK_IOC IoC,            /* IO context */
35116 +SK_AC  *pAC,           /* Adapter Context */
35117 +SK_IOC IoC,            /* I/O Context */
35118  int            Port,           /* Port Index (MAC_1 + n) */
35119  SK_BOOL        DoLoop)         /* Should a Phy LoopBack be set-up? */
35120  {
35121 @@ -2895,7 +3251,7 @@
35122
35123  #ifdef GENESIS
35124         if (pAC->GIni.GIGenesis) {
35125 -
35126 +
35127                 switch (pPrt->PhyType) {
35128                 case SK_PHY_XMAC:
35129                         SkXmInitPhyXmac(pAC, IoC, Port, DoLoop);
35130 @@ -2914,10 +3270,10 @@
35131                 }
35132         }
35133  #endif /* GENESIS */
35134 -
35135 +
35136  #ifdef YUKON
35137         if (pAC->GIni.GIYukon) {
35138 -
35139 +
35140                 SkGmInitPhyMarv(pAC, IoC, Port, DoLoop);
35141         }
35142  #endif /* YUKON */
35143 @@ -2939,8 +3295,8 @@
35144   *     SK_AND_OTHER    Other error happened
35145   */
35146  static int SkXmAutoNegDoneXmac(
35147 -SK_AC  *pAC,           /* adapter context */
35148 -SK_IOC IoC,            /* IO context */
35149 +SK_AC  *pAC,           /* Adapter Context */
35150 +SK_IOC IoC,            /* I/O Context */
35151  int            Port)           /* Port Index (MAC_1 + n) */
35152  {
35153         SK_GEPORT       *pPrt;
35154 @@ -2958,10 +3314,10 @@
35155
35156         if ((LPAb & PHY_X_AN_RFB) != 0) {
35157                 /* At least one of the remote fault bit is set */
35158 -               /* Error */
35159 -               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
35160 +               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
35161                         ("AutoNegFail: Remote fault bit set Port %d\n", Port));
35162                 pPrt->PAutoNegFail = SK_TRUE;
35163 +
35164                 return(SK_AND_OTHER);
35165         }
35166
35167 @@ -2974,7 +3330,7 @@
35168         }
35169         else {
35170                 /* Error */
35171 -               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
35172 +               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
35173                         ("AutoNegFail: Duplex mode mismatch Port %d\n", Port));
35174                 pPrt->PAutoNegFail = SK_TRUE;
35175                 return(SK_AND_DUP_CAP);
35176 @@ -2984,19 +3340,19 @@
35177         /* We are NOT using chapter 4.23 of the Xaqti manual */
35178         /* We are using IEEE 802.3z/D5.0 Table 37-4 */
35179         if ((pPrt->PFlowCtrlMode == SK_FLOW_MODE_SYMMETRIC ||
35180 -            pPrt->PFlowCtrlMode == SK_FLOW_MODE_SYM_OR_REM) &&
35181 -           (LPAb & PHY_X_P_SYM_MD) != 0) {
35182 +                pPrt->PFlowCtrlMode == SK_FLOW_MODE_SYM_OR_REM) &&
35183 +               (LPAb & PHY_X_P_SYM_MD) != 0) {
35184                 /* Symmetric PAUSE */
35185                 pPrt->PFlowCtrlStatus = SK_FLOW_STAT_SYMMETRIC;
35186         }
35187         else if (pPrt->PFlowCtrlMode == SK_FLOW_MODE_SYM_OR_REM &&
35188 -                  (LPAb & PHY_X_RS_PAUSE) == PHY_X_P_ASYM_MD) {
35189 -               /* Enable PAUSE receive, disable PAUSE transmit */
35190 +                        (LPAb & PHY_X_RS_PAUSE) == PHY_X_P_ASYM_MD) {
35191 +               /* enable PAUSE receive, disable PAUSE transmit */
35192                 pPrt->PFlowCtrlStatus = SK_FLOW_STAT_REM_SEND;
35193         }
35194         else if (pPrt->PFlowCtrlMode == SK_FLOW_MODE_LOC_SEND &&
35195 -                  (LPAb & PHY_X_RS_PAUSE) == PHY_X_P_BOTH_MD) {
35196 -               /* Disable PAUSE receive, enable PAUSE transmit */
35197 +                        (LPAb & PHY_X_RS_PAUSE) == PHY_X_P_BOTH_MD) {
35198 +               /* disable PAUSE receive, enable PAUSE transmit */
35199                 pPrt->PFlowCtrlStatus = SK_FLOW_STAT_LOC_SEND;
35200         }
35201         else {
35202 @@ -3022,8 +3378,8 @@
35203   *     SK_AND_OTHER    Other error happened
35204   */
35205  static int SkXmAutoNegDoneBcom(
35206 -SK_AC  *pAC,           /* adapter context */
35207 -SK_IOC IoC,            /* IO context */
35208 +SK_AC  *pAC,           /* Adapter Context */
35209 +SK_IOC IoC,            /* I/O Context */
35210  int            Port)           /* Port Index (MAC_1 + n) */
35211  {
35212         SK_GEPORT       *pPrt;
35213 @@ -3045,12 +3401,12 @@
35214  01-Sep-2000 RA;:;:
35215         SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_1000T_STAT, &ResAb);
35216  #endif /* 0 */
35217 -
35218 +
35219         SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_STAT, &AuxStat);
35220
35221         if ((LPAb & PHY_B_AN_RF) != 0) {
35222                 /* Remote fault bit is set: Error */
35223 -               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
35224 +               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
35225                         ("AutoNegFail: Remote fault bit set Port %d\n", Port));
35226                 pPrt->PAutoNegFail = SK_TRUE;
35227                 return(SK_AND_OTHER);
35228 @@ -3065,23 +3421,23 @@
35229         }
35230         else {
35231                 /* Error */
35232 -               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
35233 +               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
35234                         ("AutoNegFail: Duplex mode mismatch Port %d\n", Port));
35235                 pPrt->PAutoNegFail = SK_TRUE;
35236                 return(SK_AND_DUP_CAP);
35237         }
35238 -
35239 +
35240  #ifdef TEST_ONLY
35241  01-Sep-2000 RA;:;:
35242         /* Check Master/Slave resolution */
35243         if ((ResAb & PHY_B_1000S_MSF) != 0) {
35244 -               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
35245 +               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
35246                         ("Master/Slave Fault Port %d\n", Port));
35247                 pPrt->PAutoNegFail = SK_TRUE;
35248                 pPrt->PMSStatus = SK_MS_STAT_FAULT;
35249                 return(SK_AND_OTHER);
35250         }
35251 -
35252 +
35253         pPrt->PMSStatus = ((ResAb & PHY_B_1000S_MSR) != 0) ?
35254                 SK_MS_STAT_MASTER : SK_MS_STAT_SLAVE;
35255  #endif /* 0 */
35256 @@ -3093,11 +3449,11 @@
35257                 pPrt->PFlowCtrlStatus = SK_FLOW_STAT_SYMMETRIC;
35258         }
35259         else if ((AuxStat & PHY_B_AS_PAUSE_MSK) == PHY_B_AS_PRR) {
35260 -               /* Enable PAUSE receive, disable PAUSE transmit */
35261 +               /* enable PAUSE receive, disable PAUSE transmit */
35262                 pPrt->PFlowCtrlStatus = SK_FLOW_STAT_REM_SEND;
35263         }
35264         else if ((AuxStat & PHY_B_AS_PAUSE_MSK) == PHY_B_AS_PRT) {
35265 -               /* Disable PAUSE receive, enable PAUSE transmit */
35266 +               /* disable PAUSE receive, enable PAUSE transmit */
35267                 pPrt->PFlowCtrlStatus = SK_FLOW_STAT_LOC_SEND;
35268         }
35269         else {
35270 @@ -3125,14 +3481,18 @@
35271   *     SK_AND_OTHER    Other error happened
35272   */
35273  static int SkGmAutoNegDoneMarv(
35274 -SK_AC  *pAC,           /* adapter context */
35275 -SK_IOC IoC,            /* IO context */
35276 +SK_AC  *pAC,           /* Adapter Context */
35277 +SK_IOC IoC,            /* I/O Context */
35278  int            Port)           /* Port Index (MAC_1 + n) */
35279  {
35280         SK_GEPORT       *pPrt;
35281         SK_U16          LPAb;           /* Link Partner Ability */
35282         SK_U16          ResAb;          /* Resolved Ability */
35283         SK_U16          AuxStat;        /* Auxiliary Status */
35284 +       SK_U8           PauseMode;      /* Pause Mode */
35285 +
35286 +       /* set Pause On */
35287 +       PauseMode = (SK_U8)GMC_PAUSE_ON;
35288
35289         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
35290                 ("AutoNegDoneMarv, Port %d\n", Port));
35291 @@ -3142,78 +3502,105 @@
35292         SkGmPhyRead(pAC, IoC, Port, PHY_MARV_AUNE_LP, &LPAb);
35293         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
35294                 ("Link P.Abil.=0x%04X\n", LPAb));
35295 -
35296 +
35297         if ((LPAb & PHY_M_AN_RF) != 0) {
35298 -               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
35299 +               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
35300                         ("AutoNegFail: Remote fault bit set Port %d\n", Port));
35301                 pPrt->PAutoNegFail = SK_TRUE;
35302                 return(SK_AND_OTHER);
35303         }
35304
35305 -       SkGmPhyRead(pAC, IoC, Port, PHY_MARV_1000T_STAT, &ResAb);
35306 -
35307 -       /* Check Master/Slave resolution */
35308 -       if ((ResAb & PHY_B_1000S_MSF) != 0) {
35309 -               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
35310 -                       ("Master/Slave Fault Port %d\n", Port));
35311 -               pPrt->PAutoNegFail = SK_TRUE;
35312 -               pPrt->PMSStatus = SK_MS_STAT_FAULT;
35313 -               return(SK_AND_OTHER);
35314 +       if ((pPrt->PLinkSpeedCap & SK_LSPEED_CAP_1000MBPS) != 0) {
35315 +
35316 +               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_1000T_STAT, &ResAb);
35317 +
35318 +               /* Check Master/Slave resolution */
35319 +               if ((ResAb & PHY_B_1000S_MSF) != 0) {
35320 +                       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
35321 +                               ("Master/Slave Fault Port %d\n", Port));
35322 +                       pPrt->PAutoNegFail = SK_TRUE;
35323 +                       pPrt->PMSStatus = SK_MS_STAT_FAULT;
35324 +                       return(SK_AND_OTHER);
35325 +               }
35326 +
35327 +               pPrt->PMSStatus = ((ResAb & PHY_B_1000S_MSR) != 0) ?
35328 +                       (SK_U8)SK_MS_STAT_MASTER : (SK_U8)SK_MS_STAT_SLAVE;
35329         }
35330 -
35331 -       pPrt->PMSStatus = ((ResAb & PHY_B_1000S_MSR) != 0) ?
35332 -               (SK_U8)SK_MS_STAT_MASTER : (SK_U8)SK_MS_STAT_SLAVE;
35333 -
35334 +
35335         /* Read PHY Specific Status */
35336         SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_STAT, &AuxStat);
35337 -
35338 +
35339         /* Check Speed & Duplex resolved */
35340 -       if ((AuxStat & PHY_M_PS_SPDUP_RES) == 0) {
35341 -               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
35342 -                       ("AutoNegFail: Speed & Duplex not resolved, Port %d\n", Port));
35343 -               pPrt->PAutoNegFail = SK_TRUE;
35344 -               pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_UNKNOWN;
35345 -               return(SK_AND_DUP_CAP);
35346 -       }
35347 -
35348 -       if ((AuxStat & PHY_M_PS_FULL_DUP) != 0) {
35349 -               pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_AUTOFULL;
35350 -       }
35351 -       else {
35352 -               pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_AUTOHALF;
35353 -       }
35354 -
35355 -       /* Check PAUSE mismatch ??? */
35356 -       /* We are using IEEE 802.3z/D5.0 Table 37-4 */
35357 -       if ((AuxStat & PHY_M_PS_PAUSE_MSK) == PHY_M_PS_PAUSE_MSK) {
35358 -               /* Symmetric PAUSE */
35359 -               pPrt->PFlowCtrlStatus = SK_FLOW_STAT_SYMMETRIC;
35360 -       }
35361 -       else if ((AuxStat & PHY_M_PS_PAUSE_MSK) == PHY_M_PS_RX_P_EN) {
35362 -               /* Enable PAUSE receive, disable PAUSE transmit */
35363 -               pPrt->PFlowCtrlStatus = SK_FLOW_STAT_REM_SEND;
35364 +       if ((AuxStat & PHY_M_PS_SPDUP_RES) == 0) {
35365 +               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
35366 +                       ("AutoNegFail: Speed & Duplex not resolved, Port %d\n", Port));
35367 +               pPrt->PAutoNegFail = SK_TRUE;
35368 +               pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_UNKNOWN;
35369 +               return(SK_AND_DUP_CAP);
35370         }
35371 -       else if ((AuxStat & PHY_M_PS_PAUSE_MSK) == PHY_M_PS_TX_P_EN) {
35372 -               /* Disable PAUSE receive, enable PAUSE transmit */
35373 -               pPrt->PFlowCtrlStatus = SK_FLOW_STAT_LOC_SEND;
35374 +
35375 +       pPrt->PLinkModeStatus = (SK_U8)(((AuxStat & PHY_M_PS_FULL_DUP) != 0) ?
35376 +               SK_LMODE_STAT_AUTOFULL : SK_LMODE_STAT_AUTOHALF);
35377 +
35378 +       if (pAC->GIni.GIChipId == CHIP_ID_YUKON_FE) {
35379 +               /* set used link speed */
35380 +               pPrt->PLinkSpeedUsed = (SK_U8)(((AuxStat & PHY_M_PS_SPEED_100) != 0) ?
35381 +                       SK_LSPEED_STAT_100MBPS : SK_LSPEED_STAT_10MBPS);
35382         }
35383         else {
35384 -               /* PAUSE mismatch -> no PAUSE */
35385 -               pPrt->PFlowCtrlStatus = SK_FLOW_STAT_NONE;
35386 +               /* set used link speed */
35387 +               switch ((unsigned)(AuxStat & PHY_M_PS_SPEED_MSK)) {
35388 +               case (unsigned)PHY_M_PS_SPEED_1000:
35389 +                       pPrt->PLinkSpeedUsed = (SK_U8)SK_LSPEED_STAT_1000MBPS;
35390 +                       break;
35391 +               case PHY_M_PS_SPEED_100:
35392 +                       pPrt->PLinkSpeedUsed = (SK_U8)SK_LSPEED_STAT_100MBPS;
35393 +                       break;
35394 +               default:
35395 +                       pPrt->PLinkSpeedUsed = (SK_U8)SK_LSPEED_STAT_10MBPS;
35396 +               }
35397 +
35398 +               if (pAC->GIni.GIChipId == CHIP_ID_YUKON_XL) {
35399 +                       /* Tx & Rx Pause Enabled bits are at 9..8 */
35400 +                       AuxStat >>= 6;
35401 +
35402 +                       if (!pAC->GIni.GICopperType) {
35403 +                               /* always 1000 Mbps on fiber */
35404 +                               pPrt->PLinkSpeedUsed = (SK_U8)SK_LSPEED_STAT_1000MBPS;
35405 +                       }
35406 +               }
35407 +
35408 +               AuxStat &= PHY_M_PS_PAUSE_MSK;
35409 +               /* We are using IEEE 802.3z/D5.0 Table 37-4 */
35410 +               if (AuxStat == PHY_M_PS_PAUSE_MSK) {
35411 +                       /* Symmetric PAUSE */
35412 +                       pPrt->PFlowCtrlStatus = SK_FLOW_STAT_SYMMETRIC;
35413 +               }
35414 +               else if (AuxStat == PHY_M_PS_RX_P_EN) {
35415 +                       /* enable PAUSE receive, disable PAUSE transmit */
35416 +                       pPrt->PFlowCtrlStatus = SK_FLOW_STAT_REM_SEND;
35417 +               }
35418 +               else if (AuxStat == PHY_M_PS_TX_P_EN) {
35419 +                       /* disable PAUSE receive, enable PAUSE transmit */
35420 +                       pPrt->PFlowCtrlStatus = SK_FLOW_STAT_LOC_SEND;
35421 +               }
35422 +               else {
35423 +                       /* PAUSE mismatch -> no PAUSE */
35424 +                       pPrt->PFlowCtrlStatus = SK_FLOW_STAT_NONE;
35425 +               }
35426         }
35427 -
35428 -       /* set used link speed */
35429 -       switch ((unsigned)(AuxStat & PHY_M_PS_SPEED_MSK)) {
35430 -       case (unsigned)PHY_M_PS_SPEED_1000:
35431 -               pPrt->PLinkSpeedUsed = (SK_U8)SK_LSPEED_STAT_1000MBPS;
35432 -               break;
35433 -       case PHY_M_PS_SPEED_100:
35434 -               pPrt->PLinkSpeedUsed = (SK_U8)SK_LSPEED_STAT_100MBPS;
35435 -               break;
35436 -       default:
35437 -               pPrt->PLinkSpeedUsed = (SK_U8)SK_LSPEED_STAT_10MBPS;
35438 +
35439 +       if ((pPrt->PFlowCtrlStatus == SK_FLOW_STAT_NONE) ||
35440 +               /* disable Pause also for 10/100 Mbps in half duplex mode */
35441 +               ((pPrt->PLinkSpeedUsed < (SK_U8)SK_LSPEED_STAT_1000MBPS) &&
35442 +                pPrt->PLinkModeStatus == (SK_U8)SK_LMODE_STAT_AUTOHALF)) {
35443 +
35444 +               /* set Pause Off */
35445 +               PauseMode = (SK_U8)GMC_PAUSE_OFF;
35446         }
35447
35448 +       SK_OUT8(IoC, MR_ADDR(Port, GMAC_CTRL), PauseMode);
35449 +
35450         return(SK_AND_OK);
35451  }      /* SkGmAutoNegDoneMarv */
35452  #endif /* YUKON */
35453 @@ -3233,8 +3620,8 @@
35454   *     SK_AND_OTHER    Other error happened
35455   */
35456  static int SkXmAutoNegDoneLone(
35457 -SK_AC  *pAC,           /* adapter context */
35458 -SK_IOC IoC,            /* IO context */
35459 +SK_AC  *pAC,           /* Adapter Context */
35460 +SK_IOC IoC,            /* I/O Context */
35461  int            Port)           /* Port Index (MAC_1 + n) */
35462  {
35463         SK_GEPORT       *pPrt;
35464 @@ -3253,8 +3640,7 @@
35465
35466         if ((LPAb & PHY_L_AN_RF) != 0) {
35467                 /* Remote fault bit is set */
35468 -               /* Error */
35469 -               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
35470 +               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
35471                         ("AutoNegFail: Remote fault bit set Port %d\n", Port));
35472                 pPrt->PAutoNegFail = SK_TRUE;
35473                 return(SK_AND_OTHER);
35474 @@ -3267,11 +3653,11 @@
35475         else {
35476                 pPrt->PLinkModeStatus = (SK_U8)SK_LMODE_STAT_AUTOHALF;
35477         }
35478 -
35479 +
35480         /* Check Master/Slave resolution */
35481         if ((ResAb & PHY_L_1000S_MSF) != 0) {
35482                 /* Error */
35483 -               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
35484 +               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
35485                         ("Master/Slave Fault Port %d\n", Port));
35486                 pPrt->PAutoNegFail = SK_TRUE;
35487                 pPrt->PMSStatus = SK_MS_STAT_FAULT;
35488 @@ -3288,7 +3674,7 @@
35489         /* We are using IEEE 802.3z/D5.0 Table 37-4 */
35490         /* we must manually resolve the abilities here */
35491         pPrt->PFlowCtrlStatus = SK_FLOW_STAT_NONE;
35492 -
35493 +
35494         switch (pPrt->PFlowCtrlMode) {
35495         case SK_FLOW_MODE_NONE:
35496                 /* default */
35497 @@ -3296,7 +3682,7 @@
35498         case SK_FLOW_MODE_LOC_SEND:
35499                 if ((QuickStat & (PHY_L_QS_PAUSE | PHY_L_QS_AS_PAUSE)) ==
35500                         (PHY_L_QS_PAUSE | PHY_L_QS_AS_PAUSE)) {
35501 -                       /* Disable PAUSE receive, enable PAUSE transmit */
35502 +                       /* disable PAUSE receive, enable PAUSE transmit */
35503                         pPrt->PFlowCtrlStatus = SK_FLOW_STAT_LOC_SEND;
35504                 }
35505                 break;
35506 @@ -3309,7 +3695,7 @@
35507         case SK_FLOW_MODE_SYM_OR_REM:
35508                 if ((QuickStat & (PHY_L_QS_PAUSE | PHY_L_QS_AS_PAUSE)) ==
35509                         PHY_L_QS_AS_PAUSE) {
35510 -                       /* Enable PAUSE receive, disable PAUSE transmit */
35511 +                       /* enable PAUSE receive, disable PAUSE transmit */
35512                         pPrt->PFlowCtrlStatus = SK_FLOW_STAT_REM_SEND;
35513                 }
35514                 else if ((QuickStat & PHY_L_QS_PAUSE) != 0) {
35515 @@ -3321,7 +3707,7 @@
35516                 SK_ERR_LOG(pAC, SK_ERRCL_SW | SK_ERRCL_INIT, SKERR_HWI_E016,
35517                         SKERR_HWI_E016MSG);
35518         }
35519 -
35520 +
35521         return(SK_AND_OK);
35522  }      /* SkXmAutoNegDoneLone */
35523
35524 @@ -3339,8 +3725,8 @@
35525   *     SK_AND_OTHER    Other error happened
35526   */
35527  static int SkXmAutoNegDoneNat(
35528 -SK_AC  *pAC,           /* adapter context */
35529 -SK_IOC IoC,            /* IO context */
35530 +SK_AC  *pAC,           /* Adapter Context */
35531 +SK_IOC IoC,            /* I/O Context */
35532  int            Port)           /* Port Index (MAC_1 + n) */
35533  {
35534  /* todo: National */
35535 @@ -3360,9 +3746,9 @@
35536   *     SK_AND_DUP_CAP  Duplex capability error happened
35537   *     SK_AND_OTHER    Other error happened
35538   */
35539 -int    SkMacAutoNegDone(
35540 -SK_AC  *pAC,           /* adapter context */
35541 -SK_IOC IoC,            /* IO context */
35542 +int SkMacAutoNegDone(
35543 +SK_AC  *pAC,           /* Adapter Context */
35544 +SK_IOC IoC,            /* I/O Context */
35545  int            Port)           /* Port Index (MAC_1 + n) */
35546  {
35547         SK_GEPORT       *pPrt;
35548 @@ -3374,9 +3760,9 @@
35549
35550  #ifdef GENESIS
35551         if (pAC->GIni.GIGenesis) {
35552 -
35553 +
35554                 switch (pPrt->PhyType) {
35555 -
35556 +
35557                 case SK_PHY_XMAC:
35558                         Rtv = SkXmAutoNegDoneXmac(pAC, IoC, Port);
35559                         break;
35560 @@ -3396,26 +3782,26 @@
35561                 }
35562         }
35563  #endif /* GENESIS */
35564 -
35565 +
35566  #ifdef YUKON
35567         if (pAC->GIni.GIYukon) {
35568 -
35569 +
35570                 Rtv = SkGmAutoNegDoneMarv(pAC, IoC, Port);
35571         }
35572  #endif /* YUKON */
35573 -
35574 +
35575         if (Rtv != SK_AND_OK) {
35576                 return(Rtv);
35577         }
35578
35579         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
35580                 ("AutoNeg done Port %d\n", Port));
35581 -
35582 +
35583         /* We checked everything and may now enable the link */
35584         pPrt->PAutoNegFail = SK_FALSE;
35585
35586         SkMacRxTxEnable(pAC, IoC, Port);
35587 -
35588 +
35589         return(SK_AND_OK);
35590  }      /* SkMacAutoNegDone */
35591
35592 @@ -3433,7 +3819,7 @@
35593   */
35594  static void SkXmSetRxTxEn(
35595  SK_AC  *pAC,           /* Adapter Context */
35596 -SK_IOC IoC,            /* IO context */
35597 +SK_IOC IoC,            /* I/O Context */
35598  int            Port,           /* Port Index (MAC_1 + n) */
35599  int            Para)           /* Parameter to set: MAC or PHY LoopBack, Duplex Mode */
35600  {
35601 @@ -3458,7 +3844,7 @@
35602                 Word &= ~XM_MMU_GMII_LOOP;
35603                 break;
35604         }
35605 -
35606 +
35607         switch (Para & (SK_PHY_FULLD_ON | SK_PHY_FULLD_OFF)) {
35608         case SK_PHY_FULLD_ON:
35609                 Word |= XM_MMU_GMII_FD;
35610 @@ -3467,7 +3853,7 @@
35611                 Word &= ~XM_MMU_GMII_FD;
35612                 break;
35613         }
35614 -
35615 +
35616         XM_OUT16(IoC, Port, XM_MMU_CMD, Word | XM_MMU_ENA_RX | XM_MMU_ENA_TX);
35617
35618         /* dummy read to ensure writing */
35619 @@ -3490,12 +3876,12 @@
35620   */
35621  static void SkGmSetRxTxEn(
35622  SK_AC  *pAC,           /* Adapter Context */
35623 -SK_IOC IoC,            /* IO context */
35624 +SK_IOC IoC,            /* I/O Context */
35625  int            Port,           /* Port Index (MAC_1 + n) */
35626  int            Para)           /* Parameter to set: MAC LoopBack, Duplex Mode */
35627  {
35628         SK_U16  Ctrl;
35629 -
35630 +
35631         GM_IN16(IoC, Port, GM_GP_CTRL, &Ctrl);
35632
35633         switch (Para & (SK_MAC_LOOPB_ON | SK_MAC_LOOPB_OFF)) {
35634 @@ -3515,12 +3901,13 @@
35635                 Ctrl &= ~GM_GPCR_DUP_FULL;
35636                 break;
35637         }
35638 -
35639 -    GM_OUT16(IoC, Port, GM_GP_CTRL, (SK_U16)(Ctrl | GM_GPCR_RX_ENA |
35640 -               GM_GPCR_TX_ENA));
35641
35642 +       GM_OUT16(IoC, Port, GM_GP_CTRL, Ctrl | GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
35643 +
35644 +#ifdef XXX
35645         /* dummy read to ensure writing */
35646         GM_IN16(IoC, Port, GM_GP_CTRL, &Ctrl);
35647 +#endif /* XXX */
35648
35649  }      /* SkGmSetRxTxEn */
35650  #endif /* YUKON */
35651 @@ -3537,20 +3924,20 @@
35652   */
35653  void SkMacSetRxTxEn(
35654  SK_AC  *pAC,           /* Adapter Context */
35655 -SK_IOC IoC,            /* IO context */
35656 +SK_IOC IoC,            /* I/O Context */
35657  int            Port,           /* Port Index (MAC_1 + n) */
35658  int            Para)
35659  {
35660  #ifdef GENESIS
35661         if (pAC->GIni.GIGenesis) {
35662 -
35663 +
35664                 SkXmSetRxTxEn(pAC, IoC, Port, Para);
35665         }
35666  #endif /* GENESIS */
35667 -
35668 +
35669  #ifdef YUKON
35670         if (pAC->GIni.GIYukon) {
35671 -
35672 +
35673                 SkGmSetRxTxEn(pAC, IoC, Port, Para);
35674         }
35675  #endif /* YUKON */
35676 @@ -3570,8 +3957,8 @@
35677   *     != 0    Error happened
35678   */
35679  int SkMacRxTxEnable(
35680 -SK_AC  *pAC,           /* adapter context */
35681 -SK_IOC IoC,            /* IO context */
35682 +SK_AC  *pAC,           /* Adapter Context */
35683 +SK_IOC IoC,            /* I/O Context */
35684  int            Port)           /* Port Index (MAC_1 + n) */
35685  {
35686         SK_GEPORT       *pPrt;
35687 @@ -3589,9 +3976,9 @@
35688         }
35689
35690         if ((pPrt->PLinkMode == SK_LMODE_AUTOHALF ||
35691 -            pPrt->PLinkMode == SK_LMODE_AUTOFULL ||
35692 -            pPrt->PLinkMode == SK_LMODE_AUTOBOTH) &&
35693 -            pPrt->PAutoNegFail) {
35694 +                pPrt->PLinkMode == SK_LMODE_AUTOFULL ||
35695 +                pPrt->PLinkMode == SK_LMODE_AUTOBOTH) &&
35696 +                pPrt->PAutoNegFail) {
35697                 /* Auto-negotiation is not done or failed */
35698                 return(0);
35699         }
35700 @@ -3600,9 +3987,9 @@
35701         if (pAC->GIni.GIGenesis) {
35702                 /* set Duplex Mode and Pause Mode */
35703                 SkXmInitDupMd(pAC, IoC, Port);
35704 -
35705 +
35706                 SkXmInitPauseMd(pAC, IoC, Port);
35707 -
35708 +
35709                 /*
35710                  * Initialize the Interrupt Mask Register. Default IRQs are...
35711                  *      - Link Asynchronous Event
35712 @@ -3618,23 +4005,23 @@
35713                 /* add IRQ for Receive FIFO Overflow */
35714                 IntMask &= ~XM_IS_RXF_OV;
35715  #endif /* DEBUG */
35716 -
35717 +
35718                 if (pPrt->PhyType != SK_PHY_XMAC) {
35719                         /* disable GP0 interrupt bit */
35720                         IntMask |= XM_IS_INP_ASS;
35721                 }
35722                 XM_OUT16(IoC, Port, XM_IMSK, IntMask);
35723 -
35724 +
35725                 /* get MMU Command Reg. */
35726                 XM_IN16(IoC, Port, XM_MMU_CMD, &Reg);
35727 -
35728 +
35729                 if (pPrt->PhyType != SK_PHY_XMAC &&
35730                         (pPrt->PLinkModeStatus == SK_LMODE_STAT_FULL ||
35731                          pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOFULL)) {
35732                         /* set to Full Duplex */
35733                         Reg |= XM_MMU_GMII_FD;
35734                 }
35735 -
35736 +
35737                 switch (pPrt->PhyType) {
35738                 case SK_PHY_BCOM:
35739                         /*
35740 @@ -3644,7 +4031,7 @@
35741                         SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_CTRL, &SWord);
35742                         SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_AUX_CTRL,
35743                                 (SK_U16)(SWord & ~PHY_B_AC_DIS_PM));
35744 -            SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_INT_MASK,
35745 +                       SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_INT_MASK,
35746                                 (SK_U16)PHY_B_DEF_MSK);
35747                         break;
35748  #ifdef OTHER_PHY
35749 @@ -3658,12 +4045,12 @@
35750                         break;
35751  #endif /* OTHER_PHY */
35752                 }
35753 -
35754 +
35755                 /* enable Rx/Tx */
35756                 XM_OUT16(IoC, Port, XM_MMU_CMD, Reg | XM_MMU_ENA_RX | XM_MMU_ENA_TX);
35757         }
35758  #endif /* GENESIS */
35759 -
35760 +
35761  #ifdef YUKON
35762         if (pAC->GIni.GIYukon) {
35763                 /*
35764 @@ -3678,30 +4065,30 @@
35765                 /* add IRQ for Receive FIFO Overrun */
35766                 IntMask |= GM_IS_RX_FF_OR;
35767  #endif /* DEBUG */
35768 -
35769 -               SK_OUT8(IoC, GMAC_IRQ_MSK, (SK_U8)IntMask);
35770 -
35771 +
35772 +               SK_OUT8(IoC, MR_ADDR(Port, GMAC_IRQ_MSK), (SK_U8)IntMask);
35773 +
35774                 /* get General Purpose Control */
35775                 GM_IN16(IoC, Port, GM_GP_CTRL, &Reg);
35776 -
35777 +
35778                 if (pPrt->PLinkModeStatus == SK_LMODE_STAT_FULL ||
35779                         pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOFULL) {
35780                         /* set to Full Duplex */
35781                         Reg |= GM_GPCR_DUP_FULL;
35782                 }
35783 -
35784 +
35785                 /* enable Rx/Tx */
35786 -        GM_OUT16(IoC, Port, GM_GP_CTRL, (SK_U16)(Reg | GM_GPCR_RX_ENA |
35787 -                       GM_GPCR_TX_ENA));
35788 +               GM_OUT16(IoC, Port, GM_GP_CTRL, Reg | GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
35789
35790 -#ifndef VCPU
35791 -               /* Enable all PHY interrupts */
35792 -        SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_INT_MASK,
35793 -                       (SK_U16)PHY_M_DEF_MSK);
35794 -#endif /* VCPU */
35795 +#ifdef XXX
35796 +               /* dummy read to ensure writing */
35797 +               GM_IN16(IoC, Port, GM_GP_CTRL, &Reg);
35798 +#endif /* XXX */
35799         }
35800  #endif /* YUKON */
35801 -
35802 +
35803 +       pAC->GIni.GP[Port].PState = SK_PRT_RUN;
35804 +
35805         return(0);
35806
35807  }      /* SkMacRxTxEnable */
35808 @@ -3717,33 +4104,38 @@
35809   */
35810  void SkMacRxTxDisable(
35811  SK_AC  *pAC,           /* Adapter Context */
35812 -SK_IOC IoC,            /* IO context */
35813 +SK_IOC IoC,            /* I/O Context */
35814  int            Port)           /* Port Index (MAC_1 + n) */
35815  {
35816         SK_U16  Word;
35817
35818  #ifdef GENESIS
35819         if (pAC->GIni.GIGenesis) {
35820 -
35821 +
35822                 XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
35823 -
35824 -               XM_OUT16(IoC, Port, XM_MMU_CMD, Word & ~(XM_MMU_ENA_RX | XM_MMU_ENA_TX));
35825 -
35826 +
35827 +               Word &= ~(XM_MMU_ENA_RX | XM_MMU_ENA_TX);
35828 +
35829 +               XM_OUT16(IoC, Port, XM_MMU_CMD, Word);
35830 +
35831                 /* dummy read to ensure writing */
35832                 XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
35833         }
35834  #endif /* GENESIS */
35835 -
35836 +
35837  #ifdef YUKON
35838         if (pAC->GIni.GIYukon) {
35839 -
35840 +
35841                 GM_IN16(IoC, Port, GM_GP_CTRL, &Word);
35842
35843 -        GM_OUT16(IoC, Port, GM_GP_CTRL, (SK_U16)(Word & ~(GM_GPCR_RX_ENA |
35844 -                       GM_GPCR_TX_ENA)));
35845 +               Word &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
35846
35847 +               GM_OUT16(IoC, Port, GM_GP_CTRL, Word);
35848 +
35849 +#ifdef XXX
35850                 /* dummy read to ensure writing */
35851                 GM_IN16(IoC, Port, GM_GP_CTRL, &Word);
35852 +#endif /* XXX */
35853         }
35854  #endif /* YUKON */
35855
35856 @@ -3760,7 +4152,7 @@
35857   */
35858  void SkMacIrqDisable(
35859  SK_AC  *pAC,           /* Adapter Context */
35860 -SK_IOC IoC,            /* IO context */
35861 +SK_IOC IoC,            /* I/O Context */
35862  int            Port)           /* Port Index (MAC_1 + n) */
35863  {
35864         SK_GEPORT       *pPrt;
35865 @@ -3772,18 +4164,18 @@
35866
35867  #ifdef GENESIS
35868         if (pAC->GIni.GIGenesis) {
35869 -
35870 +
35871                 /* disable all XMAC IRQs */
35872 -               XM_OUT16(IoC, Port, XM_IMSK, 0xffff);
35873 -
35874 -               /* Disable all PHY interrupts */
35875 +               XM_OUT16(IoC, Port, XM_IMSK, 0xffff);
35876 +
35877 +               /* disable all PHY interrupts */
35878                 switch (pPrt->PhyType) {
35879                         case SK_PHY_BCOM:
35880                                 /* Make sure that PHY is initialized */
35881                                 if (pPrt->PState != SK_PRT_RESET) {
35882                                         /* NOT allowed if BCOM is in RESET state */
35883                                         /* Workaround BCOM Errata (#10523) all BCom */
35884 -                                       /* Disable Power Management if link is down */
35885 +                                       /* disable Power Management if link is down */
35886                                         SkXmPhyRead(pAC, IoC, Port, PHY_BCOM_AUX_CTRL, &Word);
35887                                         SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_AUX_CTRL,
35888                                                 (SK_U16)(Word | PHY_B_AC_DIS_PM));
35889 @@ -3802,16 +4194,16 @@
35890                 }
35891         }
35892  #endif /* GENESIS */
35893 -
35894 +
35895  #ifdef YUKON
35896         if (pAC->GIni.GIYukon) {
35897                 /* disable all GMAC IRQs */
35898 -               SK_OUT8(IoC, GMAC_IRQ_MSK, 0);
35899 -
35900 +               SK_OUT8(IoC, MR_ADDR(Port, GMAC_IRQ_MSK), 0);
35901 +
35902  #ifndef VCPU
35903 -               /* Disable all PHY interrupts */
35904 +               /* disable all PHY interrupts */
35905                 SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_INT_MASK, 0);
35906 -#endif /* VCPU */
35907 +#endif /* !VCPU */
35908         }
35909  #endif /* YUKON */
35910
35911 @@ -3823,29 +4215,72 @@
35912   *
35913   *     SkXmSendCont() - Enable / Disable Send Continuous Mode
35914   *
35915 - * Description:        enable / disable Send Continuous Mode on XMAC
35916 + * Description:        enable / disable Send Continuous Mode on XMAC resp.
35917 + *                                                             Packet Generation on GPHY
35918   *
35919   * Returns:
35920   *     nothing
35921   */
35922  void SkXmSendCont(
35923 -SK_AC  *pAC,   /* adapter context */
35924 -SK_IOC IoC,    /* IO context */
35925 +SK_AC  *pAC,   /* Adapter Context */
35926 +SK_IOC IoC,    /* I/O Context */
35927  int            Port,   /* Port Index (MAC_1 + n) */
35928  SK_BOOL        Enable) /* Enable / Disable */
35929  {
35930 +       SK_U16  Reg;
35931 +       SK_U16  Save;
35932         SK_U32  MdReg;
35933
35934 -       XM_IN32(IoC, Port, XM_MODE, &MdReg);
35935 +       if (pAC->GIni.GIGenesis) {
35936 +               XM_IN32(IoC, Port, XM_MODE, &MdReg);
35937
35938 -       if (Enable) {
35939 -               MdReg |= XM_MD_TX_CONT;
35940 +               if (Enable) {
35941 +                       MdReg |= XM_MD_TX_CONT;
35942 +               }
35943 +               else {
35944 +                       MdReg &= ~XM_MD_TX_CONT;
35945 +               }
35946 +               /* setup Mode Register */
35947 +               XM_OUT32(IoC, Port, XM_MODE, MdReg);
35948         }
35949         else {
35950 -               MdReg &= ~XM_MD_TX_CONT;
35951 +               if (pAC->GIni.GIChipId == CHIP_ID_YUKON_EC) {
35952 +                       /* select page 18 */
35953 +                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PAGE_ADDR, 18);
35954 +
35955 +                       SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PAGE_DATA, &Reg);
35956 +
35957 +                       Reg &= ~0x003c;                 /* clear bits 5..2 */
35958 +
35959 +                       if (Enable) {
35960 +                               /* enable packet generation, 1518 byte length */
35961 +                               Reg |= (BIT_5S | BIT_3S);
35962 +                       }
35963 +
35964 +                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PAGE_DATA, Reg);
35965 +               }
35966 +               else if (pAC->GIni.GIChipId == CHIP_ID_YUKON_XL) {
35967 +                       /* save page register */
35968 +                       SkGmPhyRead(pAC, IoC, Port, PHY_MARV_EXT_ADR, &Save);
35969 +
35970 +                       /* select page 6 to access Packet Generation register */
35971 +                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, 6);
35972 +
35973 +                       SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Reg);
35974 +
35975 +                       Reg &= ~0x003f;                 /* clear bits 5..0 */
35976 +
35977 +                       if (Enable) {
35978 +                               /* enable packet generation, 1518 byte length */
35979 +                               Reg |= (BIT_3S | BIT_1S);
35980 +                       }
35981 +
35982 +                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Reg);
35983 +
35984 +                       /* restore page register */
35985 +                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, Save);
35986 +               }
35987         }
35988 -       /* setup Mode Register */
35989 -       XM_OUT32(IoC, Port, XM_MODE, MdReg);
35990
35991  }      /* SkXmSendCont */
35992
35993 @@ -3860,8 +4295,8 @@
35994   *     nothing
35995   */
35996  void SkMacTimeStamp(
35997 -SK_AC  *pAC,   /* adapter context */
35998 -SK_IOC IoC,    /* IO context */
35999 +SK_AC  *pAC,   /* Adapter Context */
36000 +SK_IOC IoC,    /* I/O Context */
36001  int            Port,   /* Port Index (MAC_1 + n) */
36002  SK_BOOL        Enable) /* Enable / Disable */
36003  {
36004 @@ -3906,8 +4341,8 @@
36005   *     is set true.
36006   */
36007  void SkXmAutoNegLipaXmac(
36008 -SK_AC  *pAC,           /* adapter context */
36009 -SK_IOC IoC,            /* IO context */
36010 +SK_AC  *pAC,           /* Adapter Context */
36011 +SK_IOC IoC,            /* I/O Context */
36012  int            Port,           /* Port Index (MAC_1 + n) */
36013  SK_U16 IStatus)        /* Interrupt Status word to analyse */
36014  {
36015 @@ -3921,6 +4356,7 @@
36016                 SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
36017                         ("AutoNegLipa: AutoNeg detected on Port %d, IStatus=0x%04X\n",
36018                         Port, IStatus));
36019 +
36020                 pPrt->PLipaAutoNeg = SK_LIPA_AUTO;
36021         }
36022  }      /* SkXmAutoNegLipaXmac */
36023 @@ -3936,8 +4372,8 @@
36024   *     is set true.
36025   */
36026  void SkMacAutoNegLipaPhy(
36027 -SK_AC  *pAC,           /* adapter context */
36028 -SK_IOC IoC,            /* IO context */
36029 +SK_AC  *pAC,           /* Adapter Context */
36030 +SK_IOC IoC,            /* I/O Context */
36031  int            Port,           /* Port Index (MAC_1 + n) */
36032  SK_U16 PhyStat)        /* PHY Status word to analyse */
36033  {
36034 @@ -3951,6 +4387,7 @@
36035                 SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
36036                         ("AutoNegLipa: AutoNeg detected on Port %d, PhyStat=0x%04X\n",
36037                         Port, PhyStat));
36038 +
36039                 pPrt->PLipaAutoNeg = SK_LIPA_AUTO;
36040         }
36041  }      /* SkMacAutoNegLipaPhy */
36042 @@ -3965,7 +4402,7 @@
36043   *
36044   * Note:
36045   *     With an external PHY, some interrupt bits are not meaningfull any more:
36046 - *     - LinkAsyncEvent (bit #14)              XM_IS_LNK_AE
36047 + *     - LinkAsyncEvent (bit #14)              XM_IS_LNK_AE
36048   *     - LinkPartnerReqConfig (bit #10)        XM_IS_LIPA_RC
36049   *     - Page Received (bit #9)                XM_IS_RX_PAGE
36050   *     - NextPageLoadedForXmt (bit #8)         XM_IS_TX_PAGE
36051 @@ -3977,8 +4414,8 @@
36052   *     nothing
36053   */
36054  void SkXmIrq(
36055 -SK_AC  *pAC,           /* adapter context */
36056 -SK_IOC IoC,            /* IO context */
36057 +SK_AC  *pAC,           /* Adapter Context */
36058 +SK_IOC IoC,            /* I/O Context */
36059  int            Port)           /* Port Index (MAC_1 + n) */
36060  {
36061         SK_GEPORT       *pPrt;
36062 @@ -3986,13 +4423,13 @@
36063         SK_U16          IStatus;        /* Interrupt status read from the XMAC */
36064         SK_U16          IStatus2;
36065  #ifdef SK_SLIM
36066 -    SK_U64      OverflowStatus;
36067 -#endif
36068 +       SK_U64          OverflowStatus;
36069 +#endif
36070
36071         pPrt = &pAC->GIni.GP[Port];
36072 -
36073 +
36074         XM_IN16(IoC, Port, XM_ISRC, &IStatus);
36075 -
36076 +
36077         /* LinkPartner Auto-negable? */
36078         if (pPrt->PhyType == SK_PHY_XMAC) {
36079                 SkXmAutoNegLipaXmac(pAC, IoC, Port, IStatus);
36080 @@ -4003,7 +4440,7 @@
36081                         XM_IS_RX_PAGE | XM_IS_TX_PAGE |
36082                         XM_IS_AND | XM_IS_INP_ASS);
36083         }
36084 -
36085 +
36086         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
36087                 ("XmacIrq Port %d Isr 0x%04X\n", Port, IStatus));
36088
36089 @@ -4113,40 +4550,40 @@
36090   *     nothing
36091   */
36092  void SkGmIrq(
36093 -SK_AC  *pAC,           /* adapter context */
36094 -SK_IOC IoC,            /* IO context */
36095 +SK_AC  *pAC,           /* Adapter Context */
36096 +SK_IOC IoC,            /* I/O Context */
36097  int            Port)           /* Port Index (MAC_1 + n) */
36098  {
36099         SK_GEPORT       *pPrt;
36100         SK_U8           IStatus;        /* Interrupt status */
36101  #ifdef SK_SLIM
36102 -    SK_U64      OverflowStatus;
36103 +       SK_U64          OverflowStatus;
36104  #else
36105         SK_EVPARA       Para;
36106 -#endif
36107 +#endif
36108
36109         pPrt = &pAC->GIni.GP[Port];
36110 -
36111 -       SK_IN8(IoC, GMAC_IRQ_SRC, &IStatus);
36112 -
36113 +
36114 +       SK_IN8(IoC, MR_ADDR(Port, GMAC_IRQ_SRC), &IStatus);
36115 +
36116  #ifdef XXX
36117         /* LinkPartner Auto-negable? */
36118         SkMacAutoNegLipaPhy(pAC, IoC, Port, IStatus);
36119  #endif /* XXX */
36120 -
36121 +
36122         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_IRQ,
36123 -               ("GmacIrq Port %d Isr 0x%04X\n", Port, IStatus));
36124 +               ("GmacIrq Port %d Isr 0x%02X\n", Port, IStatus));
36125
36126         /* Combined Tx & Rx Counter Overflow SIRQ Event */
36127         if (IStatus & (GM_IS_RX_CO_OV | GM_IS_TX_CO_OV)) {
36128                 /* these IRQs will be cleared by reading GMACs register */
36129  #ifdef SK_SLIM
36130 -        SkGmOverflowStatus(pAC, IoC, Port, IStatus, &OverflowStatus);
36131 +               SkGmOverflowStatus(pAC, IoC, Port, (SK_U16)IStatus, &OverflowStatus);
36132  #else
36133                 Para.Para32[0] = (SK_U32)Port;
36134                 Para.Para32[1] = (SK_U32)IStatus;
36135                 SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_SIRQ_OVERFLOW, Para);
36136 -#endif
36137 +#endif
36138         }
36139
36140         if (IStatus & GM_IS_RX_FF_OR) {
36141 @@ -4185,8 +4622,8 @@
36142   *     nothing
36143   */
36144  void SkMacIrq(
36145 -SK_AC  *pAC,           /* adapter context */
36146 -SK_IOC IoC,            /* IO context */
36147 +SK_AC  *pAC,           /* Adapter Context */
36148 +SK_IOC IoC,            /* I/O Context */
36149  int            Port)           /* Port Index (MAC_1 + n) */
36150  {
36151  #ifdef GENESIS
36152 @@ -4195,7 +4632,7 @@
36153                 SkXmIrq(pAC, IoC, Port);
36154         }
36155  #endif /* GENESIS */
36156 -
36157 +
36158  #ifdef YUKON
36159         if (pAC->GIni.GIYukon) {
36160                 /* IRQ from GMAC */
36161 @@ -4222,8 +4659,8 @@
36162   *     1:  something went wrong
36163   */
36164  int SkXmUpdateStats(
36165 -SK_AC  *pAC,           /* adapter context */
36166 -SK_IOC IoC,            /* IO context */
36167 +SK_AC  *pAC,           /* Adapter Context */
36168 +SK_IOC IoC,            /* I/O Context */
36169  unsigned int Port)     /* Port Index (MAC_1 + n) */
36170  {
36171         SK_GEPORT       *pPrt;
36172 @@ -4245,7 +4682,7 @@
36173         do {
36174
36175                 XM_IN16(IoC, Port, XM_STAT_CMD, &StatReg);
36176 -
36177 +
36178                 if (++WaitIndex > 10) {
36179
36180                         SK_ERR_LOG(pAC, SK_ERRCL_HW, SKERR_HWI_E021, SKERR_HWI_E021MSG);
36181 @@ -4253,7 +4690,7 @@
36182                         return(1);
36183                 }
36184         } while ((StatReg & (XM_SC_SNP_TXC | XM_SC_SNP_RXC)) != 0);
36185 -
36186 +
36187         return(0);
36188  }      /* SkXmUpdateStats */
36189
36190 @@ -4272,19 +4709,19 @@
36191   *     1:  something went wrong
36192   */
36193  int SkXmMacStatistic(
36194 -SK_AC  *pAC,                   /* adapter context */
36195 -SK_IOC IoC,                    /* IO context */
36196 +SK_AC  *pAC,                   /* Adapter Context */
36197 +SK_IOC IoC,                    /* I/O Context */
36198  unsigned int Port,             /* Port Index (MAC_1 + n) */
36199  SK_U16 StatAddr,               /* MIB counter base address */
36200 -SK_U32 SK_FAR *pVal)   /* ptr to return statistic value */
36201 +SK_U32 SK_FAR *pVal)   /* Pointer to return statistic value */
36202  {
36203         if ((StatAddr < XM_TXF_OK) || (StatAddr > XM_RXF_MAX_SZ)) {
36204 -
36205 +
36206                 SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E022, SKERR_HWI_E022MSG);
36207 -
36208 +
36209                 return(1);
36210         }
36211 -
36212 +
36213         XM_IN32(IoC, Port, StatAddr, pVal);
36214
36215         return(0);
36216 @@ -4303,12 +4740,12 @@
36217   *     1:  something went wrong
36218   */
36219  int SkXmResetCounter(
36220 -SK_AC  *pAC,           /* adapter context */
36221 -SK_IOC IoC,            /* IO context */
36222 +SK_AC  *pAC,           /* Adapter Context */
36223 +SK_IOC IoC,            /* I/O Context */
36224  unsigned int Port)     /* Port Index (MAC_1 + n) */
36225  {
36226         XM_OUT16(IoC, Port, XM_STAT_CMD, XM_SC_CLR_RXC | XM_SC_CLR_TXC);
36227 -       /* Clear two times according to Errata #3 */
36228 +       /* Clear two times according to XMAC Errata #3 */
36229         XM_OUT16(IoC, Port, XM_STAT_CMD, XM_SC_CLR_RXC | XM_SC_CLR_TXC);
36230
36231         return(0);
36232 @@ -4335,11 +4772,11 @@
36233   *     1:  something went wrong
36234   */
36235  int SkXmOverflowStatus(
36236 -SK_AC  *pAC,                           /* adapter context */
36237 -SK_IOC IoC,                            /* IO context */
36238 +SK_AC  *pAC,                           /* Adapter Context */
36239 +SK_IOC IoC,                            /* I/O Context */
36240  unsigned int Port,                     /* Port Index (MAC_1 + n) */
36241 -SK_U16 IStatus,                        /* Interupt Status from MAC */
36242 -SK_U64 SK_FAR *pStatus)        /* ptr for return overflow status value */
36243 +SK_U16 IStatus,                        /* Interrupt Status from MAC */
36244 +SK_U64 SK_FAR *pStatus)        /* Pointer for return overflow status value */
36245  {
36246         SK_U64  Status; /* Overflow status */
36247         SK_U32  RegVal;
36248 @@ -4351,7 +4788,7 @@
36249                 XM_IN32(IoC, Port, XM_RX_CNT_EV, &RegVal);
36250                 Status |= (SK_U64)RegVal << 32;
36251         }
36252 -
36253 +
36254         if ((IStatus & XM_IS_TXC_OV) != 0) {
36255
36256                 XM_IN32(IoC, Port, XM_TX_CNT_EV, &RegVal);
36257 @@ -4378,8 +4815,8 @@
36258   *     1:  something went wrong
36259   */
36260  int SkGmUpdateStats(
36261 -SK_AC  *pAC,           /* adapter context */
36262 -SK_IOC IoC,            /* IO context */
36263 +SK_AC  *pAC,           /* Adapter Context */
36264 +SK_IOC IoC,            /* I/O Context */
36265  unsigned int Port)     /* Port Index (MAC_1 + n) */
36266  {
36267         return(0);
36268 @@ -4400,24 +4837,27 @@
36269   *     1:  something went wrong
36270   */
36271  int SkGmMacStatistic(
36272 -SK_AC  *pAC,                   /* adapter context */
36273 -SK_IOC IoC,                    /* IO context */
36274 +SK_AC  *pAC,                   /* Adapter Context */
36275 +SK_IOC IoC,                    /* I/O Context */
36276  unsigned int Port,             /* Port Index (MAC_1 + n) */
36277  SK_U16 StatAddr,               /* MIB counter base address */
36278 -SK_U32 SK_FAR *pVal)   /* ptr to return statistic value */
36279 +SK_U32 SK_FAR *pVal)   /* Pointer to return statistic value */
36280  {
36281
36282         if ((StatAddr < GM_RXF_UC_OK) || (StatAddr > GM_TXE_FIFO_UR)) {
36283 -
36284 +
36285                 SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E022, SKERR_HWI_E022MSG);
36286 -
36287 -               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
36288 +
36289 +               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
36290                         ("SkGmMacStat: wrong MIB counter 0x%04X\n", StatAddr));
36291                 return(1);
36292         }
36293 -
36294 +
36295         GM_IN32(IoC, Port, StatAddr, pVal);
36296
36297 +       /* dummy read */
36298 +       SK_IN16(IoC, B0_RAP, &StatAddr);
36299 +
36300         return(0);
36301  }      /* SkGmMacStatistic */
36302
36303 @@ -4434,8 +4874,8 @@
36304   *     1:  something went wrong
36305   */
36306  int SkGmResetCounter(
36307 -SK_AC  *pAC,           /* adapter context */
36308 -SK_IOC IoC,            /* IO context */
36309 +SK_AC  *pAC,           /* Adapter Context */
36310 +SK_IOC IoC,            /* I/O Context */
36311  unsigned int Port)     /* Port Index (MAC_1 + n) */
36312  {
36313         SK_U16  Reg;    /* Phy Address Register */
36314 @@ -4446,16 +4886,16 @@
36315
36316         /* set MIB Clear Counter Mode */
36317         GM_OUT16(IoC, Port, GM_PHY_ADDR, Reg | GM_PAR_MIB_CLR);
36318 -
36319 +
36320         /* read all MIB Counters with Clear Mode set */
36321         for (i = 0; i < GM_MIB_CNT_SIZE; i++) {
36322                 /* the reset is performed only when the lower 16 bits are read */
36323                 GM_IN16(IoC, Port, GM_MIB_CNT_BASE + 8*i, &Word);
36324         }
36325 -
36326 +
36327         /* clear MIB Clear Counter Mode */
36328         GM_OUT16(IoC, Port, GM_PHY_ADDR, Reg);
36329 -
36330 +
36331         return(0);
36332  }      /* SkGmResetCounter */
36333
36334 @@ -4469,48 +4909,62 @@
36335   *     resulting counter overflow status is written to <pStatus>, whereas the
36336   *     the following bit coding is used:
36337   *     63:56 - unused
36338 - *     55:48 - TxRx interrupt register bit7:0
36339 - *     32:47 - Rx interrupt register
36340 + *     55:48 - TxRx interrupt register bit 7:0
36341 + *     47:32 - Rx interrupt register
36342   *     31:24 - unused
36343 - *     23:16 - TxRx interrupt register bit15:8
36344 - *     15:0  - Tx interrupt register
36345 + *     23:16 - TxRx interrupt register bit 15:8
36346 + *     15: 0 - Tx interrupt register
36347   *
36348   * Returns:
36349   *     0:  success
36350   *     1:  something went wrong
36351   */
36352  int SkGmOverflowStatus(
36353 -SK_AC  *pAC,                           /* adapter context */
36354 -SK_IOC IoC,                            /* IO context */
36355 +SK_AC  *pAC,                           /* Adapter Context */
36356 +SK_IOC IoC,                            /* I/O Context */
36357  unsigned int Port,                     /* Port Index (MAC_1 + n) */
36358 -SK_U16 IStatus,                        /* Interupt Status from MAC */
36359 -SK_U64 SK_FAR *pStatus)        /* ptr for return overflow status value */
36360 +SK_U16 IStatus,                        /* Interrupt Status from MAC */
36361 +SK_U64 SK_FAR *pStatus)        /* Pointer for return overflow status value */
36362  {
36363 -       SK_U64  Status;         /* Overflow status */
36364         SK_U16  RegVal;
36365 +#ifndef SK_SLIM
36366 +       SK_U64  Status;         /* Overflow status */
36367
36368         Status = 0;
36369 +#endif /* !SK_SLIM */
36370
36371         if ((IStatus & GM_IS_RX_CO_OV) != 0) {
36372                 /* this register is self-clearing after read */
36373                 GM_IN16(IoC, Port, GM_RX_IRQ_SRC, &RegVal);
36374 +
36375 +#ifndef SK_SLIM
36376                 Status |= (SK_U64)RegVal << 32;
36377 +#endif /* !SK_SLIM */
36378         }
36379 -
36380 +
36381         if ((IStatus & GM_IS_TX_CO_OV) != 0) {
36382                 /* this register is self-clearing after read */
36383                 GM_IN16(IoC, Port, GM_TX_IRQ_SRC, &RegVal);
36384 +
36385 +#ifndef SK_SLIM
36386                 Status |= (SK_U64)RegVal;
36387 +#endif /* !SK_SLIM */
36388         }
36389 -
36390 +
36391         /* this register is self-clearing after read */
36392         GM_IN16(IoC, Port, GM_TR_IRQ_SRC, &RegVal);
36393 +
36394 +#ifndef SK_SLIM
36395         /* Rx overflow interrupt register bits (LoByte)*/
36396         Status |= (SK_U64)((SK_U8)RegVal) << 48;
36397         /* Tx overflow interrupt register bits (HiByte)*/
36398         Status |= (SK_U64)(RegVal >> 8) << 16;
36399
36400         *pStatus = Status;
36401 +#endif /* !SK_SLIM */
36402 +
36403 +       /* dummy read */
36404 +       SK_IN16(IoC, B0_RAP, &RegVal);
36405
36406         return(0);
36407  }      /* SkGmOverflowStatus */
36408 @@ -4526,57 +4980,114 @@
36409   *  gets the results if 'StartTest' is true
36410   *
36411   * NOTE:       this test is meaningful only when link is down
36412 - *
36413 + *
36414   * Returns:
36415   *     0:  success
36416   *     1:      no YUKON copper
36417   *     2:      test in progress
36418   */
36419  int SkGmCableDiagStatus(
36420 -SK_AC  *pAC,           /* adapter context */
36421 -SK_IOC IoC,            /* IO context */
36422 +SK_AC  *pAC,           /* Adapter Context */
36423 +SK_IOC IoC,            /* I/O Context */
36424  int            Port,           /* Port Index (MAC_1 + n) */
36425  SK_BOOL        StartTest)      /* flag for start / get result */
36426  {
36427         int             i;
36428 +       int             CableDiagOffs;
36429 +       int             MdiPairs;
36430 +       SK_BOOL FastEthernet;
36431 +       SK_BOOL Yukon2;
36432         SK_U16  RegVal;
36433         SK_GEPORT       *pPrt;
36434
36435         pPrt = &pAC->GIni.GP[Port];
36436
36437         if (pPrt->PhyType != SK_PHY_MARV_COPPER) {
36438 -
36439 +
36440                 return(1);
36441         }
36442
36443 +       Yukon2 = (pAC->GIni.GIChipId == CHIP_ID_YUKON_XL);
36444 +
36445 +       if (pAC->GIni.GIChipId == CHIP_ID_YUKON_FE) {
36446 +
36447 +               CableDiagOffs = PHY_MARV_FE_VCT_TX;
36448 +               FastEthernet = SK_TRUE;
36449 +               MdiPairs = 2;
36450 +       }
36451 +       else {
36452 +               CableDiagOffs = Yukon2 ? PHY_MARV_PHY_CTRL : PHY_MARV_CABLE_DIAG;
36453 +               FastEthernet = SK_FALSE;
36454 +               MdiPairs = 4;
36455 +       }
36456 +
36457         if (StartTest) {
36458 +
36459 +               /* set to RESET to avoid PortCheckUp */
36460 +               pPrt->PState = SK_PRT_RESET;
36461 +
36462                 /* only start the cable test */
36463 -               if ((pPrt->PhyId1 & PHY_I1_REV_MSK) < 4) {
36464 -                       /* apply TDR workaround from Marvell */
36465 -                       SkGmPhyWrite(pAC, IoC, Port, 29, 0x001e);
36466 -
36467 -                       SkGmPhyWrite(pAC, IoC, Port, 30, 0xcc00);
36468 -                       SkGmPhyWrite(pAC, IoC, Port, 30, 0xc800);
36469 -                       SkGmPhyWrite(pAC, IoC, Port, 30, 0xc400);
36470 -                       SkGmPhyWrite(pAC, IoC, Port, 30, 0xc000);
36471 -                       SkGmPhyWrite(pAC, IoC, Port, 30, 0xc100);
36472 +               if (!FastEthernet) {
36473 +
36474 +                       if ((((pPrt->PhyId1 & PHY_I1_MOD_NUM) >> 4) == 2) &&
36475 +                                ((pPrt->PhyId1 & PHY_I1_REV_MSK) < 4)) {
36476 +                               /* apply TDR workaround for model 2, rev. < 4 */
36477 +                               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PAGE_ADDR, 0x001e);
36478 +
36479 +                               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PAGE_DATA, 0xcc00);
36480 +                               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PAGE_DATA, 0xc800);
36481 +                               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PAGE_DATA, 0xc400);
36482 +                               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PAGE_DATA, 0xc000);
36483 +                               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PAGE_DATA, 0xc100);
36484 +                       }
36485 +
36486 +#ifdef YUKON_DBG
36487 +                       if (pAC->GIni.GIChipId == CHIP_ID_YUKON_EC) {
36488 +                               /* set address to 1 for page 1 */
36489 +                               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, 1);
36490 +
36491 +                               /* disable waiting period */
36492 +                               SkGmPhyWrite(pAC, IoC, Port, CableDiagOffs,
36493 +                                       PHY_M_CABD_DIS_WAIT);
36494 +                       }
36495 +#endif
36496 +                       if (Yukon2) {
36497 +                               /* set address to 5 for page 5 */
36498 +                               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, 5);
36499 +
36500 +#ifdef YUKON_DBG
36501 +                               /* disable waiting period */
36502 +                               SkGmPhyWrite(pAC, IoC, Port, CableDiagOffs + 1,
36503 +                                       PHY_M_CABD_DIS_WAIT);
36504 +#endif
36505 +                       }
36506 +                       else {
36507 +                               /* set address to 0 for MDI[0] (Page 0) */
36508 +                               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, 0);
36509 +                       }
36510                 }
36511 +               else {
36512 +                       RegVal = PHY_CT_RESET | PHY_CT_SP100;
36513
36514 -               /* set address to 0 for MDI[0] */
36515 -               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, 0);
36516 +                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, RegVal);
36517
36518 -               /* Read Cable Diagnostic Reg */
36519 -               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CABLE_DIAG, &RegVal);
36520 +#ifdef xYUKON_DBG
36521 +                       SkGmPhyRead(pAC, IoC, Port, PHY_MARV_FE_SPEC_2, &RegVal);
36522 +                       /* disable waiting period */
36523 +                       RegVal |= PHY_M_FESC_DIS_WAIT;
36524 +
36525 +                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_FE_SPEC_2, RegVal);
36526 +#endif
36527 +               }
36528
36529                 /* start Cable Diagnostic Test */
36530 -               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CABLE_DIAG,
36531 -                       (SK_U16)(RegVal | PHY_M_CABD_ENA_TEST));
36532 -
36533 +               SkGmPhyWrite(pAC, IoC, Port, CableDiagOffs, PHY_M_CABD_ENA_TEST);
36534 +
36535                 return(0);
36536         }
36537 -
36538 +
36539         /* Read Cable Diagnostic Reg */
36540 -       SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CABLE_DIAG, &RegVal);
36541 +       SkGmPhyRead(pAC, IoC, Port, CableDiagOffs, &RegVal);
36542
36543         SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_CTRL,
36544                 ("PHY Cable Diag.=0x%04X\n", RegVal));
36545 @@ -4587,16 +5098,24 @@
36546         }
36547
36548         /* get the test results */
36549 -       for (i = 0; i < 4; i++)  {
36550 -               /* set address to i for MDI[i] */
36551 -               SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, (SK_U16)i);
36552 +       for (i = 0; i < MdiPairs; i++)  {
36553 +
36554 +               if (!FastEthernet && !Yukon2) {
36555 +                       /* set address to i for MDI[i] */
36556 +                       SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_EXT_ADR, (SK_U16)i);
36557 +               }
36558
36559                 /* get Cable Diagnostic values */
36560 -               SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CABLE_DIAG, &RegVal);
36561 +               SkGmPhyRead(pAC, IoC, Port, CableDiagOffs, &RegVal);
36562
36563                 pPrt->PMdiPairLen[i] = (SK_U8)(RegVal & PHY_M_CABD_DIST_MSK);
36564
36565                 pPrt->PMdiPairSts[i] = (SK_U8)((RegVal & PHY_M_CABD_STAT_MSK) >> 13);
36566 +
36567 +               if (FastEthernet || Yukon2) {
36568 +                       /* get next register */
36569 +                       CableDiagOffs++;
36570 +               }
36571         }
36572
36573         return(0);
36574 @@ -4605,3 +5124,4 @@
36575  #endif /* YUKON */
36576
36577  /* End of file */
36578 +
36579 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/sky2.c linux-2.6.9.new/drivers/net/sk98lin/sky2.c
36580 --- linux-2.6.9.old/drivers/net/sk98lin/sky2.c  1970-01-01 08:00:00.000000000 +0800
36581 +++ linux-2.6.9.new/drivers/net/sk98lin/sky2.c  2006-12-07 14:35:03.000000000 +0800
36582 @@ -0,0 +1,2737 @@
36583 +/******************************************************************************
36584 + *
36585 + * Name:        sky2.c
36586 + * Project:     Yukon2 specific functions and implementations
36587 + * Version:     $Revision: 1.35.2.33 $
36588 + * Date:        $Date: 2005/06/17 14:09:32 $
36589 + * Purpose:     The main driver source module
36590 + *
36591 + *****************************************************************************/
36592 +
36593 +/******************************************************************************
36594 + *
36595 + *     (C)Copyright 1998-2002 SysKonnect GmbH.
36596 + *     (C)Copyright 2002-2005 Marvell.
36597 + *
36598 + *     Driver for Marvell Yukon/2 chipset and SysKonnect Gigabit Ethernet
36599 + *      Server Adapters.
36600 + *
36601 + *     Author: Ralph Roesler (rroesler@syskonnect.de)
36602 + *             Mirko Lindner (mlindner@syskonnect.de)
36603 + *
36604 + *     Address all question to: linux@syskonnect.de
36605 + *
36606 + *     This program is free software; you can redistribute it and/or modify
36607 + *     it under the terms of the GNU General Public License as published by
36608 + *     the Free Software Foundation; either version 2 of the License, or
36609 + *     (at your option) any later version.
36610 + *
36611 + *     The information in this file is provided "AS IS" without warranty.
36612 + *
36613 + *****************************************************************************/
36614 +
36615 +#include "h/skdrv1st.h"
36616 +#include "h/skdrv2nd.h"
36617 +#include <linux/tcp.h>
36618 +
36619 +/******************************************************************************
36620 + *
36621 + * Local Function Prototypes
36622 + *
36623 + *****************************************************************************/
36624 +
36625 +static void InitPacketQueues(SK_AC *pAC,int Port);
36626 +static void GiveTxBufferToHw(SK_AC *pAC,SK_IOC IoC,int Port);
36627 +static void GiveRxBufferToHw(SK_AC *pAC,SK_IOC IoC,int Port,SK_PACKET *pPacket);
36628 +static void FillReceiveTableYukon2(SK_AC *pAC,SK_IOC IoC,int Port);
36629 +static SK_BOOL HandleReceives(SK_AC *pAC,int Port,SK_U16 Len,SK_U32 FrameStatus,SK_U16 Tcp1,SK_U16 Tcp2,SK_U32 Tist,SK_U16 Vlan);
36630 +static void CheckForSendComplete(SK_AC *pAC,SK_IOC IoC,int Port,SK_PKT_QUEUE *pPQ,SK_LE_TABLE *pLETab,unsigned int Done);
36631 +static void UnmapAndFreeTxPktBuffer(SK_AC *pAC,SK_PACKET *pSkPacket,int TxPort);
36632 +static SK_BOOL AllocateAndInitLETables(SK_AC *pAC);
36633 +static SK_BOOL AllocatePacketBuffersYukon2(SK_AC *pAC);
36634 +static void FreeLETables(SK_AC *pAC);
36635 +static void FreePacketBuffers(SK_AC *pAC);
36636 +static SK_BOOL AllocAndMapRxBuffer(SK_AC *pAC,SK_PACKET *pSkPacket,int Port);
36637 +#ifdef CONFIG_SK98LIN_NAPI
36638 +static SK_BOOL HandleStatusLEs(SK_AC *pAC,int *WorkDone,int WorkToDo);
36639 +#else
36640 +static SK_BOOL HandleStatusLEs(SK_AC *pAC);
36641 +#endif
36642 +
36643 +extern void    SkGeCheckTimer          (DEV_NET *pNet);
36644 +extern void    SkLocalEventQueue(      SK_AC *pAC,
36645 +                                       SK_U32 Class,
36646 +                                       SK_U32 Event,
36647 +                                       SK_U32 Param1,
36648 +                                       SK_U32 Param2,
36649 +                                       SK_BOOL Flag);
36650 +extern void    SkLocalEventQueue64(    SK_AC *pAC,
36651 +                                       SK_U32 Class,
36652 +                                       SK_U32 Event,
36653 +                                       SK_U64 Param,
36654 +                                       SK_BOOL Flag);
36655 +
36656 +/******************************************************************************
36657 + *
36658 + * Local Variables
36659 + *
36660 + *****************************************************************************/
36661 +
36662 +#define MAX_NBR_RX_BUFFERS_IN_HW       0x15
36663 +static SK_U8 NbrRxBuffersInHW;
36664 +
36665 +#if defined(__i386__) || defined(__x86_64__)
36666 +#if defined(__x86_64__)
36667 +#define FLUSH_OPC(le)
36668 +/* #define FLUSH_OPC(le)                       \       */
36669 +/*     cache0 = ((long *)(le))[0];             \       */
36670 +/*     cache1 = ((long *)(le))[1];             \       */
36671 +/*     ((volatile long *)(le))[0] = cache0;    \       */
36672 +/*     ((volatile long *)(le))[1] = cache1;            */
36673 +#else
36674 +#define FLUSH_OPC(le)
36675 +#endif
36676 +#else
36677 +#define FLUSH_OPC(le)
36678 +#endif
36679 +
36680 +/******************************************************************************
36681 + *
36682 + * Global Functions
36683 + *
36684 + *****************************************************************************/
36685 +
36686 +int SkY2Xmit( struct sk_buff *skb, struct SK_NET_DEVICE *dev);
36687 +
36688 +/*****************************************************************************
36689 + *
36690 + *     SkY2RestartStatusUnit - restarts teh status unit
36691 + *
36692 + * Description:
36693 + *     Reenables the status unit after any De-Init (e.g. when altering
36694 + *     the sie of the MTU via 'ifconfig a.b.c.d mtu xxx')
36695 + *
36696 + * Returns:    N/A
36697 + */
36698 +void SkY2RestartStatusUnit(
36699 +SK_AC  *pAC)  /* pointer to adapter control context */
36700 +{
36701 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MSG,
36702 +               ("==> SkY2RestartStatusUnit\n"));
36703 +
36704 +       /*
36705 +       ** It might be that the TX timer is not started. Therefore
36706 +       ** it is initialized here -> to be more investigated!
36707 +       */
36708 +       SK_OUT32(pAC->IoBase, STAT_TX_TIMER_INI, HW_MS_TO_TICKS(pAC,10));
36709 +
36710 +       pAC->StatusLETable.Done  = 0;
36711 +       pAC->StatusLETable.Put   = 0;
36712 +       pAC->StatusLETable.HwPut = 0;
36713 +       SkGeY2InitStatBmu(pAC, pAC->IoBase, &pAC->StatusLETable);
36714 +
36715 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MSG,
36716 +               ("<== SkY2RestartStatusUnit\n"));
36717 +}
36718 +
36719 +/*****************************************************************************
36720 + *
36721 + *     SkY2RlmtSend - sends out a single RLMT notification
36722 + *
36723 + * Description:
36724 + *     This function sends out an RLMT frame
36725 + *
36726 + * Returns:
36727 + *     > 0 - on succes: the number of bytes in the message
36728 + *     = 0 - on resource shortage: this frame sent or dropped, now
36729 + *           the ring is full ( -> set tbusy)
36730 + *     < 0 - on failure: other problems ( -> return failure to upper layers)
36731 + */
36732 +int SkY2RlmtSend (
36733 +SK_AC          *pAC,       /* pointer to adapter control context           */
36734 +int             PortNr,    /* index of port the packet(s) shall be send to */
36735 +struct sk_buff *pMessage)  /* pointer to send-message                      */
36736 +{
36737 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MSG,
36738 +               ("=== SkY2RlmtSend\n"));
36739 +#if 0
36740 +       return -1;   // temporarily do not send out RLMT frames
36741 +#endif
36742 +       skb_shinfo(pMessage)->nr_frags = (2*MAX_SKB_FRAGS) + PortNr;
36743 +       return(SkY2Xmit(pMessage, pAC->dev[PortNr])); // SkY2Xmit needs device
36744 +}
36745 +
36746 +/*****************************************************************************
36747 + *
36748 + *     SkY2AllocateResources - Allocates all required resources for Yukon2
36749 + *
36750 + * Description:
36751 + *     This function allocates all memory needed for the Yukon2.
36752 + *     It maps also RX buffers to the LETables and initializes the
36753 + *     status list element table.
36754 + *
36755 + * Returns:
36756 + *     SK_TRUE, if all resources could be allocated and setup succeeded
36757 + *     SK_FALSE, if an error
36758 + */
36759 +SK_BOOL SkY2AllocateResources (
36760 +SK_AC  *pAC)  /* pointer to adapter control context */
36761 +{
36762 +       int CurrMac;
36763 +
36764 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_INIT,
36765 +               ("==> SkY2AllocateResources\n"));
36766 +
36767 +       /*
36768 +       ** Initialize the packet queue variables first
36769 +       */
36770 +       for (CurrMac = 0; CurrMac < pAC->GIni.GIMacsFound; CurrMac++) {
36771 +               InitPacketQueues(pAC, CurrMac);
36772 +       }
36773 +
36774 +       /*
36775 +       ** Get sufficient memory for the LETables
36776 +       */
36777 +       if (!AllocateAndInitLETables(pAC)) {
36778 +               SK_DBG_MSG(pAC, SK_DBGMOD_DRV,
36779 +                       SK_DBGCAT_INIT | SK_DBGCAT_DRV_ERROR,
36780 +                       ("No memory for LETable.\n"));
36781 +               return(SK_FALSE);
36782 +       }
36783 +
36784 +       /*
36785 +       ** Allocate and intialize memory for both RX and TX
36786 +       ** packet and fragment buffers. On an error, free
36787 +       ** previously allocated LETable memory and quit.
36788 +       */
36789 +       if (!AllocatePacketBuffersYukon2(pAC)) {
36790 +               FreeLETables(pAC);
36791 +               SK_DBG_MSG(pAC, SK_DBGMOD_DRV,
36792 +                       SK_DBGCAT_INIT | SK_DBGCAT_DRV_ERROR,
36793 +                       ("No memory for Packetbuffers.\n"));
36794 +               return(SK_FALSE);
36795 +       }
36796 +
36797 +       /*
36798 +       ** Rx and Tx LE tables will be initialized in SkGeOpen()
36799 +       **
36800 +       ** It might be that the TX timer is not started. Therefore
36801 +       ** it is initialized here -> to be more investigated!
36802 +       */
36803 +       SK_OUT32(pAC->IoBase, STAT_TX_TIMER_INI, HW_MS_TO_TICKS(pAC,10));
36804 +       SkGeY2InitStatBmu(pAC, pAC->IoBase, &pAC->StatusLETable);
36805 +
36806 +       pAC->MaxUnusedRxLeWorking = MAX_UNUSED_RX_LE_WORKING;
36807 +
36808 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_INIT,
36809 +               ("<== SkY2AllocateResources\n"));
36810 +
36811 +       return (SK_TRUE);
36812 +}
36813 +
36814 +/*****************************************************************************
36815 + *
36816 + *     SkY2FreeResources - Frees previously allocated resources of Yukon2
36817 + *
36818 + * Description:
36819 + *     This function frees all previously allocated memory of the Yukon2.
36820 + *
36821 + * Returns: N/A
36822 + */
36823 +void SkY2FreeResources (
36824 +SK_AC  *pAC)  /* pointer to adapter control context */
36825 +{
36826 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MSG,
36827 +               ("==> SkY2FreeResources\n"));
36828 +
36829 +       FreeLETables(pAC);
36830 +       FreePacketBuffers(pAC);
36831 +
36832 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MSG,
36833 +               ("<== SkY2FreeResources\n"));
36834 +}
36835 +
36836 +/*****************************************************************************
36837 + *
36838 + *     SkY2AllocateRxBuffers - Allocates the receive buffers for a port
36839 + *
36840 + * Description:
36841 + *     This function allocated all the RX buffers of the Yukon2.
36842 + *
36843 + * Returns: N/A
36844 + */
36845 +void SkY2AllocateRxBuffers (
36846 +SK_AC    *pAC,   /* pointer to adapter control context */
36847 +SK_IOC    IoC,  /* I/O control context                */
36848 +int       Port)         /* port index of RX                   */
36849 +{
36850 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_INIT,
36851 +               ("==> SkY2AllocateRxBuffers (Port %c)\n", Port));
36852 +
36853 +       FillReceiveTableYukon2(pAC, IoC, Port);
36854 +
36855 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_INIT,
36856 +               ("<== SkY2AllocateRxBuffers\n"));
36857 +}
36858 +
36859 +/*****************************************************************************
36860 + *
36861 + *     SkY2FreeRxBuffers - Free's all allocates RX buffers of
36862 + *
36863 + * Description:
36864 + *     This function frees all RX buffers of the Yukon2 for a single port
36865 + *
36866 + * Returns: N/A
36867 + */
36868 +void SkY2FreeRxBuffers (
36869 +SK_AC    *pAC,   /* pointer to adapter control context */
36870 +SK_IOC    IoC,  /* I/O control context                */
36871 +int       Port)         /* port index of RX                   */
36872 +{
36873 +       SK_PACKET     *pSkPacket;
36874 +       unsigned long  Flags;   /* for POP/PUSH macros */
36875 +
36876 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MSG,
36877 +               ("==> SkY2FreeRxBuffers (Port %c)\n", Port));
36878 +
36879 +       if (pAC->RxPort[Port].ReceivePacketTable   != NULL) {
36880 +               POP_FIRST_PKT_FROM_QUEUE(&pAC->RxPort[Port].RxQ_working, pSkPacket);
36881 +               while (pSkPacket != NULL) {
36882 +                       if ((pSkPacket->pFrag) != NULL) {
36883 +                               pci_unmap_page(pAC->PciDev,
36884 +                               (dma_addr_t) pSkPacket->pFrag->pPhys,
36885 +                               pSkPacket->pFrag->FragLen - 2,
36886 +                               PCI_DMA_FROMDEVICE);
36887 +
36888 +                               DEV_KFREE_SKB_ANY(pSkPacket->pMBuf);
36889 +                               pSkPacket->pMBuf        = NULL;
36890 +                               pSkPacket->pFrag->pPhys = (SK_U64) 0;
36891 +                               pSkPacket->pFrag->pVirt = NULL;
36892 +                       }
36893 +                       PUSH_PKT_AS_LAST_IN_QUEUE(&pAC->RxPort[Port].RxQ_waiting, pSkPacket);
36894 +                       POP_FIRST_PKT_FROM_QUEUE(&pAC->RxPort[Port].RxQ_working, pSkPacket);
36895 +               }
36896 +       }
36897 +
36898 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MSG,
36899 +               ("<== SkY2FreeRxBuffers\n"));
36900 +}
36901 +
36902 +/*****************************************************************************
36903 + *
36904 + *     SkY2FreeTxBuffers - Free's any currently maintained Tx buffer
36905 + *
36906 + * Description:
36907 + *     This function frees the TX buffers of the Yukon2 for a single port
36908 + *     which might be in use by a transmit action
36909 + *
36910 + * Returns: N/A
36911 + */
36912 +void SkY2FreeTxBuffers (
36913 +SK_AC    *pAC,   /* pointer to adapter control context */
36914 +SK_IOC    IoC,  /* I/O control context                */
36915 +int       Port)         /* port index of TX                   */
36916 +{
36917 +       SK_PACKET      *pSkPacket;
36918 +       SK_FRAG        *pSkFrag;
36919 +       unsigned long   Flags;
36920 +
36921 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MSG,
36922 +               ("==> SkY2FreeTxBuffers (Port %c)\n", Port));
36923 +
36924 +       if (pAC->TxPort[Port][0].TransmitPacketTable != NULL) {
36925 +               POP_FIRST_PKT_FROM_QUEUE(&pAC->TxPort[Port][0].TxAQ_working, pSkPacket);
36926 +               while (pSkPacket != NULL) {
36927 +                       if ((pSkFrag = pSkPacket->pFrag) != NULL) {
36928 +                               UnmapAndFreeTxPktBuffer(pAC, pSkPacket, Port);
36929 +                       }
36930 +                       PUSH_PKT_AS_LAST_IN_QUEUE(&pAC->TxPort[Port][0].TxQ_free, pSkPacket);
36931 +                       POP_FIRST_PKT_FROM_QUEUE(&pAC->TxPort[Port][0].TxAQ_working, pSkPacket);
36932 +               }
36933 +#if USE_SYNC_TX_QUEUE
36934 +               POP_FIRST_PKT_FROM_QUEUE(&pAC->TxPort[Port][0].TxSQ_working, pSkPacket);
36935 +               while (pSkPacket != NULL) {
36936 +                       if ((pSkFrag = pSkPacket->pFrag) != NULL) {
36937 +                               UnmapAndFreeTxPktBuffer(pAC, pSkPacket, Port);
36938 +                       }
36939 +                       PUSH_PKT_AS_LAST_IN_QUEUE(&pAC->TxPort[Port][0].TxQ_free, pSkPacket);
36940 +                       POP_FIRST_PKT_FROM_QUEUE(&pAC->TxPort[Port][0].TxSQ_working, pSkPacket);
36941 +               }
36942 +#endif
36943 +       }
36944 +
36945 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MSG,
36946 +               ("<== SkY2FreeTxBuffers\n"));
36947 +}
36948 +
36949 +/*****************************************************************************
36950 + *
36951 + *     SkY2Isr - handle a receive IRQ for all yukon2 cards
36952 + *
36953 + * Description:
36954 + *     This function is called when a receive IRQ is set. (only for yukon2)
36955 + *     HandleReceives does the deferred processing of all outstanding
36956 + *     interrupt operations.
36957 + *
36958 + * Returns:    N/A
36959 + */
36960 +SkIsrRetVar SkY2Isr (
36961 +int              irq,     /* the irq we have received (might be shared!) */
36962 +void            *dev_id,  /* current device id                           */
36963 +struct  pt_regs *ptregs)  /* not used by our driver                      */
36964 +{
36965 +       struct SK_NET_DEVICE  *dev  = (struct SK_NET_DEVICE *)dev_id;
36966 +       DEV_NET               *pNet = (DEV_NET*) dev->priv;
36967 +       SK_AC                 *pAC  = pNet->pAC;
36968 +       SK_U32                 IntSrc;
36969 +       unsigned long          Flags;
36970 +#ifndef CONFIG_SK98LIN_NAPI
36971 +       SK_BOOL                handledStatLE    = SK_FALSE;
36972 +#else
36973 +       SK_BOOL                SetIntMask       = SK_FALSE;
36974 +#endif
36975 +
36976 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
36977 +               ("==> SkY2Isr\n"));
36978 +
36979 +       SK_IN32(pAC->IoBase, B0_Y2_SP_ISRC2, &IntSrc);
36980 +
36981 +       if ((IntSrc == 0) && (!pNet->NetConsoleMode)){
36982 +               SK_OUT32(pAC->IoBase, B0_Y2_SP_ICR, 2);
36983 +               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
36984 +                       ("No Interrupt\n ==> SkY2Isr\n"));
36985 +               return SkIsrRetNone;
36986 +
36987 +       }
36988 +
36989 +#ifdef Y2_RECOVERY
36990 +       if (pNet->InRecover) {
36991 +               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
36992 +                       ("Already in recover\n ==> SkY2Isr\n"));
36993 +               SK_OUT32(pAC->IoBase, B0_Y2_SP_ICR, 2);
36994 +               return SkIsrRetNone;
36995 +       }
36996 +#endif
36997 +
36998 +#ifdef CONFIG_SK98LIN_NAPI
36999 +       if (netif_rx_schedule_prep(pAC->dev[0])) {
37000 +               pAC->GIni.GIValIrqMask &= ~(Y2_IS_STAT_BMU);
37001 +               SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
37002 +               SetIntMask = SK_TRUE;
37003 +               __netif_rx_schedule(pAC->dev[0]);
37004 +       }
37005 +
37006 +       if (netif_rx_schedule_prep(pAC->dev[1])) {
37007 +               if (!SetIntMask) {
37008 +                       pAC->GIni.GIValIrqMask &= ~(Y2_IS_STAT_BMU);
37009 +                       SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
37010 +               }
37011 +               __netif_rx_schedule(pAC->dev[1]);
37012 +       }
37013 +#else
37014 +       handledStatLE = HandleStatusLEs(pAC);
37015 +#endif
37016 +
37017 +       /*
37018 +       ** Check for Special Interrupts
37019 +       */
37020 +       if ((IntSrc & ~Y2_IS_STAT_BMU) || pAC->CheckQueue || pNet->TimerExpired) {
37021 +               pAC->CheckQueue = SK_FALSE;
37022 +               spin_lock_irqsave(&pAC->SlowPathLock, Flags);
37023 +#ifdef Y2_RECOVERY
37024 +               if (pNet->TimerExpired) {
37025 +                       SkGeCheckTimer(pNet);
37026 +               }
37027 +#endif
37028 +               SkGeSirqIsr(pAC, pAC->IoBase, IntSrc);
37029 +               SkEventDispatcher(pAC, pAC->IoBase);
37030 +               spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
37031 +       }
37032 +
37033 +       /* Speed enhancement for a2 chipsets */
37034 +       if (HW_FEATURE(pAC, HWF_WA_DEV_42)) {
37035 +               spin_lock_irqsave(&pAC->SetPutIndexLock, Flags);
37036 +               SkGeY2SetPutIndex(pAC, pAC->IoBase, Y2_PREF_Q_ADDR(Q_XA1,0), &pAC->TxPort[0][0].TxALET);
37037 +               SkGeY2SetPutIndex(pAC, pAC->IoBase, Y2_PREF_Q_ADDR(Q_R1,0), &pAC->RxPort[0].RxLET);
37038 +               spin_unlock_irqrestore(&pAC->SetPutIndexLock, Flags);
37039 +       }
37040 +
37041 +       /*
37042 +       ** Reenable interrupts and signal end of ISR
37043 +       */
37044 +       SK_OUT32(pAC->IoBase, B0_Y2_SP_ICR, 2);
37045 +
37046 +       /*
37047 +       ** Stop and restart TX timer in case a Status LE was handled
37048 +       */
37049 +#ifndef CONFIG_SK98LIN_NAPI
37050 +       if ((HW_FEATURE(pAC, HWF_WA_DEV_43_418)) && (handledStatLE)) {
37051 +               SK_OUT8(pAC->IoBase, STAT_TX_TIMER_CTRL, TIM_STOP);
37052 +               SK_OUT8(pAC->IoBase, STAT_TX_TIMER_CTRL, TIM_START);
37053 +       }
37054 +#endif
37055 +
37056 +       if (!(IS_Q_EMPTY(&(pAC->TxPort[0][TX_PRIO_LOW].TxAQ_waiting)))) {
37057 +               GiveTxBufferToHw(pAC, pAC->IoBase, 0);
37058 +       }
37059 +       if (!(IS_Q_EMPTY(&(pAC->TxPort[1][TX_PRIO_LOW].TxAQ_waiting)))) {
37060 +               GiveTxBufferToHw(pAC, pAC->IoBase, 1);
37061 +       }
37062 +
37063 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
37064 +               ("<== SkY2Isr\n"));
37065 +
37066 +       return SkIsrRetHandled;
37067 +}      /* SkY2Isr */
37068 +
37069 +/*****************************************************************************
37070 + *
37071 + *     SkY2Xmit - Linux frame transmit function for Yukon2
37072 + *
37073 + * Description:
37074 + *     The system calls this function to send frames onto the wire.
37075 + *     It puts the frame in the tx descriptor ring. If the ring is
37076 + *     full then, the 'tbusy' flag is set.
37077 + *
37078 + * Returns:
37079 + *     0, if everything is ok
37080 + *     !=0, on error
37081 + *
37082 + * WARNING:
37083 + *     returning 1 in 'tbusy' case caused system crashes (double
37084 + *     allocated skb's) !!!
37085 + */
37086 +int SkY2Xmit(
37087 +struct sk_buff       *skb,  /* socket buffer to be sent */
37088 +struct SK_NET_DEVICE *dev)  /* via which device?        */
37089 +{
37090 +       DEV_NET         *pNet    = (DEV_NET*) dev->priv;
37091 +       SK_AC           *pAC     = pNet->pAC;
37092 +       SK_U8            FragIdx = 0;
37093 +       SK_PACKET       *pSkPacket;
37094 +       SK_FRAG         *PrevFrag;
37095 +       SK_FRAG         *CurrFrag;
37096 +       SK_PKT_QUEUE    *pWorkQueue;  /* corresponding TX queue */
37097 +       SK_PKT_QUEUE    *pWaitQueue;
37098 +       SK_PKT_QUEUE    *pFreeQueue;
37099 +       SK_LE_TABLE     *pLETab;      /* corresponding LETable  */
37100 +       skb_frag_t      *sk_frag;
37101 +       SK_U64           PhysAddr;
37102 +       unsigned long    Flags;
37103 +       unsigned int     Port;
37104 +       int              CurrFragCtr;
37105 +
37106 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
37107 +               ("==> SkY2Xmit\n"));
37108 +
37109 +       /*
37110 +       ** Get port and return if no free packet is available
37111 +       */
37112 +       if (skb_shinfo(skb)->nr_frags > MAX_SKB_FRAGS) {
37113 +               Port = skb_shinfo(skb)->nr_frags - (2*MAX_SKB_FRAGS);
37114 +               skb_shinfo(skb)->nr_frags = 0;
37115 +       } else {
37116 +               Port = (pAC->RlmtNets == 2) ? pNet->PortNr : pAC->ActivePort;
37117 +       }
37118 +
37119 +       if (IS_Q_EMPTY(&(pAC->TxPort[Port][TX_PRIO_LOW].TxQ_free))) {
37120 +               SK_DBG_MSG(pAC, SK_DBGMOD_DRV,
37121 +                       SK_DBGCAT_DRV_TX_PROGRESS | SK_DBGCAT_DRV_ERROR,
37122 +                       ("Not free packets available for send\n"));
37123 +               return 1; /* zero bytes sent! */
37124 +       }
37125 +
37126 +       /*
37127 +       ** Put any new packet to be sent in the waiting queue and
37128 +       ** handle also any possible fragment of that packet.
37129 +       */
37130 +       pWorkQueue = &(pAC->TxPort[Port][TX_PRIO_LOW].TxAQ_working);
37131 +       pWaitQueue = &(pAC->TxPort[Port][TX_PRIO_LOW].TxAQ_waiting);
37132 +       pFreeQueue = &(pAC->TxPort[Port][TX_PRIO_LOW].TxQ_free);
37133 +       pLETab     = &(pAC->TxPort[Port][TX_PRIO_LOW].TxALET);
37134 +
37135 +       /*
37136 +       ** Normal send operations require only one fragment, because
37137 +       ** only one sk_buff data area is passed.
37138 +       ** In contradiction to this, scatter-gather (zerocopy) send
37139 +       ** operations might pass one or more additional fragments
37140 +       ** where each fragment needs a separate fragment info packet.
37141 +       */
37142 +       if (((skb_shinfo(skb)->nr_frags + 1) * MAX_FRAG_OVERHEAD) >
37143 +                                       NUM_FREE_LE_IN_TABLE(pLETab)) {
37144 +               SK_DBG_MSG(pAC, SK_DBGMOD_DRV,
37145 +                       SK_DBGCAT_DRV_TX_PROGRESS | SK_DBGCAT_DRV_ERROR,
37146 +                       ("Not enough LE available for send\n"));
37147 +               return 1; /* zero bytes sent! */
37148 +       }
37149 +
37150 +       if ((skb_shinfo(skb)->nr_frags + 1) > MAX_NUM_FRAGS) {
37151 +               SK_DBG_MSG(pAC, SK_DBGMOD_DRV,
37152 +                       SK_DBGCAT_DRV_TX_PROGRESS | SK_DBGCAT_DRV_ERROR,
37153 +                       ("Not even one fragment available for send\n"));
37154 +               return 1; /* zero bytes sent! */
37155 +       }
37156 +
37157 +       /*
37158 +       ** Get first packet from free packet queue
37159 +       */
37160 +       POP_FIRST_PKT_FROM_QUEUE(pFreeQueue, pSkPacket);
37161 +       if(pSkPacket == NULL) {
37162 +               SK_DBG_MSG(pAC, SK_DBGMOD_DRV,
37163 +                       SK_DBGCAT_DRV_TX_PROGRESS | SK_DBGCAT_DRV_ERROR,
37164 +                       ("Could not obtain free packet used for xmit\n"));
37165 +               return 1; /* zero bytes sent! */
37166 +       }
37167 +
37168 +       pSkPacket->pFrag = &(pSkPacket->FragArray[FragIdx]);
37169 +
37170 +       /*
37171 +       ** map the sk_buff to be available for the adapter
37172 +       */
37173 +       PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
37174 +                       virt_to_page(skb->data),
37175 +                       ((unsigned long) skb->data & ~PAGE_MASK),
37176 +                       skb_headlen(skb),
37177 +                       PCI_DMA_TODEVICE);
37178 +       pSkPacket->pMBuf          = skb;
37179 +       pSkPacket->pFrag->pPhys   = PhysAddr;
37180 +       pSkPacket->pFrag->FragLen = skb_headlen(skb);
37181 +       pSkPacket->pFrag->pNext   = NULL; /* initial has no next default */
37182 +       pSkPacket->NumFrags       = skb_shinfo(skb)->nr_frags + 1;
37183 +
37184 +       PrevFrag = pSkPacket->pFrag;
37185 +
37186 +       /*
37187 +       ** Each scatter-gather fragment need to be mapped...
37188 +       */
37189 +        for (  CurrFragCtr = 0;
37190 +               CurrFragCtr < skb_shinfo(skb)->nr_frags;
37191 +               CurrFragCtr++) {
37192 +               FragIdx++;
37193 +               sk_frag = &skb_shinfo(skb)->frags[CurrFragCtr];
37194 +               CurrFrag = &(pSkPacket->FragArray[FragIdx]);
37195 +
37196 +               /*
37197 +               ** map the sk_buff to be available for the adapter
37198 +               */
37199 +               PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
37200 +                               sk_frag->page,
37201 +                               sk_frag->page_offset,
37202 +                               sk_frag->size,
37203 +                               PCI_DMA_TODEVICE);
37204 +
37205 +               CurrFrag->pPhys   = PhysAddr;
37206 +               CurrFrag->FragLen = sk_frag->size;
37207 +               CurrFrag->pNext   = NULL;
37208 +
37209 +               /*
37210 +               ** Add the new fragment to the list of fragments
37211 +               */
37212 +               PrevFrag->pNext = CurrFrag;
37213 +               PrevFrag = CurrFrag;
37214 +       }
37215 +
37216 +       /*
37217 +       ** Add packet to waiting packets queue
37218 +       */
37219 +       PUSH_PKT_AS_LAST_IN_QUEUE(pWaitQueue, pSkPacket);
37220 +       GiveTxBufferToHw(pAC, pAC->IoBase, Port);
37221 +       dev->trans_start = jiffies;
37222 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
37223 +               ("<== SkY2Xmit(return 0)\n"));
37224 +       return (0);
37225 +}      /* SkY2Xmit */
37226 +
37227 +#ifdef CONFIG_SK98LIN_NAPI
37228 +/*****************************************************************************
37229 + *
37230 + *     SkY2Poll - NAPI Rx polling callback for Yukon2 chipsets
37231 + *
37232 + * Description:
37233 + *     Called by the Linux system in case NAPI polling is activated
37234 + *
37235 + * Returns
37236 + *     The number of work data still to be handled
37237 + *
37238 + * Notes
37239 + *     The slowpath lock needs to be set because HW accesses may
37240 + *     interfere with slowpath events (e.g. TWSI)
37241 + */
37242 +int SkY2Poll(
37243 +struct net_device *dev,     /* device that needs to be polled */
37244 +int               *budget)  /* how many budget do we have?    */
37245 +{
37246 +       SK_AC          *pAC           = ((DEV_NET*)(dev->priv))->pAC;
37247 +       int             WorkToDo      = min(*budget, dev->quota);
37248 +       int             WorkDone      = 0;
37249 +       SK_BOOL         handledStatLE = SK_FALSE;
37250 +       unsigned long   Flags;
37251 +
37252 +       spin_lock_irqsave(&pAC->SlowPathLock, Flags);
37253 +       handledStatLE = HandleStatusLEs(pAC, &WorkDone, WorkToDo);
37254 +
37255 +       *budget -= WorkDone;
37256 +       dev->quota -= WorkDone;
37257 +
37258 +       if(WorkDone < WorkToDo) {
37259 +               netif_rx_complete(dev);
37260 +               pAC->GIni.GIValIrqMask |= (Y2_IS_STAT_BMU);
37261 +               SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
37262 +               if ((HW_FEATURE(pAC, HWF_WA_DEV_43_418)) && (handledStatLE)) {
37263 +                       SK_OUT8(pAC->IoBase, STAT_TX_TIMER_CTRL, TIM_STOP);
37264 +                       SK_OUT8(pAC->IoBase, STAT_TX_TIMER_CTRL, TIM_START);
37265 +               }
37266 +       }
37267 +       spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
37268 +       return (WorkDone >= WorkToDo);
37269 +}      /* SkY2Poll */
37270 +#endif
37271 +
37272 +/******************************************************************************
37273 + *
37274 + *     SkY2PortStop - stop a port on Yukon2
37275 + *
37276 + * Description:
37277 + *     This function stops a port of the Yukon2 chip. This stop
37278 + *     stop needs to be performed in a specific order:
37279 + *
37280 + *     a) Stop the Prefetch unit
37281 + *     b) Stop the Port (MAC, PHY etc.)
37282 + *
37283 + * Returns: N/A
37284 + */
37285 +void SkY2PortStop(
37286 +SK_AC   *pAC,      /* adapter control context                             */
37287 +SK_IOC   IoC,      /* I/O control context (address of adapter registers)  */
37288 +int      Port,     /* port to stop (MAC_1 + n)                            */
37289 +int      Dir,      /* StopDirection (SK_STOP_RX, SK_STOP_TX, SK_STOP_ALL) */
37290 +int      RstMode)  /* Reset Mode (SK_SOFT_RST, SK_HARD_RST)               */
37291 +{
37292 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MSG,
37293 +               ("==> SkY2PortStop (Port %c)\n", 'A' + Port));
37294 +
37295 +       /*
37296 +       ** Stop the HW
37297 +       */
37298 +       SkGeStopPort(pAC, IoC, Port, Dir, RstMode);
37299 +
37300 +       /*
37301 +       ** Move any TX packet from work queues into the free queue again
37302 +       ** and initialize the TX LETable variables
37303 +       */
37304 +       SkY2FreeTxBuffers(pAC, pAC->IoBase, Port);
37305 +       pAC->TxPort[Port][TX_PRIO_LOW].TxALET.Bmu.RxTx.TcpWp    = 0;
37306 +       pAC->TxPort[Port][TX_PRIO_LOW].TxALET.Bmu.RxTx.MssValue = 0;
37307 +       pAC->TxPort[Port][TX_PRIO_LOW].TxALET.BufHighAddr       = 0;
37308 +       pAC->TxPort[Port][TX_PRIO_LOW].TxALET.Done              = 0;
37309 +       pAC->TxPort[Port][TX_PRIO_LOW].TxALET.Put               = 0;
37310 +       // pAC->GIni.GP[Port].PState = SK_PRT_STOP;
37311 +
37312 +       /*
37313 +       ** Move any RX packet from work queue into the waiting queue
37314 +       ** and initialize the RX LETable variables
37315 +       */
37316 +       SkY2FreeRxBuffers(pAC, pAC->IoBase, Port);
37317 +       pAC->RxPort[Port].RxLET.BufHighAddr = 0;
37318 +
37319 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MSG,
37320 +               ("<== SkY2PortStop()\n"));
37321 +}
37322 +
37323 +/******************************************************************************
37324 + *
37325 + *     SkY2PortStart - start a port on Yukon2
37326 + *
37327 + * Description:
37328 + *     This function starts a port of the Yukon2 chip. This start
37329 + *     action needs to be performed in a specific order:
37330 + *
37331 + *     a) Initialize the LET indices (PUT/GET to 0)
37332 + *     b) Initialize the LET in HW (enables also prefetch unit)
37333 + *     c) Move all RX buffers from waiting queue to working queue
37334 + *        which involves also setting up of RX list elements
37335 + *     d) Initialize the FIFO settings of Yukon2 (Watermark etc.)
37336 + *     e) Initialize the Port (MAC, PHY etc.)
37337 + *     f) Initialize the MC addresses
37338 + *
37339 + * Returns:    N/A
37340 + */
37341 +void SkY2PortStart(
37342 +SK_AC   *pAC,   /* adapter control context                            */
37343 +SK_IOC   IoC,   /* I/O control context (address of adapter registers) */
37344 +int      Port)  /* port to start                                      */
37345 +{
37346 +       // SK_GEPORT *pPrt = &pAC->GIni.GP[Port];
37347 +       SK_HWLE   *pLE;
37348 +       SK_U32     DWord;
37349 +       SK_U32     PrefetchReg; /* register for Put index */
37350 +#if defined(__x86_64__)
37351 +       long       cache0, cache1;
37352 +#endif
37353 +
37354 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MSG,
37355 +               ("==> SkY2PortStart (Port %c)\n", 'A' + Port));
37356 +
37357 +       /*
37358 +       ** Initialize the LET indices
37359 +       */
37360 +       pAC->RxPort[Port].RxLET.Done                = 0;
37361 +       pAC->RxPort[Port].RxLET.Put                 = 0;
37362 +       pAC->RxPort[Port].RxLET.HwPut               = 0;
37363 +       pAC->TxPort[Port][TX_PRIO_LOW].TxALET.Done  = 0;
37364 +       pAC->TxPort[Port][TX_PRIO_LOW].TxALET.Put   = 0;
37365 +       pAC->TxPort[Port][TX_PRIO_LOW].TxALET.HwPut = 0;
37366 +       if (HW_SYNC_TX_SUPPORTED(pAC)) {
37367 +               pAC->TxPort[Port][TX_PRIO_LOW].TxSLET.Done  = 0;
37368 +               pAC->TxPort[Port][TX_PRIO_LOW].TxSLET.Put   = 0;
37369 +               pAC->TxPort[Port][TX_PRIO_LOW].TxSLET.HwPut = 0;
37370 +       }
37371 +
37372 +       if (HW_FEATURE(pAC, HWF_WA_DEV_420)) {
37373 +               /*
37374 +               ** It might be that we have to limit the RX buffers
37375 +               ** effectively passed to HW. Initialize the start
37376 +               ** value in that case...
37377 +               */
37378 +               NbrRxBuffersInHW = 0;
37379 +       }
37380 +
37381 +       /*
37382 +       ** TODO on dual net adapters we need to check if
37383 +       ** StatusLETable need to be set...
37384 +       **
37385 +       ** pAC->StatusLETable.Done  = 0;
37386 +       ** pAC->StatusLETable.Put   = 0;
37387 +       ** pAC->StatusLETable.HwPut = 0;
37388 +       ** SkGeY2InitPrefetchUnit(pAC, pAC->IoBase, Q_ST, &pAC->StatusLETable);
37389 +       */
37390 +
37391 +       /*
37392 +       ** Initialize the LET in HW (enables also prefetch unit)
37393 +       */
37394 +       SkGeY2InitPrefetchUnit(pAC, IoC,(Port == 0) ? Q_R1 : Q_R2,
37395 +                       &pAC->RxPort[Port].RxLET);
37396 +       SkGeY2InitPrefetchUnit( pAC, IoC,(Port == 0) ? Q_XA1 : Q_XA2,
37397 +                       &pAC->TxPort[Port][TX_PRIO_LOW].TxALET);
37398 +       if (HW_SYNC_TX_SUPPORTED(pAC)) {
37399 +               SkGeY2InitPrefetchUnit( pAC, IoC, (Port == 0) ? Q_XS1 : Q_XS2,
37400 +                               &pAC->TxPort[Port][TX_PRIO_HIGH].TxSLET);
37401 +       }
37402 +
37403 +
37404 +       /*
37405 +       ** Using new values for the watermarks and the timer for
37406 +       ** low latency optimization
37407 +       */
37408 +       if (pAC->LowLatency) {
37409 +               SK_OUT8(IoC, STAT_FIFO_WM, 1);
37410 +               SK_OUT8(IoC, STAT_FIFO_ISR_WM, 1);
37411 +               SK_OUT32(IoC, STAT_LEV_TIMER_INI, 50);
37412 +               SK_OUT32(IoC, STAT_ISR_TIMER_INI, 10);
37413 +       }
37414 +
37415 +
37416 +       /*
37417 +       ** Initialize the Port (MAC, PHY etc.)
37418 +       */
37419 +       if (SkGeInitPort(pAC, IoC, Port)) {
37420 +               if (Port == 0) {
37421 +                       printk("%s: SkGeInitPort A failed.\n",pAC->dev[0]->name);
37422 +               } else {
37423 +                       printk("%s: SkGeInitPort B failed.\n",pAC->dev[1]->name);
37424 +               }
37425 +       }
37426 +
37427 +       if (IS_GMAC(pAC)) {
37428 +               /* disable Rx GMAC FIFO Flush Mode */
37429 +               SK_OUT8(IoC, MR_ADDR(Port, RX_GMF_CTRL_T), (SK_U8) GMF_RX_F_FL_OFF);
37430 +       }
37431 +
37432 +       /*
37433 +       ** Initialize the MC addresses
37434 +       */
37435 +       SkAddrMcUpdate(pAC,IoC, Port);
37436 +
37437 +       SkMacRxTxEnable(pAC, IoC,Port);
37438 +
37439 +       if (pAC->RxPort[Port].UseRxCsum) {
37440 +               SkGeRxCsum(pAC, IoC, Port, SK_TRUE);
37441 +
37442 +               GET_RX_LE(pLE, &pAC->RxPort[Port].RxLET);
37443 +               RXLE_SET_STACS1(pLE, pAC->CsOfs1);
37444 +               RXLE_SET_STACS2(pLE, pAC->CsOfs2);
37445 +               RXLE_SET_CTRL(pLE, 0);
37446 +
37447 +               RXLE_SET_OPC(pLE, OP_TCPSTART | HW_OWNER);
37448 +               FLUSH_OPC(pLE);
37449 +               if (Port == 0) {
37450 +                       PrefetchReg=Y2_PREF_Q_ADDR(Q_R1,PREF_UNIT_PUT_IDX_REG);
37451 +               } else {
37452 +                       PrefetchReg=Y2_PREF_Q_ADDR(Q_R2,PREF_UNIT_PUT_IDX_REG);
37453 +               }
37454 +               DWord = GET_PUT_IDX(&pAC->RxPort[Port].RxLET);
37455 +               SK_OUT32(IoC, PrefetchReg, DWord);
37456 +               UPDATE_HWPUT_IDX(&pAC->RxPort[Port].RxLET);
37457 +       }
37458 +
37459 +       pAC->GIni.GP[Port].PState = SK_PRT_RUN;
37460 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MSG,
37461 +               ("<== SkY2PortStart()\n"));
37462 +}
37463 +
37464 +/******************************************************************************
37465 + *
37466 + * Local Functions
37467 + *
37468 + *****************************************************************************/
37469 +
37470 +/*****************************************************************************
37471 + *
37472 + *     InitPacketQueues - initialize SW settings of packet queues
37473 + *
37474 + * Description:
37475 + *     This function will initialize the packet queues for a port.
37476 + *
37477 + * Returns: N/A
37478 + */
37479 +static void InitPacketQueues(
37480 +SK_AC  *pAC,   /* pointer to adapter control context */
37481 +int     Port)  /* index of port to be initialized    */
37482 +{
37483 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_INIT,
37484 +               ("==> InitPacketQueues(Port %c)\n", 'A' + Port));
37485 +
37486 +       pAC->RxPort[Port].RxQ_working.pHead = NULL;
37487 +       pAC->RxPort[Port].RxQ_working.pTail = NULL;
37488 +       spin_lock_init(&pAC->RxPort[Port].RxQ_working.QueueLock);
37489 +
37490 +       pAC->RxPort[Port].RxQ_waiting.pHead = NULL;
37491 +       pAC->RxPort[Port].RxQ_waiting.pTail = NULL;
37492 +       spin_lock_init(&pAC->RxPort[Port].RxQ_waiting.QueueLock);
37493 +
37494 +       pAC->TxPort[Port][TX_PRIO_LOW].TxQ_free.pHead = NULL;
37495 +       pAC->TxPort[Port][TX_PRIO_LOW].TxQ_free.pTail = NULL;
37496 +       spin_lock_init(&pAC->TxPort[Port][TX_PRIO_LOW].TxQ_free.QueueLock);
37497 +
37498 +       pAC->TxPort[Port][TX_PRIO_LOW].TxAQ_working.pHead = NULL;
37499 +       pAC->TxPort[Port][TX_PRIO_LOW].TxAQ_working.pTail = NULL;
37500 +       spin_lock_init(&pAC->TxPort[Port][TX_PRIO_LOW].TxAQ_working.QueueLock);
37501 +
37502 +       pAC->TxPort[Port][TX_PRIO_LOW].TxAQ_waiting.pHead = NULL;
37503 +       pAC->TxPort[Port][TX_PRIO_LOW].TxAQ_waiting.pTail = NULL;
37504 +       spin_lock_init(&pAC->TxPort[Port][TX_PRIO_LOW].TxAQ_waiting.QueueLock);
37505 +
37506 +#if USE_SYNC_TX_QUEUE
37507 +       pAC->TxPort[Port][TX_PRIO_LOW].TxSQ_working.pHead = NULL;
37508 +       pAC->TxPort[Port][TX_PRIO_LOW].TxSQ_working.pTail = NULL;
37509 +       spin_lock_init(&pAC->TxPort[Port][TX_PRIO_LOW].TxSQ_working.QueueLock);
37510 +
37511 +       pAC->TxPort[Port][TX_PRIO_LOW].TxSQ_waiting.pHead = NULL;
37512 +       pAC->TxPort[Port][TX_PRIO_LOW].TxSQ_waiting.pTail = NULL;
37513 +       spin_lock_init(&pAC->TxPort[Port][TX_PRIO_LOW].TxSQ_waiting.QueueLock);
37514 +#endif
37515 +
37516 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_INIT,
37517 +               ("<== InitPacketQueues(Port %c)\n", 'A' + Port));
37518 +}      /* InitPacketQueues */
37519 +
37520 +/*****************************************************************************
37521 + *
37522 + *     GiveTxBufferToHw - commits a previously allocated DMA area to HW
37523 + *
37524 + * Description:
37525 + *     This functions gives transmit buffers to HW. If no list elements
37526 + *     are available the buffers will be queued.
37527 + *
37528 + * Notes:
37529 + *       This function can run only once in a system at one time.
37530 + *
37531 + * Returns: N/A
37532 + */
37533 +static void GiveTxBufferToHw(
37534 +SK_AC   *pAC,   /* pointer to adapter control context         */
37535 +SK_IOC   IoC,   /* I/O control context (address of registers) */
37536 +int      Port)  /* port index for which the buffer is used    */
37537 +{
37538 +       SK_HWLE         *pLE;
37539 +       SK_PACKET       *pSkPacket;
37540 +       SK_FRAG         *pFrag;
37541 +       SK_PKT_QUEUE    *pWorkQueue;   /* corresponding TX queue */
37542 +       SK_PKT_QUEUE    *pWaitQueue;
37543 +       SK_LE_TABLE     *pLETab;       /* corresponding LETable  */
37544 +       SK_BOOL          SetOpcodePacketFlag;
37545 +       SK_U32           HighAddress;
37546 +       SK_U32           LowAddress;
37547 +       SK_U16           TcpSumStart;
37548 +       SK_U16           TcpSumWrite;
37549 +       SK_U8            OpCode;
37550 +       SK_U8            Ctrl;
37551 +       unsigned long    Flags;
37552 +       unsigned long    LockFlag;
37553 +       int              Protocol;
37554 +#ifdef NETIF_F_TSO
37555 +       SK_U16           Mss;
37556 +       int              TcpOptLen;
37557 +       int              IpTcpLen;
37558 +#endif
37559 +#if defined(__x86_64__)
37560 +       long             cache0, cache1;
37561 +#endif
37562 +
37563 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
37564 +               ("==> GiveTxBufferToHw\n"));
37565 +
37566 +       if (IS_Q_EMPTY(&(pAC->TxPort[Port][TX_PRIO_LOW].TxAQ_waiting))) {
37567 +               return;
37568 +       }
37569 +
37570 +       spin_lock_irqsave(&pAC->TxQueueLock, LockFlag);
37571 +
37572 +       /*
37573 +       ** Initialize queue settings
37574 +       */
37575 +       pWorkQueue = &(pAC->TxPort[Port][TX_PRIO_LOW].TxAQ_working);
37576 +       pWaitQueue = &(pAC->TxPort[Port][TX_PRIO_LOW].TxAQ_waiting);
37577 +       pLETab     = &(pAC->TxPort[Port][TX_PRIO_LOW].TxALET);
37578 +
37579 +       POP_FIRST_PKT_FROM_QUEUE(pWaitQueue, pSkPacket);
37580 +       while (pSkPacket != NULL) {
37581 +               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
37582 +                       ("\tWe have a packet to send %p\n", pSkPacket));
37583 +
37584 +               /*
37585 +               ** the first frag of a packet gets opcode OP_PACKET
37586 +               */
37587 +               SetOpcodePacketFlag     = SK_TRUE;
37588 +               pFrag                   = pSkPacket->pFrag;
37589 +
37590 +               /*
37591 +               ** fill list elements with data from fragments
37592 +               */
37593 +               while (pFrag != NULL) {
37594 +                       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
37595 +                               ("\tGet LE\n"));
37596 +#ifdef NETIF_F_TSO
37597 +                       Mss = skb_shinfo(pSkPacket->pMBuf)->tso_size;
37598 +                       if (Mss) {
37599 +                               TcpOptLen = ((pSkPacket->pMBuf->h.th->doff - 5) * 4);
37600 +                               IpTcpLen  = ((pSkPacket->pMBuf->nh.iph->ihl * 4) +
37601 +                                               sizeof(struct tcphdr));
37602 +                               Mss += (TcpOptLen + IpTcpLen + C_LEN_ETHERMAC_HEADER);
37603 +                       }
37604 +                       if (pLETab->Bmu.RxTx.MssValue != Mss) {
37605 +                               pLETab->Bmu.RxTx.MssValue = Mss;
37606 +                               /* Take a new LE for TSO from the table */
37607 +                               GET_TX_LE(pLE, pLETab);
37608 +
37609 +#if 0
37610 +                               if(pSkPacket->VlanId) {
37611 +                                       TXLE_SET_OPC(pLE, OP_LRGLENVLAN | HW_OWNER);
37612 +                                       TXLE_SET_VLAN(pLE, pSkPacket->VlanId);
37613 +                                       pSkPacket->VlanId = 0;
37614 +                                       Ctrl |= INS_VLAN;
37615 +                               } else {
37616 +#endif
37617 +                                       TXLE_SET_OPC(pLE, OP_LRGLEN | HW_OWNER);
37618 +#if 0
37619 +                               }
37620 +#endif
37621 +                               /* set maximum segment size for new packet */
37622 +                               TXLE_SET_LSLEN(pLE, pLETab->Bmu.RxTx.MssValue);
37623 +                               FLUSH_OPC(pLE) ;
37624 +                       }
37625 +#endif
37626 +                       GET_TX_LE(pLE, pLETab);
37627 +                       Ctrl = 0;
37628 +
37629 +                       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
37630 +                               ("\tGot empty LE %p idx %d\n", pLE, GET_PUT_IDX(pLETab)));
37631 +
37632 +                       SK_DBG_DUMP_TX_LE(pLE);
37633 +
37634 +                       LowAddress  = (SK_U32) (pFrag->pPhys & 0xffffffff);
37635 +                       HighAddress = (SK_U32) (pFrag->pPhys >> 32);
37636 +                       if (HighAddress != pLETab->BufHighAddr) {
37637 +                               /* set opcode high part of the address in one LE */
37638 +                               OpCode = OP_ADDR64 | HW_OWNER;
37639 +
37640 +                               /* Set now the 32 high bits of the address */
37641 +                               TXLE_SET_ADDR( pLE, HighAddress);
37642 +
37643 +                               /* Set the opcode into the LE */
37644 +                               TXLE_SET_OPC(pLE, OpCode);
37645 +
37646 +                               /* Flush the LE to memory */
37647 +                               FLUSH_OPC(pLE);
37648 +
37649 +                               /* remember the HighAddress we gave to the Hardware */
37650 +                               pLETab->BufHighAddr = HighAddress;
37651 +
37652 +                               /* get a new LE because we filled one with high address */
37653 +                               GET_TX_LE(pLE, pLETab);
37654 +                       }
37655 +
37656 +                       /*
37657 +                       ** TCP checksum offload
37658 +                       */
37659 +                       if ((pSkPacket->pMBuf->ip_summed == CHECKSUM_HW) &&
37660 +                           (SetOpcodePacketFlag         == SK_TRUE)) {
37661 +                               Protocol = ((SK_U8)pSkPacket->pMBuf->data[C_OFFSET_IPPROTO] & 0xff);
37662 +                               /* if (Protocol & C_PROTO_ID_IP) { Ctrl = 0; } */
37663 +                               if (Protocol & C_PROTO_ID_TCP) {
37664 +                                       Ctrl = CALSUM | WR_SUM | INIT_SUM | LOCK_SUM;
37665 +                                       /* TCP Checksum Calculation Start Position */
37666 +                                       TcpSumStart = C_LEN_ETHERMAC_HEADER + IP_HDR_LEN;
37667 +                                       /* TCP Checksum Write Position */
37668 +                                       TcpSumWrite = TcpSumStart + TCP_CSUM_OFFS;
37669 +                               } else {
37670 +                                       Ctrl = UDPTCP | CALSUM | WR_SUM | INIT_SUM | LOCK_SUM;
37671 +                                       /* TCP Checksum Calculation Start Position */
37672 +                                       TcpSumStart = ETHER_MAC_HDR_LEN + IP_HDR_LEN;
37673 +                                       /* UDP Checksum Write Position */
37674 +                                       TcpSumWrite = TcpSumStart + UDP_CSUM_OFFS;
37675 +                               }
37676 +
37677 +                               if ((Ctrl) && (pLETab->Bmu.RxTx.TcpWp != TcpSumWrite)) {
37678 +                                       /* Update the last value of the write position */
37679 +                                       pLETab->Bmu.RxTx.TcpWp = TcpSumWrite;
37680 +
37681 +                                       /* Set the Lock field for this LE: */
37682 +                                       /* Checksum calculation for one packet only */
37683 +                                       TXLE_SET_LCKCS(pLE, 1);
37684 +
37685 +                                       /* Set the start position for checksum. */
37686 +                                       TXLE_SET_STACS(pLE, TcpSumStart);
37687 +
37688 +                                       /* Set the position where the checksum will be writen */
37689 +                                       TXLE_SET_WRICS(pLE, TcpSumWrite);
37690 +
37691 +                                       /* Set the initial value for checksum */
37692 +                                       /* PseudoHeader CS passed from Linux -> 0! */
37693 +                                       TXLE_SET_INICS(pLE, 0);
37694 +
37695 +                                       /* Set the opcode for tcp checksum */
37696 +                                       TXLE_SET_OPC(pLE, OP_TCPLISW | HW_OWNER);
37697 +
37698 +                                       /* Flush the LE to memory */
37699 +                                       FLUSH_OPC(pLE);
37700 +
37701 +                                       /* get a new LE because we filled one with data for checksum */
37702 +                                       GET_TX_LE(pLE, pLETab);
37703 +                               }
37704 +                       } /* end TCP offload handling */
37705 +
37706 +                       TXLE_SET_ADDR(pLE, LowAddress);
37707 +                       TXLE_SET_LEN(pLE, pFrag->FragLen);
37708 +
37709 +                       if (SetOpcodePacketFlag){
37710 +#ifdef NETIF_F_TSO
37711 +                               if (Mss) {
37712 +                                       OpCode = OP_LARGESEND | HW_OWNER;
37713 +                               } else {
37714 +#endif
37715 +                                       OpCode = OP_PACKET| HW_OWNER;
37716 +#ifdef NETIF_F_TSO
37717 +                               }
37718 +#endif
37719 +                               SetOpcodePacketFlag = SK_FALSE;
37720 +                       } else {
37721 +                               /* Follow packet in a sequence has always OP_BUFFER */
37722 +                               OpCode = OP_BUFFER | HW_OWNER;
37723 +                       }
37724 +
37725 +                       pFrag = pFrag->pNext;
37726 +                       if (pFrag == NULL) {
37727 +                               /* mark last fragment */
37728 +                               Ctrl |= EOP;
37729 +                       }
37730 +                       TXLE_SET_CTRL(pLE, Ctrl);
37731 +                       TXLE_SET_OPC(pLE, OpCode);
37732 +                       FLUSH_OPC(pLE);
37733 +                       SK_DBG_DUMP_TX_LE(pLE);
37734 +               }
37735 +
37736 +               /*
37737 +               ** Remember next LE for tx complete
37738 +               */
37739 +               pSkPacket->NextLE = GET_PUT_IDX(pLETab);
37740 +               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
37741 +                       ("\tNext LE for pkt %p is %d\n", pSkPacket, pSkPacket->NextLE));
37742 +
37743 +               /*
37744 +               ** Add packet to working packets queue
37745 +               */
37746 +               PUSH_PKT_AS_LAST_IN_QUEUE(pWorkQueue, pSkPacket);
37747 +
37748 +               /*
37749 +               ** give transmit start command
37750 +               */
37751 +               if (HW_FEATURE(pAC, HWF_WA_DEV_42)) {
37752 +                       spin_lock(&pAC->SetPutIndexLock);
37753 +                       SkGeY2SetPutIndex(pAC, pAC->IoBase, Y2_PREF_Q_ADDR(Q_XA1,0), &pAC->TxPort[0][0].TxALET);
37754 +                       spin_unlock(&pAC->SetPutIndexLock);
37755 +               } else {
37756 +                       /* write put index */
37757 +                       if (Port == 0) {
37758 +                               SK_OUT32(pAC->IoBase,
37759 +                                       Y2_PREF_Q_ADDR(Q_XA1,PREF_UNIT_PUT_IDX_REG),
37760 +                                       GET_PUT_IDX(&pAC->TxPort[0][0].TxALET));
37761 +                               UPDATE_HWPUT_IDX(&pAC->TxPort[0][0].TxALET);
37762 +                       } else {
37763 +                               SK_OUT32(pAC->IoBase,
37764 +                                       Y2_PREF_Q_ADDR(Q_XA2, PREF_UNIT_PUT_IDX_REG),
37765 +                                       GET_PUT_IDX(&pAC->TxPort[1][0].TxALET));
37766 +                               UPDATE_HWPUT_IDX(&pAC->TxPort[1][0].TxALET);
37767 +                       }
37768 +               }
37769 +
37770 +               if (IS_Q_EMPTY(&(pAC->TxPort[Port][TX_PRIO_LOW].TxAQ_waiting))) {
37771 +                       break; /* get out of while */
37772 +               }
37773 +               POP_FIRST_PKT_FROM_QUEUE(pWaitQueue, pSkPacket);
37774 +       } /* while (pSkPacket != NULL) */
37775 +
37776 +       spin_unlock_irqrestore(&pAC->TxQueueLock, LockFlag);
37777 +
37778 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
37779 +               ("<== GiveTxBufferToHw\n"));
37780 +       return;
37781 +}      /* GiveTxBufferToHw */
37782 +
37783 +/***********************************************************************
37784 + *
37785 + *     GiveRxBufferToHw - commits a previously allocated DMA area to HW
37786 + *
37787 + * Description:
37788 + *     This functions gives receive buffers to HW. If no list elements
37789 + *     are available the buffers will be queued.
37790 + *
37791 + * Notes:
37792 + *       This function can run only once in a system at one time.
37793 + *
37794 + * Returns: N/A
37795 + */
37796 +static void GiveRxBufferToHw(
37797 +SK_AC      *pAC,      /* pointer to adapter control context         */
37798 +SK_IOC      IoC,      /* I/O control context (address of registers) */
37799 +int         Port,     /* port index for which the buffer is used    */
37800 +SK_PACKET  *pPacket)  /* receive buffer(s)                          */
37801 +{
37802 +       SK_HWLE         *pLE;
37803 +       SK_LE_TABLE     *pLETab;
37804 +       SK_BOOL         Done = SK_FALSE;  /* at least on LE changed? */
37805 +       SK_U32          LowAddress;
37806 +       SK_U32          HighAddress;
37807 +       SK_U32          PrefetchReg;      /* register for Put index  */
37808 +       unsigned        NumFree;
37809 +       unsigned        Required;
37810 +       unsigned long   Flags;
37811 +#if defined(__x86_64__)
37812 +       long            cache0, cache1;
37813 +#endif
37814 +
37815 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_RX_PROGRESS,
37816 +       ("==> GiveRxBufferToHw(Port %c, Packet %p)\n", 'A' + Port, pPacket));
37817 +
37818 +       pLETab  = &pAC->RxPort[Port].RxLET;
37819 +
37820 +       if (Port == 0) {
37821 +               PrefetchReg = Y2_PREF_Q_ADDR(Q_R1, PREF_UNIT_PUT_IDX_REG);
37822 +       } else {
37823 +               PrefetchReg = Y2_PREF_Q_ADDR(Q_R2, PREF_UNIT_PUT_IDX_REG);
37824 +       }
37825 +
37826 +       if (pPacket != NULL) {
37827 +               /*
37828 +               ** For the time being, we have only one packet passed
37829 +               ** to this function which might be changed in future!
37830 +               */
37831 +               PUSH_PKT_AS_LAST_IN_QUEUE(&pAC->RxPort[Port].RxQ_waiting, pPacket);
37832 +       }
37833 +
37834 +       /*
37835 +       ** now pPacket contains the very first waiting packet
37836 +       */
37837 +       POP_FIRST_PKT_FROM_QUEUE(&pAC->RxPort[Port].RxQ_waiting, pPacket);
37838 +       while (pPacket != NULL) {
37839 +               if (HW_FEATURE(pAC, HWF_WA_DEV_420)) {
37840 +                       if (NbrRxBuffersInHW >= MAX_NBR_RX_BUFFERS_IN_HW) {
37841 +                               PUSH_PKT_AS_FIRST_IN_QUEUE(&pAC->RxPort[Port].RxQ_waiting, pPacket);
37842 +                               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_RX_PROGRESS,
37843 +                                       ("<== GiveRxBufferToHw()\n"));
37844 +                               return;
37845 +                       }
37846 +                       NbrRxBuffersInHW++;
37847 +               }
37848 +
37849 +               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_RX_PROGRESS,
37850 +                       ("Try to add packet %p\n", pPacket));
37851 +
37852 +               /*
37853 +               ** Check whether we have enough listelements:
37854 +               **
37855 +               ** we have to take into account that each fragment
37856 +               ** may need an additional list element for the high
37857 +               ** part of the address here I simplified it by
37858 +               ** using MAX_FRAG_OVERHEAD maybe it's worth to split
37859 +               ** this constant for Rx and Tx or to calculate the
37860 +               ** real number of needed LE's
37861 +               */
37862 +               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_RX_PROGRESS,
37863 +                       ("\tNum %d Put %d Done %d Free %d %d\n",
37864 +                       pLETab->Num, pLETab->Put, pLETab->Done,
37865 +                       NUM_FREE_LE_IN_TABLE(pLETab),
37866 +                       (NUM_FREE_LE_IN_TABLE(pLETab))));
37867 +
37868 +               Required = pPacket->NumFrags + MAX_FRAG_OVERHEAD;
37869 +               NumFree = NUM_FREE_LE_IN_TABLE(pLETab);
37870 +               if (NumFree) {
37871 +                       NumFree--;
37872 +               }
37873 +
37874 +               if (Required > NumFree ) {
37875 +                       SK_DBG_MSG(pAC, SK_DBGMOD_DRV,
37876 +                               SK_DBGCAT_DRV_RX_PROGRESS | SK_DBGCAT_DRV_ERROR,
37877 +                               ("\tOut of LEs have %d need %d\n",
37878 +                               NumFree, Required));
37879 +
37880 +                       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_RX_PROGRESS,
37881 +                               ("\tWaitQueue starts with packet %p\n", pPacket));
37882 +                       PUSH_PKT_AS_FIRST_IN_QUEUE(&pAC->RxPort[Port].RxQ_waiting, pPacket);
37883 +                       if (Done) {
37884 +                               /*
37885 +                               ** write Put index to BMU or Polling Unit and make the LE's
37886 +                               ** available for the hardware
37887 +                               */
37888 +                               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_RX_PROGRESS,
37889 +                                       ("\tWrite new Put Idx\n"));
37890 +
37891 +                               SK_OUT32(IoC, PrefetchReg, GET_PUT_IDX(pLETab));
37892 +                               UPDATE_HWPUT_IDX(pLETab);
37893 +                       }
37894 +                       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_RX_PROGRESS,
37895 +                               ("<== GiveRxBufferToHw()\n"));
37896 +                       return;
37897 +               } else {
37898 +                       if (!AllocAndMapRxBuffer(pAC, pPacket, Port)) {
37899 +                               /*
37900 +                               ** Failure while allocating sk_buff might
37901 +                               ** be due to temporary short of resources
37902 +                               ** Maybe next time buffers are available.
37903 +                               ** Until this, the packet remains in the
37904 +                               ** RX waiting queue...
37905 +                               */
37906 +                               SK_DBG_MSG(pAC, SK_DBGMOD_DRV,
37907 +                                       SK_DBGCAT_DRV_RX_PROGRESS | SK_DBGCAT_DRV_ERROR,
37908 +                                       ("Failed to allocate Rx buffer\n"));
37909 +
37910 +                               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_RX_PROGRESS,
37911 +                                       ("WaitQueue starts with packet %p\n", pPacket));
37912 +                               PUSH_PKT_AS_FIRST_IN_QUEUE(&pAC->RxPort[Port].RxQ_waiting, pPacket);
37913 +                               if (Done) {
37914 +                                       /*
37915 +                                       ** write Put index to BMU or Polling
37916 +                                       ** Unit and make the LE's
37917 +                                       ** available for the hardware
37918 +                                       */
37919 +                                       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_RX_PROGRESS,
37920 +                                               ("\tWrite new Put Idx\n"));
37921 +
37922 +                                       SK_OUT32(IoC, PrefetchReg, GET_PUT_IDX(pLETab));
37923 +                                       UPDATE_HWPUT_IDX(pLETab);
37924 +                               }
37925 +                               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_RX_PROGRESS,
37926 +                                       ("<== GiveRxBufferToHw()\n"));
37927 +                               return;
37928 +                       }
37929 +               }
37930 +               Done = SK_TRUE;
37931 +
37932 +               LowAddress = (SK_U32) (pPacket->pFrag->pPhys & 0xffffffff);
37933 +               HighAddress = (SK_U32) (pPacket->pFrag->pPhys >> 32);
37934 +               if (HighAddress != pLETab->BufHighAddr) {
37935 +                       /* get a new LE for high address */
37936 +                       GET_RX_LE(pLE, pLETab);
37937 +
37938 +                       /* Set now the 32 high bits of the address */
37939 +                       RXLE_SET_ADDR(pLE, HighAddress);
37940 +
37941 +                       /* Set the control bits of the address */
37942 +                       RXLE_SET_CTRL(pLE, 0);
37943 +
37944 +                       /* Set the opcode into the LE */
37945 +                       RXLE_SET_OPC(pLE, (OP_ADDR64 | HW_OWNER));
37946 +
37947 +                       /* Flush the LE to memory */
37948 +                       FLUSH_OPC(pLE);
37949 +
37950 +                       /* remember the HighAddress we gave to the Hardware */
37951 +                       pLETab->BufHighAddr = HighAddress;
37952 +               }
37953 +
37954 +               /*
37955 +               ** Fill data into listelement
37956 +               */
37957 +               GET_RX_LE(pLE, pLETab);
37958 +               RXLE_SET_ADDR(pLE, LowAddress);
37959 +               RXLE_SET_LEN(pLE, pPacket->pFrag->FragLen);
37960 +               RXLE_SET_CTRL(pLE, 0);
37961 +               RXLE_SET_OPC(pLE, (OP_PACKET | HW_OWNER));
37962 +               FLUSH_OPC(pLE);
37963 +
37964 +               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_RX_PROGRESS,
37965 +                       ("=== LE filled\n"));
37966 +
37967 +               SK_DBG_DUMP_RX_LE(pLE);
37968 +
37969 +               /*
37970 +               ** Remember next LE for rx complete
37971 +               */
37972 +               pPacket->NextLE = GET_PUT_IDX(pLETab);
37973 +
37974 +               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_RX_PROGRESS,
37975 +                       ("\tPackets Next LE is %d\n", pPacket->NextLE));
37976 +
37977 +               /*
37978 +               ** Add packet to working receive buffer queue and get
37979 +               ** any next packet out of the waiting queue
37980 +               */
37981 +               PUSH_PKT_AS_LAST_IN_QUEUE(&pAC->RxPort[Port].RxQ_working, pPacket);
37982 +               if (IS_Q_EMPTY(&(pAC->RxPort[Port].RxQ_waiting))) {
37983 +                       break; /* get out of while processing */
37984 +               }
37985 +               POP_FIRST_PKT_FROM_QUEUE(&pAC->RxPort[Port].RxQ_waiting, pPacket);
37986 +       }
37987 +
37988 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_RX_PROGRESS,
37989 +               ("\tWaitQueue is empty\n"));
37990 +
37991 +       if (Done) {
37992 +               /*
37993 +               ** write Put index to BMU or Polling Unit and make the LE's
37994 +               ** available for the hardware
37995 +               */
37996 +               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_RX_PROGRESS,
37997 +                       ("\tWrite new Put Idx\n"));
37998 +
37999 +               /* Speed enhancement for a2 chipsets */
38000 +               if (HW_FEATURE(pAC, HWF_WA_DEV_42)) {
38001 +                       spin_lock_irqsave(&pAC->SetPutIndexLock, Flags);
38002 +                       SkGeY2SetPutIndex(pAC, pAC->IoBase, Y2_PREF_Q_ADDR(Q_R1,0), pLETab);
38003 +                       spin_unlock_irqrestore(&pAC->SetPutIndexLock, Flags);
38004 +               } else {
38005 +                       /* write put index */
38006 +                       if (Port == 0) {
38007 +                               SK_OUT32(IoC,
38008 +                                       Y2_PREF_Q_ADDR(Q_R1, PREF_UNIT_PUT_IDX_REG),
38009 +                                       GET_PUT_IDX(pLETab));
38010 +                       } else {
38011 +                               SK_OUT32(IoC,
38012 +                                       Y2_PREF_Q_ADDR(Q_R2, PREF_UNIT_PUT_IDX_REG),
38013 +                                       GET_PUT_IDX(pLETab));
38014 +                       }
38015 +
38016 +                       /* Update put index */
38017 +                       UPDATE_HWPUT_IDX(pLETab);
38018 +               }
38019 +       }
38020 +
38021 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_RX_PROGRESS,
38022 +               ("<== GiveRxBufferToHw()\n"));
38023 +}       /* GiveRxBufferToHw */
38024 +
38025 +/***********************************************************************
38026 + *
38027 + *     FillReceiveTableYukon2 - map any waiting RX buffers to HW
38028 + *
38029 + * Description:
38030 + *     If the list element table contains more empty elements than
38031 + *     specified this function tries to refill them.
38032 + *
38033 + * Notes:
38034 + *       This function can run only once per port in a system at one time.
38035 + *
38036 + * Returns: N/A
38037 + */
38038 +static void FillReceiveTableYukon2(
38039 +SK_AC   *pAC,   /* pointer to adapter control context */
38040 +SK_IOC   IoC,   /* I/O control context                */
38041 +int      Port)  /* port index of RX                   */
38042 +{
38043 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_RX_PROGRESS,
38044 +               ("==> FillReceiveTableYukon2 (Port %c)\n", 'A' + Port));
38045 +
38046 +       if (NUM_FREE_LE_IN_TABLE(&pAC->RxPort[Port].RxLET) >
38047 +               pAC->MaxUnusedRxLeWorking) {
38048 +
38049 +               /*
38050 +               ** Give alle waiting receive buffers down
38051 +               ** The queue holds all RX packets that
38052 +               ** need a fresh allocation of the sk_buff.
38053 +               */
38054 +               if (pAC->RxPort[Port].RxQ_waiting.pHead != NULL) {
38055 +                       SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_RX_PROGRESS,
38056 +                       ("Waiting queue is not empty -> give it to HW"));
38057 +                       GiveRxBufferToHw(pAC, IoC, Port, NULL);
38058 +               }
38059 +       }
38060 +
38061 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_RX_PROGRESS,
38062 +               ("<== FillReceiveTableYukon2 ()\n"));
38063 +}      /* FillReceiveTableYukon2 */
38064 +
38065 +/******************************************************************************
38066 + *
38067 + *
38068 + *     HandleReceives - will pass any ready RX packet to kernel
38069 + *
38070 + * Description:
38071 + *     This functions handles a received packet. It checks wether it is
38072 + *     valid, updates the receive list element table and gives the receive
38073 + *     buffer to Linux
38074 + *
38075 + * Notes:
38076 + *     This function can run only once per port at one time in the system.
38077 + *
38078 + * Returns: N/A
38079 + */
38080 +static SK_BOOL HandleReceives(
38081 +SK_AC  *pAC,          /* adapter control context                     */
38082 +int     Port,         /* port on which a packet has been received    */
38083 +SK_U16  Len,          /* number of bytes which was actually received */
38084 +SK_U32  FrameStatus,  /* MAC frame status word                       */
38085 +SK_U16  Tcp1,         /* first hw checksum                           */
38086 +SK_U16  Tcp2,         /* second hw checksum                          */
38087 +SK_U32  Tist,         /* timestamp                                   */
38088 +SK_U16  Vlan)         /* Vlan Id                                     */
38089 +{
38090 +
38091 +       SK_PACKET       *pSkPacket;
38092 +       SK_LE_TABLE     *pLETab;
38093 +       SK_MBUF         *pRlmtMbuf;  /* buffer for giving RLMT frame */
38094 +       struct sk_buff  *pMsg;       /* ptr to message holding frame */
38095 +#ifdef __ia64__
38096 +       struct sk_buff  *pNewMsg;    /* used when IP aligning        */
38097 +#endif
38098 +
38099 +#ifdef CONFIG_SK98LIN_NAPI
38100 +       SK_BOOL         SlowPathLock = SK_FALSE;
38101 +#else
38102 +       SK_BOOL         SlowPathLock = SK_TRUE;
38103 +#endif
38104 +       SK_BOOL         IsGoodPkt;
38105 +       SK_BOOL         IsBc;
38106 +       SK_BOOL         IsMc;
38107 +       SK_EVPARA       EvPara;      /* an event parameter union     */
38108 +       SK_I16          LenToFree;   /* must be signed integer       */
38109 +
38110 +       unsigned long   Flags;       /* for spin lock                */
38111 +       unsigned int    RlmtNotifier;
38112 +       unsigned short  Type;
38113 +       int             IpFrameLength;
38114 +       int             FrameLength; /* total length of recvd frame  */
38115 +       int             HeaderLength;
38116 +       int             NumBytes;
38117 +       int             Result;
38118 +       int             Offset = 0;
38119 +
38120 +#ifdef Y2_SYNC_CHECK
38121 +       SK_U16          MyTcp;
38122 +#endif
38123 +
38124 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_RX_PROGRESS,
38125 +               ("==> HandleReceives (Port %c)\n", 'A' + Port));
38126 +
38127 +       /*
38128 +       ** initialize vars for selected port
38129 +       */
38130 +       pLETab = &pAC->RxPort[Port].RxLET;
38131 +
38132 +       /*
38133 +       ** check whether we want to receive this packet
38134 +       */
38135 +       SK_Y2_RXSTAT_CHECK_PKT(Len, FrameStatus, IsGoodPkt);
38136 +
38137 +       /*
38138 +       ** Remember length to free (in case of RxBuffer overruns;
38139 +       ** unlikely, but might happen once in a while)
38140 +       */
38141 +       LenToFree = (SK_I16) Len;
38142 +
38143 +       /*
38144 +       ** maybe we put these two checks into the SK_RXDESC_CHECK_PKT macro too
38145 +       */
38146 +       if (Len > pAC->RxPort[Port].RxBufSize) {
38147 +               IsGoodPkt = SK_FALSE;
38148 +       }
38149 +
38150 +       /*
38151 +       ** take first receive buffer out of working queue
38152 +       */
38153 +       POP_FIRST_PKT_FROM_QUEUE(&pAC->RxPort[Port].RxQ_working, pSkPacket);
38154 +       if (pSkPacket == NULL) {
38155 +               SK_DBG_MSG(pAC, SK_DBGMOD_DRV,
38156 +                       SK_DBGCAT_DRV_ERROR,
38157 +                       ("Packet not available. NULL pointer.\n"));
38158 +               return(SK_TRUE);
38159 +       }
38160 +
38161 +       if (HW_FEATURE(pAC, HWF_WA_DEV_420)) {
38162 +               NbrRxBuffersInHW--;
38163 +       }
38164 +
38165 +       /*
38166 +       ** Verify the received length of the frame! Note that having
38167 +       ** multiple RxBuffers being aware of one single receive packet
38168 +       ** (one packet spread over multiple RxBuffers) is not supported
38169 +       ** by this driver!
38170 +       */
38171 +       if ((Len > pAC->RxPort[Port].RxBufSize) ||
38172 +               (Len > (SK_U16) pSkPacket->PacketLen)) {
38173 +               IsGoodPkt = SK_FALSE;
38174 +       }
38175 +
38176 +       /*
38177 +       ** Reset own bit in LE's between old and new Done index
38178 +       ** This is not really necessary but makes debugging easier
38179 +       */
38180 +       CLEAR_LE_OWN_FROM_DONE_TO(pLETab, pSkPacket->NextLE);
38181 +
38182 +       /*
38183 +       ** Free the list elements for new Rx buffers
38184 +       */
38185 +       SET_DONE_INDEX(pLETab, pSkPacket->NextLE);
38186 +       pMsg = pSkPacket->pMBuf;
38187 +       FrameLength = Len;
38188 +
38189 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_RX_PROGRESS,
38190 +               ("Received frame of length %d on port %d\n",FrameLength, Port));
38191 +
38192 +       if (!IsGoodPkt) {
38193 +               /*
38194 +               ** release the DMA mapping
38195 +               */
38196 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5)
38197 +               pci_dma_sync_single(pAC->PciDev,
38198 +                               (dma_addr_t) pSkPacket->pFrag->pPhys,
38199 +                               pSkPacket->pFrag->FragLen,
38200 +                               PCI_DMA_FROMDEVICE);
38201 +
38202 +#else
38203 +               pci_dma_sync_single_for_cpu(pAC->PciDev,
38204 +                               (dma_addr_t) pSkPacket->pFrag->pPhys,
38205 +                               pSkPacket->pFrag->FragLen,
38206 +                               PCI_DMA_FROMDEVICE);
38207 +#endif
38208 +
38209 +               DEV_KFREE_SKB_ANY(pSkPacket->pMBuf);
38210 +               PUSH_PKT_AS_LAST_IN_QUEUE(&pAC->RxPort[Port].RxQ_waiting, pSkPacket);
38211 +               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_RX_PROGRESS,
38212 +                       ("<== HandleReceives (Port %c)\n", 'A' + Port));
38213 +
38214 +               /*
38215 +               ** Sanity check for RxBuffer overruns...
38216 +               */
38217 +               LenToFree = LenToFree - (pSkPacket->pFrag->FragLen);
38218 +               while (LenToFree > 0) {
38219 +                       POP_FIRST_PKT_FROM_QUEUE(&pAC->RxPort[Port].RxQ_working, pSkPacket);
38220 +                       if (HW_FEATURE(pAC, HWF_WA_DEV_420)) {
38221 +                               NbrRxBuffersInHW--;
38222 +                       }
38223 +                       CLEAR_LE_OWN_FROM_DONE_TO(pLETab, pSkPacket->NextLE);
38224 +                       SET_DONE_INDEX(pLETab, pSkPacket->NextLE);
38225 +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5)
38226 +                       pci_dma_sync_single(pAC->PciDev,
38227 +                                       (dma_addr_t) pSkPacket->pFrag->pPhys,
38228 +                                       pSkPacket->pFrag->FragLen,
38229 +                                       PCI_DMA_FROMDEVICE);
38230 +#else
38231 +                       pci_dma_sync_single_for_device(pAC->PciDev,
38232 +                                       (dma_addr_t) pSkPacket->pFrag->pPhys,
38233 +                                       pSkPacket->pFrag->FragLen,
38234 +                                       PCI_DMA_FROMDEVICE);
38235 +#endif
38236 +
38237 +                       DEV_KFREE_SKB_ANY(pSkPacket->pMBuf);
38238 +                       PUSH_PKT_AS_LAST_IN_QUEUE(&pAC->RxPort[Port].RxQ_waiting, pSkPacket);
38239 +                       LenToFree = LenToFree - ((SK_I16)(pSkPacket->pFrag->FragLen));
38240 +
38241 +                       SK_DBG_MSG(pAC, SK_DBGMOD_DRV,
38242 +                               SK_DBGCAT_DRV_RX_PROGRESS | SK_DBGCAT_DRV_ERROR,
38243 +                               ("<==HandleReceives (Port %c) drop faulty len pkt(2)\n",'A'+Port));
38244 +               }
38245 +               return(SK_TRUE);
38246 +       } else {
38247 +               /*
38248 +               ** Release the DMA mapping
38249 +               */
38250 +               pci_unmap_single(pAC->PciDev,
38251 +                                pSkPacket->pFrag->pPhys,
38252 +                                pAC->RxPort[Port].RxBufSize,
38253 +                                PCI_DMA_FROMDEVICE);
38254 +
38255 +               skb_put(pMsg, FrameLength);             /* set message len */
38256 +               pMsg->ip_summed = CHECKSUM_NONE;        /* initial default */
38257 +
38258 +#ifdef Y2_SYNC_CHECK
38259 +               pAC->FramesWithoutSyncCheck++;
38260 +               if (pAC->FramesWithoutSyncCheck > Y2_RESYNC_WATERMARK) {
38261 +                       if ((Tcp1 != 1) && (Tcp2 != 0)) {
38262 +                               pAC->FramesWithoutSyncCheck = 0;
38263 +                               MyTcp = (SK_U16) SkCsCalculateChecksum(
38264 +                                               &pMsg->data[14],
38265 +                                               FrameLength - 14);
38266 +                               if (MyTcp != Tcp1) {
38267 +                                       /* Queue port reset event */
38268 +                                       SkLocalEventQueue(pAC, SKGE_DRV,
38269 +                                       SK_DRV_RECOVER,Port,-1,SK_FALSE);
38270 +                               }
38271 +                       }
38272 +               }
38273 +#endif
38274 +
38275 +               if (pAC->RxPort[Port].UseRxCsum) {
38276 +                       Type = ntohs(*((short*)&pMsg->data[12]));
38277 +                       if (Type == 0x800) {
38278 +                               *((char *)&(IpFrameLength)) = pMsg->data[16];
38279 +                               *(((char *)&(IpFrameLength))+1) = pMsg->data[17];
38280 +                               IpFrameLength = ntohs(IpFrameLength);
38281 +                               HeaderLength  = FrameLength - IpFrameLength;
38282 +                               if (HeaderLength == 0xe) {
38283 +                                       Result =
38284 +                                           SkCsGetReceiveInfo(pAC,&pMsg->data[14],Tcp1,Tcp2, Port);
38285 +                                       if ((Result == SKCS_STATUS_IP_FRAGMENT) ||
38286 +                                           (Result == SKCS_STATUS_IP_CSUM_OK)  ||
38287 +                                           (Result == SKCS_STATUS_TCP_CSUM_OK) ||
38288 +                                           (Result == SKCS_STATUS_UDP_CSUM_OK)) {
38289 +                                               pMsg->ip_summed = CHECKSUM_UNNECESSARY;
38290 +                                       } else if ((Result == SKCS_STATUS_TCP_CSUM_ERROR)    ||
38291 +                                                  (Result == SKCS_STATUS_UDP_CSUM_ERROR)    ||
38292 +                                                  (Result == SKCS_STATUS_IP_CSUM_ERROR_UDP) ||
38293 +                                                  (Result == SKCS_STATUS_IP_CSUM_ERROR_TCP) ||
38294 +                                                  (Result == SKCS_STATUS_IP_CSUM_ERROR)) {
38295 +                                               SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
38296 +                                                       SK_DBGCAT_DRV_RX_PROGRESS | SK_DBGCAT_DRV_ERROR,
38297 +                                                       ("skge: CRC error. Frame dropped!\n"));
38298 +                                               DEV_KFREE_SKB_ANY(pMsg);
38299 +                                               PUSH_PKT_AS_LAST_IN_QUEUE(&pAC->RxPort[Port].RxQ_waiting, pSkPacket);
38300 +                                               SK_DBG_MSG(pAC,SK_DBGMOD_DRV,SK_DBGCAT_DRV_RX_PROGRESS,
38301 +                                                       ("<==HandleReceives(Port %c)\n",'A'+Port));
38302 +                                               return(SK_TRUE);
38303 +                                       } else {
38304 +                                               pMsg->ip_summed = CHECKSUM_NONE;
38305 +                                       }
38306 +                               } /* end if (HeaderLength == valid) */
38307 +                       } /* end if (Type == 0x800) -> IP frame */
38308 +               } /* end if (pRxPort->UseRxCsum) */
38309 +
38310 +               SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
38311 +                       SK_DBGCAT_DRV_RX_PROGRESS,("V"));
38312 +               RlmtNotifier = SK_RLMT_RX_PROTOCOL;
38313 +
38314 +               IsBc = (FrameStatus & GMR_FS_BC) ? SK_TRUE : SK_FALSE;
38315 +               SK_RLMT_PRE_LOOKAHEAD(pAC,Port,FrameLength,
38316 +                                       IsBc,&Offset,&NumBytes);
38317 +               if (NumBytes != 0) {
38318 +                       IsMc = (FrameStatus & GMR_FS_MC) ? SK_TRUE : SK_FALSE;
38319 +                       SK_RLMT_LOOKAHEAD(pAC,Port,&pMsg->data[Offset],
38320 +                                               IsBc,IsMc,&RlmtNotifier);
38321 +               }
38322 +
38323 +               if (RlmtNotifier == SK_RLMT_RX_PROTOCOL) {
38324 +                       SK_DBG_MSG(NULL,SK_DBGMOD_DRV,
38325 +                               SK_DBGCAT_DRV_RX_PROGRESS,("W"));
38326 +                       if ((Port == pAC->ActivePort)||(pAC->RlmtNets == 2)) {
38327 +                               /* send up only frames from active port */
38328 +                               SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
38329 +                                       SK_DBGCAT_DRV_RX_PROGRESS,("U"));
38330 +#ifdef xDEBUG
38331 +                               DumpMsg(pMsg, "Rx");
38332 +#endif
38333 +                               SK_PNMI_CNT_RX_OCTETS_DELIVERED(pAC,
38334 +                                       FrameLength, Port);
38335 +#ifdef __ia64__
38336 +                               pNewMsg = alloc_skb(pMsg->len, GFP_ATOMIC);
38337 +                               skb_reserve(pNewMsg, 2); /* to align IP */
38338 +                               SK_MEMCPY(pNewMsg->data,pMsg->data,pMsg->len);
38339 +                               pNewMsg->ip_summed = pMsg->ip_summed;
38340 +                               skb_put(pNewMsg, pMsg->len);
38341 +                               DEV_KFREE_SKB_ANY(pMsg);
38342 +                               pMsg = pNewMsg;
38343 +#endif
38344 +                               pMsg->dev = pAC->dev[Port];
38345 +                               pMsg->protocol = eth_type_trans(pMsg,
38346 +                                       pAC->dev[Port]);
38347 +                               netif_rx(pMsg);
38348 +                               pAC->dev[Port]->last_rx = jiffies;
38349 +                       } else { /* drop frame */
38350 +                               SK_DBG_MSG(NULL,SK_DBGMOD_DRV,
38351 +                                       SK_DBGCAT_DRV_RX_PROGRESS,("D"));
38352 +                               DEV_KFREE_SKB_ANY(pMsg);
38353 +                       }
38354 +               } else { /* This is an RLMT-packet! */
38355 +                       SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
38356 +                               SK_DBGCAT_DRV_RX_PROGRESS,("R"));
38357 +                       pRlmtMbuf = SkDrvAllocRlmtMbuf(pAC,
38358 +                               pAC->IoBase, FrameLength);
38359 +                       if (pRlmtMbuf != NULL) {
38360 +                               pRlmtMbuf->pNext = NULL;
38361 +                               pRlmtMbuf->Length = FrameLength;
38362 +                               pRlmtMbuf->PortIdx = Port;
38363 +                               EvPara.pParaPtr = pRlmtMbuf;
38364 +                               SK_MEMCPY((char*)(pRlmtMbuf->pData),
38365 +                                         (char*)(pMsg->data),FrameLength);
38366 +
38367 +                               if (SlowPathLock == SK_TRUE) {
38368 +                                       spin_lock_irqsave(&pAC->SlowPathLock, Flags);
38369 +                                       SkEventQueue(pAC, SKGE_RLMT,
38370 +                                               SK_RLMT_PACKET_RECEIVED,
38371 +                                               EvPara);
38372 +                                       pAC->CheckQueue = SK_TRUE;
38373 +                                       spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
38374 +                               } else {
38375 +                                       SkEventQueue(pAC, SKGE_RLMT,
38376 +                                               SK_RLMT_PACKET_RECEIVED,
38377 +                                               EvPara);
38378 +                                       pAC->CheckQueue = SK_TRUE;
38379 +                               }
38380 +
38381 +                               SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
38382 +                                       SK_DBGCAT_DRV_RX_PROGRESS,("Q"));
38383 +                       }
38384 +                       if (pAC->dev[Port]->flags & (IFF_PROMISC | IFF_ALLMULTI)) {
38385 +#ifdef __ia64__
38386 +                               pNewMsg = alloc_skb(pMsg->len, GFP_ATOMIC);
38387 +                               skb_reserve(pNewMsg, 2); /* to align IP */
38388 +                               SK_MEMCPY(pNewMsg->data,pMsg->data,pMsg->len);
38389 +                               pNewMsg->ip_summed = pMsg->ip_summed;
38390 +                               pNewMsg->len = pMsg->len;
38391 +                               DEV_KFREE_SKB_ANY(pMsg);
38392 +                               pMsg = pNewMsg;
38393 +#endif
38394 +                               pMsg->dev = pAC->dev[Port];
38395 +                               pMsg->protocol = eth_type_trans(pMsg,pAC->dev[Port]);
38396 +                               netif_rx(pMsg);
38397 +                               pAC->dev[Port]->last_rx = jiffies;
38398 +                       } else {
38399 +                               DEV_KFREE_SKB_ANY(pMsg);
38400 +                       }
38401 +               } /* if packet for rlmt */
38402 +               PUSH_PKT_AS_LAST_IN_QUEUE(&pAC->RxPort[Port].RxQ_waiting, pSkPacket);
38403 +       } /* end if-else (IsGoodPkt) */
38404 +
38405 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_RX_PROGRESS,
38406 +               ("<== HandleReceives (Port %c)\n", 'A' + Port));
38407 +       return(SK_TRUE);
38408 +
38409 +}      /* HandleReceives */
38410 +
38411 +/***********************************************************************
38412 + *
38413 + *     CheckForSendComplete - Frees any freeable Tx bufffer
38414 + *
38415 + * Description:
38416 + *     This function checks the queues of a port for completed send
38417 + *     packets and returns these packets back to the OS.
38418 + *
38419 + * Notes:
38420 + *     This function can run simultaneously for both ports if
38421 + *     the OS function OSReturnPacket() can handle this,
38422 + *
38423 + *     Such a send complete does not mean, that the packet is really
38424 + *     out on the wire. We just know that the adapter has copied it
38425 + *     into its internal memory and the buffer in the systems memory
38426 + *     is no longer needed.
38427 + *
38428 + * Returns: N/A
38429 + */
38430 +static void CheckForSendComplete(
38431 +SK_AC         *pAC,     /* pointer to adapter control context  */
38432 +SK_IOC         IoC,     /* I/O control context                 */
38433 +int            Port,    /* port index                          */
38434 +SK_PKT_QUEUE  *pPQ,     /* tx working packet queue to check    */
38435 +SK_LE_TABLE   *pLETab,  /* corresponding list element table    */
38436 +unsigned int   Done)    /* done index reported for this LET    */
38437 +{
38438 +       SK_PACKET       *pSkPacket;
38439 +       SK_PKT_QUEUE     SendCmplPktQ = { NULL, NULL, SPIN_LOCK_UNLOCKED };
38440 +       SK_BOOL          DoWakeQueue  = SK_FALSE;
38441 +       unsigned long    Flags;
38442 +       unsigned         Put;
38443 +
38444 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
38445 +               ("==> CheckForSendComplete(Port %c)\n", 'A' + Port));
38446 +
38447 +       /*
38448 +       ** Reset own bit in LE's between old and new Done index
38449 +       ** This is not really necessairy but makes debugging easier
38450 +       */
38451 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
38452 +               ("Clear Own Bits in TxTable from %d to %d\n",
38453 +               pLETab->Done, (Done == 0) ?
38454 +               NUM_LE_IN_TABLE(pLETab) :
38455 +               (Done - 1)));
38456 +
38457 +       spin_lock_irqsave(&(pPQ->QueueLock), Flags);
38458 +
38459 +       CLEAR_LE_OWN_FROM_DONE_TO(pLETab, Done);
38460 +
38461 +       Put = GET_PUT_IDX(pLETab);
38462 +
38463 +       /*
38464 +       ** Check whether some packets have been completed
38465 +       */
38466 +       PLAIN_POP_FIRST_PKT_FROM_QUEUE(pPQ, pSkPacket);
38467 +       while (pSkPacket != NULL) {
38468 +
38469 +               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
38470 +                       ("Check Completion of Tx packet %p\n", pSkPacket));
38471 +               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
38472 +                       ("Put %d NewDone %d NextLe of Packet %d\n", Put, Done,
38473 +                       pSkPacket->NextLE));
38474 +
38475 +               if ((Put > Done) &&
38476 +                       ((pSkPacket->NextLE > Put) || (pSkPacket->NextLE <= Done))) {
38477 +                       PLAIN_PUSH_PKT_AS_LAST_IN_QUEUE(&SendCmplPktQ, pSkPacket);
38478 +                       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
38479 +                               ("Packet finished (a)\n"));
38480 +               } else if ((Done > Put) &&
38481 +                       (pSkPacket->NextLE > Put) && (pSkPacket->NextLE <= Done)) {
38482 +                       PLAIN_PUSH_PKT_AS_LAST_IN_QUEUE(&SendCmplPktQ, pSkPacket);
38483 +                       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
38484 +                               ("Packet finished (b)\n"));
38485 +               } else if ((Done == TXA_MAX_LE-1) && (Put == 0) && (pSkPacket->NextLE == 0)) {
38486 +                       PLAIN_PUSH_PKT_AS_LAST_IN_QUEUE(&SendCmplPktQ, pSkPacket);
38487 +                       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
38488 +                               ("Packet finished (b)\n"));
38489 +                       DoWakeQueue = SK_TRUE;
38490 +               } else if (Done == Put) {
38491 +                       /* all packets have been sent */
38492 +                       PLAIN_PUSH_PKT_AS_LAST_IN_QUEUE(&SendCmplPktQ, pSkPacket);
38493 +                       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
38494 +                               ("Packet finished (c)\n"));
38495 +               } else {
38496 +                       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
38497 +                               ("Packet not yet finished\n"));
38498 +                       PLAIN_PUSH_PKT_AS_FIRST_IN_QUEUE(pPQ, pSkPacket);
38499 +                       break;
38500 +               }
38501 +               PLAIN_POP_FIRST_PKT_FROM_QUEUE(pPQ, pSkPacket);
38502 +       }
38503 +       spin_unlock_irqrestore(&(pPQ->QueueLock), Flags);
38504 +
38505 +       /*
38506 +       ** Set new done index in list element table
38507 +       */
38508 +       SET_DONE_INDEX(pLETab, Done);
38509 +
38510 +       /*
38511 +       ** All TX packets that are send complete should be added to
38512 +       ** the free queue again for new sents to come
38513 +       */
38514 +       pSkPacket = SendCmplPktQ.pHead;
38515 +       while (pSkPacket != NULL) {
38516 +               while (pSkPacket->pFrag != NULL) {
38517 +                       pci_unmap_page(pAC->PciDev,
38518 +                                       (dma_addr_t) pSkPacket->pFrag->pPhys,
38519 +                                       pSkPacket->pFrag->FragLen,
38520 +                                       PCI_DMA_FROMDEVICE);
38521 +                       pSkPacket->pFrag = pSkPacket->pFrag->pNext;
38522 +               }
38523 +
38524 +               DEV_KFREE_SKB_ANY(pSkPacket->pMBuf);
38525 +               pSkPacket->pMBuf        = NULL;
38526 +               pSkPacket = pSkPacket->pNext; /* get next packet */
38527 +       }
38528 +
38529 +       /*
38530 +       ** Append the available TX packets back to free queue
38531 +       */
38532 +       if (SendCmplPktQ.pHead != NULL) {
38533 +               spin_lock_irqsave(&(pAC->TxPort[Port][0].TxQ_free.QueueLock), Flags);
38534 +               if (pAC->TxPort[Port][0].TxQ_free.pTail != NULL) {
38535 +                       pAC->TxPort[Port][0].TxQ_free.pTail->pNext = SendCmplPktQ.pHead;
38536 +                       pAC->TxPort[Port][0].TxQ_free.pTail        = SendCmplPktQ.pTail;
38537 +                       if (pAC->TxPort[Port][0].TxQ_free.pHead->pNext == NULL) {
38538 +                               netif_wake_queue(pAC->dev[Port]);
38539 +                       }
38540 +               } else {
38541 +                       pAC->TxPort[Port][0].TxQ_free.pHead = SendCmplPktQ.pHead;
38542 +                       pAC->TxPort[Port][0].TxQ_free.pTail = SendCmplPktQ.pTail;
38543 +                       netif_wake_queue(pAC->dev[Port]);
38544 +               }
38545 +               if (Done == Put) {
38546 +                       netif_wake_queue(pAC->dev[Port]);
38547 +               }
38548 +               if (DoWakeQueue) {
38549 +                       netif_wake_queue(pAC->dev[Port]);
38550 +                       DoWakeQueue = SK_FALSE;
38551 +               }
38552 +               spin_unlock_irqrestore(&pAC->TxPort[Port][0].TxQ_free.QueueLock, Flags);
38553 +       }
38554 +
38555 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
38556 +               ("<== CheckForSendComplete()\n"));
38557 +
38558 +       return;
38559 +}      /* CheckForSendComplete */
38560 +
38561 +/*****************************************************************************
38562 + *
38563 + *     UnmapAndFreeTxPktBuffer
38564 + *
38565 + * Description:
38566 + *      This function free any allocated space of receive buffers
38567 + *
38568 + * Arguments:
38569 + *      pAC - A pointer to the adapter context struct.
38570 + *
38571 + */
38572 +static void UnmapAndFreeTxPktBuffer(
38573 +SK_AC       *pAC,       /* pointer to adapter context             */
38574 +SK_PACKET   *pSkPacket,        /* pointer to port struct of ring to fill */
38575 +int          TxPort)    /* TX port index                          */
38576 +{
38577 +       SK_FRAG  *pFrag = pSkPacket->pFrag;
38578 +
38579 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
38580 +               ("--> UnmapAndFreeTxPktBuffer\n"));
38581 +
38582 +       while (pFrag != NULL) {
38583 +               pci_unmap_page(pAC->PciDev,
38584 +                               (dma_addr_t) pFrag->pPhys,
38585 +                               pFrag->FragLen,
38586 +                               PCI_DMA_FROMDEVICE);
38587 +               pFrag = pFrag->pNext;
38588 +       }
38589 +
38590 +       DEV_KFREE_SKB_ANY(pSkPacket->pMBuf);
38591 +       pSkPacket->pMBuf        = NULL;
38592 +
38593 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
38594 +               ("<-- UnmapAndFreeTxPktBuffer\n"));
38595 +}
38596 +
38597 +/*****************************************************************************
38598 + *
38599 + *     HandleStatusLEs
38600 + *
38601 + * Description:
38602 + *     This function checks for any new status LEs that may have been
38603 +  *    received. Those status LEs may either be Rx or Tx ones.
38604 + *
38605 + * Returns:    N/A
38606 + */
38607 +static SK_BOOL HandleStatusLEs(
38608 +#ifdef CONFIG_SK98LIN_NAPI
38609 +SK_AC *pAC,       /* pointer to adapter context   */
38610 +int   *WorkDone,  /* Done counter needed for NAPI */
38611 +int    WorkToDo)  /* ToDo counter for NAPI        */
38612 +#else
38613 +SK_AC *pAC)       /* pointer to adapter context   */
38614 +#endif
38615 +{
38616 +       int       DoneTxA[SK_MAX_MACS];
38617 +       int       DoneTxS[SK_MAX_MACS];
38618 +       int       Port;
38619 +       SK_BOOL   handledStatLE = SK_FALSE;
38620 +       SK_BOOL   NewDone       = SK_FALSE;
38621 +       SK_HWLE  *pLE;
38622 +       SK_U16    HighVal;
38623 +       SK_U32    LowVal;
38624 +       SK_U8     OpCode;
38625 +       int       i;
38626 +
38627 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
38628 +               ("==> HandleStatusLEs\n"));
38629 +
38630 +       do {
38631 +               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
38632 +                       ("Check next Own Bit of ST-LE[%d]: 0x%li \n",
38633 +                       (pAC->StatusLETable.Done + 1) % NUM_LE_IN_TABLE(&pAC->StatusLETable),
38634 +                        OWN_OF_FIRST_LE(&pAC->StatusLETable)));
38635 +
38636 +               while (OWN_OF_FIRST_LE(&pAC->StatusLETable) == HW_OWNER) {
38637 +                       GET_ST_LE(pLE, &pAC->StatusLETable);
38638 +                       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
38639 +                               ("Working on finished status LE[%d]:\n",
38640 +                               GET_DONE_INDEX(&pAC->StatusLETable)));
38641 +                       SK_DBG_DUMP_ST_LE(pLE);
38642 +                       handledStatLE = SK_TRUE;
38643 +                       OpCode = STLE_GET_OPC(pLE) & ~HW_OWNER;
38644 +                       Port = STLE_GET_LINK(pLE);
38645 +
38646 +#ifdef USE_TIST_FOR_RESET
38647 +                       if (SK_ADAPTER_WAITING_FOR_TIST(pAC)) {
38648 +                               /* do we just have a tist LE ? */
38649 +                               if ((OpCode & OP_RXTIMESTAMP) == OP_RXTIMESTAMP) {
38650 +                                       for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
38651 +                                               if (SK_PORT_WAITING_FOR_ANY_TIST(pAC, i)) {
38652 +                                                       /* if a port is waiting for any tist it is done */
38653 +                                                       SK_CLR_STATE_FOR_PORT(pAC, i);
38654 +                                                       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DUMP,
38655 +                                                               ("Got any Tist on port %c (now 0x%X!!!)\n",
38656 +                                                               'A' + i, pAC->AdapterResetState));
38657 +                                               }
38658 +                                               if (SK_PORT_WAITING_FOR_SPECIFIC_TIST(pAC, i)) {
38659 +                                                       Y2_GET_TIST_LOW_VAL(pAC->IoBase, &LowVal);
38660 +                                                       if ((pAC->MinTistHi != pAC->GIni.GITimeStampCnt) ||
38661 +                                                               (pAC->MinTistLo < LowVal)) {
38662 +                                                               /* time is up now */
38663 +                                                               SK_CLR_STATE_FOR_PORT(pAC, i);
38664 +                                                               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DUMP,
38665 +                                                                       ("Got expected Tist on Port %c (now 0x%X)!!!\n",
38666 +                                                                       'A' + i, pAC->AdapterResetState));
38667 +#ifdef Y2_SYNC_CHECK
38668 +                                                               pAC->FramesWithoutSyncCheck =
38669 +                                                               Y2_RESYNC_WATERMARK;
38670 +#endif
38671 +                                                       } else {
38672 +                                                               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DUMP,
38673 +                                                                       ("Got Tist %l:%l on Port %c but still waiting\n",
38674 +                                                                       pAC->GIni.GITimeStampCnt, pAC->MinTistLo,
38675 +                                                                       'A' + i));
38676 +                                                       }
38677 +                                               }
38678 +                                       }
38679 +#ifndef Y2_RECOVERY
38680 +                                       if (!SK_ADAPTER_WAITING_FOR_TIST(pAC)) {
38681 +                                               /* nobody needs tist anymore - turn it off */
38682 +                                               Y2_DISABLE_TIST(pAC->IoBase);
38683 +                                               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DUMP,
38684 +                                               ("Turn off Tist !!!\n"));
38685 +                                       }
38686 +#endif
38687 +                               } else if (OpCode == OP_TXINDEXLE) {
38688 +                                       /*
38689 +                                        * change OpCode to notify the folowing code
38690 +                                        * to ignore the done index from this LE
38691 +                                        * unfortunately tist LEs will be generated only
38692 +                                        * for RxStat LEs
38693 +                                        * so in order to get a safe Done index for a
38694 +                                        * port currently waiting for a tist we have to
38695 +                                        * get the done index directly from the BMU
38696 +                                        */
38697 +                                       OpCode = OP_MOD_TXINDEX;
38698 +                                       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DUMP,
38699 +                                               ("Mark unusable TX_INDEX LE!!!\n"));
38700 +                               } else {
38701 +                                       if (SK_PORT_WAITING_FOR_TIST(pAC, Port)) {
38702 +                                               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DUMP,
38703 +                                                       ("Ignore LE 0x%X on Port %c!!!\n",
38704 +                                                       OpCode, 'A' + Port));
38705 +                                               OpCode = OP_MOD_LE;
38706 +#ifdef Y2_LE_CHECK
38707 +                                               /* mark entries invalid */
38708 +                                               pAC->LastOpc = 0xFF;
38709 +                                               pAC->LastPort = 3;
38710 +#endif
38711 +                                       }
38712 +                               }
38713 +                       } /* if (SK_ADAPTER_WAITING_FOR_TIST(pAC)) */
38714 +#endif
38715 +
38716 +
38717 +
38718 +
38719 +
38720 +#ifdef Y2_LE_CHECK
38721 +                       if (pAC->LastOpc != 0xFF) {
38722 +                               /* last opc is valid
38723 +                                * check if current opcode follows last opcode
38724 +                                */
38725 +                               if ((((OpCode & OP_RXTIMESTAMP) == OP_RXTIMESTAMP) && (pAC->LastOpc != OP_RXSTAT)) ||
38726 +                                   (((OpCode & OP_RXCHKS) == OP_RXCHKS) && (pAC->LastOpc != OP_RXTIMESTAMP)) ||
38727 +                                   ((OpCode == OP_RXSTAT) && (pAC->LastOpc != OP_RXCHKS))) {
38728 +
38729 +                                       /* opcode sequence broken
38730 +                                        * current LE is invalid
38731 +                                        */
38732 +
38733 +                                       if (pAC->LastOpc == OP_RXTIMESTAMP) {
38734 +                                               /* force invalid checksum */
38735 +                                               pLE->St.StUn.StRxTCPCSum.RxTCPSum1 = 1;
38736 +                                               pLE->St.StUn.StRxTCPCSum.RxTCPSum2 = 0;
38737 +                                               OpCode = pAC->LastOpc = OP_RXCHKS;
38738 +                                               Port = pAC->LastPort;
38739 +                                       } else if (pAC->LastOpc == OP_RXCHKS) {
38740 +                                               /* force invalid frame */
38741 +                                               Port = pAC->LastPort;
38742 +                                               pLE->St.Stat.BufLen = 64;
38743 +                                               pLE->St.StUn.StRxStatWord = GMR_FS_CRC_ERR;
38744 +                                               OpCode = pAC->LastOpc = OP_RXSTAT;
38745 +#ifdef Y2_SYNC_CHECK
38746 +                                               /* force rx sync check */
38747 +                                               pAC->FramesWithoutSyncCheck = Y2_RESYNC_WATERMARK;
38748 +#endif
38749 +                                       } else if (pAC->LastOpc == OP_RXSTAT) {
38750 +                                               /* create dont care tist */
38751 +                                               pLE->St.StUn.StRxTimeStamp = 0;
38752 +                                               OpCode = pAC->LastOpc = OP_RXTIMESTAMP;
38753 +                                               /* dont know the port yet */
38754 +                                       } else {
38755 +#ifdef DEBUG
38756 +                                               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
38757 +                                                       ("Unknown LastOpc %X for Timestamp on port %c.\n",
38758 +                                                       pAC->LastOpc, Port));
38759 +#endif
38760 +                                       }
38761 +                               }
38762 +                       }
38763 +#endif
38764 +
38765 +                       switch (OpCode) {
38766 +                       case OP_RXSTAT:
38767 +#ifdef Y2_RECOVERY
38768 +                               pAC->LastOpc = OP_RXSTAT;
38769 +#endif
38770 +                               /*
38771 +                               ** This is always the last Status LE belonging
38772 +                               ** to a received packet -> handle it...
38773 +                               */
38774 +                               if ((Port != 0) && (Port != 1)) {
38775 +                               /* Unknown port */
38776 +                                       panic("sk98lin: Unknown port %d\n",
38777 +                                       Port);
38778 +                               }
38779 +
38780 +                               HandleReceives(
38781 +                                       pAC,
38782 +                                       Port,
38783 +                                       STLE_GET_LEN(pLE),
38784 +                                       STLE_GET_FRSTATUS(pLE),
38785 +                                       pAC->StatusLETable.Bmu.Stat.TcpSum1,
38786 +                                       pAC->StatusLETable.Bmu.Stat.TcpSum2,
38787 +                                       pAC->StatusLETable.Bmu.Stat.RxTimeStamp,
38788 +                                       pAC->StatusLETable.Bmu.Stat.VlanId);
38789 +#ifdef CONFIG_SK98LIN_NAPI
38790 +                               if (*WorkDone >= WorkToDo) {
38791 +                                       break;
38792 +                               }
38793 +                               (*WorkDone)++;
38794 +#endif
38795 +                               break;
38796 +                       case OP_RXVLAN:
38797 +                               /* this value will be used for next RXSTAT */
38798 +                               pAC->StatusLETable.Bmu.Stat.VlanId = STLE_GET_VLAN(pLE);
38799 +                               break;
38800 +                       case OP_RXTIMEVLAN:
38801 +                               /* this value will be used for next RXSTAT */
38802 +                               pAC->StatusLETable.Bmu.Stat.VlanId = STLE_GET_VLAN(pLE);
38803 +                               /* fall through */
38804 +                       case OP_RXTIMESTAMP:
38805 +                               /* this value will be used for next RXSTAT */
38806 +                               pAC->StatusLETable.Bmu.Stat.RxTimeStamp = STLE_GET_TIST(pLE);
38807 +#ifdef Y2_RECOVERY
38808 +                               pAC->LastOpc = OP_RXTIMESTAMP;
38809 +                               pAC->LastPort = Port;
38810 +#endif
38811 +                               break;
38812 +                       case OP_RXCHKSVLAN:
38813 +                               /* this value will be used for next RXSTAT */
38814 +                               pAC->StatusLETable.Bmu.Stat.VlanId = STLE_GET_VLAN(pLE);
38815 +                               /* fall through */
38816 +                       case OP_RXCHKS:
38817 +                               /* this value will be used for next RXSTAT */
38818 +                               pAC->StatusLETable.Bmu.Stat.TcpSum1 = STLE_GET_TCP1(pLE);
38819 +                               pAC->StatusLETable.Bmu.Stat.TcpSum2 = STLE_GET_TCP2(pLE);
38820 +#ifdef Y2_RECOVERY
38821 +                               pAC->LastPort = Port;
38822 +                               pAC->LastOpc = OP_RXCHKS;
38823 +#endif
38824 +                               break;
38825 +                       case OP_RSS_HASH:
38826 +                               /* this value will be used for next RXSTAT */
38827 +#if 0
38828 +                               pAC->StatusLETable.Bmu.Stat.RssHashValue = STLE_GET_RSS(pLE);
38829 +#endif
38830 +                               break;
38831 +                       case OP_TXINDEXLE:
38832 +                               /*
38833 +                               ** :;:; TODO
38834 +                               ** it would be possible to check for which queues
38835 +                               ** the index has been changed and call
38836 +                               ** CheckForSendComplete() only for such queues
38837 +                               */
38838 +                               STLE_GET_DONE_IDX(pLE,LowVal,HighVal);
38839 +                               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
38840 +                                       ("LowVal: 0x%x HighVal: 0x%x\n", LowVal, HighVal));
38841 +
38842 +                               /*
38843 +                               ** It would be possible to check whether we really
38844 +                               ** need the values for second port or sync queue,
38845 +                               ** but I think checking whether we need them is
38846 +                               ** more expensive than the calculation
38847 +                               */
38848 +                               DoneTxA[0] = STLE_GET_DONE_IDX_TXA1(LowVal,HighVal);
38849 +                               DoneTxS[0] = STLE_GET_DONE_IDX_TXS1(LowVal,HighVal);
38850 +                               DoneTxA[1] = STLE_GET_DONE_IDX_TXA2(LowVal,HighVal);
38851 +                               DoneTxS[1] = STLE_GET_DONE_IDX_TXS2(LowVal,HighVal);
38852 +
38853 +                               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
38854 +                                       ("DoneTxa1 0x%x DoneTxS1: 0x%x DoneTxa2 0x%x DoneTxS2: 0x%x\n",
38855 +                                       DoneTxA[0], DoneTxS[0], DoneTxA[1], DoneTxS[1]));
38856 +
38857 +                               NewDone = SK_TRUE;
38858 +                               break;
38859 +#ifdef USE_TIST_FOR_RESET
38860 +                       case OP_MOD_TXINDEX:
38861 +                               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DUMP,
38862 +                                       ("OP_MOD_TXINDEX\n"));
38863 +                               SK_IN16(pAC->IoBase, Q_ADDR(Q_XA1, Q_DONE), &DoneTxA[0]);
38864 +                               if (pAC->GIni.GIMacsFound > 1) {
38865 +                                       SK_IN16(pAC->IoBase, Q_ADDR(Q_XA2, Q_DONE), &DoneTxA[1]);
38866 +                               }
38867 +                               NewDone = SK_TRUE;
38868 +                               break;
38869 +                       case OP_MOD_LE:
38870 +                               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DUMP,
38871 +                               ("Ignore marked LE on port in Reset\n"));
38872 +                               break;
38873 +#endif
38874 +
38875 +                       default:
38876 +                               /*
38877 +                               ** Have to handle the illegal Opcode in Status LE
38878 +                               */
38879 +                               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
38880 +                                       ("Unexpected OpCode\n"));
38881 +                               break;
38882 +                       }
38883 +
38884 +#ifdef Y2_RECOVERY
38885 +                       OpCode = STLE_GET_OPC(pLE) & ~HW_OWNER;
38886 +                       STLE_SET_OPC(pLE, OpCode);
38887 +#else
38888 +                       /*
38889 +                       ** Reset own bit we have to do this in order to detect a overflow
38890 +                       */
38891 +                       STLE_SET_OPC(pLE, SW_OWNER);
38892 +#endif
38893 +               } /* while (OWN_OF_FIRST_LE(&pAC->StatusLETable) == HW_OWNER) */
38894 +
38895 +               /*
38896 +               ** Now handle any new transmit complete
38897 +               */
38898 +               if (NewDone) {
38899 +                       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
38900 +                               ("Done Index for Tx BMU has been changed\n"));
38901 +                       for (Port = 0; Port < pAC->GIni.GIMacsFound; Port++) {
38902 +                               /*
38903 +                               ** Do we have a new Done idx ?
38904 +                               */
38905 +                               if (DoneTxA[Port] != GET_DONE_INDEX(&pAC->TxPort[Port][0].TxALET)) {
38906 +                                       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
38907 +                                               ("Check TxA%d\n", Port + 1));
38908 +                                       CheckForSendComplete(pAC, pAC->IoBase, Port,
38909 +                                               &(pAC->TxPort[Port][0].TxAQ_working),
38910 +                                               &pAC->TxPort[Port][0].TxALET,
38911 +                                               DoneTxA[Port]);
38912 +                               } else {
38913 +                                       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
38914 +                                               ("No changes for TxA%d\n", Port + 1));
38915 +                               }
38916 +#if USE_SYNC_TX_QUEUE
38917 +                               if (HW_SYNC_TX_SUPPORTED(pAC)) {
38918 +                                       /*
38919 +                                       ** Do we have a new Done idx ?
38920 +                                       */
38921 +                                       if (DoneTxS[Port] !=
38922 +                                               GET_DONE_INDEX(&pAC->TxPort[Port][0].TxSLET)) {
38923 +                                               SK_DBG_MSG(pAC, SK_DBGMOD_DRV,
38924 +                                                       SK_DBGCAT_DRV_INT_SRC,
38925 +                                                       ("Check TxS%d\n", Port));
38926 +                                               CheckForSendComplete(pAC, pAC->IoBase, Port,
38927 +                                                       &(pAC->TxPort[Port][0].TxSQ_working),
38928 +                                                       &pAC->TxPort[Port][0].TxSLET,
38929 +                                                       DoneTxS[Port]);
38930 +                                       } else {
38931 +                                               SK_DBG_MSG(pAC, SK_DBGMOD_DRV,
38932 +                                                       SK_DBGCAT_DRV_INT_SRC,
38933 +                                                       ("No changes for TxS%d\n", Port));
38934 +                                       }
38935 +                               }
38936 +#endif
38937 +                       }
38938 +               }
38939 +               NewDone = SK_FALSE;
38940 +
38941 +               /*
38942 +               ** Check whether we have to refill our RX table
38943 +               */
38944 +               if (HW_FEATURE(pAC, HWF_WA_DEV_420)) {
38945 +                       if (NbrRxBuffersInHW < MAX_NBR_RX_BUFFERS_IN_HW) {
38946 +                               for (Port = 0; Port < pAC->GIni.GIMacsFound; Port++) {
38947 +                                       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
38948 +                                               ("Check for refill of RxBuffers on Port %c\n", 'A' + Port));
38949 +                                       FillReceiveTableYukon2(pAC, pAC->IoBase, Port);
38950 +                               }
38951 +                       }
38952 +               } else {
38953 +                       for (Port = 0; Port < pAC->GIni.GIMacsFound; Port++) {
38954 +                               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
38955 +                                       ("Check for refill of RxBuffers on Port %c\n", 'A' + Port));
38956 +                               if (NUM_FREE_LE_IN_TABLE(&pAC->RxPort[Port].RxLET) >= 64) {
38957 +                                       FillReceiveTableYukon2(pAC, pAC->IoBase, Port);
38958 +                               }
38959 +                       }
38960 +               }
38961 +#ifdef CONFIG_SK98LIN_NAPI
38962 +               if (*WorkDone >= WorkToDo) {
38963 +                       break;
38964 +               }
38965 +#endif
38966 +       } while (OWN_OF_FIRST_LE(&pAC->StatusLETable) == HW_OWNER);
38967 +
38968 +       /*
38969 +       ** Clear status BMU
38970 +       */
38971 +       SK_OUT32(pAC->IoBase, STAT_CTRL, SC_STAT_CLR_IRQ);
38972 +
38973 +       return(handledStatLE);
38974 +}      /* HandleStatusLEs */
38975 +
38976 +/*****************************************************************************
38977 + *
38978 + *     AllocateAndInitLETables - allocate memory for the LETable and init
38979 + *
38980 + * Description:
38981 + *     This function will allocate space for the LETable and will also
38982 + *     initialize them. The size of the tables must have been specified
38983 + *     before.
38984 + *
38985 + * Arguments:
38986 + *     pAC - A pointer to the adapter context struct.
38987 + *
38988 + * Returns:
38989 + *     SK_TRUE  - all LETables initialized
38990 + *     SK_FALSE - failed
38991 + */
38992 +static SK_BOOL AllocateAndInitLETables(
38993 +SK_AC *pAC)  /* pointer to adapter context */
38994 +{
38995 +       char           *pVirtMemAddr;
38996 +       dma_addr_t     pPhysMemAddr = 0;
38997 +       SK_U32         CurrMac;
38998 +       unsigned       Size;
38999 +       unsigned       Aligned;
39000 +       unsigned       Alignment;
39001 +
39002 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_INIT,
39003 +               ("==> AllocateAndInitLETables()\n"));
39004 +
39005 +       /*
39006 +       ** Determine how much memory we need with respect to alignment
39007 +       */
39008 +       Alignment = MAX_LEN_OF_LE_TAB;
39009 +       Size = 0;
39010 +       for (CurrMac = 0; CurrMac < pAC->GIni.GIMacsFound; CurrMac++) {
39011 +               SK_ALIGN_SIZE(LE_TAB_SIZE(RX_MAX_LE), Alignment, Aligned);
39012 +               Size += Aligned;
39013 +               SK_ALIGN_SIZE(LE_TAB_SIZE(TXA_MAX_LE), Alignment, Aligned);
39014 +               Size += Aligned;
39015 +               SK_ALIGN_SIZE(LE_TAB_SIZE(TXS_MAX_LE), Alignment, Aligned);
39016 +               Size += Aligned;
39017 +       }
39018 +       SK_ALIGN_SIZE(LE_TAB_SIZE(ST_MAX_LE), Alignment, Aligned);
39019 +       Size += Aligned;
39020 +       Size += Alignment;
39021 +       pAC->SizeOfAlignedLETables = Size;
39022 +
39023 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_INIT,
39024 +                       ("Need %08x bytes in total\n", Size));
39025 +
39026 +       /*
39027 +       ** Allocate the memory
39028 +       */
39029 +       pVirtMemAddr = pci_alloc_consistent(pAC->PciDev, Size, &pPhysMemAddr);
39030 +       if (pVirtMemAddr == NULL) {
39031 +               SK_DBG_MSG(pAC, SK_DBGMOD_DRV,
39032 +                       SK_DBGCAT_INIT | SK_DBGCAT_DRV_ERROR,
39033 +                       ("AllocateAndInitLETables: kernel malloc failed!\n"));
39034 +               return (SK_FALSE);
39035 +       }
39036 +
39037 +       /*
39038 +       ** Initialize the memory
39039 +       */
39040 +       SK_MEMSET(pVirtMemAddr, 0, Size);
39041 +       ALIGN_ADDR(pVirtMemAddr, Alignment); /* Macro defined in skgew.h */
39042 +
39043 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_INIT,
39044 +               ("Virtual address of LETab is %8p!\n", pVirtMemAddr));
39045 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_INIT,
39046 +               ("Phys address of LETab is %8p!\n", (void *) pPhysMemAddr));
39047 +
39048 +       for (CurrMac = 0; CurrMac < pAC->GIni.GIMacsFound; CurrMac++) {
39049 +               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_INIT,
39050 +                       ("RxLeTable for Port %c", 'A' + CurrMac));
39051 +               SkGeY2InitSingleLETable(
39052 +                       pAC,
39053 +                       &pAC->RxPort[CurrMac].RxLET,
39054 +                       RX_MAX_LE,
39055 +                       pVirtMemAddr,
39056 +                       (SK_U32) (pPhysMemAddr & 0xffffffff),
39057 +                       (SK_U32) (((SK_U64) pPhysMemAddr) >> 32));
39058 +
39059 +               SK_ALIGN_SIZE(LE_TAB_SIZE(RX_MAX_LE), Alignment, Aligned);
39060 +               pVirtMemAddr += Aligned;
39061 +               pPhysMemAddr += Aligned;
39062 +
39063 +               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_INIT,
39064 +                       ("TxALeTable for Port %c", 'A' + CurrMac));
39065 +               SkGeY2InitSingleLETable(
39066 +                       pAC,
39067 +                       &pAC->TxPort[CurrMac][0].TxALET,
39068 +                       TXA_MAX_LE,
39069 +                       pVirtMemAddr,
39070 +                       (SK_U32) (pPhysMemAddr & 0xffffffff),
39071 +                       (SK_U32) (((SK_U64) pPhysMemAddr) >> 32));
39072 +
39073 +               SK_ALIGN_SIZE(LE_TAB_SIZE(TXA_MAX_LE), Alignment, Aligned);
39074 +               pVirtMemAddr += Aligned;
39075 +               pPhysMemAddr += Aligned;
39076 +
39077 +               SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_INIT,
39078 +                       ("TxSLeTable for Port %c", 'A' + CurrMac));
39079 +               SkGeY2InitSingleLETable(
39080 +                       pAC,
39081 +                       &pAC->TxPort[CurrMac][0].TxSLET,
39082 +                       TXS_MAX_LE,
39083 +                       pVirtMemAddr,
39084 +                       (SK_U32) (pPhysMemAddr & 0xffffffff),
39085 +                       (SK_U32) (((SK_U64) pPhysMemAddr) >> 32));
39086 +
39087 +               SK_ALIGN_SIZE(LE_TAB_SIZE(TXS_MAX_LE), Alignment, Aligned);
39088 +               pVirtMemAddr += Aligned;
39089 +               pPhysMemAddr += Aligned;
39090 +       }
39091 +
39092 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MSG,("StLeTable"));
39093 +
39094 +       SkGeY2InitSingleLETable(
39095 +               pAC,
39096 +               &pAC->StatusLETable,
39097 +               ST_MAX_LE,
39098 +               pVirtMemAddr,
39099 +               (SK_U32) (pPhysMemAddr & 0xffffffff),
39100 +               (SK_U32) (((SK_U64) pPhysMemAddr) >> 32));
39101 +
39102 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_INIT,
39103 +               ("<== AllocateAndInitLETables(OK)\n"));
39104 +       return(SK_TRUE);
39105 +}      /* AllocateAndInitLETables */
39106 +
39107 +/*****************************************************************************
39108 + *
39109 + *     AllocatePacketBuffersYukon2 - allocate packet and fragment buffers
39110 + *
39111 + * Description:
39112 + *      This function will allocate space for the packets and fragments
39113 + *
39114 + * Arguments:
39115 + *      pAC - A pointer to the adapter context struct.
39116 + *
39117 + * Returns:
39118 + *      SK_TRUE  - Memory was allocated correctly
39119 + *      SK_FALSE - An error occured
39120 + */
39121 +static SK_BOOL AllocatePacketBuffersYukon2(
39122 +SK_AC *pAC)  /* pointer to adapter context */
39123 +{
39124 +       SK_PACKET       *pRxPacket;
39125 +       SK_PACKET       *pTxPacket;
39126 +       SK_U32           CurrBuff;
39127 +       SK_U32           CurrMac;
39128 +       unsigned long    Flags; /* needed for POP/PUSH functions */
39129 +
39130 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_INIT,
39131 +               ("==> AllocatePacketBuffersYukon2()"));
39132 +
39133 +       for (CurrMac = 0; CurrMac < pAC->GIni.GIMacsFound; CurrMac++) {
39134 +               /*
39135 +               ** Allocate RX packet space, initialize the packets and
39136 +               ** add them to the RX waiting queue. Waiting queue means
39137 +               ** that packet and fragment are initialized, but no sk_buff
39138 +               ** has been assigned to it yet.
39139 +               */
39140 +               pAC->RxPort[CurrMac].ReceivePacketTable =
39141 +                       kmalloc((RX_MAX_NBR_BUFFERS * sizeof(SK_PACKET)), GFP_KERNEL);
39142 +
39143 +               if (pAC->RxPort[CurrMac].ReceivePacketTable == NULL) {
39144 +                       SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_INIT | SK_DBGCAT_DRV_ERROR,
39145 +                               ("AllocatePacketBuffersYukon2: no mem RxPkts (port %i)",CurrMac));
39146 +                       break;
39147 +               } else {
39148 +                       SK_MEMSET(pAC->RxPort[CurrMac].ReceivePacketTable, 0,
39149 +                               (RX_MAX_NBR_BUFFERS * sizeof(SK_PACKET)));
39150 +
39151 +                       pRxPacket = pAC->RxPort[CurrMac].ReceivePacketTable;
39152 +
39153 +                       for (CurrBuff=0;CurrBuff<RX_MAX_NBR_BUFFERS;CurrBuff++) {
39154 +                               pRxPacket->pFrag = &(pRxPacket->FragArray[0]);
39155 +                               pRxPacket->NumFrags = 1;
39156 +                               PUSH_PKT_AS_LAST_IN_QUEUE(&pAC->RxPort[CurrMac].RxQ_waiting, pRxPacket);
39157 +                               pRxPacket++;
39158 +                       }
39159 +               }
39160 +
39161 +               /*
39162 +               ** Allocate TX packet space, initialize the packets and
39163 +               ** add them to the TX free queue. Free queue means that
39164 +               ** packet is available and initialized, but no fragment
39165 +               ** has been assigned to it. (Must be done at TX side)
39166 +               */
39167 +               pAC->TxPort[CurrMac][0].TransmitPacketTable =
39168 +                       kmalloc((TX_MAX_NBR_BUFFERS * sizeof(SK_PACKET)), GFP_KERNEL);
39169 +
39170 +               if (pAC->TxPort[CurrMac][0].TransmitPacketTable == NULL) {
39171 +                       SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_INIT | SK_DBGCAT_DRV_ERROR,
39172 +                               ("AllocatePacketBuffersYukon2: no mem TxPkts (port %i)",CurrMac));
39173 +                       kfree(pAC->RxPort[CurrMac].ReceivePacketTable);
39174 +                       return(SK_FALSE);
39175 +               } else {
39176 +                       SK_MEMSET(pAC->TxPort[CurrMac][0].TransmitPacketTable, 0,
39177 +                               (TX_MAX_NBR_BUFFERS * sizeof(SK_PACKET)));
39178 +
39179 +                       pTxPacket = pAC->TxPort[CurrMac][0].TransmitPacketTable;
39180 +
39181 +                       for (CurrBuff=0;CurrBuff<TX_MAX_NBR_BUFFERS;CurrBuff++) {
39182 +                               PUSH_PKT_AS_LAST_IN_QUEUE(&pAC->TxPort[CurrMac][0].TxQ_free, pTxPacket);
39183 +                               pTxPacket++;
39184 +                       }
39185 +               }
39186 +       } /* end for (CurrMac = 0; CurrMac < pAC->GIni.GIMacsFound; CurrMac++) */
39187 +
39188 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_INIT,
39189 +               ("<== AllocatePacketBuffersYukon2 (OK)\n"));
39190 +       return(SK_TRUE);
39191 +
39192 +}      /* AllocatePacketBuffersYukon2 */
39193 +
39194 +/*****************************************************************************
39195 + *
39196 + *     FreeLETables - release allocated memory of LETables
39197 + *
39198 + * Description:
39199 + *      This function will free all resources of the LETables
39200 + *
39201 + * Arguments:
39202 + *      pAC - A pointer to the adapter context struct.
39203 + *
39204 + * Returns: N/A
39205 + */
39206 +static void FreeLETables(
39207 +SK_AC *pAC)  /* pointer to adapter control context */
39208 +{
39209 +       dma_addr_t      pPhysMemAddr;
39210 +       char            *pVirtMemAddr;
39211 +
39212 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MSG,
39213 +               ("==> FreeLETables()\n"));
39214 +
39215 +       /*
39216 +       ** The RxLETable is the first of all LET.
39217 +       ** Therefore we can use its address for the input
39218 +       ** of the free function.
39219 +       */
39220 +       pVirtMemAddr = (char *) pAC->RxPort[0].RxLET.pLETab;
39221 +       pPhysMemAddr = (((SK_U64) pAC->RxPort[0].RxLET.pPhyLETABHigh << (SK_U64) 32) |
39222 +                       ((SK_U64) pAC->RxPort[0].RxLET.pPhyLETABLow));
39223 +
39224 +       /* free continuous memory */
39225 +       pci_free_consistent(pAC->PciDev, pAC->SizeOfAlignedLETables,
39226 +                           pVirtMemAddr, pPhysMemAddr);
39227 +
39228 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MSG,
39229 +               ("<== FreeLETables()\n"));
39230 +}      /* FreeLETables */
39231 +
39232 +/*****************************************************************************
39233 + *
39234 + *     FreePacketBuffers - free's all packet buffers of an adapter
39235 + *
39236 + * Description:
39237 + *      This function will free all previously allocated memory of the
39238 + *     packet buffers.
39239 + *
39240 + * Arguments:
39241 + *      pAC - A pointer to the adapter context struct.
39242 + *
39243 + * Returns: N/A
39244 + */
39245 +static void FreePacketBuffers(
39246 +SK_AC *pAC)  /* pointer to adapter control context */
39247 +{
39248 +       int Port;
39249 +
39250 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MSG,
39251 +               ("==> FreePacketBuffers()\n"));
39252 +
39253 +       for (Port = 0; Port < pAC->GIni.GIMacsFound; Port++) {
39254 +               kfree(pAC->RxPort[Port].ReceivePacketTable);
39255 +               kfree(pAC->TxPort[Port][0].TransmitPacketTable);
39256 +       }
39257 +
39258 +       SK_DBG_MSG(pAC, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MSG,
39259 +               ("<== FreePacketBuffers()\n"));
39260 +}      /* FreePacketBuffers */
39261 +
39262 +/*****************************************************************************
39263 + *
39264 + *     AllocAndMapRxBuffer - fill one buffer into the receive packet/fragment
39265 + *
39266 + * Description:
39267 + *     The function allocates a new receive buffer and assigns it to the
39268 + *     the passsed receive packet/fragment
39269 + *
39270 + * Returns:
39271 + *     SK_TRUE - a buffer was allocated and assigned
39272 + *     SK_FALSE - a buffer could not be added
39273 + */
39274 +static SK_BOOL AllocAndMapRxBuffer(
39275 +SK_AC      *pAC,        /* pointer to the adapter control context */
39276 +SK_PACKET  *pSkPacket,  /* pointer to packet that is to fill      */
39277 +int         Port)       /* port the packet belongs to             */
39278 +{
39279 +       struct sk_buff *pMsgBlock;  /* pointer to a new message block  */
39280 +       SK_U64          PhysAddr;   /* physical address of a rx buffer */
39281 +
39282 +       SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_RX_PROGRESS,
39283 +               ("--> AllocAndMapRxBuffer (Port: %i)\n", Port));
39284 +
39285 +       pMsgBlock = alloc_skb(pAC->RxPort[Port].RxBufSize, GFP_ATOMIC);
39286 +       if (pMsgBlock == NULL) {
39287 +               SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
39288 +                       SK_DBGCAT_DRV_RX_PROGRESS | SK_DBGCAT_DRV_ERROR,
39289 +                       ("%s: Allocation of rx buffer failed !\n",
39290 +                       pAC->dev[Port]->name));
39291 +               SK_PNMI_CNT_NO_RX_BUF(pAC, pAC->RxPort[Port].PortIndex);
39292 +               return(SK_FALSE);
39293 +       }
39294 +       skb_reserve(pMsgBlock, 8);
39295 +
39296 +       PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
39297 +               virt_to_page(pMsgBlock->data),
39298 +               ((unsigned long) pMsgBlock->data &
39299 +               ~PAGE_MASK),
39300 +               pAC->RxPort[Port].RxBufSize,
39301 +               PCI_DMA_FROMDEVICE);
39302 +
39303 +       pSkPacket->pFrag->pVirt   = pMsgBlock->data;
39304 +       pSkPacket->pFrag->pPhys   = PhysAddr;
39305 +       pSkPacket->pFrag->FragLen = pAC->RxPort[Port].RxBufSize; /* for correct unmap */
39306 +       pSkPacket->pMBuf          = pMsgBlock;
39307 +       pSkPacket->PacketLen      = pAC->RxPort[Port].RxBufSize;
39308 +
39309 +       SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_RX_PROGRESS,
39310 +               ("<-- AllocAndMapRxBuffer\n"));
39311 +
39312 +       return (SK_TRUE);
39313 +}      /* AllocAndMapRxBuffer */
39314 +
39315 +/*******************************************************************************
39316 + *
39317 + * End of file
39318 + *
39319 + ******************************************************************************/
39320 diff -ruN linux-2.6.9.old/drivers/net/sk98lin/sky2le.c linux-2.6.9.new/drivers/net/sk98lin/sky2le.c
39321 --- linux-2.6.9.old/drivers/net/sk98lin/sky2le.c        1970-01-01 08:00:00.000000000 +0800
39322 +++ linux-2.6.9.new/drivers/net/sk98lin/sky2le.c        2006-12-07 14:35:03.000000000 +0800
39323 @@ -0,0 +1,510 @@
39324 +/*****************************************************************************
39325 + *
39326 + *     Name:           sky2le.c
39327 + *     Project:        Gigabit Ethernet Adapters, Common Modules
39328 + *     Version:        $Revision: 1.11 $
39329 + *     Date:           $Date: 2004/11/22 14:21:58 $
39330 + *     Purpose:        Functions for handling List Element Tables
39331 + *
39332 + *****************************************************************************/
39333 +
39334 +/******************************************************************************
39335 + *
39336 + *     (C)Copyright 2002-2004 Marvell.
39337 + *
39338 + *     This program is free software; you can redistribute it and/or modify
39339 + *     it under the terms of the GNU General Public License as published by
39340 + *     the Free Software Foundation; either version 2 of the License, or
39341 + *     (at your option) any later version.
39342 + *     The information in this file is provided "AS IS" without warranty.
39343 + *
39344 + ******************************************************************************/
39345 +
39346 +/*****************************************************************************
39347 + *
39348 + * Description:
39349 + *
39350 + * This module contains the code necessary for handling List Elements.
39351 + *
39352 + * Supported Gigabit Ethernet Chipsets:
39353 + *     Yukon-2 (PCI, PCI-X, PCI-Express)
39354 + *
39355 + * Include File Hierarchy:
39356 + *
39357 + *
39358 + *****************************************************************************/
39359 +#include "h/skdrv1st.h"
39360 +#include "h/skdrv2nd.h"
39361 +
39362 +/* defines *******************************************************************/
39363 +/* typedefs ******************************************************************/
39364 +/* global variables **********************************************************/
39365 +/* local variables ***********************************************************/
39366 +
39367 +#if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM))))
39368 +static const char SysKonnectFileId[] =
39369 +       "@(#) $Id: sky2le.c,v 1.11 2004/11/22 14:21:58 malthoff Exp $ (C) Marvell.";
39370 +#endif /* DEBUG || (!LINT && !SK_SLIM) */
39371 +
39372 +/* function prototypes *******************************************************/
39373 +
39374 +/*****************************************************************************
39375 + *
39376 + * SkGeY2InitSingleLETable() - initializes a list element table
39377 + *
39378 + * Description:
39379 + *     This function will initialize the selected list element table.
39380 + *     Should be called once during DriverInit. No InitLevel required.
39381 + *
39382 + * Arguments:
39383 + *     pAC                     - pointer to the adapter context struct.
39384 + *     pLETab          - pointer to list element table structure
39385 + *     NumLE           - number of list elements in this table
39386 + *     pVMem           - virtual address of memory allocated for this LE table
39387 + *     PMemLowAddr - physical address of memory to be used for the LE table
39388 + *     PMemHighAddr
39389 + *
39390 + * Returns:
39391 + *     nothing
39392 + */
39393 +void SkGeY2InitSingleLETable(
39394 +SK_AC  *pAC,                   /* pointer to adapter context */
39395 +SK_LE_TABLE    *pLETab,        /* pointer to list element table to be initialized */
39396 +unsigned int NumLE,            /* number of list elements to be filled in tab */
39397 +void   *pVMem,                 /* virtual address of memory used for list elements */
39398 +SK_U32 PMemLowAddr,    /* physical addr of mem used for LE */
39399 +SK_U32 PMemHighAddr)
39400 +{
39401 +       unsigned int i;
39402 +
39403 +       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
39404 +               ("==> SkGeY2InitSingleLETable()\n"));
39405 +
39406 +#ifdef DEBUG
39407 +       if (NumLE != 2) {       /* not table for polling unit */
39408 +               if ((NumLE % MIN_LEN_OF_LE_TAB) != 0 || NumLE > MAX_LEN_OF_LE_TAB) {
39409 +                       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
39410 +                               ("ERROR: Illegal number of list elements %d\n", NumLE));
39411 +               }
39412 +       }
39413 +#endif /* DEBUG */
39414 +
39415 +       /* special case: unused list element table */
39416 +       if (NumLE == 0) {
39417 +               PMemLowAddr = 0;
39418 +               PMemHighAddr = 0;
39419 +               pVMem = 0;
39420 +       }
39421 +
39422 +       /*
39423 +        * in order to get the best possible performance the macros to access
39424 +        * list elements use & instead of %
39425 +        * this requires the length of LE tables to be a power of 2
39426 +        */
39427 +
39428 +       /*
39429 +        * this code guarantees that we use the next power of 2 below the
39430 +        * value specified for NumLe - this way some LEs in the table may
39431 +        * not be used but the macros work correctly
39432 +        * this code does not check for bad values below 128 because in such a
39433 +        * case we cannot do anything here
39434 +        */
39435 +
39436 +       if ((NumLE != 2) && (NumLE != 0)) {
39437 +               /* no check for polling unit and unused sync Tx */
39438 +               i = MIN_LEN_OF_LE_TAB;
39439 +               while (NumLE > i) {
39440 +                       i *= 2;
39441 +                       if (i > MAX_LEN_OF_LE_TAB) {
39442 +                               break;
39443 +                       }
39444 +               }
39445 +               if (NumLE != i) {
39446 +                       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
39447 +                               ("ERROR: Illegal number of list elements %d adjusted to %d\n",
39448 +                               NumLE, (i / 2)));
39449 +                       NumLE = i / 2;
39450 +               }
39451 +       }
39452 +
39453 +       /* set addresses */
39454 +       pLETab->pPhyLETABLow = PMemLowAddr;
39455 +       pLETab->pPhyLETABHigh = PMemHighAddr;
39456 +       pLETab->pLETab = pVMem;
39457 +
39458 +       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
39459 +               ("contains %d LEs", NumLE));
39460 +       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
39461 +               (" and starts at virt %08lx and phys %08lx:%08lx\n",
39462 +               pVMem, PMemHighAddr, PMemLowAddr));
39463 +
39464 +       /* initialize indexes */
39465 +       pLETab->Done = 0;
39466 +       pLETab->Put = 0;
39467 +       pLETab->HwPut = 0;
39468 +       /* initialize size */
39469 +       pLETab->Num = NumLE;
39470 +
39471 +       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
39472 +               ("<== SkGeY2InitSingleLETable()\n"));
39473 +}      /* SkGeY2InitSingleLETable */
39474 +
39475 +/*****************************************************************************
39476 + *
39477 + * SkGeY2InitPrefetchUnit() - Initialize a Prefetch Unit
39478 + *
39479 + * Description:
39480 + *     Calling this function requires an already configured list element
39481 + *     table. The prefetch unit to be configured is specified in the parameter
39482 + *     'Queue'. The function is able to initialze the prefetch units of
39483 + *     the following queues: Q_R1, Q_R2, Q_XS1, Q_XS2, Q_XA1, Q_XA2.
39484 + *     The funcution should be called before SkGeInitPort().
39485 + *
39486 + * Arguments:
39487 + *     pAC - pointer to the adapter context struct.
39488 + *     IoC - I/O context.
39489 + *     Queue - I/O offset of queue e.g. Q_XA1.
39490 + *     pLETab - pointer to list element table to be initialized
39491 + *
39492 + * Returns: N/A
39493 + */
39494 +void SkGeY2InitPrefetchUnit(
39495 +SK_AC  *pAC,                   /* pointer to adapter context */
39496 +SK_IOC IoC,                    /* I/O context */
39497 +unsigned int Queue,            /* Queue offset for finding the right registers */
39498 +SK_LE_TABLE    *pLETab)        /* pointer to list element table to be initialized */
39499 +{
39500 +       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
39501 +               ("==> SkGeY2InitPrefetchUnit()\n"));
39502 +
39503 +#ifdef DEBUG
39504 +       if (Queue != Q_R1 && Queue != Q_R2 && Queue != Q_XS1 &&
39505 +               Queue != Q_XS2 && Queue != Q_XA1 && Queue != Q_XA2) {
39506 +               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_ERR,
39507 +                       ("ERROR: Illegal queue identifier %x\n", Queue));
39508 +       }
39509 +#endif /* DEBUG */
39510 +
39511 +       /* disable the prefetch unit */
39512 +       SK_OUT32(IoC, Y2_PREF_Q_ADDR(Queue, PREF_UNIT_CTRL_REG), PREF_UNIT_RST_SET);
39513 +       SK_OUT32(IoC, Y2_PREF_Q_ADDR(Queue, PREF_UNIT_CTRL_REG), PREF_UNIT_RST_CLR);
39514 +
39515 +       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
39516 +               ("Base address: %08lx:%08lx\n", pLETab->pPhyLETABHigh,
39517 +               pLETab->pPhyLETABLow));
39518 +
39519 +       /* Set the list base address  high part*/
39520 +       SK_OUT32(IoC, Y2_PREF_Q_ADDR(Queue, PREF_UNIT_ADDR_HI_REG),
39521 +               pLETab->pPhyLETABHigh);
39522 +
39523 +       /* Set the list base address low part */
39524 +       SK_OUT32(IoC, Y2_PREF_Q_ADDR(Queue, PREF_UNIT_ADDR_LOW_REG),
39525 +               pLETab->pPhyLETABLow);
39526 +
39527 +       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
39528 +               ("Last index: %d\n", pLETab->Num-1));
39529 +
39530 +       /* Set the list last index */
39531 +       SK_OUT16(IoC, Y2_PREF_Q_ADDR(Queue, PREF_UNIT_LAST_IDX_REG),
39532 +               (SK_U16)(pLETab->Num - 1));
39533 +
39534 +       /* turn on prefetch unit */
39535 +       SK_OUT32(IoC, Y2_PREF_Q_ADDR(Queue, PREF_UNIT_CTRL_REG), PREF_UNIT_OP_ON);
39536 +
39537 +       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
39538 +               ("<== SkGeY2InitPrefetchUnit()\n"));
39539 +}      /* SkGeY2InitPrefetchUnit */
39540 +
39541 +
39542 +/*****************************************************************************
39543 + *
39544 + * SkGeY2InitStatBmu() -       Initialize the Status BMU
39545 + *
39546 + * Description:
39547 + *     Calling this function requires an already configured list element
39548 + *     table. Ensure the status BMU is only initialized once during
39549 + *  DriverInit - InitLevel2 required.
39550 + *
39551 + * Arguments:
39552 + *     pAC - pointer to the adapter context struct.
39553 + *     IoC - I/O context.
39554 + *     pLETab - pointer to status LE table to be initialized
39555 + *
39556 + * Returns: N/A
39557 + */
39558 +void SkGeY2InitStatBmu(
39559 +SK_AC  *pAC,                   /* pointer to adapter context */
39560 +SK_IOC IoC,                    /* I/O context */
39561 +SK_LE_TABLE    *pLETab)        /* pointer to status LE table */
39562 +{
39563 +       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
39564 +               ("==> SkGeY2InitStatBmu()\n"));
39565 +
39566 +       /* disable the prefetch unit */
39567 +       SK_OUT32(IoC, STAT_CTRL, SC_STAT_RST_SET);
39568 +       SK_OUT32(IoC, STAT_CTRL, SC_STAT_RST_CLR);
39569 +
39570 +       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
39571 +               ("Base address Low: %08lX\n", pLETab->pPhyLETABLow));
39572 +
39573 +       /* Set the list base address */
39574 +       SK_OUT32(IoC, STAT_LIST_ADDR_LO, pLETab->pPhyLETABLow);
39575 +
39576 +       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
39577 +               ("Base address High: %08lX\n", pLETab->pPhyLETABHigh));
39578 +
39579 +       SK_OUT32(IoC, STAT_LIST_ADDR_HI, pLETab->pPhyLETABHigh);
39580 +
39581 +       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
39582 +               ("Last index: %d\n", pLETab->Num - 1));
39583 +
39584 +       /* Set the list last index */
39585 +       SK_OUT16(IoC, STAT_LAST_IDX, (SK_U16)(pLETab->Num - 1));
39586 +
39587 +       if (HW_FEATURE(pAC, HWF_WA_DEV_43_418)) {
39588 +
39589 +               SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
39590 +                       ("Set Tx index threshold\n"));
39591 +               /* WA for dev. #4.3 */
39592 +               SK_OUT16(IoC, STAT_TX_IDX_TH, ST_TXTH_IDX_MASK);
39593 +
39594 +               /* set Status-FIFO watermark */
39595 +               SK_OUT8(IoC, STAT_FIFO_WM, 0x21);               /* WA for dev. #4.18 */
39596 +
39597 +               /* set Status-FIFO ISR watermark */
39598 +               SK_OUT8(IoC, STAT_FIFO_ISR_WM, 0x07);   /* WA for dev. #4.18 */
39599 +
39600 +               /* WA for dev. #4.3 and #4.18 */
39601 +               /* set Status-FIFO Tx timer init value */
39602 +               SK_OUT32(IoC, STAT_TX_TIMER_INI, HW_MS_TO_TICKS(pAC, 10));
39603 +       }
39604 +       else {
39605 +               /*
39606 +                * Further settings may be added if required...
39607 +                * 1) Status-FIFO watermark (STAT_FIFO_WM, STAT_FIFO_ISR_WM)
39608 +                * 2) Status-FIFO timer values (STAT_TX_TIMER_INI,
39609 +                *              STAT_LEV_TIMER_INI and STAT_ISR_TIMER_INI)
39610 +                * but tests shows that the default values give the best results,
39611 +                * therefore the defaults are used.
39612 +                */
39613 +
39614 +               /*
39615 +                * Theses settings should avoid the
39616 +                * temporary hanging of the status BMU.
39617 +                * May be not all required... still under investigation...
39618 +                */
39619 +               SK_OUT16(IoC, STAT_TX_IDX_TH, 0x000a);
39620 +
39621 +               /* set Status-FIFO watermark */
39622 +               SK_OUT8(IoC, STAT_FIFO_WM, 0x10);
39623 +
39624 +
39625 +               /* set Status-FIFO ISR watermark */
39626 +               if (HW_FEATURE(pAC, HWF_WA_DEV_4109)) {
39627 +                       SK_OUT8(IoC, STAT_FIFO_ISR_WM, 0x10);
39628 +               }
39629 +               else {
39630 +                       SK_OUT8(IoC, STAT_FIFO_ISR_WM, 0x04);
39631 +               }
39632 +
39633 +               SK_OUT32(IoC, STAT_ISR_TIMER_INI, 0x0190);
39634 +       }
39635 +
39636 +       /* start Status-FIFO timer */
39637 +       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
39638 +               ("Start Status FiFo timer\n"));
39639 +
39640 +       /* enable the prefetch unit */
39641 +       /* operational bit not functional for Yukon-EC, but fixed in Yukon-2 */
39642 +       SK_OUT32(IoC, STAT_CTRL, SC_STAT_OP_ON);
39643 +
39644 +       /* start Status-FIFO timer */
39645 +       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
39646 +               ("Start Status FiFo timer\n"));
39647 +
39648 +       SK_OUT8(IoC, STAT_TX_TIMER_CTRL, TIM_START);
39649 +       SK_OUT8(IoC, STAT_LEV_TIMER_CTRL, TIM_START);
39650 +       SK_OUT8(IoC, STAT_ISR_TIMER_CTRL, TIM_START);
39651 +
39652 +       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
39653 +               ("<== SkGeY2InitStatBmu()\n"));
39654 +}      /* SkGeY2InitStatBmu */
39655 +
39656 +#ifdef USE_POLLING_UNIT
39657 +/*****************************************************************************
39658 + *
39659 + * SkGeY2InitPollUnit() -      Initialize the Polling Unit
39660 + *
39661 + * Description:
39662 + *     This function will write the data of one polling LE table into the
39663 + *  adapter.
39664 + *
39665 + * Arguments:
39666 + *     pAC - pointer to the adapter context struct.
39667 + *     IoC - I/O context.
39668 + *     pLETab - pointer to polling LE table to be initialized
39669 + *
39670 + * Returns: N/A
39671 + */
39672 +void SkGeY2InitPollUnit(
39673 +SK_AC  *pAC,                   /* pointer to adapter context */
39674 +SK_IOC IoC,                    /* I/O context */
39675 +SK_LE_TABLE    *pLETab)        /* pointer to polling LE table */
39676 +{
39677 +       SK_HWLE *pLE;
39678 +       int     i;
39679 +#ifdef VCPU
39680 +       VCPU_VARS();
39681 +#endif /* VCPU */
39682 +
39683 +       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
39684 +               ("==> SkGeY2InitPollUnit()\n"));
39685 +
39686 +#ifdef VCPU
39687 +       for (i = 0; i < SK_MAX_MACS; i++) {
39688 +               GET_PO_LE(pLE, pLETab, i);
39689 +               VCPU_START_AND_COPY_LE();
39690 +               /* initialize polling LE but leave indexes invalid */
39691 +               POLE_SET_OPC(pLE, OP_PUTIDX | HW_OWNER);
39692 +               POLE_SET_LINK(pLE, i);
39693 +               POLE_SET_RXIDX(pLE, 0);
39694 +               POLE_SET_TXAIDX(pLE, 0);
39695 +               POLE_SET_TXSIDX(pLE, 0);
39696 +               VCPU_WRITE_LE();
39697 +               SK_DBG_DUMP_PO_LE(pLE);
39698 +       }
39699 +#endif /* VCPU */
39700 +
39701 +       /* disable the polling unit */
39702 +       SK_OUT32(IoC, POLL_CTRL, PC_POLL_RST_SET);
39703 +       SK_OUT32(IoC, POLL_CTRL, PC_POLL_RST_CLR);
39704 +
39705 +       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
39706 +               ("Base address Low: %08lX\n", pLETab->pPhyLETABLow));
39707 +
39708 +       /* Set the list base address */
39709 +       SK_OUT32(IoC, POLL_LIST_ADDR_LO, pLETab->pPhyLETABLow);
39710 +
39711 +       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
39712 +               ("Base address High: %08lX\n", pLETab->pPhyLETABHigh));
39713 +
39714 +       SK_OUT32(IoC, POLL_LIST_ADDR_HI, pLETab->pPhyLETABHigh);
39715 +
39716 +       /* we don't need to write the last index - it is hardwired to 1 */
39717 +
39718 +       /* enable the prefetch unit */
39719 +       SK_OUT32(IoC, POLL_CTRL, PC_POLL_OP_ON);
39720 +
39721 +       /*
39722 +        * now we have to start the descriptor poll timer because it triggers
39723 +        * the polling unit
39724 +        */
39725 +
39726 +       /*
39727 +        * still playing with the value (timer runs at 125 MHz)
39728 +        * descriptor poll timer is enabled by GeInit
39729 +        */
39730 +       SK_OUT32(IoC, B28_DPT_INI,
39731 +               (SK_DPOLL_DEF_Y2 * (SK_U32)pAC->GIni.GIHstClkFact / 100));
39732 +
39733 +       SK_OUT8(IoC, B28_DPT_CTRL, TIM_START);
39734 +
39735 +       SK_DBG_MSG(pAC, SK_DBGMOD_HWM, SK_DBGCAT_INIT,
39736 +               ("<== SkGeY2InitPollUnit()\n"));
39737 +}      /* SkGeY2InitPollUnit */
39738 +#endif /* USE_POLLING_UNIT */
39739 +
39740 +
39741 +/******************************************************************************
39742 + *
39743 + * SkGeY2SetPutIndex
39744 + *
39745 + * Description:
39746 + *   This function is writing the Done index of a transmit
39747 + *   list element table.
39748 + *
39749 + * Notes:
39750 + *     Dev. Issue 4.2
39751 + *
39752 + * Returns: N/A
39753 + */
39754 +void SkGeY2SetPutIndex(
39755 +SK_AC  *pAC,                                   /* pointer to adapter context */
39756 +SK_IOC IoC,                                    /* pointer to the IO context */
39757 +SK_U32 StartAddrPrefetchUnit,  /* start address of the prefetch unit */
39758 +SK_LE_TABLE    *pLETab)                        /* list element table to work with */
39759 +{
39760 +       unsigned int Put;
39761 +       SK_U16 EndOfListIndex;
39762 +       SK_U16 HwGetIndex;
39763 +       SK_U16 HwPutIndex;
39764 +
39765 +       /* set put index we would like to write */
39766 +       Put = GET_PUT_IDX(pLETab);
39767 +
39768 +       /*
39769 +        * in this case we wrap around
39770 +        * new put is lower than last put given to hw
39771 +        */
39772 +       if (Put < pLETab->HwPut) {
39773 +
39774 +               /* set put index = last index of list */
39775 +               EndOfListIndex = (NUM_LE_IN_TABLE(pLETab)-1);
39776 +
39777 +               /* read get index of hw prefetch unit */
39778 +               SK_IN16(IoC, (StartAddrPrefetchUnit + PREF_UNIT_GET_IDX_REG),
39779 +                       &HwGetIndex);
39780 +
39781 +               /* read put index of hw prefetch unit */
39782 +               SK_IN16(IoC, (StartAddrPrefetchUnit + PREF_UNIT_PUT_IDX_REG),
39783 +                       &HwPutIndex);
39784 +
39785 +               /* prefetch unit reached end of list */
39786 +               /* prefetch unit reached first list element */
39787 +               if (HwGetIndex == 0) {
39788 +                       /* restore watermark */
39789 +                       SK_OUT8(IoC, StartAddrPrefetchUnit + PREF_UNIT_FIFO_WM_REG, 0xe0U);
39790 +                       /* write put index */
39791 +                       SK_OUT16(IoC, StartAddrPrefetchUnit + PREF_UNIT_PUT_IDX_REG,
39792 +                               (SK_U16)Put);
39793 +
39794 +                       /* remember put index  we wrote to hw */
39795 +                       pLETab->HwPut = Put;
39796 +               }
39797 +               else if (HwGetIndex == EndOfListIndex) {
39798 +                       /* set watermark to one list element */
39799 +                       SK_OUT8(IoC, StartAddrPrefetchUnit + PREF_UNIT_FIFO_WM_REG, 8);
39800 +                       /* set put index to first list element */
39801 +                       SK_OUT16(IoC, StartAddrPrefetchUnit + PREF_UNIT_PUT_IDX_REG, 0);
39802 +               }
39803 +               /* prefetch unit did not reach end of list yet */
39804 +               /* and we did not write put index to end of list yet */
39805 +               else if ((HwPutIndex != EndOfListIndex) &&
39806 +                                (HwGetIndex != EndOfListIndex)) {
39807 +                       /* write put index */
39808 +                       SK_OUT16(IoC, StartAddrPrefetchUnit + PREF_UNIT_PUT_IDX_REG,
39809 +                               EndOfListIndex);
39810 +               }
39811 +               else {
39812 +                       /* do nothing */
39813 +               }
39814 +       }
39815 +       else {
39816 +#ifdef XXX             /* leads in to problems in the Windows Driver */
39817 +               if (Put != pLETab->HwPut) {
39818 +                       /* write put index */
39819 +                       SK_OUT16(IoC, StartAddrPrefetchUnit + PREF_UNIT_PUT_IDX_REG,
39820 +                               (SK_U16)Put);
39821 +                       /* update put index */
39822 +                       UPDATE_HWPUT_IDX(pLETab);
39823 +               }
39824 +#else
39825 +               /* write put index */
39826 +               SK_OUT16(IoC, StartAddrPrefetchUnit + PREF_UNIT_PUT_IDX_REG,
39827 +                       (SK_U16)Put);
39828 +               /* update put index */
39829 +               UPDATE_HWPUT_IDX(pLETab);
39830 +#endif
39831 +       }
39832 +}      /* SkGeY2SetPutIndex */
39833 +